Embedded germanium-silicon device and preparation method thereof
By doping carbon into the inner wall of the source and drain trench of embedded silicon germanium devices and diffusing to the side walls by heat treatment, the problem of insufficient performance of existing devices is solved, and a higher dielectric layer breakdown performance is achieved.
Patent Information
- Application Number
- CN202311222923.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-21
- Publication Date
- 2025-03-25
AI Technical Summary
The TDDB performance of existing embedded silicon germanium PMOS devices is difficult to reach the ideal level, which has become a performance bottleneck.
Carbon is doped in the inner wall of the source and drain trench, and the doped carbon is diffused to the side wall by heat treatment to form a carbon doped region to inhibit the diffusion of P-type ions in the silicon germanium structure into the substrate under the gate structure.
The p-type ions diffusion is suppressed by the diffusion region of doped carbon, reducing the risk of diffusion into the conductive channel or gate dielectric layer, thereby improving the TDDB performance of embedded silicon germanium devices.
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Figure CN119698060A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of integrated circuit manufacturing, and in particular to an embedded germanium silicon device and a preparation method thereof. Background Art
[0002] With the miniaturization of complementary metal oxide semiconductor (CMOS) technology, the size of components is getting smaller and smaller, and the gate length of transistors is becoming shorter than before, resulting in a decrease in carrier mobility, which in turn causes a decrease in the on-state current of the device and degradation of device performance. Improving the performance of CMOS devices by only scaling down the gate dielectric layer is subject to more and more physical and process limitations. Therefore, embedded silicon germanium technology is an effective mechanism for improving carrier mobility and is widely used to improve the performance of PMOS devices. It increases the hole mobility of PMOS by generating compressive stress in the channel, thereby improving the current driving capability of the transistor.
[0003] Generally, the formation process of the embedded germanium-silicon structure includes: etching a groove on a silicon substrate, epitaxially growing a germanium-silicon layer in the groove as a source-drain structure, and utilizing the mismatch between the lattice constants of germanium and silicon to generate lateral compressive stress on the channel, thereby improving the hole mobility in the channel.
[0004] However, the TDDB (Time-Dependent Di-electric Breakdown) of the PMOS device with embedded SiGe formed by the above process is difficult to achieve a relatively ideal performance, which becomes a bottleneck. Summary of the invention
[0005] The object of the present invention is to provide an embedded silicon-germanium device and a preparation method thereof, so as to improve the TDDB performance of the embedded silicon-germanium device.
[0006] In order to solve the above technical problems, the embedded germanium silicon device provided by the present invention comprises:
[0007] A substrate, wherein a gate structure is provided on the substrate;
[0008] Source-drain trenches are provided in the substrate on both sides of the gate structure;
[0009] A silicon-germanium structure, disposed in the source-drain trench and doped with P-type ions;
[0010] Wherein, the inner wall of the source-drain trench is doped with carbon to inhibit the P-type ions from diffusing into the substrate under the gate structure.
[0011] Optionally, the inner wall of the source-drain trench has a convex corner area and a planar area, and the doping carbon concentration of the planar area located on the side wall of the source-drain trench is greater than the doping carbon concentration of the convex corner area located on the side wall of the source-drain trench.
[0012] Optionally, the doping carbon concentration in the convex corner region of the sidewall of the source / drain trench is 0.
[0013] Optionally, the doping carbon concentration in the planar region located on the sidewalls of the source / drain trench is greater than the doping carbon concentration in the bottom wall of the source / drain trench.
[0014] According to another aspect of the present invention, a method for preparing an embedded germanium silicon device is also provided, comprising:
[0015] Providing a substrate, on which a gate structure is provided, and source-drain trenches are formed in the substrate on both sides of the gate structure;
[0016] Epitaxially forming a carbon-containing sacrificial layer in the source-drain trench to cover the inner wall of the source-drain trench, wherein the carbon-containing sacrificial layer is doped with carbon;
[0017] Performing a heat treatment process to diffuse the doped carbon at least to the sidewalls of the source / drain trench;
[0018] The carbon-containing sacrificial layer is removed, and a germanium-silicon structure is epitaxially formed in the source-drain trench as a source-drain structure, and the germanium-silicon structure is doped with P-type ions.
[0019] Optionally, the material of the carbon-containing sacrificial layer includes germanium silicon carbon.
[0020] Optionally, the inner wall of the source-drain trench includes a convex corner area and a plane area, and before forming the carbon-containing sacrificial layer, the process further includes epitaxially forming a diffusion inhibition layer in the source-drain trench, wherein the thickness of the diffusion inhibition layer in the convex corner area is greater than the thickness of the diffusion inhibition layer in the plane area;
[0021] When the carbon-containing sacrificial layer is formed, the carbon-containing sacrificial layer covers the diffusion inhibition layer and the planar area. When the heat treatment process is performed, the diffusion inhibition layer is used to make the doping carbon concentration of the planar area located on the side wall of the source and drain trench greater than the doping carbon concentration of the convex corner area located on the side wall of the source and drain trench. After removing the carbon-containing sacrificial layer, the diffusion inhibition layer is also removed to expose the source and drain trenches.
[0022] Optionally, the material of the diffusion suppression layer includes germanium silicon.
[0023] Optionally, the diffusion suppression layer covers the convex corner area and exposes the planar area of the sidewall of the source / drain trench.
[0024] Optionally, before forming the silicon-germanium structure in the source-drain trench, the method further includes first using hydrogen plasma to remove part of the carbon on the inner wall of the source-drain trench, and then using a SiCoNi process to remove the oxide on the inner wall of the source-drain trench.
[0025] To summarize, before forming the germanium silicon structure in the source and drain grooves, the present invention first forms a carbon-containing sacrificial layer doped with carbon, and then diffuses the doped carbon to at least the side walls of the source and drain grooves through a heat treatment process, and utilizes the doped carbon on the inner walls of the source and drain grooves to inhibit the P-type ions in the germanium silicon structure from diffusing into the substrate under the gate structure (i.e., diffusing to between the source and drain and the gate), thereby reducing the risk of P-type ions diffusing into the conductive channel or the gate dielectric layer, thereby improving the time-dependent dielectric breakdown (TDDB) performance of the embedded germanium silicon device, and providing a process window for further improving the device performance in the future. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] Those skilled in the art should understand that the drawings are provided for a better understanding of the present invention, but do not constitute any limitation on the scope of the present invention.
[0027] Figure 1 is a flow chart of a method for preparing an embedded germanium silicon device provided in Example 1;
[0028] Figure 2a to Figure 2f A schematic structural diagram corresponding to corresponding steps of the method for preparing an embedded germanium silicon device provided in Example 1;
[0029] Figure 3 It is a flow chart of the method for preparing the embedded germanium silicon device provided in the second embodiment.
[0030] In the attached figure:
[0031] 10-substrate; 11-patterned mask; 12-gate structure; 20-source-drain groove; 21-first convex corner area; 22-first plane area; 23-second convex corner area; 24-second plane area; 31-diffusion inhibition layer; 32-carbon-containing sacrificial layer; 33-doped carbon area; 34-germanium silicon structure. DETAILED DESCRIPTION
[0032] In order to make the purpose, advantages and features of the present invention clearer, the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the drawings is often a part of the actual structure. In particular, the emphasis of each drawing is different, and sometimes different scales are used.
[0033] As used in the present invention, the singular forms "one", "an", and "the" include plural objects, the term "or" is usually used to include the meaning of "and / or", the term "several" is usually used to include the meaning of "at least one", and the term "at least two" is usually used to include the meaning of "two or more". In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined as "first", "second", and "third" may explicitly or implicitly include one or at least two of the features, unless the content clearly indicates otherwise.
[0034] Embodiment 1
[0035] Figure 1 This is a flow chart of the method for preparing the embedded germanium silicon device provided in Example 1.
[0036] like Figure 1 As shown, the method for preparing the embedded germanium silicon device provided in this embodiment includes:
[0037] S01: providing a substrate, on which a gate structure is provided, source-drain trenches are formed in the substrate on both sides of the gate structure, and inner walls of the source-drain trenches include convex corner areas and plane areas;
[0038] S02: epitaxially forming a diffusion suppression layer in the source / drain trench, wherein the thickness of the diffusion suppression layer in the convex corner area is greater than the thickness of the diffusion suppression layer in the planar area;
[0039] S03: epitaxially forming a carbon-containing sacrificial layer in the source-drain trench to cover the diffusion suppression layer and the planar region, wherein the carbon-containing sacrificial layer is doped with carbon;
[0040] S04: performing a heat treatment process to diffuse the doped carbon to the planar area of the sidewall of the source / drain trench;
[0041] S05: removing the carbon-containing sacrificial layer and the diffusion suppression layer, and epitaxially forming a germanium-silicon structure in the source-drain trench as a source-drain structure, wherein the germanium-silicon structure is doped with P-type ions.
[0042] Figure 2a to Figure 2f The schematic diagram of the structure corresponding to the corresponding steps of the method for preparing the embedded germanium silicon device provided in this embodiment is shown below. Figure 2a to Figure 2f The preparation method of the embedded germanium silicon device is described in detail.
[0043] First, please refer to Figure 2a, performing step S01, providing a substrate 10, on which a gate structure 12 is disposed, forming source-drain trenches 20 in the substrate 10 on both sides of the gate structure 12, and the inner wall of the source-drain trench 20 includes a convex corner area and a plane area.
[0044] The substrate 10 may be any suitable silicon base material known to those skilled in the art, for example, at least one of the following materials: silicon, silicon on insulator, silicon stacked on insulator, silicon germanium stacked on insulator, silicon germanium on insulator, etc. In this embodiment, the material of the substrate 10 is described by taking a silicon wafer as an example.
[0045] A gate structure 12 is formed on the surface of the substrate 10, and a patterned mask 11 may be provided to cover the surface of the substrate 10, exposing the source-drain trenches 20 on both sides of the gate structure 12 (or between the gate structures 12). The formation process may include: performing dry etching on the substrate 10 to a preset depth using the patterned mask 11 (or the gate structure 12), and then performing wet etching using an alkaline solution (such as TMAH), and forming the source-drain trenches 20 with convex corners by anisotropic etching of different crystal orientations of silicon.
[0046] The sidewalls and bottom wall (inner wall) of the source-drain trench 20 may be composed of a plurality of planes (or similar planes), and convex angles (protruding outward) are formed between adjacent planes, that is, the inner wall of the source-drain trench 20 may be composed of a plane area and a convex angle area, and the convex angle area may include the convex angle and a partial plane area near the convex angle, that is, the convex angle area is located at the edge of the plane area. Part of the convex angle located on the sidewall extends into the substrate 10 below the gate structure 12, that is, into the conductive channel. In this embodiment, the source-drain trench 20 may be sigma-shaped, that is, the sidewalls of the source-drain trench 20 are sigma-shaped, and the inner wall of the source-drain trench 20 may have a first convex angle area 21 located on the sidewall, a first plane area 22 located on the sidewall, a second convex angle area 23 located on the bottom wall, and a second plane area 24 located on the bottom wall.
[0047] Next, please refer to Figure 2b A diffusion suppression layer 31 is epitaxially formed in the source / drain trench 20 , and the thickness of the diffusion suppression layer 31 in the convex corner area is greater than the thickness of the diffusion suppression layer 31 in the plane area.
[0048] The diffusion suppression layer 31 may be an epitaxial layer including silicon, such as an epitaxial silicon layer or an epitaxial germanium silicon layer. The diffusion suppression layer 31 may preferably be a germanium silicon epitaxial layer, so that when the diffusion suppression layer 31 is subsequently etched and removed, a better etching selectivity ratio can be achieved relative to the inner wall (silicon) of the source and drain trench 20, and it is unified with other germanium silicon processes to simplify the process. When the diffusion suppression layer 31 is formed by performing an epitaxial process (such as a selective epitaxial process), since the surface of the convex corner is relatively rough, the diffusion suppression layer 31 grows around the convex corner as the center (core). In this embodiment, the time for forming the diffusion suppression layer 31 can be controlled, that is, the thickness of the diffusion suppression layer 31 is controlled, so that the diffusion suppression layer 31 only covers the convex corner area of the source and drain trench 20 and exposes the plane area of the side wall of the source and drain trench 20.
[0049] In practice, since the second plane region 24 of the bottom wall of the source / drain trench 20 is relatively narrow, it is also feasible that the diffusion suppression layer 31 on both sides extends to cover the second plane region 24 .
[0050] Furthermore, in some examples, the diffusion suppression layer 31 may be formed on both the convex corner region and the planar region, but the thickness of the diffusion suppression layer 31 in the planar region is smaller than the thickness of the diffusion suppression layer 31 in the convex corner region.
[0051] Next, please refer to Figure 2c A carbon-containing sacrificial layer 32 is epitaxially formed in the source-drain trench 20 to cover the diffusion suppression layer 31 and the surface of the planar region, and the carbon-containing sacrificial layer 32 is doped with carbon.
[0052] The material of the carbon-containing sacrificial layer 32 may be a silicon epitaxial layer or a germanium silicon epitaxial layer doped with carbon. The carbon-containing sacrificial layer 32 may preferably be a germanium silicon epitaxial layer, so that when the carbon-containing sacrificial layer 32 is subsequently etched and removed, a better etching selectivity ratio relative to the inner wall (silicon) of the source-drain trench 20 can be achieved, and it is unified with other germanium silicon processes to simplify the process. When the carbon-containing sacrificial layer 32 is formed by the epitaxial process, carbon may be doped in situ, and the carbon-containing sacrificial layer 32 conformally covers the surface of the diffusion inhibition layer 31 and the exposed planar area, wherein the thickness of the carbon-containing sacrificial layer 32 may be greater than the thickness of the diffusion inhibition layer 31, so that the carbon-containing sacrificial layer 32 completely covers the inner wall of the source-drain trench 20, so as to provide sufficient doped carbon, and provide better protection to prevent the sidewall of the source-drain trench 20 from being oxidized when the heat treatment process is subsequently performed.
[0053] The concentration of carbon doping in the carbon-containing sacrificial layer 32 may be related to the concentration of P-type ions in the subsequent source-drain structure. The higher the concentration of P-type ions, the higher the concentration of carbon doping may be. However, the concentration of carbon doping may be less than a preset value to prevent the carbon concentration on the sidewalls of the source-drain trench 20 from being too high and affecting the compressive stress effect of the germanium silicon structure (i.e., the conductive channel).
[0054] Next, please refer to Figure 2d, a heat treatment process is performed to diffuse the doped carbon to the planar area of the sidewall of the source / drain trench 20 .
[0055] A heat treatment process is performed to form a carbon doped region 33 on the sidewall of the source-drain trench 20. When performing the heat treatment process, the diffusion suppression layer 31 is used to suppress the diffusion of the doped carbon, and the heat treatment temperature and / or heat treatment time are reasonably controlled so that the doped carbon concentration diffused to the plane area of the sidewall of the source-drain trench 20 is greater than the doped carbon concentration diffused to the convex corner area of the sidewall of the source-drain trench 20. In this example, since the convex corner area is covered with the diffusion suppression layer 31, when the doped carbon is thermally diffused, the path of the doped carbon from the carbon-containing sacrificial layer 32 to the convex corner area is longer than the path of the doped carbon to the plane area, and it is possible to achieve that the doped carbon diffuses to the two areas with different concentrations, that is, Figure 2d As shown, the portion of the carbon doped region 33 in the plane region is much larger than that in the convex corner region. In a preferred example, the doped carbon concentration diffused to the convex corner region of the sidewall of the source-drain trench 20 can also be 0. Of course, the doped carbon is mainly located near the surface of the inner wall of the source-drain trench 20, and it is also feasible if a small portion continues to diffuse to a certain depth of the substrate 10.
[0056] It should be noted that in this embodiment, after the doped carbon diffuses to the planar area of the side wall of the source and drain groove 20, it is not necessary to activate the doped carbon, that is, the amount of doped carbon located in the gap of the silicon crystal (substrate 10) is greater than the doped carbon located on the silicon lattice point, so as to minimize the stress effect on the conductive channel. In a preferred example, the heat treatment process can adopt a spike annealing process to shorten the heat treatment time as much as possible to achieve the above effect. It should be understood that the lattice constant of carbon is smaller than the lattice constant of silicon. If the doped carbon located in the silicon crystal is activated, the crystal structure formed by the doped carbon located on the lattice point will form tensile stress, which will affect (partially offset) the compressive stress of the subsequent germanium silicon structure, which is not conducive to improving the mobility of hole carriers.
[0057] Next, the carbon-containing sacrificial layer 32 and the diffusion suppression layer 31 are removed, and a germanium-silicon structure 34 is epitaxially formed in the source-drain trench 20 as a source-drain structure. The germanium-silicon structure 34 is doped with P-type ions.
[0058] For details, please refer to Figure 2e First, a selective dry process or a wet process may be used to remove the carbon-containing sacrificial layer 32 and the diffusion suppression layer 31 in the source-drain trench 20 , and the impact on the source-drain trench 20 may be minimized.
[0059] Next, a pretreatment operation is used to remove the oxide and part of the carbon on the inner wall of the source-drain trench 20 so as to subsequently grow the germanium-silicon epitaxial layer. In a preferred example, hydrogen plasma can be used to remove the partially exposed carbon on the inner wall of the source-drain trench 20 to enhance the ability of the subsequent SiCoNi process to remove the oxide; and then the SiCoNi process is used to remove the oxide on the inner wall of the source-drain trench 20.
[0060] Next, please refer to Figure 2f , a selective epitaxial process is performed to form a germanium silicon epitaxial layer doped with P-type ions in the source and drain trenches 20 to serve as the source and drain structure of the PMOS device. The P-type ions may include boron ions, and in-situ boron doping may be used to form a germanium silicon boron epitaxial layer. Since the lattice constant of germanium is greater than that of silicon, the lattice constant of germanium silicon is greater than that of silicon around the source and drain trenches 20, thereby generating compressive stress in the conductive channel under the gate structure 12 to improve the hole carrier mobility and saturation current of the PMOS device.
[0061] In particular, in the main electrical contact area between the germanium silicon boron epitaxial layer and the source and drain grooves 20, that is, the plane area, carbon atoms with smaller ion radius (atomic radius) than boron, silicon, germanium, etc. are doped, and the carbon atoms are used to inhibit the diffusion of boron in the germanium silicon boron epitaxial layer into the substrate 10 (that is, diffused between the source and drain and the gate), and reduce the risk of boron diffusing into the conductive channel or the gate dielectric layer, thereby improving the time-dependent dielectric breakdown (TDDB) performance of the embedded germanium silicon device, and providing a process window for further improving the device performance in the future. In addition, in the main stress contact area between the germanium silicon boron epitaxial layer and the source and drain grooves 20, that is, the convex corner area, carbon is not doped or doped less as much as possible to avoid the formation of carbon silicon structure to generate tensile stress, so as to reduce the effect of affecting the germanium silicon structure 34 to generate compressive stress. Therefore, this embodiment can inhibit (block as much as possible) the diffusion of boron in the germanium silicon structure 34 into the conductive channel by doping carbon under the condition of ensuring the compressive stress of the germanium silicon structure 34, and thereby improve the time-dependent dielectric breakdown performance of the embedded germanium silicon device.
[0062] In addition, the present embodiment does not limit the structure and process of forming the p-type ion-doped silicon germanium structure 34 in the source-drain trench 20. In one example, a silicon germanium epitaxial layer doped with boron in situ can be directly formed in the source-drain trench 20 to fill the source-drain trench 20 as a source-drain structure. In other examples, at least two epitaxial processes can be used to form at least two layers of silicon germanium epitaxial layers doped with boron to fill the source-drain trench 20 (for example, including a first silicon germanium epitaxial layer and a second silicon germanium epitaxial layer), and at least two layers of silicon germanium epitaxial layers are used to fill the source-drain trench 20 as a source-drain structure, and preferably, the boron concentration of the silicon germanium epitaxial layer (the first silicon germanium epitaxial layer) close to the inner wall of the source-drain trench 20 can also be less than the boron concentration of the silicon germanium epitaxial layer (the second silicon germanium epitaxial layer) away from the inner wall of the source-drain trench 20, so as to further control the diffusion of boron into the conductive channel.
[0063] Embodiment 2
[0064] Figure 3 It is a flow chart of the method for preparing the embedded germanium silicon device provided in the second embodiment.
[0065] like Figure 3As shown, the method for preparing the embedded germanium silicon device provided in this embodiment includes:
[0066] S01: providing a substrate, on which a gate structure is provided, and source and drain trenches are formed in the substrate on both sides of the gate structure;
[0067] S02: epitaxially forming a carbon-containing sacrificial layer in the source-drain trench to cover the inner wall of the source-drain trench, wherein the carbon-containing sacrificial layer is doped with carbon;
[0068] S03: performing a heat treatment process to diffuse the doped carbon at least to the sidewalls of the source / drain trenches;
[0069] S04: removing the carbon-containing sacrificial layer, and epitaxially forming a germanium-silicon structure in the source-drain trench as a source-drain structure, wherein the germanium-silicon structure is doped with P-type ions.
[0070] The preparation method of the embedded germanium silicon device provided in the second embodiment is different from the preparation method of the first embodiment in that the second embodiment directly forms a carbon-containing sacrificial layer in the source and drain grooves, and diffuses the doped carbon to the inner wall of the source and drain grooves by heat treatment, so as to block (suppress) the diffusion of the P-type ions of the source and drain structure in the subsequent source and drain grooves into the substrate (conductive channel) under the gate structure, thereby improving the time-dependent dielectric breakdown (TDDB) performance of the embedded germanium silicon device. Compared with the preparation method of the first embodiment, the preparation method provided in the second embodiment is simpler. Of course, in the second embodiment, the diffusion of doped carbon to the convex corner area of the source and drain grooves and the influence on the compressive stress of the conductive channel can also be reduced by reducing the concentration of doped carbon or inhibiting the diffusion of doped carbon (reducing the temperature or time of heat treatment). The contents of the other steps of this embodiment can be specifically referred to in the first embodiment, and will not be repeated here.
[0071] Embodiment 3
[0072] Embodiment 3 provides an embedded silicon-germanium device.
[0073] The embedded silicon-germanium device provided in this embodiment can be manufactured using the preparation method provided in Example 1 or Example 2. Specifically, the embedded silicon-germanium device provided in this embodiment may include a substrate, a source-drain groove and a silicon-germanium structure. A gate structure is provided on the surface of the substrate; the source-drain groove is provided in the substrate on both sides of the gate structure or between adjacent gate structures, and the inner wall of the source-drain groove has a convex corner area and a plane area; the silicon-germanium structure is provided in the source-drain groove and is doped with P-type ions. Among them, the inner wall of the source-drain groove is doped with carbon to inhibit the diffusion of P-type ions into the substrate under the gate structure, thereby improving the time-dependent dielectric breakdown (TDDB) performance of the embedded silicon-germanium device. In a preferred example, the doping carbon concentration of the planar area located on the side wall of the source-drain groove can also be made greater than the doping carbon concentration of the convex corner area located on the side wall of the source-drain groove to prevent the doping carbon from affecting the compressive stress of the source-drain structure.
[0074] To summarize, before forming the germanium silicon structure in the source and drain grooves, the present invention first forms a carbon-containing sacrificial layer doped with carbon, and then diffuses the doped carbon to at least the side walls of the source and drain grooves through a heat treatment process, and utilizes the doped carbon on the inner walls of the source and drain grooves to inhibit the P-type ions in the germanium silicon structure from diffusing into the substrate under the gate structure (i.e., diffusing to between the source and drain and the gate), thereby reducing the risk of P-type ions diffusing into the conductive channel or the gate dielectric layer, thereby improving the time-dependent dielectric breakdown (TDDB) performance of the embedded germanium silicon device, and providing a process window for further improving the device performance in the future.
[0075] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.
Claims
1. An embedded silicon-germanium device, characterized in that: include: A substrate, wherein a gate structure is provided on the substrate; Source-drain trenches are provided in the substrate on both sides of the gate structure; A silicon-germanium structure, disposed in the source-drain trench and doped with P-type ions; Wherein, the inner wall of the source-drain trench is doped with carbon to inhibit the P-type ions from diffusing into the substrate under the gate structure.
2. The embedded silicon germanium device according to claim 1, characterized in that The inner wall of the source-drain trench has a convex corner area and a plane area, and the doping carbon concentration of the plane area located on the side wall of the source-drain trench is greater than the doping carbon concentration of the convex corner area located on the side wall of the source-drain trench.
3. The embedded silicon germanium device according to claim 2, characterized in that: The doping carbon concentration of the convex corner area of the sidewall of the source / drain trench is 0.
4. The embedded silicon germanium device according to claim 2, characterized in that: The doping carbon concentration of the planar region located on the sidewall of the source-drain trench is greater than the doping carbon concentration of the bottom wall of the source-drain trench.
5. A method for preparing an embedded germanium silicon device, characterized in that: include: Providing a substrate, on which a gate structure is provided, and source-drain trenches are formed in the substrate on both sides of the gate structure; Epitaxially forming a carbon-containing sacrificial layer in the source-drain trench to cover the inner wall of the source-drain trench, wherein the carbon-containing sacrificial layer is doped with carbon; Performing a heat treatment process to diffuse the doped carbon at least to the sidewalls of the source / drain trench; The carbon-containing sacrificial layer is removed, and a germanium-silicon structure is epitaxially formed in the source-drain trench as a source-drain structure, and the germanium-silicon structure is doped with P-type ions.
6. The method for preparing an embedded silicon-germanium device according to claim 5, characterized in that: The material of the carbon-containing sacrificial layer includes germanium silicon carbon.
7. The method for preparing an embedded silicon-germanium device according to claim 5, characterized in that: The inner wall of the source-drain trench has a convex corner area and a plane area. Before forming the carbon-containing sacrificial layer, the method further includes epitaxially forming a diffusion inhibition layer in the source-drain trench, wherein the thickness of the diffusion inhibition layer in the convex corner area is greater than the thickness of the diffusion inhibition layer in the plane area. When the carbon-containing sacrificial layer is formed, the carbon-containing sacrificial layer covers the diffusion inhibition layer and the planar area. When the heat treatment process is performed, the diffusion inhibition layer is used to make the doping carbon concentration of the planar area located on the side wall of the source and drain trench greater than the doping carbon concentration of the convex corner area located on the side wall of the source and drain trench. After removing the carbon-containing sacrificial layer, the diffusion inhibition layer is also removed to expose the source and drain trenches.
8. The method for preparing an embedded silicon-germanium device according to claim 7, characterized in that: The material of the diffusion suppression layer includes germanium silicon.
9. The method for preparing an embedded silicon-germanium device according to claim 7, characterized in that: The diffusion suppression layer covers the convex corner region and exposes a planar region of a sidewall of the source / drain trench.
10. The method for preparing an embedded silicon-germanium device according to claim 5 or 7, characterized in that: Before forming the silicon-germanium structure in the source-drain trench, the method further includes first using hydrogen plasma to remove part of the carbon on the inner wall of the source-drain trench, and then using a SiCoNi process to remove the oxide on the inner wall of the source-drain trench.