Starting method of terminal equipment, terminal equipment and storage medium

Abstract

A terminal device startup method, a terminal device and a storage medium, the method comprising: a switching circuit receiving a startup instruction transmitted by a serial port of a central control device (S101), the switching circuit transmitting the startup instruction to an interface chip circuit (S102), the interface chip circuit generating a power-on signal in response to the startup instruction, and transmitting the power-on signal to a power-on circuit (S103), and the power-on circuit performs voltage conversion on a voltage signal transmitted by the power supply circuit in response to the power-on signal to generate a plurality of different power-on voltages, and powers on the central processing unit based on each power-on voltage (S104). According to the invention, remote starting through a network can be satisfied, starting operation can be carried out on a plurality of terminal devices connected through serial ports, and stability and reliability of remote starting of the terminal devices are improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a method for starting a terminal device, a terminal device, and a storage medium. Background Art

[0002] Nowadays, with the continuous development of electronic science and technology, when operating a device, in order to improve the user's operating convenience, there is a scenario where the device needs to be remotely started to control the operation of the device. Summary of the invention

[0003] The embodiments of this specification provide a terminal device startup method, a terminal device and a storage medium, which can complete the startup of the terminal device, that is, it can meet the needs of remote network startup of the terminal device through central control software and the central control device, and can also start multiple connected terminal devices respectively according to one or more serial ports, thereby improving the stability and reliability of remote startup of the terminal device.

[0004] In a first aspect, an embodiment of the present specification provides a device startup method, which is applied to a terminal device, the terminal device is used to connect to a central control device, the terminal device includes an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit, one end of the interface chip circuit is connected to one end of the switching circuit, the other end of the interface chip circuit is connected to a first end of the power-on circuit, the other end of the switching circuit is connected to a serial port of the central control device, the second end of the power-on circuit is connected to the central processing unit, and the third end of the power-on circuit is connected to the power supply circuit;

[0005] Methods include:

[0006] The switching circuit receives a power-on instruction transmitted by the serial port of the central control device, where the power-on instruction is generated by the central control device in response to a startup instruction received from the central control software;

[0007] The switching circuit transmits the power-on instruction to the interface chip circuit;

[0008] The interface chip circuit generates a power-on signal in response to the power-on instruction and transmits the power-on signal to the power-on circuit;

[0009] The power-on circuit converts the DC power supply voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processing unit based on each of the power-on voltages.

[0010] Through the above technical scheme, the central control software on the central control device receives the startup instruction generated by the network or offline operation, and in response to the startup instruction, the generated power-on instruction is transmitted to the terminal device through the serial port connected to the terminal device, thereby completing the startup of the terminal device. That is, it can meet the network remote startup of the terminal device through the central control software and the central control device, and can also perform startup operations on multiple connected terminal devices respectively according to one or more serial ports, thereby improving the stability and reliability of remote startup of terminal devices.

[0011] In combination with the first aspect, in some possible implementations, when the switching circuit is an isolation circuit, the isolation circuit includes a first instruction receiving end, a field effect transistor, and a first instruction output end, the first instruction receiving end is connected to a ringing detection port of the central control device, and the first instruction output end is connected to the interface chip circuit;

[0012] The gate of the field effect tube is connected to the first instruction receiving end, the drain of the field effect tube is connected to the first instruction output end, and the source of the field effect tube is grounded;

[0013] The transfer circuit transmits the power-on command to the interface chip circuit, including:

[0014] The first instruction receiving end transmits the received power-on instruction to the gate of the field effect tube. When the power-on instruction received by the gate of the field effect tube is a low-level signal, the drain and source of the field effect tube are turned on, and the first instruction output end transmits the low-level signal to the interface chip circuit, so that the interface chip circuit responds to the low-level signal transmitted by the isolation circuit to enable the power supply circuit and the power-on circuit to power on the central processing unit.

[0015] Through the above technical solution, when the central control device has a ringing detection port, the interface chip circuit is enabled through the isolation circuit to trigger the power-on function, and the high-level signal is isolated to prevent the high-level signal from damaging the interface chip circuit, thereby improving the efficiency and safety of starting the terminal device.

[0016] In combination with the first aspect and the above implementation manner, in some possible implementation manners, when the switching circuit includes a first conversion circuit and a micro-control circuit, one end of the first conversion circuit is connected to the output port of the central control device, the other end of the first conversion circuit is connected to one end of the micro-control circuit, and the other end of the micro-control circuit is connected to the interface chip circuit;

[0017] The transfer circuit transmits the power-on command to the interface chip circuit, including:

[0018] The first conversion circuit receives a power-on instruction transmitted from an output port of the central control device, and transmits the power-on instruction to the micro-control circuit;

[0019] The microcontroller circuit compares the power-on instruction with the preset power-on condition, and when the power-on instruction meets the power-on condition, generates a power-on signal and transmits the power-on signal to the interface chip circuit.

[0020] Through the above technical solution, when the central control device does not have a ringing detection port, a power-on instruction is transmitted to the switching circuit through the output port, so that a power-on signal is generated by the micro-control circuit in response to the power-on instruction, and the power-on signal is transmitted to the interface chip circuit, so that the interface chip circuit can trigger the power-on function to meet the device models of different central control devices, thereby providing the stability of the isolation circuit solution while ensuring that the central control device can use the output port to start the terminal device, thereby improving the applicability of starting the terminal device through the central control device.

[0021] In combination with the first aspect and the above implementations, in some possible implementations, the first conversion circuit includes a first conversion chip, a second instruction receiving terminal and a second instruction output terminal, and the microcontroller circuit includes a microcontroller chip, a third instruction receiving terminal and a power-on signal output terminal;

[0022] The second instruction receiving end is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion signal is connected to the second instruction output end, the second instruction output end is connected to the third instruction receiving end, the third instruction receiving end is connected to the microcontroller chip, the microcontroller chip is connected to the power-on signal output end, and the power-on signal output end is connected to the interface chip circuit;

[0023] The transfer circuit transmits the power-on command to the interface chip circuit, including:

[0024] The first conversion chip receives the power-on instruction outputted by the output port of the central control device based on the second instruction receiving end, and transmits the power-on instruction to the third instruction receiving end of the microcontroller circuit based on the second instruction output end;

[0025] The microcontroller chip receives the power-on instruction based on the third instruction receiving terminal, and compares the power-on code in the power-on instruction with the preset power-on condition;

[0026] When the power-on code matches the preset power-on condition, the microcontroller chip determines that the power-on instruction meets the preset power-on condition, generates a power-on signal, and transmits the power-on signal to the interface chip circuit based on the power-on signal output terminal.

[0027] In combination with the first aspect and the above implementations, in some possible implementations, the interface chip circuit includes a fourth instruction receiving terminal, an interface chip, and a first power-on signal output terminal, the fourth instruction receiving terminal is connected to the switching circuit, and the first power-on signal output terminal is connected to the power-on circuit;

[0028] The interface chip circuit generates a power-on signal in response to a power-on instruction and transmits the power-on signal to the power-on circuit, including:

[0029] The interface chip receives the power-on instruction transmitted by the switching circuit based on the fourth instruction receiving end, generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end.

[0030] In combination with the first aspect and the above implementations, in some possible implementations, the power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected to the interface chip circuit, the other end of the power-on control circuit is connected to one end of the power supply circuit, the other end of the power supply circuit is connected to one end of the power management circuit, and the other end of the power management circuit is connected to the central processing unit;

[0031] The power-on circuit converts the DC power supply voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processing unit based on each power-on voltage, including:

[0032] The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal;

[0033] The power supply circuit converts the voltage of the AC power supply in response to the power-on signal to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit;

[0034] The power management circuit performs voltage conversion on each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processing unit for powering on.

[0035] In combination with the first aspect and the above implementation manner, in some possible implementation manners, the power-on control circuit includes a second signal receiving end, a power-on chip, and a second signal output end, the second signal receiving end is connected to the interface chip circuit, and the second signal output end is connected to the power supply circuit;

[0036] The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal, including:

[0037] The power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving end, and transmits the power-on signal to the power supply circuit based on the second power-on signal output end.

[0038] In combination with the first aspect and the above implementation manner, in some possible implementation manners, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected to the power-on control circuit, the first voltage receiving end is connected to the external power supply, and the first voltage output end is connected to the power management circuit;

[0039] The power supply circuit converts the AC power supply voltage in response to the power-on signal to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit, including:

[0040] The power supply circuit transmits the AC power received by the first voltage receiving terminal to the first voltage conversion chip in response to the power-on signal received by the second power-on signal receiving terminal;

[0041] The first voltage conversion chip performs voltage conversion on the AC power supply to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit based on the first voltage output terminal.

[0042] In combination with the first aspect and the above implementations, in some possible implementations, the power management circuit includes a second voltage receiving terminal, a second voltage conversion chip, a voltage distribution chip, and a second voltage output terminal, the second voltage receiving terminal is connected to the power supply circuit, and the voltage distribution chip is connected to each unit of the central processing unit based on the second voltage output terminal;

[0043] The power management circuit performs voltage conversion on each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processing unit for powering on, including:

[0044] The second voltage conversion chip receives the DC power supply voltage based on the second voltage receiving terminal, performs voltage conversion on the DC power supply voltage based on the working voltage of each unit in the central processing unit, and generates a power-on voltage corresponding to each unit;

[0045] The power-on voltage is transmitted to the voltage distribution chip, and the voltage distribution chip powers on each unit in the central processing unit based on the second voltage output terminal and the power-on voltage.

[0046] Through the above technical solution, the DC power supply voltage transmitted by the power supply circuit is distributed according to the working voltage of each unit in the central processing unit, so that each unit is powered on to enable the central processing unit to enter the working state.

[0047] In combination with the first aspect and the above implementations, in some possible implementations, the voltage distribution chip includes a first voltage power supply end, a second voltage power supply end, and a third voltage power supply end, the central processing unit includes at least a processing unit, a memory unit, and a management unit, the voltage distribution chip is connected to the processing unit based on the first voltage power supply end, is connected to the memory unit based on the second voltage power supply end, and is connected to the management unit based on the third voltage power supply end;

[0048] The voltage distribution chip powers on each unit in the central processing unit based on the second voltage output terminal, including:

[0049] The voltage distribution chip powers on the processing unit based on the first voltage power supply terminal and the first voltage, where the first voltage is a power-on voltage corresponding to the processing unit;

[0050] The voltage distribution chip powers on the memory unit based on the second voltage supply terminal and the second voltage, where the second voltage is a power-on voltage corresponding to the memory unit;

[0051] The voltage distribution chip powers on the management unit based on the third voltage supply terminal and the third voltage, and the third voltage is a power-on voltage corresponding to the management unit.

[0052] In combination with the first aspect and the above implementations, in some possible implementations, the central processing unit includes a power-off instruction output terminal, the power-on circuit also includes a power supply circuit, the power supply circuit includes a power-off instruction receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit also includes a first power supply receiving terminal, the micro-control circuit also includes a second power supply receiving terminal, and the interface chip circuit also includes a third power supply receiving terminal;

[0053] The power-off instruction output port is connected to the power-off instruction receiving port, the third voltage receiving end is connected to the power supply circuit, the first power supply end is connected to the first switching circuit based on the first power supply receiving end, the second power supply end is connected to the micro-control circuit based on the second power supply receiving end, and the third power supply end is connected to the interface chip circuit based on the third power supply receiving end;

[0054] The method also includes:

[0055] When the CPU enters the power-off state, the CPU outputs a power-off instruction to the power-up circuit based on the power-off instruction output port, and the power-up circuit stops providing power to the CPU in response to the power-off instruction received based on the power-off instruction receiving port;

[0056] The power supply circuit provides power to the first adapter circuit based on the first power supply of the normal supply voltage provided by the power supply circuit and the first power supply terminal, so that the first adapter circuit can operate in a low power consumption state based on the power received by the first power receiving terminal;

[0057] The power supply circuit provides power to the micro-control circuit based on the second power supply provided by the power supply circuit and the second power supply terminal, so that the micro-control circuit operates in a low power consumption state in response to the power received based on the second power supply receiving terminal;

[0058] The power supply circuit provides power to the interface chip circuit based on the third power supply and the third power supply terminal provided by the power supply circuit, enabling the interface chip circuit to operate in a low power consumption state based on the power received by the third power supply receiving terminal.

[0059] Through the above technical solution, the terminal device can respond to the power-on command transmitted by the central control device to realize the startup of the terminal device.

[0060] In combination with the first aspect and the above implementations, in some possible implementations, the first switching circuit includes a first signal receiving end, a first signal output end, a second signal receiving end, and a second signal output end, and the micro-control circuit also includes a third signal receiving end and a third signal output end;

[0061] The first signal receiving end is connected to the output port of the central control device, the first signal output end is connected to the third signal receiving end, the third signal output end is connected to the second signal receiving end, and the second signal output end is connected to the input port of the central control device;

[0062] The method further includes:

[0063] When the central processing unit is in a powered-on state, when the first signal receiving end of the first adapter circuit receives a state acquisition signal transmitted by the output port of the central control device, the first adapter circuit transmits the state acquisition signal to the third signal receiving end of the micro-control circuit based on the first signal output end;

[0064] The micro-control circuit transmits the stored device status information to the second signal receiving end of the first switching circuit based on the third output end;

[0065] The second signal output end of the first switching circuit transmits the device status information to the central control device based on the input port of the central control device.

[0066] Through the above technical solution, the device status information is transmitted to the central control device according to the micro-control circuit and the first conversion circuit, thereby realizing the response of the status acquisition request of the central control device.

[0067] In combination with the first aspect and the above implementations, in some possible implementations, the central processing unit further includes a fourth signal output terminal, the interface chip circuit includes a fourth signal receiving terminal and a fifth signal output terminal, and the microcontroller circuit includes a fifth signal receiving terminal;

[0068] The fourth signal output terminal is connected to the fourth signal receiving terminal, and the fifth signal output terminal is connected to the fifth signal receiving terminal;

[0069] The method further includes:

[0070] When the device state of the terminal device changes, the central processor generates device state information corresponding to the device state, and transmits the device state information to the fourth signal receiving end of the interface chip circuit based on the fourth signal output end;

[0071] The interface chip circuit transmits the device status information to the fifth signal receiving end of the micro-control circuit based on the fifth signal output end, and the micro-control circuit stores the device status information.

[0072] Through the above technical solution, the microcontroller circuit receives and stores the device status information transmitted by the central processor, so that when receiving a status acquisition request of the central control device, it can respond to the status acquisition request based on the device status information.

[0073] In combination with the first aspect and the above implementation manner, in some possible implementation manners, the terminal device further includes a second conversion circuit, the central processor includes a first output terminal and a first result receiving terminal, the interface chip circuit includes a first receiving terminal, a second result receiving terminal, a second output terminal and a first result output terminal, and the second conversion circuit includes a second receiving terminal, a third output terminal, a third result receiving terminal and a second result output terminal;

[0074] The first output end is connected to the first receiving end, the second output end is connected to the second receiving end, the third output end is connected to the input port of the central control device, the third result receiving end is connected to the output port of the central control device, the second result output end is connected to the second result receiving end, and the first result output end is connected to the first result receiving end;

[0075] The method also includes:

[0076] The first receiving end of the interface chip circuit receives the serial port debugging instruction transmitted by the central processing unit based on the first output end, and transmits the serial port debugging instruction to the second receiving end of the second conversion circuit based on the second output end;

[0077] The second conversion circuit transmits the serial port debugging instruction to the input port of the central control device based on the third output terminal, so as to perform serial port debugging on the serial port of the central control device;

[0078] The third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device, and transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end;

[0079] The interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processing unit based on the first result output end.

[0080] Through the above technical solution, the terminal device detects the serial port of the central control device according to the second conversion circuit, ensuring that the serial port of the central control device can operate normally, thereby improving the stability of the terminal device and the central control device.

[0081] In the second aspect, an embodiment of the present specification provides a terminal device, which is used to connect to a central control device. The terminal device includes an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit. One end of the interface chip circuit is connected to one end of the switching circuit, the other end of the interface chip circuit is connected to a first end of the power-on circuit, the other end of the switching circuit is connected to a serial port of the central control device, the second end of the power-on circuit is connected to the central processing unit, and the third end of the power-on circuit is connected to the power supply circuit.

[0082] In conjunction with the second aspect, in some possible implementations, when the switching circuit is an isolation circuit, the isolation circuit includes a first instruction receiving end, a field effect transistor, and a first instruction output end, the first instruction receiving end is connected to a ringing detection port of the central control device, and the first instruction output end is connected to the interface chip circuit;

[0083] The gate of the field effect tube is connected to the first instruction receiving end, the drain of the field effect tube is connected to the first instruction output end, and the source of the field effect tube is grounded.

[0084] In combination with the second aspect and the above-mentioned implementation methods, in some possible implementation methods, when the switching circuit includes a first conversion circuit and a micro-control circuit, one end of the first conversion circuit is connected to the output port of the central control device, the other end of the first conversion circuit is connected to one end of the micro-control circuit, and the other end of the micro-control circuit is connected to the interface chip circuit.

[0085] In combination with the second aspect and the above implementation, in some possible implementations, the first conversion circuit includes a first conversion chip, a second instruction receiving terminal and a second instruction output terminal, and the microcontroller circuit includes a microcontroller chip, a third instruction receiving terminal and a power-on signal output terminal;

[0086] The second instruction receiving end is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion signal is connected to the second instruction output end, the second instruction output end is connected to the third instruction receiving end, the third instruction receiving end is connected to the microcontroller chip, the microcontroller chip is connected to the power-on signal output end, and the power-on signal output end is connected to the interface chip circuit.

[0087] In combination with the second aspect and the above-mentioned implementation methods, in some possible implementation methods, the interface chip circuit includes a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected to the switching circuit, and the first power-on signal output end is connected to the power-on circuit.

[0088] In combination with the second aspect and the above-mentioned implementation methods, in some possible implementation methods, the power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected to the interface chip circuit, the other end of the power-on control circuit is connected to one end of the power supply circuit, the other end of the power supply circuit is connected to one end of the power management circuit, and the other end of the power management circuit is connected to the central processing unit.

[0089] In combination with the second aspect and the above-mentioned implementation methods, in some possible implementation methods, the power-on control circuit includes a second signal receiving end, a power-on chip and a second signal output end, the second signal receiving end is connected to the interface chip circuit, and the second signal output end is connected to the power supply circuit.

[0090] In combination with the second aspect and the above-mentioned implementation methods, in some possible implementation methods, the power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected to the power-on control circuit, the first voltage receiving end is connected to the external power supply, and the first voltage output end is connected to the power management circuit.

[0091] In combination with the second aspect and the above-mentioned implementation methods, in some possible implementation methods, the power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip and a second voltage output end, the second voltage receiving end is connected to the power supply circuit, and the voltage distribution chip is connected to each unit of the central processing unit based on the second voltage output end.

[0092] In combination with the second aspect and the above-mentioned implementation methods, in some possible implementation methods, the voltage distribution chip includes a first voltage power supply terminal, a second voltage power supply terminal and a third voltage power supply terminal, the central processing unit includes at least a processing unit, a memory unit and a management unit, and the voltage distribution chip is connected to the processing unit based on the first voltage power supply terminal, connected to the memory unit based on the second voltage power supply terminal, and connected to the management unit based on the third voltage power supply terminal.

[0093] In combination with the second aspect and the above implementations, in some possible implementations, the central processing unit includes a power-off instruction output terminal, the power-on circuit also includes a power supply circuit, the power supply circuit includes a power-off instruction receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit also includes a first power supply receiving terminal, the micro-control circuit also includes a second power supply receiving terminal, and the interface chip circuit also includes a third power supply receiving terminal;

[0094] The power-off instruction output port is connected to the power-off instruction receiving port, the third voltage receiving end is connected to the power supply circuit, the first power supply end is connected to the first switching circuit based on the first power supply receiving end, the second power supply end is connected to the micro-control circuit based on the second power supply receiving end, and the third power supply end is connected to the interface chip circuit based on the third power supply receiving end.

[0095] In combination with the second aspect and the above implementations, in some possible implementations, the first switching circuit includes a first signal receiving end, a first signal output end, a second signal receiving end, and a second signal output end, and the micro-control circuit also includes a third signal receiving end and a third signal output end;

[0096] The first signal receiving end is connected to the output port of the central control device, the first signal output end is connected to the third signal receiving end, the third signal output end is connected to the second signal receiving end, and the second signal output end is connected to the input port of the central control device.

[0097] In combination with the second aspect and the above implementations, in some possible implementations, the central processing unit further includes a fourth signal output terminal, the interface chip circuit includes a fourth signal receiving terminal and a fifth signal output terminal, and the microcontroller circuit includes a fifth signal receiving terminal;

[0098] The fourth signal output terminal is connected to the fourth signal receiving terminal, and the fifth signal output terminal is connected to the fifth signal receiving terminal.

[0099] In combination with the second aspect and the above implementation manner, in some possible implementation manners, the terminal device further includes a second conversion circuit, the central processor includes a first output terminal and a first result receiving terminal, the interface chip circuit includes a first receiving terminal, a second result receiving terminal, a second output terminal and a first result output terminal, and the second conversion circuit includes a second receiving terminal, a third output terminal, a third result receiving terminal and a second result output terminal;

[0100] The first output end is connected to the first receiving end, the second output end is connected to the second receiving end, the third output end is connected to the input port of the central control device, the third result receiving end is connected to the output port of the central control device, the second result output end is connected to the second result receiving end, and the first result output end is connected to the first result receiving end.

[0101] In a third aspect, an embodiment of the present specification provides a computer storage medium, which stores a plurality of instructions, and the instructions are suitable for being loaded by a processor and executing the steps of the above method. BRIEF DESCRIPTION OF THE DRAWINGS

[0102] In order to more clearly illustrate the technical solutions in this specification or related technologies, the drawings required for use in the embodiments or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this specification. For those skilled in the art, other drawings can be obtained based on these drawings without paying any creative work.

[0103] Figure 1 A system architecture diagram of a device startup method provided in an embodiment of this specification;

[0104] Figure 2 A schematic diagram of the structure of a terminal device provided in an embodiment of this specification;

[0105] Figure 3 A schematic diagram of a device startup method provided in an embodiment of this specification;

[0106] Figure 4 A schematic diagram of a device startup method provided in an embodiment of this specification;

[0107] Figure 5 A schematic diagram of the structure of an isolation circuit provided in an embodiment of this specification;

[0108] Figure 6 A schematic diagram of a conversion circuit provided in an embodiment of this specification;

[0109] Figure 7 A schematic diagram of a conversion circuit provided in an embodiment of this specification;

[0110] Figure 8 A schematic diagram of the structure of a second conversion circuit provided in an embodiment of this specification;

[0111] Fig. 9 A schematic diagram of the structure of an interface chip circuit provided in an embodiment of this specification;

[0112] Fig.10 A schematic diagram of the structure of a serial port debugging method provided in an embodiment of this specification;

[0113] Fig.11 A schematic diagram of a power-on circuit provided in an embodiment of this specification;

[0114] Fig.12 A schematic diagram of the structure of a power-on control circuit provided in an embodiment of this specification;

[0115] Fig.13 A schematic diagram of a power supply circuit provided in an embodiment of this specification;

[0116] Fig.14A schematic diagram of the structure of a power management circuit provided in an embodiment of this specification;

[0117] Fig.15 A schematic diagram of a voltage distribution method provided in an embodiment of this specification;

[0118] Fig.16 A schematic diagram of the structure of a power supply circuit provided in an embodiment of this specification. DETAILED DESCRIPTION

[0119] In order to make the features and advantages of this specification more obvious and easy to understand, the technical solutions in this specification are described clearly and completely in conjunction with the drawings in this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of them. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of this specification.

[0120] In the related art, when remotely starting a device, the method adopted is to wake up the device through the network. The Ethernet chip in the device receives the power-on data packet transmitted by other terminal devices according to the network communication of the device, parses the power-on data packet to obtain the power-on instruction, and transmits the power-on instruction to the interface chip to power on the central processing unit of the terminal device, thereby waking up the device. However, this method is affected by the network configuration of the device. If the device is not in the same local area network or the network quality of the device is insufficient, the power-on data packet cannot be obtained, and there is a problem that the device cannot be successfully woken up by transmitting the power-on data packet.

[0121] Specifically, the teacher's terminal device in the classroom serves as an administrator device, and is connected to other terminal devices in the classroom except the administrator device through a local area network. In order to facilitate the startup of all terminal devices in the classroom before the teacher teaches the course, when the student's terminal device is remotely awakened, the administrator device transmits a power-on data packet to each terminal device through the local area network. The network communication module in the terminal device receives the power-on data packet and parses it, and transmits the power-on instruction obtained from the analysis to the interface chip in the terminal device to power on the central processing unit in the terminal device. However, when using wireless communication to wake up, the terminal device needs to be in the same local area network as other terminal devices. If they are not in the same local area network, or the network signal is unstable, there is a situation where the power-on data packet cannot be successfully transmitted to the terminal device, resulting in a failure to wake up the terminal device.

[0122] Through a device startup method provided by the present application, in the classroom, the teacher's administrator device is connected to other terminal devices by pulling out multiple ports from the serial port of the central control device, or a central control device is configured for each terminal device. The teacher can transmit the startup command to each central control device through the cloud server of the central control software to wake up each terminal device connected to the central control device; the administrator device can also transmit the startup command to each terminal device through the central control device to wake up each terminal device.

[0123] Based on this, the present application provides a device startup method, which receives the startup instruction generated by the network or offline operation through the central control software on the central control device, and transmits the generated power-on instruction to the terminal device through the serial port connected to the terminal device in response to the startup instruction, thereby completing the startup of the terminal device, that is, it can meet the network remote startup of the terminal device through the central control software and the central control device, and can also perform startup operations on multiple connected terminal devices according to one or more serial ports, thereby improving the stability and reliability of remote startup of terminal devices.

[0124] See also Figure 1 , which is a system structure diagram of a device startup method provided in an embodiment of this specification.

[0125] like Figure 1 As shown, the central control device generates a power-on instruction in response to the startup instruction received by the central control software installed in the central control device. Since the serial port of the central control device is connected to the terminal device, the power-on instruction is transmitted to the terminal device. The terminal device powers on the central processor in response to the power-on instruction, thereby completing the startup of the terminal device. The serial port of the central control device is connected to the terminal device, and other devices transmit the startup instruction to the central control device through remote communication with the server of the central control software, and the startup instruction generated by the startup instruction is transmitted to the connected terminal device, thereby realizing the remote startup of the terminal device, and improving the stability and reliability of the remote startup of the terminal device.

[0126] The terminal device can be a device with network communication function or port data receiving function, such as a laptop computer, a personal computer or a smart interactive tablet; the central control device can be a device including a serial port for data transmission, and the central control software is installed in the central control device to generate and transmit power-on commands to the terminal device to wake up the device.

[0127] Furthermore, when the central control device is connected to multiple terminal devices through the serial port, the central control device sets multiple serial ports, and each serial port is connected to multiple terminal devices respectively. The central control device generates a startup instruction by operating the central control software, and transmits the power-on instruction generated by the startup instruction to each connected terminal device according to each serial port, thereby realizing remote startup of the terminal device according to the hardware connection.

[0128] In the embodiments of the present specification, a startup instruction generated by a network or offline operation is received by the central control software on the central control device, and in response to the startup instruction, the generated power-on instruction is transmitted to the terminal device through the serial port connected to the terminal device, thereby completing the startup of the terminal device. That is, it can satisfy the network remote startup of the terminal device through the central control software and the central control device, and can also perform startup operations on multiple connected terminal devices according to one or more serial ports, thereby improving the stability and reliability of remote startup of the terminal device.

[0129] based on Figure 1 The system architecture shown below will be combined with Figure 2-Figure 16 , the device startup method provided in the embodiments of this specification is introduced in detail.

[0130] Please refer to Figure 2 , Figure 2 This is a schematic diagram of the structure of the terminal device of the present application. The terminal device is used to connect to the central control device, and the terminal device includes an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit. One end of the interface chip circuit is connected to one end of the switching circuit, the other end of the interface chip circuit is connected to the first end of the power-on circuit, the other end of the switching circuit is connected to the serial port of the central control device, the second end of the power-on circuit is connected to the central processing unit, and the third end of the power-on circuit is connected to the power supply circuit.

[0131] The switching circuit can be used to detect the power-on instructions transmitted to the central control device; the interface chip circuit is used to generate a power-on signal in response to the power-on instruction, enabling the power supply circuit to transmit the power supply voltage to the power-on circuit; the power-on circuit is used to convert the power supply voltage transmitted by the power supply circuit to obtain the power-on voltage of each unit in the central processing unit, and power on each unit in the central processing unit to complete the startup of the terminal device.

[0132] The switching circuit may be an isolation circuit or may include a first conversion circuit and a micro-control circuit. When the switching circuit is an isolation circuit, the isolation circuit is connected to the ringing detection port of the central control device; when the switching circuit is a first switching circuit and a micro-control circuit, the first switching circuit is connected to the output port of the central control device.

[0133] The central control device may be used to generate a power-on signal according to a startup instruction of the central control software, and transmit the power-on signal to the terminal device by connecting to the terminal device through a serial port of the central control device to start the terminal device. The serial port of the central control device may include an input port, an output port, and a ring detection port, and the input port, the output port, and the ring detection port may be three pins on the serial port of the central control device. For example, when the serial port of the central control device is RS232, the input port may be the second pin in RS232, the output port may be the third pin in RS232, and the ring detection port may be the ninth pin in RS232.

[0134] See also Figure 3 , is a flow chart of a device startup method provided in the embodiment of this specification. Figure 3 As shown, the device startup method may include the following steps S101 to S104.

[0135] S101, the switching circuit receives a power-on command transmitted by the serial port of the central control device;

[0136] In one embodiment, upon receiving a startup instruction, the central control software installed in the central control device generates a power-on instruction and transmits the power-on instruction to the switching circuit. The switching circuit receives the power-on instruction transmitted by the central control device through the serial port.

[0137] The central control device may be a device with central control software installed, and the central control device may include an RS232 serial port (asynchronous transmission standard interface), and the RS232 serial port may include an input port, an output port, and a ring detection port. The central control device may also have a network communication function, and communicate with other devices through a connected local area network or the Internet.

[0138] The central control software may be software installed on the central control device. Other devices may transmit startup instructions to the central control device through the server of the central control software according to network communication. The central control device generates a power-on instruction in response to the startup instruction and transmits the power-on instruction to the switching circuit of the terminal device through the serial port of the central control device.

[0139] Furthermore, in addition to receiving startup instructions transmitted via network communication, the user can also operate the central control software on the display interface of the central control device, generate a startup instruction in response to the operation, and then generate a power-on instruction based on the startup instruction and transmit it to the switching circuit of the terminal device.

[0140] The switching circuit may be a circuit in the terminal device for receiving a power-on instruction transmitted by the central control device, and transmitting a power-on signal to the interface chip circuit in response to the power-on instruction.

[0141] The power-on instruction is an instruction generated by the central control device in response to the startup instruction transmitted by the central control software. The corresponding power-on instruction is different based on the different ports connected to the switching circuit. If the port connected to the switching circuit is a ring detection port, the power-on instruction is a power-on signal with a low level; if the port connected to the switching circuit is an output port, the power-on instruction is a data packet including a power-on code; if the port connected to the central control device and the terminal device includes both a ring detection port and an output port, the corresponding power-on instruction can be generated according to the pre-set port and transmitted to the terminal device through the port.

[0142] S102, the switching circuit transmits the power-on instruction to the interface chip circuit;

[0143] In one embodiment, after receiving the power-on instruction, the switching circuit transmits the power-on instruction to the interface chip circuit in the terminal device.

[0144] Specifically, the switching circuit may be an isolation circuit, or may include a first conversion circuit and a micro-control circuit. When the switching circuit is an isolation circuit, one end of the isolation circuit is connected to the ringing detection port of the central control device, and the other end of the isolation circuit is connected to the interface chip circuit; when the switching circuit is a first switching circuit and a micro-control circuit, one end of the first switching circuit is connected to the output port of the central control device, the other end of the first switching circuit is connected to one end of the micro-control circuit, and the other end of the micro-control circuit is connected to the interface chip circuit.

[0145] When the serial port of the central control device includes a ring detection port, an isolation circuit can be selected as a switching circuit, and the isolation circuit transmits the power-on command received through the ring detection port to the interface chip circuit; when the serial port of the central control device does not include a ring detection port, the first conversion circuit and the micro-control circuit can be selected as the switching circuit, the first conversion circuit receives the power-on command transmitted from the output port of the central control device, the first conversion circuit transmits the power-on command to the micro-control circuit, and the micro-control circuit generates a power-on signal after completing the verification of the power-on command, and transmits the power-on signal to the interface chip circuit. It should be noted that when the serial port of the central control device includes a ring detection port and an output port, the transmission method of the power-on command can be set according to the actual situation.

[0146] S103, the interface chip circuit generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit;

[0147] In one embodiment, the interface chip circuit may be a SIO chip (super input output chip) circuit in the terminal device, which generates a power-on signal after receiving a power-on instruction and transmits the power-on signal to the power-on circuit.

[0148] It can be understood that when the interface chip circuit receives the power-on instruction, the wake-up power-on function of the interface chip circuit is triggered, a power-on signal is generated, and the power-on signal is transmitted to the power-on circuit so that the power-on circuit powers on the central processing unit.

[0149] S104, the power-on circuit performs voltage conversion on the DC power supply voltage transmitted by the power supply circuit in response to the power-on signal to generate a plurality of different power-on voltages, and powers on the central processing unit based on each of the power-on voltages;

[0150] In one embodiment, the power-on circuit responds to a received power-on signal by transmitting the power-on signal to a power supply circuit in the terminal device. The power supply circuit receives AC power from outside the terminal device according to a power interface in response to the power-on signal, and performs voltage conversion on the AC power received from outside the terminal device to generate a DC power supply voltage. The DC power supply voltage is then output to a power management circuit in the power-on circuit for voltage distribution, thereby generating a power-on voltage for each unit in the central processing unit, and each power-on voltage is transmitted to each unit in the central processing unit to power on each unit in the central processing unit, thereby completing the startup of the terminal device.

[0151] The power-on circuit may be a circuit in a terminal device for powering on a central processing unit, and obtains a voltage signal transmitted by a power supply circuit according to a power-on signal, and powers on each unit in the central processing unit after dividing the voltage signal. It should be noted that, in order to enable the microcontrol circuit, the first conversion circuit, and the interface chip circuit to power on the central processing unit in response to a power-on instruction, when the terminal device is in a power-off state, the power-on circuit maintains power supply to the microcontrol circuit, the first conversion circuit, and the interface chip circuit. Among them, since the isolation circuit does not need power supply to complete the transmission of the power-on instruction, the power-on circuit does not supply power to the isolation circuit.

[0152] It can be understood that in order to reduce the power consumption of the terminal device when the central processor is not powered on, the micro-control circuit, the first conversion circuit and the interface chip circuit are operated in a low power consumption mode. After the central processor is powered on, the micro-control circuit, the first conversion circuit and the interface chip circuit are switched from the low power consumption mode to the normal power consumption mode. Among them, the energy consumption of the normal power consumption mode is higher than the energy consumption of the low power consumption mode.

[0153] The power supply circuit may be a circuit in the terminal device for converting the voltage of an external AC power source, for example, converting an external 220V AC power into 12V DC power.

[0154] The AC power source may be a voltage-regulated AC signal source received by components such as a power plug of the terminal device from outside the terminal device.

[0155] The DC power supply voltage may be a voltage obtained after voltage conversion by a power supply circuit, and is used to provide working power to various components or circuits in the terminal device, for example, it may be 12V DC.

[0156] The power-on voltage may be the voltage transmitted when each unit in the CPU is powered on. It is understandable that the operating voltages of each unit in the CPU are different, so the voltage signal needs to be divided by the power-on circuit to obtain the corresponding power-on voltage of each unit.

[0157] The central processing unit may be the computing and control core in the terminal device, used to perform data processing, program running and other actions. The central processing unit may include multiple units, such as a processing unit for sending and calculating various data, a memory unit for temporarily storing data, and a management unit for managing various hardware relationships.

[0158] In the embodiments of the present specification, a startup instruction generated by a network or offline operation is received by the central control software on the central control device, and a power-on signal is transmitted to the terminal device through a serial port connected to the terminal device in response to the startup instruction, thereby completing the startup of the terminal device. That is, it can satisfy the network remote startup of the terminal device through the central control software and the central control device, and can also perform startup operations on multiple connected terminal devices according to one or more serial ports, thereby improving the stability and reliability of remote startup of the terminal device.

[0159] See also Figure 4 , is a flow chart of a device startup method provided in the embodiment of this specification. Figure 4 As shown, the method is applied to a device startup system and may include the following steps S201 to S208.

[0160] S201, the switching circuit receives a power-on command transmitted by the serial port of the central control device;

[0161] In one embodiment, upon receiving a startup instruction, the central control software installed in the central control device generates a power-on instruction and transmits the power-on instruction to the switching circuit. The switching circuit receives the power-on instruction transmitted by the central control device through the serial port.

[0162] The specific definitions of the central control device, central control software, switching circuit and power-on instruction can be referred to the relevant content in step S101, which will not be repeated here.

[0163] S202, the first instruction receiving end transmits the received power-on instruction to the gate of the field effect tube. When the power-on instruction received by the gate of the field effect tube is a low-level signal, the drain and the source are turned on, and the first instruction output end transmits the low-level signal to the interface chip circuit;

[0164] In one embodiment, the first instruction receiving end in the isolation circuit receives a power-on instruction transmitted by the central control device through the ringing detection port in the central control device. When the power-on instruction received by the first instruction receiving end at the gate of the field effect transistor in the isolation circuit is a low-level signal, the drain and source of the field effect transistor are turned on, and the low-level signal is transmitted to the interface chip circuit through the first instruction output port of the isolation circuit, so that the interface chip circuit enables the power supply circuit and the power-on circuit to power on the central processing unit in response to the low-level signal.

[0165] Specifically, Figure 5 As shown, when the switching circuit is an isolation circuit, the first instruction receiving end of the isolation circuit is connected to the ringing detection port of the central control device, the first instruction output end of the isolation circuit is connected to the interface chip circuit, the isolation circuit includes a field effect transistor, the gate of the field effect transistor is connected to the first instruction receiving end, the drain of the field effect transistor is connected to the first instruction output end, and the source of the field effect transistor is grounded.

[0166] Figure 5 The field effect tube in the circuit receives the power-on instruction transmitted by the ringing detection port through the first instruction receiving terminal, and detects the power-on instruction. When the power-on instruction output by the ringing detection port detected by the G pole (gate) in the field effect tube is a low-level signal, the D pole (drain) and S pole (source) in the field effect tube are turned on. Since the field effect tube is turned on and the S pole is grounded, the first instruction output terminal transmits the low-level signal (0V) transmitted from the S pole to the D pole in the field effect tube to the interface chip circuit.

[0167] The first instruction receiving end and the first instruction output end may be transmission ports of the isolation circuit.

[0168] Furthermore, when the first instruction receiving end receives a high-level signal, the G pole cuts off the D pole and the S pole according to the received high-level signal, thereby isolating the high-level signal transmitted by the central control device through the isolation circuit, preventing the high-level signal from damaging the interface chip circuit, and thus improving the safety of starting the terminal device. If the terminal device is in the shutdown state, the central control device continues to transmit a high-level signal to the first instruction receiving end to keep the field effect tube in the off state.

[0169] It should be noted that since the field effect tube includes two types, NMOS tube (N field effect tube) and PMOS tube (P field effect tube), and the conduction conditions of the two types are opposite, the detection conditions can be adjusted accordingly according to the type of the field effect tube. For example, if the field effect tube is a PMOS tube, the central control device transmits a low-level signal to the PMOS tube to turn on the PMOS tube; if the field effect tube is an NMOS tube, the central control device transmits a high-level signal to the NMOS tube to turn on the NMOS tube.

[0170] S203, the first conversion circuit receives a power-on instruction transmitted by the output port of the central control device, and transmits the power-on instruction to the micro-control circuit;

[0171] In one embodiment, when the switching circuit includes a first conversion circuit and a micro-control circuit, the second instruction receiving end in the first conversion circuit receives a power-on instruction transmitted by the output port of the central control device, and transmits the power-on instruction to the third instruction receiving end of the micro-control circuit based on the second instruction output end.

[0172] For example, Figure 6 As shown, when the switching circuit includes a first conversion circuit and a micro-control circuit, Figure 6 One end of the first conversion circuit is connected to the output port of the central control device, and the other end of the first conversion circuit is connected to one end of the micro-control circuit. Specifically, the first conversion circuit includes a first conversion chip, a second instruction receiving end and a second instruction output end, and the micro-control circuit includes a third instruction receiving end. The second instruction receiving end of the first conversion circuit is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion chip is connected to the second instruction output end, and the second instruction output end is connected to the third instruction receiving end. Among them, the first conversion chip is a chip that performs data processing in the first conversion circuit.

[0173] The second instruction receiving end and the second instruction output end may be pins on the first conversion chip, and the third instruction receiving end may be a pin on the microcontroller chip.

[0174] The first conversion circuit may be used in the terminal device to perform level conversion on the power-on instruction, and convert and transmit the converted power-on instruction to the micro-control circuit.

[0175] The power-on command may be a power-on code sent by the central control device to the terminal device, and the power-on code may be a pre-set string, such as "AA BB CC 01 00 00 01 DD EE FF".

[0176] S204, the microcontroller circuit compares the power-on instruction with the preset power-on condition, and when the power-on instruction meets the power-on condition, generates a power-on signal and transmits the power-on signal to the interface chip circuit;

[0177] In one embodiment, the microcontrol circuit receives a power-on signal transmitted by the second instruction output port of the first conversion circuit at the second receiving end, and compares the power-on code in the power-on instruction with a preset power-on condition pre-stored in the microcontrol chip of the microcontrol circuit. When the power-on code matches the preset power-on condition, the microcontrol chip determines that the power-on instruction meets the preset power-on condition, generates a power-on signal, and transmits the power-on signal to the interface chip circuit based on the power-on signal output end.

[0178] For example, Figure 6 As shown, Figure 6 One end of the microcontrol circuit in the first conversion circuit is connected to the first conversion circuit, and the other end of the microcontrol circuit is connected to the interface chip circuit. Specifically, the microcontrol circuit includes a microcontrol chip, a third instruction receiving end and a power-on signal output end, the third instruction receiving end is connected to the second instruction output end in the first conversion circuit and the microcontrol chip, the microcontrol chip is connected to the power-on signal output end, and the power-on signal output end is connected to the interface chip circuit. The microcontrol chip can be a data processing chip in the microcontrol circuit.

[0179] The power-on signal output terminal may be a pin on a microcontroller chip.

[0180] The method in which the microcontrol circuit and the first conversion circuit generate a power-on signal in response to a power-on instruction and transmit it to the interface chip circuit can be that the first conversion chip receives the power-on instruction output by the output port of the central control device based on the second instruction receiving end, and transmits the power-on instruction to the third instruction receiving end of the microcontrol circuit based on the second instruction output end; the microcontrol chip receives the power-on instruction based on the third instruction receiving end, compares the power-on code in the power-on instruction with the preset power-on condition, and when the power-on code matches the preset power-on condition, the microcontrol chip determines that the power-on instruction meets the preset power-on condition, and generates a power-on signal, and transmits the power-on signal to the interface chip circuit based on the power-on signal output end.

[0181] The microcontrol circuit may be an MCU (microcontrol unit) circuit, which is used to identify and respond to the power-on command. It should be noted that the microcontrol circuit pre-stores an agreed power-on code. When the central control device outputs a power-on command to the microcontrol circuit, the microcontrol circuit verifies the power-on code in the power-on command. When the power-on code matches the power-on code stored in the microcontrol circuit, it can be considered that the power-on signal meets the preset power-on condition.

[0182] Further, such as Figure 7 As shown, the central processing unit includes a fourth signal output terminal, the interface chip circuit includes a fourth signal receiving terminal and a fifth signal output terminal, and the micro-control circuit includes a fifth signal receiving terminal. Figure 7 The fourth signal output terminal is connected to the fourth signal receiving terminal, and the fifth signal output terminal is connected to the fifth signal receiving terminal.

[0183] The fourth signal output terminal may be an output port on a central processing unit, the fourth signal receiving terminal and the fifth signal output terminal may be pins on an interface chip, and the fifth signal receiving terminal may be a pin on a microcontroller chip.

[0184] When the device status of the terminal device changes, the central processing unit generates device status information corresponding to the device status, and transmits the device status information to the fourth signal receiving end of the interface chip circuit through the fourth signal output end. The interface chip in the interface chip circuit transmits the device status information to the fifth signal receiving end of the micro-control circuit based on the fifth signal output end, and the micro-control circuit stores the device status information received through the fifth signal receiving end in the micro-control chip.

[0185] Exemplarily, when the device status of the terminal device changes, the central processing unit transmits device status information carrying the device status to the micro-control circuit. When the central control device transmits a status acquisition request to the terminal device to obtain the device status of the terminal device, the micro-control circuit transmits the device status information to the central control device through the first conversion circuit.

[0186] The status acquisition request may be a preset status acquisition code. The microcontroller circuit verifies the status acquisition code and after the verification passes, transmits the device status information to the central control device through the first conversion circuit.

[0187] The device state may be the state of the terminal device, and the device state information may be information used to indicate the device state of the terminal device, such as a sleep state, a hibernation state, and a power-off state.

[0188] It should be noted that, since the interface chip circuit cannot identify the status acquisition request transmitted by the central control device, the device status information is not transmitted to the central control device through the interface chip circuit.

[0189] Further, such as Figure 8 As shown, the first transfer circuit also includes a first signal receiving end, a first signal output end, a second signal receiving end and a second signal output end, and the micro-control circuit also includes a third signal receiving end and a third signal output end. The first signal receiving end is connected to the output port of the central control device, the first signal output end is connected to the third signal receiving end, the third signal output end is connected to the second signal receiving end, and the second signal output end is connected to the input port of the central control device.

[0190] The first signal receiving end, the first signal output end, the second signal receiving end and the second signal output end may be pins on the first conversion chip, and the third signal receiving end and the third signal output end may be pins on the microcontroller chip.

[0191] Specifically, the method for the micro-control circuit to respond to the status acquisition signal transmitted by the central control device can be that, when the central processing unit is in a power-on state, when the first signal receiving end of the first adapter circuit receives the status acquisition signal transmitted by the output port of the central control device, the first adapter circuit transmits the status acquisition signal to the third signal receiving end of the micro-control circuit based on the first signal output end, the micro-control circuit transmits the stored device status information to the second signal receiving end of the first adapter circuit based on the third output end, and the second signal output port of the first adapter circuit transmits the device status information to the central control device based on the input port of the central control device.

[0192] S205, the interface chip circuit generates a power-on signal in response to the power-on signal, and transmits the power-on signal to the power-on circuit;

[0193] In one embodiment, the interface chip circuit may be a SIO chip (super input output chip) circuit in the terminal device, which generates a power-on signal after receiving a power-on signal and transmits the power-on signal to the power-on circuit.

[0194] It can be understood that when the interface chip circuit receives the power-on signal, the wake-up power-on function of the interface chip circuit is triggered to generate a power-on signal, and the power-on signal is transmitted from the interface chip circuit to the power-on circuit.

[0195] For example, Fig. 9 As shown, the interface chip circuit includes a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected to the switching circuit, and the first power-on signal output end is connected to the power-on circuit. The interface chip receives the power-on instruction transmitted by the switching circuit based on the fourth instruction receiving end, generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end. The power-on signal can be a signal generated by the interface chip to enable the power-on circuit to be in a power-on state, and the interface chip can be a chip used for data processing in the interface chip circuit, such as an SIO chip.

[0196] The first power-on signal output terminal and the fourth instruction receiving terminal may be pins on the interface chip.

[0197] Further, such as Fig.10 As shown, the terminal device also includes Fig.10The second conversion circuit in the central processing unit includes a first output terminal and a first result receiving terminal, the interface chip circuit includes a first receiving terminal, a second result receiving terminal, a second output terminal and a first result output terminal, the second conversion circuit includes a second receiving terminal, a third output terminal, a third result receiving terminal and a second result output terminal, the first output terminal is connected to the first receiving terminal, the second output terminal is connected to the second receiving terminal, the third output terminal is connected to the input port of the central control device, the third result receiving terminal is connected to the output port of the central control device, the second result output terminal is connected to the second result receiving terminal, and the first result output terminal is connected to the first result receiving terminal.

[0198] Among them, the first output end and the first result receiving end can be transmission ports on the central processing unit, the first receiving end, the second result receiving end, the second output end and the first result output end can be pins on the interface chip, and the second receiving end, the third output end, the third result receiving end and the second result output end can be pins on the microcontroller chip.

[0199] When the terminal device has completed startup and the central processing unit is in a powered-on state, when it is necessary to debug the serial port of the central control device, a feasible method for serial port debugging may be that the first receiving end of the interface chip circuit receives the serial port debugging instruction transmitted by the central processing unit based on the first output end, and transmits the serial port debugging instruction to the second receiving end of the second conversion circuit based on the second output end, and the second conversion circuit transmits the serial port debugging instruction to the input port of the central control device based on the third output end to perform serial port debugging on the serial port of the central control device, and the third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device, and transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end, and the interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processing unit based on the first result output end.

[0200] It should be noted that, in addition to serial port debugging of the serial port of the central control device, the second conversion circuit can also perform other data transmission and debugging operations, which can be specifically set according to actual conditions.

[0201] The second conversion circuit may be a circuit in the terminal device for performing debugging operations such as serial port debugging on the serial port of the central control device.

[0202] The power-on signal may be a signal generated by the interface chip circuit and used to instruct the power-on circuit to power on the central processing unit.

[0203] S206, the power-on circuit transmits a power-on signal to the power supply circuit in response to the power-on signal;

[0204] In one embodiment, when the power-on circuit receives the power-on signal transmitted by the interface chip circuit, the power-on control signal in the power-on circuit transmits the power-on signal to the power supply circuit in the terminal device.

[0205] The power-on circuit can be used to supply power to various components in the terminal device, such as a central processing unit in the terminal device, a microcontroller circuit and an interface chip circuit in the terminal device.

[0206] Specifically, the power-on circuit may include a power-on control circuit and a power management circuit. The circuit for receiving the power-on signal transmitted by the interface chip circuit to power on the central processing unit may be as follows: Fig.11 As shown, Fig.11 It includes an interface chip circuit, a power-on control circuit, a power supply circuit, a power management circuit and a central processing unit, wherein one end of the power-on control circuit is connected to the interface chip circuit, the other end of the power-on control circuit is connected to one end of the power supply circuit, the other end of the power supply circuit is connected to one end of the power management circuit, and the other end of the power management circuit is connected to the central processing unit.

[0207] Furthermore, the circuit for transmitting the power-on signal from the power-on control circuit to the power supply circuit may be as follows: Fig.12 As shown, the power-on control circuit includes a first power-on signal receiving terminal, a power-on chip and a second power-on signal output terminal, the first power-on signal receiving terminal is connected to the interface chip circuit, and the second power-on signal output terminal is connected to the power supply circuit. The method for the power-on control circuit to transmit the power-on signal to the power supply circuit can be that the power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving terminal, and transmits the power-on signal to the power supply circuit based on the second power-on signal output terminal. Among them, the power-on chip can be a chip used for data processing in the power-on circuit.

[0208] The first power-on signal receiving end and the second power-on signal output end may be pins on the power-on chip.

[0209] The power-on control circuit may be a circuit in the terminal device for responding to a power-on signal transmitted by the interface chip circuit and enabling the power supply circuit to operate in a startup mode.

[0210] Among them, the startup mode can be a power supply mode corresponding to the power supply circuit when the terminal device enters the startup state and the running state.

[0211] S207, the power supply circuit converts the AC power supply into a voltage in response to the power-on signal to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit;

[0212] In one embodiment, when the power supply receives a power-on signal transmitted by a power-on control circuit, it converts the voltage of the external AC power of the terminal device in response to the power-on signal to generate a DC power voltage, and transmits the DC power voltage to the power management circuit.

[0213] The AC power supply may be a power signal received by the terminal device from the outside, for example, a 220V AC voltage.

[0214] Specifically, the power management circuit converts the voltage of the AC power supply and transmits the DC power supply voltage obtained by the voltage conversion to the power management circuit. The circuit may be as follows: Fig.13 As shown, the power supply circuit includes a second power-on signal receiving terminal, a first voltage receiving terminal, a first voltage conversion chip and a first voltage output terminal, the second power-on signal receiving terminal is connected to the power-on control circuit, the first voltage receiving terminal is connected to the external power supply, and the first voltage output terminal is connected to the power management circuit. The method for the power supply circuit to transmit the DC power supply voltage to the power management circuit can be that the power supply circuit responds to the power-on signal received by the second power-on signal receiving terminal, transmits the AC power received by the first voltage receiving terminal to the first voltage conversion chip, the first voltage conversion chip performs voltage conversion on the AC power supply to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit based on the first voltage output terminal.

[0215] The first voltage conversion chip may be a chip in a power supply circuit for converting an AC power supply into a DC power supply voltage. The first voltage output terminal and the second power-on signal receiving terminal may be pins on the first voltage conversion chip.

[0216] The power supply circuit can be a circuit in the terminal device that is connected to an external power supply, converts the voltage of the external AC power supply to generate a DC power supply voltage, and transmits the converted DC power supply voltage to the power management circuit on the mainboard of the terminal device. For example, it converts the external 220V AC power into 12V DC power. The external power supply can be used to provide AC power to the terminal device.

[0217] The DC power supply voltage may be a voltage obtained after voltage conversion by a power supply circuit, and is used to provide working power to various components or circuits in the terminal device, for example, it may be 12V DC.

[0218] S208, the power management circuit performs voltage conversion on each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each power-on voltage to each unit in the central processing unit for powering on;

[0219] In one embodiment, after the power management circuit receives the DC power supply voltage output by the power supply circuit, it performs voltage conversion on the working voltage of each unit in the central processing unit, generates a power-on voltage for each unit, and transmits each power-on voltage to each unit of the central processing unit to power on each unit, so that each unit enters a working state, thereby completing the power-on of the central processing unit, and the central processing unit enters a power-on state.

[0220] Specifically, the power management circuit that powers on the central processing unit according to the DC power supply voltage may be as follows: Fig.14 As shown, the power management circuit includes a second voltage receiving terminal, a second voltage conversion chip, a voltage distribution chip and a second voltage output terminal, the second voltage receiving terminal is connected to the power supply circuit, and the voltage distribution chip is connected to each unit of the central processing unit based on the second voltage output terminal. The method for the power management circuit to receive voltage to power on the central processing unit can be that the second voltage conversion chip receives the DC power supply voltage based on the second voltage receiving terminal, converts the DC power supply voltage based on the working voltage of each unit in the central processing unit, generates the power-on voltage corresponding to each unit, transmits the power-on voltage to the voltage distribution chip, and the voltage distribution chip powers on each unit in the central processing unit based on the second voltage output terminal and the power-on voltage. Among them, the second voltage conversion chip can be a chip in the power management circuit that converts the DC power supply voltage based on the working voltage of each unit in the central processing unit, and the voltage distribution chip can be a chip in the power management circuit that is used to distribute voltage to each unit in the central processing unit and transmits the power-on voltage corresponding to each unit to the corresponding voltage supply terminal.

[0221] The second voltage receiving end may be a transmission port in the power management circuit connected to the second voltage conversion chip, and the second voltage output end may be a transmission port connected to the voltage distribution chip. The second voltage conversion chip and the voltage distribution chip may be connected via a wire.

[0222] Furthermore, the circuit used by the voltage distribution chip to supply power to each unit in the central processing unit may be as follows: Fig.15 As shown, the voltage distribution chip includes a first voltage power supply end, a second voltage power supply end and a third voltage power supply end, the central processing unit includes at least a processing unit, a memory unit and a management unit, the voltage distribution chip is connected to the processing unit based on the first voltage power supply end, connected to the memory unit based on the second voltage power supply end, and connected to the management unit based on the third voltage power supply end.

[0223] The first voltage supply terminal, the second voltage supply terminal and the third voltage supply terminal may be included in the second voltage output terminal, specifically may be a transmission port on a voltage distribution chip, or may be three different wires.

[0224] Exemplarily, the method for the voltage distribution chip to power on each unit in the central processing unit can be that the voltage distribution chip powers on the processing unit based on the first voltage power supply terminal and the first voltage, the voltage distribution chip powers on the memory unit based on the second voltage power supply terminal and the second voltage, and the voltage distribution chip powers on the management unit based on the third voltage power supply terminal and the third voltage.

[0225] Among them, the first voltage is the power-on voltage corresponding to the processing unit, the second voltage is the power-on voltage corresponding to the memory unit, and the third voltage is the power-on voltage corresponding to the management unit. The specific values ​​of the first voltage, the second voltage, and the third voltage correspond to the working voltages corresponding to the units, and can be the same or different. It should be noted that the voltage distribution circuit powers on each unit in the central processing unit based on each power supply end. In the embodiments of this specification, only the processing unit, the memory unit, and the management unit are used as examples for explanation.

[0226] The power management circuit may be a circuit in a terminal device for supplying power to each chip in a central processing unit.

[0227] It can be understood that the central processing unit includes at least one unit, and the operating voltages of the units are different. Therefore, the voltage signal is distributed through the power management circuit to obtain a power-on voltage corresponding to the operating voltage of each unit.

[0228] Furthermore, when the terminal device enters a power-off state from a working state, in order to ensure that the interface chip circuit, the micro-control circuit and the first conversion circuit in the terminal device can respond to the power-on command to power on the central processing unit when the terminal device is in the power-off state, it is necessary to supply power through the power supply circuit to ensure that the interface chip circuit, the micro-control circuit and the first conversion circuit are in a working state.

[0229] Specifically, a feasible method for powering a power supply circuit may be that the power supply circuit provides power to a first adapter circuit based on a first power supply of a normal supply voltage provided by the power supply circuit and a first power supply end, enabling the first adapter circuit to operate in a low power consumption state based on the power received by the first power supply receiving end; the power supply circuit provides power to a microcontroller circuit based on a second power supply and a second power supply end provided by the power supply circuit, enabling the microcontroller circuit to operate in a low power consumption state in response to the power received by the second power supply receiving end; the power supply circuit provides power to an interface chip circuit based on a third power supply and a third power supply end provided by the power supply circuit, enabling the interface chip circuit to operate in a low power consumption state based on the power received by the third power supply receiving end.

[0230] For example, Fig.16 As shown, Fig.16The central processing unit also includes a power-off instruction output terminal, the power-on circuit also includes a power supply circuit, the power supply circuit includes a power-off instruction receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit also includes a first power supply receiving terminal, the micro-control circuit also includes a second power supply receiving terminal, the interface chip circuit also includes a third power supply receiving terminal, the power-off instruction output port is connected to the power-off instruction receiving port, the third voltage receiving terminal is connected to the power supply circuit, the first power supply terminal is connected to the first transfer circuit based on the first power supply receiving terminal, the second power supply terminal is connected to the micro-control circuit based on the second power supply receiving terminal, and the third power supply terminal is connected to the interface chip circuit based on the third power supply receiving terminal.

[0231] Among them, the power-off instruction receiving end, the third voltage receiving end, the first power supply end, the second power supply end and the third power supply end can be transmission ports on the power supply circuit, or can be wires connected to the power supply circuit; the power-off instruction output end can be a transmission port or pin on the central processing unit, the first power supply receiving end can be a pin on the first conversion chip in the first conversion circuit, the second power supply receiving end can be a pin on the microcontrol chip in the microcontrol circuit, and the third power supply receiving end can be a pin on the interface chip in the interface chip circuit.

[0232] The power-off state may be a state in which the central processing unit stops working, and only the power supply circuit provides the interface chip circuit, the micro-control circuit and the first conversion circuit with the voltage required for low power consumption state operation.

[0233] The power-off instruction may be an instruction generated by the central processor in response to a shutdown operation performed by a user on the terminal device, and is used to enable the power-on circuit to stop providing power to the central processor.

[0234] The power supply circuit can be a circuit in the power-on circuit that provides power to the interface chip circuit, the micro-control circuit, and the first conversion circuit when the terminal device is in a power-off state. It can be understood that in order for the terminal device to respond to the power-on signal to power on when the central control device transmits a power-on signal to the terminal device, it is necessary to ensure that the interface chip circuit, the micro-control circuit, and the first conversion circuit in the terminal device are always in a working state. In order to avoid unnecessary energy loss and component loss, when the terminal device is in a power-off state, the interface chip circuit and the micro-control circuit can operate in a low-power mode.

[0235] It should be noted that when the power-on circuit powers on the central processing unit and the terminal device is in operation after the power-on is completed, the power supply circuit in the power-on circuit continues to power the interface chip circuit, the micro-control circuit and the first conversion circuit, and when the central processing unit is powered on, the interface chip circuit, the micro-control circuit and the first conversion circuit switch from the low power consumption mode to the normal power consumption mode. Among them, the energy consumption of the normal power consumption mode is higher than the energy consumption of the low power consumption mode. It can be understood that the power-on circuit is also used to power other components in the terminal device, which are not listed here one by one.

[0236] The receiving ends and output ends involved in the above embodiments can be pins or transmission ports of a chip, etc., and can also be set accordingly according to the actual product production situation. Among them, the specific pin positions of the pins can be set according to the specific model of the chip. It can be understood that the pins on the same chip can be different receiving ends or output ends at the same time, which can be set specifically according to the specific model of the chip and the function of the pins.

[0237] In the embodiment of the present specification, the central control software on the central control device receives the startup command generated by the network or offline operation, and in response to the startup command, the generated power-on signal is transmitted to the terminal device through the serial port connected to the terminal device, thereby completing the startup of the terminal device, that is, it can meet the network remote startup of the terminal device through the central control software and the central control device, and can also perform startup operations on multiple connected terminal devices according to one or more serial ports, thereby improving the stability and reliability of remote startup of the terminal device. Furthermore, by providing two signal communications between the isolation circuit and the ringing detection port of the central control device and the first switching circuit and the micro-control circuit and the output port of the central control device, the device models of different central control devices are met, thereby providing the stability of the isolation circuit solution while ensuring that the central control device can use the output port to start the terminal device, thereby improving the applicability of starting the terminal device through the central control device. In addition, the information of the terminal device is transmitted to the central control device through the first conversion circuit and the second conversion circuit, so as to realize the data interaction between the terminal device and the central control device. Furthermore, the power supply circuit in the power-on circuit provides power for the interface chip circuit, the micro-control circuit and the first conversion circuit, so that the terminal device can respond to the power-on signal transmitted by the central control device to start the terminal device.

[0238] The present specification also provides a computer storage medium that can store multiple program instructions, which are suitable for being loaded and executed by a processor as described above. Figure 1-Figure 16 The method steps of the embodiment shown in the figure can be found in the specific implementation process. Figure 1-Figure 16 The specific description of the illustrated embodiment will not be repeated here.

[0239] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiments can be implemented by instructing the relevant hardware through a computer program, and the program can be stored in a computer-readable storage medium, and when the program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, the storage medium can be a disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc.

[0240] The above disclosure is only the preferred embodiment of this specification, which certainly cannot be used to limit the scope of rights of this specification. Therefore, equivalent changes made according to the claims of this specification are still within the scope covered by this specification.

Claims

1. A method for starting a terminal device, characterized in that: The method is applied to a terminal device, the terminal device is used to connect to a central control device, the terminal device comprises an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit, one end of the interface chip circuit is connected to one end of the switching circuit, the other end of the interface chip circuit is connected to a first end of the power-on circuit, the other end of the switching circuit is connected to a serial port of the central control device, the second end of the power-on circuit is connected to the central processing unit, and the third end of the power-on circuit is connected to the power supply circuit; The method comprises: The switching circuit receives a power-on instruction transmitted by the serial port of the central control device, wherein the power-on instruction is generated by the central control device in response to a startup instruction received from the central control software; The switching circuit transmits the power-on instruction to the interface chip circuit; The interface chip circuit generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit; The power-on circuit converts the DC power supply voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processing unit based on each of the power-on voltages.

2. The method according to claim 1, characterized in that When the switching circuit is an isolation circuit, the isolation circuit includes a first instruction receiving end, a field effect transistor and a first instruction output end, the first instruction receiving end is connected to the ringing detection port of the central control device, and the first instruction output end is connected to the interface chip circuit; The gate of the field effect tube is connected to the first instruction receiving end, the drain of the field effect tube is connected to the first instruction output end, and the source of the field effect tube is grounded; The switching circuit transmits the power-on instruction to the interface chip circuit, including: The first instruction receiving end transmits the received power-on instruction to the gate of the field effect tube. When the power-on instruction received by the gate of the field effect tube is a low-level signal, the drain and the source are turned on, and the first instruction output end transmits the low-level signal to the interface chip circuit, so that the interface chip circuit enables the power supply circuit and the power-on circuit to power on the central processing unit in response to the low-level signal.

3. The method according to claim 1, characterized in that When the switching circuit includes a first conversion circuit and a micro-control circuit, one end of the first conversion circuit is connected to the output port of the central control device, the other end of the first conversion circuit is connected to one end of the micro-control circuit, and the other end of the micro-control circuit is connected to the interface chip circuit; The switching circuit transmits the power-on instruction to the interface chip circuit, including: The first conversion circuit receives a power-on instruction transmitted by the output port of the central control device, and transmits the power-on instruction to the micro-control circuit; The microcontrol circuit compares the power-on instruction with a preset power-on condition, and when the power-on instruction meets the power-on condition, generates a power-on signal and transmits the power-on signal to the interface chip circuit.

4. The method according to claim 3, characterized in that The first conversion circuit includes a first conversion chip, a second instruction receiving terminal and a second instruction output terminal, and the micro-control circuit includes a micro-control chip, a third instruction receiving terminal and a power-on signal output terminal; The second instruction receiving end is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion signal is connected to the second instruction output end, the second instruction output end is connected to the third instruction receiving end, the third instruction receiving end is connected to the microcontroller chip, the microcontroller chip is connected to the power-on signal output end, and the power-on signal output end is connected to the interface chip circuit; The switching circuit transmits the power-on instruction to the interface chip circuit, including: The first conversion chip receives the power-on instruction outputted by the output port of the central control device based on the second instruction receiving end, and transmits the power-on instruction to the third instruction receiving end of the microcontroller circuit based on the second instruction output end; The microcontroller chip receives the power-on instruction based on the third instruction receiving terminal, and compares the power-on code in the power-on instruction with a preset power-on condition; When the power-on code matches the preset power-on condition, the microcontroller chip determines that the power-on instruction meets the preset power-on condition, generates a power-on signal, and transmits the power-on signal to the interface chip circuit based on the power-on signal output terminal.

5. The method according to claim 1, characterized in that The interface chip circuit comprises a fourth instruction receiving end, an interface chip and a first power-on signal output end, the fourth instruction receiving end is connected to the switching circuit, and the first power-on signal output end is connected to the power-on circuit; The interface chip circuit generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit, including: The interface chip receives a power-on instruction transmitted by the switching circuit based on the fourth instruction receiving end, generates a power-on signal in response to the power-on instruction, and transmits the power-on signal to the power-on circuit based on the first power-on signal output end.

6. The method according to claim 1, characterized in that The power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected to the interface chip circuit, the other end of the power-on control circuit is connected to one end of the power supply circuit, the other end of the power supply circuit is connected to one end of the power management circuit, and the other end of the power management circuit is connected to the central processing unit; The power-on circuit converts the DC power supply voltage transmitted by the power supply circuit into a plurality of different power-on voltages in response to the power-on signal, and powers on the central processing unit based on each of the power-on voltages, including: The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal; The power supply circuit converts the AC power supply into a DC power supply voltage in response to the power-on signal, and transmits the DC power supply voltage to the power management circuit; The power management circuit performs voltage conversion on each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each of the power-on voltages to each unit in the central processing unit for powering on.

7. The method according to claim 6, characterized in that The power-on control circuit comprises a first power-on signal receiving end, a power-on chip and a second power-on signal output end, wherein the first power-on signal receiving end is connected to the interface chip circuit, and the second power-on signal output end is connected to the power supply circuit; The power-on circuit transmits the power-on signal to the power supply circuit in response to the power-on signal, comprising: The power-on chip receives the power-on signal transmitted by the interface chip circuit based on the first power-on signal receiving end, and transmits the power-on signal to the power supply circuit based on the second power-on signal output end.

8. The method according to claim 7, characterized in that The power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected to the power-on control circuit, the first voltage receiving end is connected to an external power supply, and the first voltage output end is connected to the power management circuit; The power supply circuit converts the AC power supply voltage in response to the power-on signal to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit, including: The power supply circuit transmits the AC power received by the first voltage receiving end to the first voltage conversion chip in response to the power-on signal received by the second power-on signal receiving end; The first voltage conversion chip performs voltage conversion on the AC power supply to generate a DC power supply voltage, and transmits the DC power supply voltage to the power management circuit based on the first voltage output terminal.

9. The method according to claim 8, characterized in that The power management circuit includes a second voltage receiving terminal, a second voltage conversion chip, a voltage distribution chip and a second voltage output terminal, the second voltage receiving terminal is connected to the power supply circuit, and the voltage distribution chip is connected to each unit of the central processing unit based on the second voltage output terminal; The power management circuit performs voltage conversion on each unit in the central processing unit, generates a power-on voltage corresponding to each unit, and transmits each of the power-on voltages to each unit in the central processing unit for powering on, including: The second voltage conversion chip receives the DC power supply voltage based on the second voltage receiving terminal, performs voltage conversion on the DC power supply voltage based on the working voltage of each unit in the central processor, and generates a power-on voltage corresponding to each unit; The power-on voltage is transmitted to the voltage distribution chip, and the voltage distribution chip powers on each of the units in the central processing unit based on the second voltage output terminal and the power-on voltage.

10. The method according to claim 9, characterized in that The voltage distribution chip includes a first voltage power supply end, a second voltage power supply end and a third voltage power supply end, the central processing unit includes at least a processing unit, a memory unit and a management unit, the voltage distribution chip is connected to the processing unit based on the first voltage power supply end, is connected to the memory unit based on the second voltage power supply end, and is connected to the management unit based on the third voltage power supply end; The voltage distribution chip powers on each of the units in the central processing unit based on the second voltage output terminal, including: The voltage distribution chip powers on the processing unit based on the first voltage supply terminal and the first voltage, wherein the first voltage is a power-on voltage corresponding to the processing unit; The voltage distribution chip powers on the memory unit based on the second voltage supply terminal and the second voltage, wherein the second voltage is a power-on voltage corresponding to the memory unit; The voltage distribution chip powers on the management unit based on the third voltage supply terminal and the third voltage, and the third voltage is a power-on voltage corresponding to the management unit.

11. The method according to claim 3, characterized in that The central processing unit includes a power-off instruction output terminal, the power-on circuit also includes a power supply circuit, the power supply circuit includes a power-off instruction receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit also includes a first power supply receiving terminal, the micro-control circuit also includes a second power supply receiving terminal, and the interface chip circuit also includes a third power supply receiving terminal; The power-off instruction output port is connected to the power-off instruction receiving port, the third voltage receiving end is connected to the power supply circuit, the first power supply end is connected to the first switching circuit based on the first power supply receiving end, the second power supply end is connected to the micro-control circuit based on the second power supply receiving end, and the third power supply end is connected to the interface chip circuit based on the third power supply receiving end; The method further comprises: When the central processing unit enters a power-off state, the central processing unit outputs a power-off instruction to the power-on circuit based on the power-off instruction output port, and the power-on circuit stops providing power to the central processing unit in response to the power-off instruction received based on the power-off instruction receiving port; The power supply circuit provides power to the first adapter circuit based on the first power provided by the power supply circuit and the first power supply end, so that the first adapter circuit can operate in a low power consumption state based on the power received by the first power receiving end; The power supply circuit provides power to the micro-control circuit based on the second power supply provided by the power supply circuit and the second power supply terminal, so that the micro-control circuit can operate in a low power consumption state in response to the power received based on the second power supply receiving terminal; The power supply circuit provides power to the interface chip circuit based on the third power supply provided by the power supply circuit and the third power supply end, enabling the interface chip circuit to operate in a low power consumption state based on the power received by the third power supply receiving end.

12. The method according to claim 3, characterized in that The first switching circuit includes a first signal receiving end, a first signal output end, a second signal receiving end, and a second signal output end, and the micro-control circuit also includes a third signal receiving end and a third signal output end; The first signal receiving end is connected to the output port of the central control device, the first signal output end is connected to the third signal receiving end, the third signal output end is connected to the second signal receiving end, and the second signal output end is connected to the input port of the central control device; The method further comprises: When the central processing unit is in a powered-on state, when the first signal receiving end of the first adapter circuit receives the state acquisition signal transmitted by the output port of the central control device, the first adapter circuit transmits the state acquisition signal to the third signal receiving end of the micro-control circuit based on the first signal output end; The micro-control circuit transmits the stored device status information to the second signal receiving end of the first switching circuit based on the third output end; The second signal output port of the first switching circuit transmits the device status information to the central control device based on the input port of the central control device.

13. The method according to claim 12, characterized in that The central processing unit further includes a fourth signal output terminal, the interface chip circuit includes a fourth signal receiving terminal and a fifth signal output terminal, and the micro-control circuit includes a fifth signal receiving terminal; The fourth signal output terminal is connected to the fourth signal receiving terminal, and the fifth signal output terminal is connected to the fifth signal receiving terminal; The method further comprises: When the device state of the terminal device changes, the central processor generates device state information corresponding to the device state, and transmits the device state information to the fourth signal receiving end of the interface chip circuit based on the fourth signal output end; The interface chip circuit transmits the device status information to the fifth signal receiving end of the micro-control circuit based on the fifth signal output end, and the micro-control circuit stores the device status information.

14. The method according to claim 1, characterized in that The terminal device further comprises a second conversion circuit, the central processor comprises a first output terminal and a first result receiving terminal, the interface chip circuit comprises a first receiving terminal, a second result receiving terminal, a second output terminal and a first result output terminal, and the second conversion circuit comprises a second receiving terminal, a third output terminal, a third result receiving terminal and a second result output terminal; The first output end is connected to the first receiving end, the second output end is connected to the second receiving end, the third output end is connected to the input port of the central control device, the third result receiving end is connected to the output port of the central control device, the second result output end is connected to the second result receiving end, and the first result output end is connected to the first result receiving end; The method further comprises: The first receiving end of the interface chip circuit receives the serial port debugging instruction transmitted by the central processing unit based on the first output end, and transmits the serial port debugging instruction to the second receiving end of the second conversion circuit based on the second output end; The second conversion circuit transmits the serial port debugging instruction to the input port of the central control device based on the third output terminal, so as to perform serial port debugging on the serial port of the central control device; The third result receiving end of the second conversion circuit receives the serial port debugging result of the central control device, and transmits the serial port debugging result to the second result receiving end of the interface chip circuit based on the second result output end; The interface chip circuit transmits the serial port debugging result to the first result receiving end of the central processing unit based on the first result output end.

15. A terminal device, which is used to connect to a central control device, and includes an interface chip circuit, a switching circuit, a central processing unit, a power-on circuit and a power supply circuit, wherein one end of the interface chip circuit is connected to one end of the switching circuit, the other end of the interface chip circuit is connected to a first end of the power-on circuit, the other end of the switching circuit is connected to a serial port of the central control device, the second end of the power-on circuit is connected to the central processing unit, and the third end of the power-on circuit is connected to the power supply circuit.

16. The terminal device according to claim 15, characterized in that: When the switching circuit is an isolation circuit, the isolation circuit includes a first instruction receiving end, a field effect transistor and a first instruction output end, the first instruction receiving end is connected to the ringing detection port of the central control device, and the first instruction output end is connected to the interface chip circuit; The isolation circuit includes a field effect tube, a gate of the field effect tube is connected to the ringing detection port of the central control device, a drain of the field effect tube is connected to the interface chip circuit, and a source of the field effect tube is grounded.

17. The terminal device according to claim 15, characterized in that: When the switching circuit includes a first conversion circuit and a micro-control circuit, one end of the first conversion circuit is connected to the output port of the central control device, the other end of the first conversion circuit is connected to one end of the micro-control circuit, and the other end of the micro-control circuit is connected to the interface chip circuit.

18. The terminal device according to claim 17, characterized in that: The first conversion circuit includes a first conversion chip, a second instruction receiving terminal and a second instruction output terminal, and the micro-control circuit includes a micro-control chip, a third instruction receiving terminal and a power-on signal output terminal; The second instruction receiving end is connected to the output port of the central control device, the second instruction receiving end is connected to the first conversion chip, the first conversion signal is connected to the second instruction output end, the second instruction output end is connected to the third instruction receiving end, the third instruction receiving end is connected to the microcontroller chip, the microcontroller chip is connected to the power-on signal output end, and the power-on signal output end is connected to the interface chip circuit.

19. The terminal device according to claim 15, characterized in that: The interface chip circuit includes a fourth instruction receiving end, an interface chip and a first power-on signal output end. The fourth instruction receiving end is connected to the switching circuit, and the first power-on signal output end is connected to the power-on circuit.

20. The terminal device according to claim 15, characterized in that: The power-on circuit includes a power-on control circuit and a power management circuit, one end of the power-on control circuit is connected to the interface chip circuit, the other end of the power-on control circuit is connected to one end of the power supply circuit, the other end of the power supply circuit is connected to one end of the power management circuit, and the other end of the power management circuit is connected to the central processing unit.

21. The terminal device according to claim 20, characterized in that: The power-on control circuit includes a first power-on signal receiving end, a power-on chip and a second power-on signal output end. The first power-on signal receiving end is connected to the interface chip circuit, and the second power-on signal output end is connected to the power supply circuit.

22. The terminal device according to claim 20, characterized in that: The power supply circuit includes a second power-on signal receiving end, a first voltage receiving end, a first voltage conversion chip and a first voltage output end, the second power-on signal receiving end is connected to the power-on control circuit, the first voltage receiving end is connected to an external power supply, and the first voltage output end is connected to the power management circuit.

23. The terminal device according to claim 20, characterized in that: The power management circuit includes a second voltage receiving end, a second voltage conversion chip, a voltage distribution chip and a second voltage output end. The second voltage receiving end is connected to the power supply circuit, and the voltage distribution chip is connected to each unit of the central processing unit based on the second voltage output end.

24. The terminal device according to claim 23, characterized in that: The voltage distribution chip includes a first voltage power supply end, a second voltage power supply end and a third voltage power supply end. The central processing unit includes at least a processing unit, a memory unit and a management unit. The voltage distribution chip is connected to the processing unit based on the first voltage power supply end, connected to the memory unit based on the second voltage power supply end, and connected to the management unit based on the third voltage power supply end.

25. The terminal device according to claim 17, characterized in that: The central processing unit includes a power-off instruction output terminal, the power-on circuit also includes a power supply circuit, the power supply circuit includes a power-off instruction receiving terminal, a third voltage receiving terminal, a first power supply terminal, a second power supply terminal and a third power supply terminal, the first conversion circuit also includes a first power supply receiving terminal, the micro-control circuit also includes a second power supply receiving terminal, and the interface chip circuit also includes a third power supply receiving terminal; The power-off instruction output port is connected to the power-off instruction receiving port, the third voltage receiving end is connected to the power supply circuit, the first power supply end is connected to the first transfer circuit based on the first power supply receiving end, the second power supply end is connected to the micro-control circuit based on the second power supply receiving end, and the third power supply end is connected to the interface chip circuit based on the third power supply receiving end.

26. The terminal device according to claim 17, characterized in that: The first switching circuit includes a first signal receiving end, a first signal output end, a second signal receiving end, and a second signal output end, and the micro-control circuit also includes a third signal receiving end and a third signal output end; The first signal receiving end is connected to the output port of the central control device, the first signal output end is connected to the third signal receiving end, the third signal output end is connected to the second signal receiving end, and the second signal output end is connected to the input port of the central control device.

27. The terminal device according to claim 26, characterized in that: The central processing unit further includes a fourth signal output terminal, the interface chip circuit includes a fourth signal receiving terminal and a fifth signal output terminal, and the micro-control circuit includes a fifth signal receiving terminal; The fourth signal output terminal is connected to the fourth signal receiving terminal, and the fifth signal output terminal is connected to the fifth signal receiving terminal.

28. The terminal device according to claim 15, characterized in that: The terminal device further comprises a second conversion circuit, the central processor comprises a first output terminal and a first result receiving terminal, the interface chip circuit comprises a first receiving terminal, a second result receiving terminal, a second output terminal and a first result output terminal, and the second conversion circuit comprises a second receiving terminal, a third output terminal, a third result receiving terminal and a second result output terminal; The first output end is connected to the first receiving end, the second output end is connected to the second receiving end, the third output end is connected to the input port of the central control device, the third result receiving end is connected to the output port of the central control device, the second result output port is connected to the second result receiving end, and the first result output end is connected to the first result receiving end.

29. A computer storage medium storing a plurality of instructions, wherein the instructions are suitable for being loaded by a processor and executing the steps of the method as claimed in any one of claims 1 to 14.

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