A method and system for testing a vacuum cleaner circuit board

Abstract

The application discloses a kind of vacuum cleaner circuit board test method and system, specifically related to circuit test technical field, specifically including after vacuum cleaner circuit board is tested by dust, simulate the normal operation process of vacuum cleaner circuit board, according to the current voltage of vacuum cleaner circuit board, obtain the power information of vacuum cleaner circuit board, and using fast fourier transform determines the signal information of vacuum cleaner circuit board, constructs stable evaluation model, whether circuit board generates unstable signal is judged, when generating unstable signal, vacuum cleaner circuit board is divided into multiple regions, and a test point is set in each region, determine the environmental information and electrical information at test point in region, construct regional fault evaluation model, reduce the range that circuit board can appear fault, the application is helpful to consider the stability and fault risk of circuit board in dust interference condition under the simulation and evaluation of vacuum cleaner circuit board, and it is helpful to accurately find fault source.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of circuit testing, more particularly, the present application relates to a dust cleaner circuit board testing method and system. BACKGROUND

[0002] In the normal operation process of the dust cleaner, the circuit board is subjected to various environmental factors, including temperature, humidity, dust, etc., and in the long-term use process, the circuit board may fail due to dust accumulation, thereby affecting the performance and stability of the equipment.

[0003] In the prior art, the invention patent CN111142008A circuit board power parameter testing system and method solves the problem that the traditional testing method uses oscilloscopes, multimeters and other instruments to test, which can automatically test the power parameters of the circuit board to be tested.

[0004] In order to ensure the normal operation of the dust cleaner and prolong its service life, dust testing needs to be carried out on the dust cleaner circuit board before it leaves the factory, so as to find potential faults. The existing circuit board fault detection technology is not easy to judge the stability of the circuit board operation, and the positioning of the circuit board fault is relatively vague, which cannot accurately identify the specific area of the fault, thereby affecting the subsequent maintenance and maintenance work.

[0005] In order to solve the above defects, a technical scheme is provided. SUMMARY

[0006] In order to overcome the above defects of the prior art, the embodiments of the present application provide a dust cleaner circuit board testing method and system to solve the problems raised in the background art.

[0007] To achieve the above object, the present application provides the following technical scheme:

[0008] A dust cleaner circuit board testing method, specifically comprising the following steps:

[0009] S1: After the dust cleaner circuit board is tested by dust, simulate the normal operation process of the dust cleaner circuit board, obtain the power information of the dust cleaner circuit board according to the current voltage of the dust cleaner circuit board, and determine the signal information of the dust cleaner circuit board using fast Fourier transform;

[0010] S2: Combine and analyze the power information and signal information of the dust cleaner circuit board to construct a stability evaluation model, and judge whether the circuit board generates unstable signals;

[0011] S3: When generating unstable signals, divide the dust cleaner circuit board into multiple regions, and set a test point in each region to determine the environmental information and electrical information at the test point in the region.

[0012] S4: comprehensively analyzing the environmental information and electrical information of the test points in the region, constructing a regional fault evaluation model, and narrowing the range of possible faults of the circuit board.

[0013] In a preferred embodiment, the power information of the circuit board of the vacuum cleaner includes:

[0014] The power information of the circuit board of the vacuum cleaner is represented by a power loss anomaly coefficient.

[0015] The acquisition logic of the power loss anomaly coefficient is: simulating the normal operation process of the circuit board of the vacuum cleaner, setting a monitoring interval, determining the input power of the circuit board of the vacuum cleaner according to the input current and input voltage of the circuit board of the vacuum cleaner in the monitoring interval, and determining the output power of the circuit board of the vacuum cleaner according to the output current and output voltage of the circuit board of the vacuum cleaner in the monitoring interval.

[0016] The input power of the circuit board of the vacuum cleaner in the monitoring interval and the output power of the circuit board of the vacuum cleaner are respectively marked as: and wherein i=1, 2, 3, …, I, I is a positive integer, and i is the number of collected current and voltage in the monitoring interval.

[0017] The power loss anomaly coefficient is calculated, and the calculation formula is: wherein is the power loss anomaly coefficient. In a preferred embodiment, the signal information of the circuit board of the vacuum cleaner includes:

[0018] The signal information of the circuit board of the vacuum cleaner is represented by a running frequency fluctuation coefficient.

[0019] The acquisition logic of the running frequency fluctuation coefficient is: simulating the normal operation process of the circuit board of the vacuum cleaner, using fast Fourier transform to convert the time domain signal of the circuit board into a frequency domain signal, determining the sample number N of the signal in the monitoring interval, and determining the frequency resolution wherein , is the sampling frequency.

[0020] The frequency value of the circuit board in the monitoring interval is determined, and the frequency value of the circuit board in the monitoring interval is marked as: wherein k=0, 1, 2, …, N-1, and k is the index of fast Fourier transform.

[0021] The amplitude of the frequency value of the circuit board in the monitoring interval is calculated, and the calculation formula is: wherein is the frequency domain signal after fast Fourier transform, is the real part of each frequency value of the circuit board, is the imaginary part of each frequency value of the circuit board.

[0022] A magnitude threshold is set, the magnitude of the frequency value of the circuit board in the monitoring interval is compared with the magnitude threshold, the magnitude of the frequency value greater than the magnitude threshold is determined, the magnitude of the frequency value greater than the magnitude threshold is taken as the main frequency value of the circuit board in the monitoring interval, and the main frequency value of the circuit board in the monitoring interval is marked as: , wherein n = 1, 2, 3, …, m, m is a positive integer, and n is the number of the main frequency in the monitoring interval;

[0023] The main frequency values are summed and divided by the total number of data points to obtain the average main frequency value of the circuit board of the vacuum cleaner, and the calculation formula is: ; wherein, is the average main frequency value of the circuit board of the vacuum cleaner;

[0024] The standard deviation of the main frequency of the circuit board of the vacuum cleaner is calculated, and the calculation formula is: ; wherein, is the standard deviation of the main frequency of the circuit board of the vacuum cleaner;

[0025] The coefficient of variation of the circuit board of the vacuum cleaner is calculated, and the calculation formula is: ; wherein, is the coefficient of variation of the circuit board of the vacuum cleaner;

[0026] The running frequency fluctuation coefficient is calculated, and the calculation formula is: ; wherein, is the running frequency fluctuation coefficient.

[0027] In a preferred embodiment, determining whether the circuit board generates an unstable signal comprises:

[0028] The power loss anomaly coefficient and the running frequency fluctuation coefficient are weighted and calculated to construct a stability evaluation model to generate an unstable evaluation coefficient, and the calculation formula is: ; wherein, is the unstable evaluation coefficient, and are the proportional coefficients of the power loss anomaly coefficient and the running frequency fluctuation coefficient, and are both greater than 0;

[0029] An unstable evaluation coefficient threshold is set, the unstable evaluation coefficient is compared with the unstable evaluation coefficient threshold, if the unstable evaluation coefficient is greater than the unstable evaluation coefficient threshold, an unstable signal is generated, and if the unstable evaluation coefficient is less than the unstable evaluation coefficient threshold, no signal is generated.

[0030] In a preferred embodiment, the environmental information at the test points in the region comprises:

[0031] The environmental information at the test points in the region is represented by a hotspot position deviation coefficient;

[0032] The acquisition logic of the hotspot position deviation coefficient is to determine the specific coordinates of the test point positions on the circuit board, mark the specific coordinates of the test point positions on the circuit board as: wherein j=1, 2, 3, …, J, J is a positive integer, and j is the number of the test point on the circuit board;

[0033] The test points on the circuit board are clustered by the DBSCAN clustering algorithm, and the field radius is set as the maximum distance between the test points, the minimum point number minPts is set as the minimum number of test points within the field radius ;

[0034] Each test point on the circuit board is traversed, and whether it has been visited is checked;

[0035] For each unvisited test point, the neighborhood points within the field radius of each unvisited test point are calculated, if the number of neighborhood points is greater than or equal to minPts, the unvisited test point is taken as a core point, and a new cluster is created, if the number of neighborhood points is less than minPts, the unvisited test point is taken as a boundary point or a noise point; all points in the neighborhood of the core point are marked as part of the cluster, and the neighborhood of the new core point is repeatedly checked to continue to expand the cluster until there is no new core point that can be expanded;

[0036] All test points on the circuit board are classified by the DBSCAN clustering algorithm, the core points, boundary points and noise points of the circuit board of the dust collector are determined, and the clusters in which the test points of the circuit board of the dust collector are located are determined;

[0037] A temperature threshold is set, the hotspot temperature at the test point is subtracted from the temperature threshold to obtain the temperature deviation of each test point in the cluster, and the temperature deviation of each test point in the cluster is marked as: wherein q=1, 2, 3, …, Q, Q is a positive integer, q is the number of the cluster of the circuit board of the dust collector, c=1, 2, 3, …, C, C is a positive integer, and c is the number of the test point in the qth cluster;

[0038] The average temperature deviation and the temperature deviation standard deviation of each test point in the cluster are obtained, and the average temperature deviation and the temperature deviation standard deviation of each test point in the cluster are marked as: and ; wherein , If the test point of the circuit board of the dust collector is not a noise point, the calculation formula of the hotspot position deviation coefficient of the test point is:​ If the test point of the circuit board of the vacuum cleaner is a noise point, the calculation formula of the hotspot position deviation coefficient of the test point is: ; wherein, is the hotspot position deviation coefficient of the test point, is the temperature deviation of the noise point, e = 1, 2, 3, …, E, E is a positive integer, and e is the number of the noise point of the circuit board of the vacuum cleaner, is the standard deviation of the temperature deviation of the non-noise point of the circuit board of the vacuum cleaner.

[0039] In a preferred embodiment, the electrical information at the test point in the region includes:

[0040] The electrical information at the test point in the region is represented by a current deviation stability coefficient and an impedance anomaly coefficient; the acquisition logic of the current deviation stability coefficient is: a unit time period is set, the current value of the test point in the set unit time period is determined, and the current value of the test point in the set unit time period is marked as: , wherein p = 1, 2, 3, …, P, P is a positive integer, and p is the number of the test point;

[0041] The range current value threshold of the test point is set, and the range current value threshold of the test point is marked as: , the current value of the test point in the set unit time period is compared with the range current value threshold of the test point, and the current value of the test point in the set unit time period which exceeds the range current value threshold is re-marked as: , wherein r = 1, 2, 3, …, R, R is a positive integer, and r is the number of the current value of the range current value threshold;

[0042] The current deviation stability coefficient is calculated, and the calculation formula is: , wherein, is the current deviation stability coefficient;

[0043] The acquisition logic of the impedance anomaly coefficient is: a known excitation signal of the test point is used to make the circuit react, the impedance detection device is used to analyze the impedance characteristics of the circuit, the impedance value at the test point is obtained, the real part of the impedance value at the test point is marked as: , and the imaginary part of the impedance value at the test point is marked as: ;

[0044] The phase angle of the impedance at the test point is calculated, and the calculation formula is: ; wherein, is the phase angle of the impedance at the test point;

[0045] The standard impedance angle is set, and the standard impedance angle is marked as: ;

[0046] The impedance anomaly coefficient is calculated according to the following formula: ; wherein, is the impedance anomaly coefficient.

[0047] In a preferred embodiment, the range of possible failure of the circuit board is narrowed down, including:

[0048] The hotspot position deviation coefficient, the current deviation stability coefficient and the impedance anomaly coefficient are weighted and calculated to construct a regional fault evaluation model to generate a regional fault evaluation coefficient. The calculation formula of the regional fault evaluation coefficient is: ; wherein is the regional fault evaluation coefficient of the pth test point, , , is the proportional coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient and the impedance anomaly coefficient, , , are all greater than 0;

[0049] A regional fault evaluation coefficient threshold is set. The regional fault evaluation coefficient of each test point of the circuit board of the dust collector is compared with the regional fault evaluation coefficient threshold. If the regional fault evaluation coefficient is greater than the regional fault evaluation coefficient threshold, the test point is marked as a fault point. If the regional fault evaluation coefficient is less than the regional fault evaluation coefficient threshold, no marking is performed.

[0050] In a preferred embodiment, a dust collector circuit board testing system includes a dust testing module, a data acquisition module, a stability evaluation module, a test point division module and a regional fault evaluation module. The modules are signal connected.

[0051] The dust testing module is used to simulate the running state of the circuit board of the dust collector after dust testing.

[0052] The data acquisition module is used to collect power information and signal information of the circuit board of the dust collector, and collect environmental information and electrical information at the test points in the region.

[0053] The stability evaluation module is used to combine the power information and signal information of the circuit board of the dust collector, construct a stability evaluation model, generate an instability evaluation coefficient, and compare it with a threshold to determine whether the circuit board generates an unstable signal.

[0054] The test point division module is used to divide the circuit board into multiple regions when an unstable signal is detected, set test points in each region, and use a clustering algorithm and increase an excitation signal according to the position of the test points.

[0055] A regional fault evaluation module is configured to combine environmental information and electrical information at test points in a region, build a regional fault evaluation model, generate a regional fault evaluation coefficient, and compare the coefficient with a threshold value to mark test points less than the threshold value as fault points.

[0056] Technical effects and advantages of the present application:

[0057] The present application simulates the running state of the circuit board in a dusty environment through a dust test simulation circuit, collects signal data such as current and voltage, and extracts frequency domain features through fast Fourier transform, combines power information of the circuit board with frequency domain signal information, and builds a stability evaluation model to determine whether the circuit board has unstable signals or potential faults.

[0058] According to the detection results of the unstable signals on the circuit board, the circuit board is divided into multiple regions, and test points are set in each region to collect environmental information and electrical information of each test point. By comprehensively analyzing the data of each test point in the region, a fault evaluation model is built to further narrow down the region where the circuit board may have faults and accurately locate the problem. The present application helps to simulate and evaluate the stability and fault risk of the circuit board under the condition of dust interference, and helps to accurately find the fault source. BRIEF DESCRIPTION OF DRAWINGS

[0059] In order to facilitate the understanding of those skilled in the art, the present application will be further described below in conjunction with the drawings;

[0060] Figure 1 A flowchart of a dust cleaner circuit board testing method according to the present application is shown.

[0061] Figure 2 A structural diagram of a dust cleaner circuit board testing system according to the present application is shown. DETAILED DESCRIPTION

[0062] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, not all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application. EMBODIMENT

[0063] As Figure 1 A flowchart of a dust cleaner circuit board testing method according to the present application is shown. The specific steps include:

[0064] S1: After the vacuum cleaner circuit board passes the dust test, the normal operation process of the vacuum cleaner circuit board is simulated, the power information of the vacuum cleaner circuit board is obtained according to the current and voltage of the vacuum cleaner circuit board, and the signal information of the vacuum cleaner circuit board is determined by fast Fourier transform;

[0065] S2: Analyze the power and signal information of the vacuum cleaner circuit board and build a stability evaluation model to determine whether the circuit board generates unstable signals.

[0066] S3: When an unstable signal is generated, the vacuum cleaner circuit board is divided into a plurality of areas, and a test point is set in each area to determine environmental information and electrical information at the test point in the area;

[0067] S4: Comprehensively analyze the environmental information and electrical information of the test points in the area, build a regional fault assessment model, and narrow the scope of possible circuit board failures.

[0068] After the circuit board has been dust tested using a vacuum cleaner, the actual usage of the circuit board in different dust environments is observed. The stability of the circuit board is evaluated by collecting the electrical characteristics of the circuit board during use. When the stability of the circuit board is poor, the vacuum cleaner circuit board is divided into multiple test points to determine the area where the fault occurs.

[0069] The impact of dust on vacuum cleaner circuit boards is mainly reflected in electrical performance, heat dissipation performance, signal interference, and long-term reliability, including:

[0070] Short-circuit risk: Dust particles may contain conductive components (such as metal dust). When attached to the surface of the circuit board, they can cause short circuits between different circuits, leading to abnormal current flow, component damage, or equipment malfunction.

[0071] Increased impedance: Dust adheres to the circuit board and may form an insulating layer, resulting in increased impedance. Especially at the contact points and solder joints, the adhered dust will affect the conductivity and cause poor electrical connection.

[0072] Reduced heat dissipation effect: Dust adheres to the circuit board, especially the surface of heat dissipation components (such as heat sinks, heat dissipation holes and inductors), forming a thermal insulation layer that hinders heat dissipation and causes component temperature to rise.

[0073] By testing the vacuum cleaner circuit board under actual use, the power information and signal information of the vacuum cleaner circuit board are collected. After collection, the power information of the vacuum cleaner circuit board is represented by the power loss anomaly coefficient, and the signal information of the vacuum cleaner circuit board is represented by the operating frequency fluctuation coefficient. The power information and signal information of the vacuum cleaner circuit board are combined and analyzed to construct a stability evaluation model to determine the stability of the vacuum cleaner circuit board after the dust test.

[0074] The acquisition logic of the power loss anomaly coefficient is: simulating the normal operation process of the circuit board of the vacuum cleaner, setting a monitoring interval, determining the input power of the circuit board of the vacuum cleaner according to the input current and the input voltage of the circuit board of the vacuum cleaner in the monitoring interval, and determining the output power of the circuit board of the vacuum cleaner according to the output current and the output voltage of the circuit board of the vacuum cleaner in the monitoring interval.

[0075] The input power of the circuit board of the vacuum cleaner in the monitoring interval and the output power of the circuit board of the vacuum cleaner are marked as and respectively. and wherein i=1, 2, 3, …, I, I is a positive integer, and i is the number of the current voltage collected in the monitoring interval.

[0076] It should be noted that the monitoring interval is a specific length of time, and the monitoring interval represents a fixed time period for simulating the normal operation process of the circuit board of the vacuum cleaner. The instantaneous current and the instantaneous voltage in the sampling interval are sampled to determine the instantaneous power at the sampling point.

[0077] The power loss anomaly coefficient is calculated, and the calculation formula is: wherein is the power loss anomaly coefficient.

[0078] As can be seen from the formula, the greater the power loss anomaly coefficient, the more likely there is an abnormal power consumption situation of the circuit board of the vacuum cleaner in the monitoring interval, and the more likely there is a situation of efficiency decline.

[0079] The acquisition logic of the running frequency fluctuation coefficient is: simulating the normal operation process of the circuit board of the vacuum cleaner, converting the time domain signal of the circuit board into a frequency domain signal using fast Fourier transform, determining the sample number N of the signal in the monitoring interval, and determining the frequency resolution wherein , is the sampling frequency;

[0080] The frequency value of the circuit board in the monitoring interval is determined, and the frequency value of the circuit board in the monitoring interval is marked as wherein k=0, 1, 2, …, N-1, and k is the index of the fast Fourier transform.

[0081] The amplitude of the frequency value of the circuit board in the monitoring interval is calculated, and the calculation formula is: wherein is the frequency domain signal after the fast Fourier transform, is the real part of each frequency value of the circuit board, is the imaginary part of each frequency value of the circuit board.

[0082] A magnitude threshold is set, the magnitude of the frequency value of the circuit board in the monitoring interval is compared with the magnitude threshold, the magnitude of the frequency value greater than the magnitude threshold is determined, the magnitude of the frequency value greater than the magnitude threshold is taken as the main frequency value of the circuit board in the monitoring interval, and the main frequency value of the circuit board in the monitoring interval is marked as: wherein n = 1, 2, 3, …, m, m is a positive integer, and n is the number of the main frequency in the monitoring interval;

[0083] The main frequency values are summed and divided by the total number of data points to obtain the average main frequency value of the circuit board of the vacuum cleaner, and the calculation formula is: ; wherein, is the average main frequency value of the circuit board of the vacuum cleaner;

[0084] The standard deviation of the main frequency of the circuit board of the vacuum cleaner is calculated, and the calculation formula is: ; wherein, is the standard deviation of the main frequency of the circuit board of the vacuum cleaner;

[0085] The coefficient of variation of the circuit board of the vacuum cleaner is calculated, and the calculation formula is: ; wherein, is the coefficient of variation of the circuit board of the vacuum cleaner;

[0086] The running frequency fluctuation coefficient is calculated, and the calculation formula is: ; wherein, is the running frequency fluctuation coefficient.

[0087] As can be seen from the formula, the greater the running frequency fluctuation coefficient, the greater the frequency fluctuation of the circuit board, indicating that the performance of the circuit board may have degraded, and dust or other environmental factors may have affected the stability of the circuit board.

[0088] The power loss anomaly coefficient and the running frequency fluctuation coefficient are weighted to construct a stability evaluation model to generate an unstable evaluation coefficient, and the calculation formula is: ; wherein, is the unstable evaluation coefficient, and are the proportion coefficients of the power loss anomaly coefficient and the running frequency fluctuation coefficient, and are both greater than 0.

[0089] As can be seen from the formula, the greater the power loss anomaly coefficient and the running frequency fluctuation coefficient, the greater the unstable evaluation coefficient, indicating that dust or other environmental factors may have affected the stability of the circuit board, and the circuit board of the vacuum cleaner needs to be tested to determine the cause of the failure. On the contrary, the smaller the power loss anomaly coefficient and the running frequency fluctuation coefficient, the smaller the unstable evaluation coefficient, indicating that the vacuum cleaner runs normally after passing the dust test.

[0090] The unstable evaluation coefficient threshold is set, the unstable evaluation coefficient is compared with the unstable evaluation coefficient threshold, if the unstable evaluation coefficient is greater than the unstable evaluation coefficient threshold, an unstable signal is generated, indicating that the circuit board of the dust collector cannot normally and stably operate, and the dust on the circuit board may have a certain impact on the circuit, if the unstable evaluation coefficient is less than the unstable evaluation coefficient threshold, no signal is generated, indicating that the circuit board of the dust collector passes the stability test in the dust test.

[0091] According to the unstable signal, the circuit board of the dust collector is divided into multiple regions, and a test point is set in each region, the fault region of the circuit board is judged through analysis of the test point, wherein the environmental information and electrical information of the test point in the region are collected, the environmental information is represented by the hot spot position deviation coefficient, the electrical information is determined by the current deviation stability coefficient and the impedance abnormality coefficient, the environmental information and electrical information of the test point in the region are comprehensively analyzed, a regional fault evaluation model is constructed, and the possibility of faults existing in each region of the circuit board of the dust collector is judged.

[0092] It should be noted that the test points are set on the circuit board, the purpose is to obtain the running state, fault warning or performance analysis of the circuit by monitoring key parameters such as current, temperature and impedance, and through setting multiple test points, especially in the key circuit part, the position of the fault can be located.

[0093] The acquisition logic of the hot spot position deviation coefficient is to determine the specific coordinates of the test point position on the circuit board, and mark the specific coordinates of the test point position on the circuit board as: Wherein, j=1, 2, 3, …, J, J is a positive integer, and j is the number of test points on the circuit board.

[0094] The test points on the circuit board are clustered by the DBSCAN clustering algorithm, the field radius is set, the field radius is taken as the maximum distance between the test points, the minimum point number minPts is set, and the minimum point number minPts is taken as the minimum number of test points in the field radius .

[0095] Each test point in the circuit board is traversed, and whether it has been visited is checked.

[0096] For each unvisited test point, the neighborhood points of each unvisited test point within the field radius are calculated, if the number of neighborhood points is greater than or equal to minPts, the unvisited test point is taken as a core point, and a new cluster is created, if the number of neighborhood points is less than minPts, the unvisited test point is taken as a boundary point or a noise point.

[0097] All points in the neighborhood of the core point are marked as part of the cluster, and the neighborhood of the new core point is repeatedly checked to continue expanding the cluster until there is no new core point to expand;

[0098] All test points of the circuit board are classified by the DBSCAN clustering algorithm, the core point, the boundary point and the noise point of the circuit board of the cleaner are determined, and the cluster in which the test point of the circuit board of the cleaner is located is determined;

[0099] A temperature threshold is set, the hotspot temperature at the test point is subtracted from the temperature threshold to obtain the temperature deviation of each test point in the cluster, and the temperature deviation of each test point in the cluster is marked as , wherein q = 1, 2, 3, …, Q, Q is a positive integer, q is the number of the cluster of the circuit board of the cleaner, c = 1, 2, 3, …, C, C is a positive integer, and c is the number of the test point in the qth cluster;

[0100] It should be noted that the temperature threshold is usually determined by the staff according to the actual situation, and the temperature threshold represents a standard temperature range. The temperature deviation exceeding this range may indicate a certain abnormality or failure risk. The staff may determine the temperature threshold at the cluster position of the circuit board according to past experience and understanding of the running characteristics of the equipment;

[0101] The average temperature deviation and the temperature deviation standard deviation of each test point in the cluster are obtained, and the average temperature deviation and the temperature deviation standard deviation of each test point in the cluster are marked as: and ; wherein , ;

[0102] If the test point of the circuit board of the cleaner is not a noise point, the calculation formula of the hotspot position deviation coefficient of the test point is: If the test point of the circuit board of the cleaner is a noise point, the calculation formula of the hotspot position deviation coefficient of the test point is: ; wherein is the hotspot position deviation coefficient of the test point, is the temperature deviation of the noise point, e = 1, 2, 3, …, E, E is a positive integer, and e is the number of the noise point of the circuit board of the cleaner, is the standard deviation of the temperature deviation of the non-noise point of the circuit board of the cleaner.

[0103] As can be seen from the formula, the greater the hotspot position deviation coefficient of the test point, the greater the degree of deviation of the temperature of the test point from the normal working range, and there may be dust adhesion that may cause poor heat dissipation of the equipment components, resulting in temperature rise.

[0104] It should be noted that the DBSCAN clustering algorithm can determine which points belong to the same cluster according to the spatial density between the test points, and determine the similarity of the test points in space, because the test points in some areas may have more similar temperature distribution due to physical layout reasons, and therefore the DBSCAN can effectively cluster these test points and identify which points belong to the same hot area (i.e. areas with similar temperatures);

[0105] Secondly, the fault point is not necessarily the position of each test point on the circuit board of the vacuum cleaner, and the test points are usually predetermined positions for monitoring and recording the temperature and other states for detecting the working state and operating temperature on the circuit board. These points do not necessarily coincide directly with the fault point, and the fault point usually causes the temperature of the surrounding test points to rise, and the temperature change of these test points can be used as an important basis for fault diagnosis, for example, the temperature anomaly in a certain area may be due to the failure of a nearby component, causing heat accumulation;

[0106] When the test points on the circuit board are close to each other, the temperature will spread through heat conduction, and the temperature rise of a certain component may affect the temperature of the surrounding test points, so it is more appropriate to quantify the temperature deviation of the test points and identify abnormal conditions through the DBSCAN clustering algorithm. Since the noise points have a large positional deviation from other test points, their mutual influence is small, and it is more likely that they are caused by independent faults or abnormal heat sources.

[0107] The logic for obtaining the current deviation stability coefficient is to set a unit time period, determine the current value of the test point in the set unit time period, and mark the current value of the test point in the set unit time period as: wherein p=1, 2, 3, …, P, P is a positive integer, and p is the number of the test point;

[0108] It should be noted that the unit time period is a specific length of time set by professional staff in the field, which is used to reflect the change of the current of the test point, and will not be described here.

[0109] Set the range current value threshold of the test point, and mark the range current value threshold of the test point as: Compare the current value of the test point in the set unit time period with the range current value threshold of the test point, and re-mark the current value of the test point in the set unit time period that exceeds the range current value threshold as: wherein r=1, 2, 3, …, R, R is a positive integer, and r is the number of the current value that exceeds the range current value threshold;

[0110] Calculate the current deviation stability coefficient, and the calculation formula is: ; wherein is the current deviation stability coefficient;

[0111] It can be seen from the formula that the greater the current deviation stability coefficient, the greater the deviation compared with the normal stable working state, indicating that the load of the circuit part corresponding to the test point may have a sharp fluctuation or have a poor contact, and it may also be affected by external electromagnetic interference or noise.

[0112] The impedance abnormality coefficient acquisition logic is: a known excitation signal is applied to the test point, the circuit generates a response, the impedance detection device is used to analyze the impedance characteristics of the circuit, the impedance value at the test point is obtained, the real part of the impedance value at the test point is marked as: , and the imaginary part of the impedance value at the test point is marked as: ;

[0113] It should be noted that the known excitation signal is usually a constant frequency alternating current power source (such as a sine wave) for analyzing the impedance characteristics of the circuit, which will not be described here. The impedance detection device includes an LCR meter, an impedance analyzer, etc.

[0114] The phase angle of the impedance at the test point is calculated, and the calculation formula is: ; wherein, is the phase angle of the impedance at the test point;

[0115] A standard impedance angle is set, and the standard impedance angle is marked as:

[0116] It should be noted that the standard impedance angle is determined by design and experiment, and is used to evaluate the normal running state of the device, which will not be described here.

[0117] The impedance abnormality coefficient is calculated, and the calculation formula is: ; wherein, ; wherein, is the impedance abnormality coefficient.

[0118] It can be seen from the formula that the greater the impedance abnormality coefficient, the greater the deviation of the impedance characteristics of the test point from the standard value, indicating that there is dust near the test point, resulting in changes in the current path and an increase in local resistance, and further resulting in changes in impedance.

[0119] It should be noted that an excellent circuit board should have uniform impedance distribution and stable phase angle, indicating that its electrical performance is good and is not affected by pollution or other adverse factors. Under normal circumstances, the impedance of an excellent circuit board should be close to the normal value at all test points, and the phase angle change is small.

[0120] In contrast, a poor quality circuit board can have localized impedance increases due to surface contamination (e.g. dust accumulation, corrosion, static electricity) or electrical faults (e.g. poor soldering). In these high impedance areas, the phase angle will typically change significantly, indicating an abnormal change in the relationship between current and voltage, affecting the normal operation of the circuit.

[0121] The hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient are weighted and calculated to construct a regional fault evaluation model to generate a regional fault evaluation coefficient. The calculation formula of the regional fault evaluation coefficient is: ; wherein is the regional fault evaluation coefficient of the pth test point, , , is the proportion coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, and is the proportion coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient. , , are all greater than 0.

[0122] It should be noted that , , are set by professional staff, and are usually , , The sum of the and is 1.

[0123] As can be seen from the formula, the greater the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, the greater the regional fault evaluation coefficient, indicating that the dust interference resistance of the test point region can be weak. Conversely, the smaller the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, the smaller the regional fault evaluation coefficient, indicating that the dust interference resistance of the test point region can be strong.

[0124] A regional fault evaluation coefficient threshold is set, and the regional fault evaluation coefficient of each test point of the vacuum cleaner circuit board is compared with the regional fault evaluation coefficient threshold. If the regional fault evaluation coefficient is greater than the regional fault evaluation coefficient threshold, the test point is marked as a fault point, indicating that the region where the test point is located has a high possibility of failure and weak dust interference resistance. If the regional fault evaluation coefficient is less than the regional fault evaluation coefficient threshold, no marking is performed, indicating that the region where the test point is located has a low possibility of failure and strong dust interference resistance.

[0125] The application simulates the running state of the circuit board in a dust environment through a dust test circuit, collects signal data such as current and voltage, and extracts frequency domain characteristics through fast Fourier transform, combines the power information of the circuit board with the frequency domain signal information, constructs a stability evaluation model, and is used to judge whether the circuit board generates unstable signals or potential faults;

[0126] According to the detection result of the unstable signal on the circuit board, the circuit board is divided into multiple regions, and test points are arranged in each region, the environmental information and electrical information of each test point are collected, the data of each test point in the region are comprehensively analyzed, a fault evaluation model is constructed, the region where the circuit board may have a fault is further narrowed down, and the problem is accurately located, the application is helpful to simulate and evaluate the stability and fault risk of the circuit board under the condition of dust interference of the circuit board of the dust collector, and is helpful to accurately find the fault source. Embodiment

[0127] As Figure 2 The structure diagram of the dust collector circuit board test system is given, which specifically comprises a dust test module, a data acquisition module, a stability evaluation module, a test point division module and a regional fault evaluation module, and the modules are connected in signal;

[0128] The dust test module is used for simulating the running state of the circuit board of the dust collector after dust test;

[0129] The data acquisition module is used for acquiring the power information and signal information of the circuit board of the dust collector, and acquiring the environmental information and electrical information of the test points in the region;

[0130] The stability evaluation module is used for combining the power information and signal information of the circuit board of the dust collector, constructing a stability evaluation model, generating an instability evaluation coefficient, and comparing with a threshold value to judge whether the circuit board generates unstable signals;

[0131] The test point division module is used for dividing the circuit board into multiple regions when the unstable signal is detected, arranging test points in each region, and using a clustering algorithm and increasing an excitation signal according to the position of the test point;

[0132] The regional fault evaluation module is used for combining the environmental information and electrical information of the test points in the region, constructing a regional fault evaluation model, generating a regional fault evaluation coefficient, and comparing with a threshold value to mark the test points less than the threshold value as fault points.

[0133] The above formulas are dimensionless to calculate the numerical value, the formula is obtained by software simulation of a large amount of data to obtain a formula of the nearest real situation, and the preset parameters in the formula are set by the person skilled in the art according to the actual situation.

[0134] The above-described embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. When implemented in software, the above-described embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the processes or functions described in the embodiments of the present application are wholly or partially generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center through a wired or wireless (such as infrared, wireless, microwave, etc.) manner. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. containing one or more available medium collections. The available medium can be a magnetic medium (such as a floppy disk, a hard disk, a magnetic tape), an optical medium (such as a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state disk.

[0135] It should be understood that the size of the sequence number of each process described above in various embodiments of the present application does not mean the order of execution, and the execution order of each process should be determined by its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0136] Those of ordinary skill in the art can realize that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be realized in electronic hardware, or a combination of computer software and electronic hardware. Whether the functions are executed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0137] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, which will not be described here.

[0138] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other manners. For example, the division of the above-described device embodiments is only a logical function division, and there can be another division manner for actual implementation, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, or the among different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0139] If the functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application can be embodied in the form of a software product, and the computer software product is stored in a storage medium, and includes several instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), magnetic disk or optical disk, and various other media that can store program codes.

[0140] The above describes only the specific embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A vacuum cleaner circuit board testing method, characterized in that: The specific steps include: S1: After the vacuum cleaner circuit board passes the dust test, the normal operation process of the vacuum cleaner circuit board is simulated, the power information of the vacuum cleaner circuit board is obtained according to the current and voltage of the vacuum cleaner circuit board, and the signal information of the vacuum cleaner circuit board is determined by fast Fourier transform; S2: Analyze the power and signal information of the vacuum cleaner circuit board and build a stability evaluation model to determine whether the circuit board generates unstable signals. S3: When an unstable signal is generated, the vacuum cleaner circuit board is divided into a plurality of areas, and a test point is set in each area to determine environmental information and electrical information at the test point in the area; S4: Comprehensively analyze the environmental information and electrical information of the test points in the area, build a regional fault assessment model, and narrow the scope of possible circuit board failures The power information of the vacuum cleaner circuit board is represented by the power loss anomaly coefficient; The logic for obtaining the power loss abnormality coefficient is as follows: simulating the normal operation process of the vacuum cleaner circuit board, setting a monitoring interval, determining the input power of the vacuum cleaner circuit board based on the input current and input voltage of the vacuum cleaner circuit board within the monitoring interval, and determining the output power of the vacuum cleaner circuit board based on the output current and output voltage of the vacuum cleaner circuit board within the monitoring interval; The input power of the vacuum cleaner circuit board and the output power of the vacuum cleaner circuit board in the monitoring interval are marked as: and , where i=1, 2, 3, ..., I, I is a positive integer, and i is the number of the current and voltage collected in the monitoring interval; Calculate the power loss anomaly coefficient using the following formula: ;in, is the power loss anomaly coefficient; The signal information of the vacuum cleaner circuit board is represented by the operating frequency fluctuation coefficient; The logic for obtaining the operating frequency fluctuation coefficient is as follows: simulate the normal operation process of the vacuum cleaner circuit board, use fast Fourier transform to convert the time domain signal of the circuit board into the frequency domain signal, determine the number of samples N of the signal in the monitoring interval, and determine the frequency resolution. ,in, , is the sampling frequency; Determine the frequency value of the circuit board within the monitoring interval and mark the frequency value of the circuit board within the monitoring interval as: , where k = 0, 1, 2, ..., N-1, and k is the index of the fast Fourier transform; Calculate the amplitude of the circuit board frequency value within the monitoring interval. The calculation formula is: ;in, is the frequency domain signal after fast Fourier transform, is the real part of the frequency value for each board, is the imaginary part of the frequency value of each circuit board; Set an amplitude threshold, compare the amplitude of the circuit board frequency value in the monitoring interval with the amplitude threshold, determine the amplitude of the frequency value greater than the amplitude threshold, and use the amplitude of the frequency value greater than the amplitude threshold as the main frequency value of the circuit board in the monitoring interval, and mark the main frequency value of the circuit board in the monitoring interval as: , where n=1, 2, 3, ..., m, m is a positive integer, and n is the number of the main frequency in the monitoring interval; Sum the main frequency values ​​and divide them by the total number of data points to get the average main frequency value of the vacuum cleaner circuit board. The calculation formula is: ;in, is the average main frequency value of the vacuum cleaner circuit board; Calculate the standard deviation of the main frequency of the vacuum cleaner circuit board using the following formula: ;in, is the standard deviation of the main frequency of the vacuum cleaner circuit board; Calculate the coefficient of variation of the vacuum cleaner circuit board using the following formula: ;in, is the coefficient of variation of the vacuum cleaner circuit board; Calculate the operating frequency fluctuation coefficient using the following formula: ;in, is the operating frequency fluctuation coefficient; The environmental information at the test points in the area is represented by the hotspot position deviation coefficient; The logic for obtaining the hotspot position deviation coefficient is as follows: determine the specific coordinates of the test point position on the circuit board, and mark the specific coordinates of the test point position on the circuit board as: , where j = 1, 2, 3, ..., J, J is a positive integer, and j is the number of the test point on the circuit board; Cluster the test points on the circuit board using the DBSCAN clustering algorithm and set the domain radius , the area radius As the maximum distance between test points, set the minimum number of points minPts, and use the minimum number of points minPts as the field radius Minimum number of test points within; Traverse each test point in the circuit board and check whether it has been visited; For each unvisited test point, calculate the radius of each unvisited test point in the field If the number of neighboring points is greater than or equal to minPts, the unvisited test points are taken as core points and a new cluster is created. If the number of neighboring points is less than minPts, the unvisited test points are taken as boundary points or noise points. All points in the neighborhood of the core point are marked as part of the cluster, the neighborhood is repeatedly checked for new core points, and the cluster is continued to expand until there are no new core points to expand; The DBSCAN clustering algorithm is used to classify all test points on the circuit board, determine the core points, boundary points, and noise points of the vacuum cleaner circuit board, and determine the clusters where the test points on the vacuum cleaner circuit board are located; Set a temperature threshold, subtract the hotspot temperature at the test point from the temperature threshold, and obtain the temperature deviation of each test point in the cluster. Mark the temperature deviation of each test point in the cluster as: , where q = 1, 2, 3, ..., Q, Q is a positive integer, q is the number of the vacuum cleaner circuit board cluster, c = 1, 2, 3, ..., C, C is a positive integer, c is the number of the test point in the qth cluster; The average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are obtained, and the average temperature deviation and the standard deviation of the temperature deviation of each test point in the cluster are marked as: and ;in, , ; If the test point on the vacuum cleaner circuit board is not a noise point, the calculation formula for the hotspot position deviation coefficient of the test point is: ,If the test point of the vacuum cleaner circuit board is a noise point, the calculation formula of the hot spot position deviation coefficient of the test point is: ;in, is the hotspot position deviation coefficient of the test point, is the temperature deviation of the noise point, e=1, 2, 3, ..., E, E is a positive integer, e is the number of the noise point on the vacuum cleaner circuit board, is the standard deviation of the temperature deviation of the non-noise point on the vacuum cleaner circuit board; The electrical information at the test points in the area is expressed by the current deviation stability coefficient and the impedance anomaly coefficient; The logic for obtaining the current deviation stability coefficient is as follows: set a unit time period, determine the current value of the test point within the set unit time period, and mark the current value of the test point within the set unit time period as: , where p=1, 2, 3, ..., P, P is a positive integer, and p is the number of the test point; Set the range current value threshold of the test point and mark the range current value threshold of the test point as: , compare the current value of the test point in the set unit time period with the range current value threshold of the test point, and re-mark the current value of the test point in the set unit time period that exceeds the range current value threshold as: , where r=1, 2, 3, ..., R, R is a positive integer, and r is the number of the current value that exceeds the range current value threshold; Calculate the current deviation stability coefficient using the following formula: ;in, is the current deviation stability coefficient; The logic for obtaining the impedance anomaly coefficient is as follows: by applying a known excitation signal to the test point to make the circuit react, using an impedance detection device to analyze the impedance characteristics of the circuit, obtaining the impedance value at the test point, and marking the real part of the impedance value at the test point as: , mark the imaginary part of the impedance value at the test point as: ; Calculate the phase angle of the impedance at the test point using the following formula: ;in, is the phase angle of the impedance at the test point; Set the standard impedance angle and mark it as: ; Calculate the impedance anomaly coefficient using the following formula: ;in, is the impedance anomaly coefficient.

2. A vacuum cleaner circuit board testing method according to claim 1, characterized in that: Determine if the board is generating unstable signals, including: The power loss anomaly coefficient and the operating frequency fluctuation coefficient are weighted and calculated to construct a stability assessment model and generate an instability assessment coefficient. The calculation formula is: ;in, is the instability assessment coefficient, and is the proportional coefficient of the power loss abnormality coefficient and the operating frequency fluctuation coefficient, and are both greater than 0; An instability assessment coefficient threshold is set, and the instability assessment coefficient is compared with the instability assessment coefficient threshold. If the instability assessment coefficient is greater than the instability assessment coefficient threshold, an instability signal is generated; if the instability assessment coefficient is less than the instability assessment coefficient threshold, no signal is generated.

3. A vacuum cleaner circuit board testing method according to claim 2, characterized in that: Narrow down the possible reasons why the board may be failing, including: The hotspot position deviation coefficient, current deviation stability coefficient, and impedance anomaly coefficient are weighted and calculated to construct a regional fault assessment model and generate a regional fault assessment coefficient. The calculation formula for the regional fault assessment coefficient is: ;in, is the regional fault assessment coefficient of the p-th test point, 、 、 is the proportional coefficient of the hotspot position deviation coefficient, the current deviation stability coefficient, and the impedance anomaly coefficient, 、 、 are both greater than 0; Set a regional fault assessment coefficient threshold, and compare the regional fault assessment coefficient of each test point on the vacuum cleaner circuit board with the regional fault assessment coefficient threshold. If the regional fault assessment coefficient is greater than the regional fault assessment coefficient threshold, the test point is marked as a fault point. If the regional fault assessment coefficient is less than the regional fault assessment coefficient threshold, it is not marked.

4. A vacuum cleaner circuit board testing system, used to implement a vacuum cleaner circuit board testing method according to any one of claims 1 to 3, characterized in that: It includes dust test module, data acquisition module, stability assessment module, test point division module and regional fault assessment module, and signal connections between modules; Dust test module, used to simulate the operating state of the vacuum cleaner circuit board after the dust test; A data acquisition module is used to collect power information and signal information from the vacuum cleaner circuit board, as well as environmental information and electrical information at test points within the area; The stability assessment module is used to combine the power information and signal information of the vacuum cleaner circuit board to build a stability assessment model, generate an instability assessment coefficient, and compare it with the threshold to determine whether the circuit board generates an unstable signal; The test point division module is used to divide the circuit board into multiple areas when an unstable signal is detected, set test points in each area, and use clustering algorithms and increase stimulus signals according to the locations of the test points; The regional fault assessment module is used to combine the environmental information and electrical information of the test points in the area to build a regional fault assessment model, generate a regional fault assessment coefficient, and compare it with the threshold, and mark the test points with a value less than the threshold as fault points.

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