Battery impedance measuring device and battery management system

Abstract

The invention provides a battery impedance measuring device which is used for measuring impedance of battery units of a battery pack, the battery pack is formed by connecting N battery units in series, N is larger than or equal to 2, and the battery impedance measuring device comprises a pulse current generator which can generate pulse current, the pulse current is used as current excitation of the battery pack; the series resistor and the pulse current generator are connected in series to form a series circuit, and two ends of the series circuit are respectively connected with the anode and the cathode of the battery pack; and the impedance acquisition circuit can be respectively connected with the positive electrode end and the negative electrode end of each battery unit and is used for acquiring a voltage response signal of each battery unit when current excitation is carried out on the battery pack.

Description

Technical Field

[0001] The present disclosure relates to the field of battery management, and in particular to a battery impedance measuring device and a battery management system. Background Art

[0002] Battery impedance detection is an important part of the Battery Management System (BMS). By detecting the battery impedance, a lot of battery information can be obtained, such as key parameters such as the battery's state of charge (SOC), state of health (SOH), and internal temperature. By analyzing the above key parameters, the safe operation of the battery can be ensured, battery aging analysis and battery fault diagnosis can be performed, etc., and the abnormal state of the battery can be discovered at the first time, corresponding warnings and fault handling can be carried out, battery performance can be optimized, and battery life can be extended.

[0003] One of the ways to detect battery impedance in the prior art is to send an excitation current to obtain the value of the impedance to be measured. The main defects in the prior art are: the excitation signal used to excite the battery is usually a sine (cosine) wave excitation signal, and a complex hardware circuit structure is required to generate a (cosine) wave excitation signal, and each battery requires a corresponding impedance detection circuit, which is too costly for a multi-string battery pack - the above problems need to be improved urgently, and there are also problems such as low detection accuracy. Summary of the invention

[0004] The present disclosure provides a battery impedance measurement device and a battery management system.

[0005] According to one aspect of the present disclosure, a battery impedance measuring device is provided, which is used to measure the impedance of a battery cell of a battery pack, wherein the battery pack is formed by N battery cells connected in series, wherein N≥2, and the battery impedance measuring device comprises: a pulse current generator, which can generate a pulse current, and the pulse current serves as a current excitation for the battery pack; a series resistor, which is connected in series with the pulse current generator to form a series circuit, and the two ends of the series circuit are respectively connected to the positive electrode and the negative electrode of the battery pack; and an impedance acquisition circuit, which can be connected to the positive terminal and the negative terminal of each battery cell, respectively, and is used to collect the voltage response signal of each battery cell when the battery pack is current-excited.

[0006] According to a technical solution of one aspect, it is not necessary to use a sine (cosine) excitation signal to measure impedance, and avoid using a complex sine (cosine) generation circuit. It is also not necessary to excite each battery cell separately. By exciting the entire battery pack, the battery impedance of each battery cell is collected separately. This can reduce costs and ensure circuit reliability.

[0007] According to at least one embodiment of the present disclosure, the pulse current generator includes an excitation switch, which is connected in series with the series resistor to form the series circuit, wherein the pulse current is generated by turning on and off the excitation switch.

[0008] According to at least one embodiment of the present disclosure, when the excitation switch is turned on, the amplitude of the pulse current is a ratio of the battery pack voltage to the resistance value of the series resistor.

[0009] According to at least one embodiment of the present disclosure, the on and off of the excitation switch is controlled by a control signal, wherein the control signal is an excitation signal having multiple excitation frequencies so as to detect the voltage response signal of each battery cell at different excitation frequencies.

[0010] According to at least one embodiment of the present disclosure, the impedance acquisition circuit includes a level converter, a DC elimination amplifier and an analog-to-digital converter, the level converter is used to respond to the voltage signal between the positive terminal and the negative terminal of each battery cell, the output signal of the level converter is used as the input signal of the DC elimination amplifier, the DC elimination amplifier is used to remove the DC component in the input signal, and the analog-to-digital converter is used to convert the output signal of the DC elimination amplifier into a digital signal.

[0011] According to at least one embodiment of the present disclosure, the battery impedance measurement device further includes a microprocessor, and the microprocessor is used to determine the battery impedance of each battery cell according to the digital signal.

[0012] According to at least one embodiment of the present disclosure, the control signal is a signal obtained by dividing the clock signal by the clock divider.

[0013] According to at least one embodiment of the present disclosure, the DC removal amplifier includes a DC removal circuit and a common-mode voltage regulation circuit, an input end of the DC removal circuit receives the output signal of the level converter, the common-mode voltage regulation circuit receives the output signal of the DC removal circuit, the output of the common-mode voltage regulation circuit is the DC component, and the DC removal circuit is used to remove the DC component from the output signal of the level converter.

[0014] According to at least one embodiment of the present disclosure, the common-mode voltage regulation circuit includes a comparator, a successive approximation controller and a digital-to-analog converter, the comparator receives the output signal of the DC removal circuit, the successive approximation controller receives the output signal of the comparator, the digital-to-analog converter receives the output signal of the successive approximation controller, and the output signal of the digital-to-analog converter is provided to another input terminal of the DC removal circuit, and the DC component in the output signal of the level converter is found through the comparator, the successive approximation controller and the digital-to-analog converter.

[0015] According to at least one embodiment of the present disclosure, the DC removal circuit includes a first-stage differential amplifier and a second-stage gain amplifier, the first-stage differential amplifier includes a first operational amplifier and a second operational amplifier, the negative input terminals of the first operational amplifier and the second operational amplifier are connected through resistors, the positive input terminal of the first operational amplifier receives the output signal of the level converter, the positive input terminal of the second operational amplifier receives the output signal of the common-mode voltage regulation circuit, the output terminals of the first operational amplifier and the second operational amplifier are respectively connected to the positive input terminal and the negative input terminal of the second-stage gain amplifier, and the output terminal of the second-stage gain amplifier is connected to the common-mode voltage regulation circuit.

[0016] According to at least one embodiment of the present disclosure, the DC removal circuit includes an operational amplifier, one input of which is connected to the output of the level converter via a first resistor, one input of which is connected to the output of the operational amplifier via a second resistor, another input of which is connected to the output of the common-mode voltage regulation circuit via a third resistor, and another input is grounded via a fourth resistor, and the output of the operational amplifier can be connected to the input of the common-mode voltage regulation circuit and the input of the analog-to-digital converter.

[0017] According to at least one embodiment of the present disclosure, the output signal of the DC-free amplifier is converted into a digital signal by controlling the analog-to-digital converter through an asynchronous clock, wherein the voltage, current or temperature of the battery cell is detected during the idle time between two adjacent samplings of the analog-to-digital converter.

[0018] According to another aspect of the present disclosure, a battery management system is provided, comprising the battery impedance measuring device as described in any one of the above items. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings illustrate exemplary embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. These drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this specification.

[0020] Figure 1 A schematic diagram of a battery impedance measurement device according to an embodiment of the present disclosure is shown.

[0021] Figure 2 A schematic diagram of a battery impedance measurement device according to an embodiment of the present disclosure is shown.

[0022] Figure 3 A schematic diagram showing a voltage signal output by a level converter.

[0023] Figure 4 Shows the Figure 3 Schematic diagram of voltage directly amplifying the voltage signal.

[0024] Figure 5 A schematic diagram of a voltage amplified after the DC component in the conversion voltage output by the level converter is removed is shown.

[0025] Figure 6 A schematic diagram of a DC removal amplifier according to a specific embodiment of the present application is shown.

[0026] Figure 7 A schematic diagram showing a DC removal circuit in the form of a single op amp subtractor circuit.

[0027] Figure 8 The idle time between two samples of the analog-to-digital converter during low-frequency impedance detection is shown.

[0028] Fig. 9 A schematic diagram of a battery impedance measurement device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0029] The present disclosure is further described in detail below in conjunction with the accompanying drawings and implementations. It is understood that the specific implementations described herein are only used to explain the relevant content, rather than to limit the present disclosure. It should also be noted that, for ease of description, only the parts related to the present disclosure are shown in the accompanying drawings.

[0030] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments in the present disclosure can be combined with each other. The technical solution of the present disclosure will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0031] Unless otherwise specified, the exemplary embodiments / embodiments shown will be understood as providing exemplary features of various details of some ways in which the technical concept of the present disclosure can be implemented in practice. Therefore, unless otherwise specified, the features of the various embodiments / embodiments can be combined, separated, interchanged and / or rearranged without departing from the technical concept of the present disclosure.

[0032] According to one embodiment of the present application, a battery impedance measurement device is provided, which may include a pulse current generator, which can generate a pulse current, and the pulse current is used as a current excitation for a battery pack; a series resistor, which is connected in series with the pulse current generator to form a series circuit, and the two ends of the series circuit are respectively connected to the positive and negative electrodes of the battery pack; an impedance acquisition circuit, which can be connected to the positive and negative terminals of each battery cell respectively, and is used to collect the voltage response signal of each battery cell when the battery pack is subjected to current excitation. The above-mentioned pulse current generator may be an excitation switch and a device for generating its control signal (such as a clock divider, etc.).

[0033] Figure 1 A schematic diagram of a battery impedance measurement device according to an embodiment of the present disclosure is shown.

[0034] like Figure 1 As shown, the battery impedance measuring device is used to measure the impedance of each battery in the battery pack. The battery pack 100 may include N battery cells, where N≥2. Figure 1 As shown in FIG. 1 , the battery pack 100 includes a first battery cell 101, a second battery cell 102, ..., and an Nth battery cell 10n. These battery cells are connected in series to form the battery pack 100. Figure 1 As shown, the motor M can be used as a load, and the battery pack 100 can supply power to the motor M to control the rotation of the motor M. When supplying power to the motor M, the battery pack 100 discharges. When the battery pack 100 is charged, a charging power source is connected to both ends of the battery pack 100.

[0035] Battery impedance is of great significance for understanding battery status, evaluating performance, fault diagnosis and prevention, etc. Therefore, in the process of battery pack management, the battery impedance of each battery cell needs to be measured.

[0036] In order to measure the battery impedance of each battery cell, an excitation signal is applied to the battery cell through an excitation circuit. The related art uses a cosine (sine) generator to drive the switch of each battery cell with an excitation signal in the form of a cosine (sine) to achieve the measurement of the battery impedance of each battery cell. When measuring other battery cells, the excitation circuit and the measurement circuit that generate the excitation signal are switched to other battery cells. As shown in the patent, in order to achieve excitation, a cosine (sine) generator and a Sigma-Delta modulator, etc. In addition, when multiple battery cells are excited, multiple excitation circuits and measurement circuits are required. The excitation signal is used to drive the switch on the measurement output side of the battery cell. Obviously, during the measurement of the battery impedance, the battery pack should be in an idle state (not in use).

[0037] As described below, in the process of measuring the impedance of each battery cell of the battery pack, the impedance measurement can be performed even when the battery pack is in operation (for example, when the battery pack drives the motor to operate), and there is no need to set an excitation circuit for each battery cell. Figure 1 As shown, the battery impedance measuring device may include an impedance acquisition circuit 300, which may be in a chip form or other suitable forms. The impedance acquisition circuit 300 is used to acquire a voltage response signal of each battery cell and provide the voltage response signal to a microprocessor 400. The microprocessor 400 may obtain the battery impedance of each battery cell according to the voltage response signal of the impedance acquisition circuit 300.

[0038] First, in the technical solution of the present disclosure, an excitation control circuit is included. The excitation control circuit may include an excitation switch 500. The excitation switch may receive a pulse excitation signal. The pulse excitation signal is used to control the on and off of the excitation switch, thereby exciting the battery pack. The excitation switch may be a switch in various suitable forms, and a switch in the form of a MOS transistor is shown in the figure.

[0039] In the technical solution disclosed in the present invention, it is not necessary to apply excitation to each battery power source separately, but to apply excitation to the battery pack as a whole when measuring the battery impedance of each battery unit. Figure 1 As shown, one end of the excitation switch 500 is connected to the positive electrode of the battery pack, and the other end is connected to the negative electrode of the battery pack. That is, the excitation switch 500 is connected in series with the battery pack 100. The excitation of the entire battery pack is achieved by turning the excitation switch 500 on and off. Figure 1 , a switch in the form of a MOS transistor is shown, wherein the source of the MOS transistor is connected to the positive electrode of the battery pack via a series resistor 510, and the drain of the MOS transistor is connected to the negative electrode of the battery pack. The source of the MOS transistor receives a pulse excitation signal from the outside, and the pulse excitation signal is used to control the conduction and disconnection of the MOS transistor, thereby achieving the purpose of excitation for the entire battery pack. In an embodiment of the present disclosure, the impedance acquisition circuit 300 and the microprocessor 400 can be integrated into one chip, and the excitation switch is used as a device outside the chip.

[0040] The pulse excitation signal applied to the gate of the MOS transistor may come from the microprocessor 400, which generates the pulse excitation signal. The pulse excitation signal may also come from an independent clock divider. These contents will be described in detail below.

[0041] like Figure 1As shown, the battery impedance measurement device of the present application also includes a balancing circuit. As the battery pack is used, the performance of each battery cell may be inconsistent, and then an imbalance problem will occur. Taking charging as an example, some batteries may have been fully charged, while some batteries may not have been fully charged, or some batteries may have been overcharged. The same is true for the discharge process. Due to the inconsistency of each single battery, it is required to take necessary balancing measures during the charging and discharging process to ensure its safety and stability.

[0042] Figure 1 The balancing circuit 200 is shown. The balancing circuit can be integrated into a chip, or can be integrated into a chip together with the impedance acquisition circuit 300 and the microprocessor 400. The balancing circuit 200 includes: N control switches 211, 212, ... 21n, the first end of each of the N control switches is connected to the positive end of the corresponding battery cell via the balancing resistor 241, 242, ..., 24n, and the second end of each control switch is connected to the negative end of the corresponding battery. For example Figure 1 As shown, the first end of the first control switch 211 is connected to the positive terminal of the first battery unit 101 via the first balancing resistor 241, and the second end is connected to the negative terminal of the first battery unit 101; the first end of the second control switch 212 is connected to the positive terminal of the second battery unit 102 via the second balancing resistor 242, and the second end is connected to the negative terminal of the second battery unit 102; the first end of the nth control switch 21n is connected to the positive terminal of the nth battery unit 10n via the nth balancing resistor 241, and the second end is connected to the negative terminal of the nth battery unit 10n. N first resistors 231, 232, ..., 23n are respectively connected between the negative terminals of the N battery units and the output, wherein the first resistor 23n+1 is connected between the positive terminal of the nth battery unit 10n and the output. The second resistors 221, 222, ..., 22n are respectively connected between the output and the control terminal of the corresponding control switch. The i-th control switch is controlled as follows: when the current flowing from the positive terminal of the i-th battery to the positive terminal of the i-1-th battery is greater than the current threshold, the i-th control switch is turned on based on the voltage generated by the i-th first resistor, so that the current flows through the i-th control switch to balance the current of the i-th battery, where 1<i≤N.

[0043] When the control switch is an NMOS transistor, the first end of the control switch is the drain, the second end of the control switch is the source, and the control end of the control switch is the gate. When the control switch is a triode, the first end of the control switch is the collector, the second end of the control switch is the emitter, and the control end of the control switch is the base. Figure 1 In FIG. 1 , a control switch in the form of a triode is shown.

[0044] The following description will be made by taking the contents of the second battery as an example and setting the control switch to be a triode (control switch 212 ).

[0045] The collector of the transistor is connected to the positive terminal of the second battery cell 102 (the negative terminal of the third battery cell) through the balancing resistor 242, and the emitter of the transistor is connected to the negative terminal of the second battery cell 102 (the positive terminal of the first battery cell 101). The base of the transistor is connected to the second resistor 222, and the first resistor 232 is connected between the emitter of the transistor and the second resistor 222. In this way, when the battery is unbalanced, the voltage formed by the resistor 222 and the resistor 232 constitutes the voltage between the base and the emitter of the transistor. When the voltage is greater than the threshold turn-on voltage, the transistor will be turned on, and a balancing current will flow from the resistor 242 through the transistor, thereby balancing the battery 102. When no current flows, the transistor is disconnected, and balancing control will not be implemented.

[0046] In addition, the equalization circuit 200 may also include filter capacitors 251, 252, ..., 25n. Each filter capacitor is connected between the positive terminal output and the negative terminal output of each battery cell. For example, the first filter capacitor 251 is connected between the positive terminal output and the negative terminal output of the first battery cell 101; the second filter capacitor 252 is connected between the positive terminal output and the negative terminal output of the second battery cell 102; ...; the nth filter capacitor 25n is connected between the positive terminal output and the negative terminal output of the nth battery cell 10n.

[0047] like Figure 2 As shown, the impedance acquisition circuit 300 may include a multiplexing circuit 310 and an impedance measurement circuit 320. The multiplexing circuit 310 may include a multi-way switch, and the output of the positive terminal and the output of the negative terminal of each battery cell are connected to the impedance measurement circuit 320 by switching the switch. Figure 2 , an example of connecting the positive terminal and the negative terminal of the second battery cell 102 to the impedance measurement circuit 320 is shown. When measuring other battery cells, the outputs of the positive terminals and the negative terminals of other battery cells can be connected to the impedance measurement circuit 320 through the multiplexing circuit 310.

[0048] The impedance measurement circuit 320 may include a level shifter 321, a DC removal circuit 322, a programmable gain amplifier (PGA) 323, an analog-to-digital converter 324, a successive approximation controller (SAR Logic) 325, and a digital-to-analog converter 326. The DC removal circuit 322, the programmable gain amplifier (PGA) 323, the analog-to-digital converter 324, and the successive approximation controller (SAR Logic) 325 constitute a DC removal amplifier.

[0049] like Figure 2 As shown, the level converter 321 is used to receive the positive terminal output and the negative terminal output from each battery cell. The level converter 321 is used to convert the voltage between the positive terminal output and the negative terminal output of the received battery cell into a voltage within a desired range. The converted voltage after conversion by the level converter 321 is provided to the DC removal circuit 322.

[0050] Figure 3 3 shows the voltage signal output by the level converter 321. As an example, the voltage signal is usually a weak voltage signal with a small amplitude superimposed on a DC voltage, and the weak voltage signal is an effective signal for measuring the battery impedance. For example, a voltage signal with an amplitude less than 1mV is superimposed on a 2.5V DC voltage. It should be understood by those skilled in the art that if based on Figure 3 The voltage signal shown is quantized by an analog-to-digital converter and converted into a digital signal, but it is impossible to demodulate and obtain the accurate value of the battery impedance. Figure 3 The voltage signal shown in the figure is directly amplified because it contains a DC component (DC voltage). Even if the amplification factor is twice, the output signal will be saturated. Once the signal is saturated, the output signal will become a straight line. At this time, the effective signal (weak voltage signal) superimposed on the DC voltage will be lost. Figure 4 Shows the Figure 3 Schematic diagram of a voltage signal directly amplified. The voltage signal is a saturated signal, and it is obvious that effective information is lost.

[0051] Therefore, in the technical solution of the present application, the DC component in the conversion voltage output by the level converter 321 is removed, and only the effective signal is amplified, while the DC component is not amplified, so as to ensure that the amplified signal will not be saturated. Figure 5 The schematic diagram of the voltage amplification after removing the DC component from the conversion voltage output by the level converter 321 according to the embodiment of the present disclosure is shown. In this way, after the effective signal with the DC component removed is amplified and quantized by the analog-to-digital converter, the impedance detection result obtained will be more accurate.

[0052] exist Figure 6, a schematic diagram of a DC-removing amplifier according to a specific embodiment of the present application is shown. As described above, the DC-removing amplifier includes a DC-removing circuit 322, a programmable gain amplifier 323, a digital-to-analog converter 326, and a successive approximation controller 325. The DC-removing circuit 322 can be an amplifier circuit composed of three operational amplifiers. As shown in the figure, the amplifier circuit can include a first-stage differential amplifier and a second-stage gain amplifier. The first-stage differential amplifier includes a first operational amplifier 3221 and a second operational amplifier 3222, and the second-stage gain amplifier is a third operational amplifier 3223.

[0053] The positive input terminal of the first operational amplifier 3221 is connected to the voltage signal output by the level converter 321, and the negative input terminal of the first operational amplifier 3221 is connected to the output terminal of the first operational amplifier 3221 via the first resistor R1. The positive input terminal of the second operational amplifier 3222 is connected to the voltage signal output by the level converter 321, and the negative input terminal of the second operational amplifier 3222 is connected to the output terminal of the second operational amplifier 3222 via the second resistor R2. Usually, the resistance values ​​of the first resistor and the second resistor are equal. The negative input terminals of the first operational amplifier 3221 and the second operational amplifier 3222 can be connected via the third resistor R3 and the fourth resistor R4. The third resistor R3 and the fourth resistor R4 can also be a resistor. The output terminal of the first operational amplifier 3221 is connected to the positive input terminal of the third operational amplifier 3223 via the fifth resistor R5, and the output terminal of the second operational amplifier 3222 is connected to the negative input terminal of the third operational amplifier 3223 via the sixth resistor R6. According to the amplifier circuit of the present application, the common mode signal can be effectively suppressed and the signal-to-noise ratio of the signal can be improved.

[0054] In the process of amplifying the voltage signal output by the level converter 321 by the amplifier circuit, it is necessary to consider how to remove the DC component. Therefore, after careful study, the inventors of the present disclosure use the adjustable common mode voltage (Vcm) as the input of the amplifier circuit. In the present application, the common mode voltage adjustment circuit may include a programmable gain amplifier 323, a successive approximation controller 325 and a digital-to-analog converter 326. Specifically, the output of the third operational amplifier 3223 is used as the input of the programmable gain amplifier 323, the output of the programmable gain amplifier 323 is used as the input of the successive approximation controller 325, and the output of the successive approximation controller 325 is used as the input of the digital-to-analog converter 326, and the output of the digital-to-analog converter 326 is connected to the positive input terminal of the second operational amplifier 3222 of the amplifier circuit. In this way, the search for the DC component is achieved by the programmable gain amplifier 323, the successive approximation controller 325 and the digital-to-analog converter 326. The programmable gain amplifier 323 can also be an open-loop comparator. The digital-to-analog converter 326 can also be a resistor divider network. The degree of closeness between the final adjusted common-mode voltage and the actual DC component depends on the resolution of the digital-to-analog converter 326. In addition, the programmable gain amplifier 323 and the successive approximation controller 325 in the common-mode voltage adjustment circuit can be multiplexed with the analog-to-digital converter 324, that is, it can be used as the analog-to-digital converter 324. However, the number of bits of the successive approximation controller needs to be adjusted during use. As another technical solution of the present application, a DC removal loop can be formed by a DC removal circuit 322, a programmable gain amplifier 323, an analog-to-digital converter 324, and a logic circuit in a microprocessor 400. Its effect is similar to Figure 6 The working principle of the DC removal loop formed by the DC removal circuit 322, the programmable gain amplifier 323, the successive approximation controller 325 and the digital-to-analog converter 326 is the same.

[0055] According to a further embodiment of the present application, the following may be used: Figure 7 The DC removal circuit 322 is shown. Figure 7In the embodiment of the present invention, the DC removal circuit 322 is in the form of a single op amp subtractor circuit. The DC removal circuit 322 may include an operational amplifier A1. One input end of the operational amplifier A1 is connected to the output end of the level converter 321 via a first resistor R1, and one input end of the operational amplifier A1 is connected to the output end of the operational amplifier A1 via a second resistor, and the other input end of the operational amplifier A1 is connected to the output end of the digital-to-analog converter 326 via a third resistor R3, and the other input end is grounded via a fourth resistor R4. The resistance value of the first resistor R1 is equal to the resistance value of the third resistor R3, and the resistance value of the second resistor R2 is equal to the resistance value of the fourth resistor R4. In this way, the output of the operational amplifier A1 will be equal to the ratio of the second resistor to the first resistor multiplied by the difference between the voltage of the other input end and the voltage of one input end. Thereby, the purpose of removing the DC component from the voltage response signal is achieved. It can be understood that the DC component can be found by the successive approximation controller 325 and the digital-to-analog converter 326, and the DC component is used as an input of the operational amplifier A1. During the impedance detection process, the feedback loop formed by the successive approximation controller 325 and the digital-to-analog converter 326 needs to be disconnected, and the output signal of the digital-to-analog converter 326 is maintained.

[0056] In various embodiments of the present application, the operation of removing DC needs to be completed before the impedance detection begins. First, the DC component is obtained, and then when the impedance detection begins, the DC component is removed during the detection process. For example, the DC component corresponding to the output signal of the digital-to-analog converter 326 can be kept as an input of the DC removal circuit. If the frequency is changed for detection, the operation of removing DC is also performed first.

[0057] In the present application, the analog-to-digital converter 324 may be a SAR ADC. In the case of low speed, the time after each conversion is the idle time of impedance detection, and other states of the battery can be detected during the idle time. According to the technical solution disclosed in the present invention, the impedance value needs to be detected at different frequencies during impedance detection, which means that the battery pack needs to be excited with excitation signals of different frequencies. The higher the frequency of the excitation signal, the higher the sampling frequency of the corresponding analog-to-digital converter. In this paper, an asynchronous clock-controlled SAR ADC is used to quantize the impedance detection signal. The conversion speed of the asynchronous SAR ADC is determined by its internal asynchronous comparison loop and has nothing to do with the control clock of the SAR ADC. Therefore, the time from completing sampling to obtaining the digital output of the ADC is fixed each time. When the low-frequency impedance of the battery is detected, the time between two adjacent ADC samplings is large, which also means that after the asynchronous completion of an ADC quantization output, before the next sampling, there is more idle time left, and the voltage, current or temperature of the same battery cell can be monitored by other ADCs (not shown). Figure 8The figure shows the idle time between two ADC samples during low frequency impedance detection.

[0058] During the detection process, current excitation is applied to the battery pack, and the impedance of each battery cell will generate a voltage. After measuring the voltage value, the impedance value of each battery cell is inverted. In a preferred embodiment, a resistor and a switch are connected in series between the positive and negative poles of the battery pack. When the switch is turned on, a conductive branch will be formed between the positive and negative poles of the battery pack, which is equivalent to adding a current excitation of VDD / Res to the battery pack (Res is the resistance value of the resistor) relative to the normal working state of the battery pack. When the switch is disconnected, relative to the normal working state of the battery, it is equivalent to adding a current excitation of 0 to the battery pack. The switch is periodically switched between the on and off states under the control of a microcontroller or a clock divider. Relative to the normal working state of the battery, it is equivalent to adding a pulse current as an excitation signal to the battery. The impedance acquisition work is also synchronously controlled by the control signal of the switch.

[0059] In the present application, the sampling frequency of the analog-to-digital converter needs to be much greater than the frequency of the excitation signal, for example, it can be 50 times higher than the excitation signal frequency. In addition, a digital filter can be used to downsample and reduce noise on the output of the analog-to-digital converter.

[0060] The present invention proposes to detect the battery impedance when the battery is in working mode (for example, the motor of an electric vehicle is in operation). Inevitably, the detection of the battery impedance will be interfered by the load voltage. Therefore, based on the detection of the absolute value of the battery impedance, the change rate of the battery impedance is used as a variable for battery safety monitoring to avoid false triggering due to load interference.

[0061] In the above embodiment, the pulse excitation signal can be generated by a microprocessor. Fig. 9 In the embodiment of the present invention, the pulse excitation signal can be generated by an independent clock divider 600. The pulse excitation signal generated by the clock divider 600 is provided to the excitation switch 500. At the same time, the pulse excitation signal is also provided to the analog-to-digital converter 324 and the microcontroller 400. As described above, the higher the frequency of the excitation signal, the higher the corresponding analog-to-digital converter sampling frequency. Therefore, the analog-to-digital converter 324 can adjust the analog-to-digital converter sampling frequency according to the frequency of the pulse excitation signal. The microprocessor 400 calculates and demodulates the battery impedance according to the frequency of the pulse excitation signal.

[0062] In the technical solution disclosed in the present invention, a pulse excitation current is applied to the entire battery pack, and the battery cell generates a voltage response signal. The present invention does not require a complex circuit structure to generate a pulse excitation current. It only needs to divide the clock signal through a clock divider or provide it through a microprocessor to generate pulse excitation signals of different frequencies, so as to achieve the purpose of real-time impedance detection. The impedance acquisition circuit provided by the present invention is conducive to circuit design and implementation, and reduces the corresponding production and manufacturing costs. There is no need to configure an impedance acquisition circuit for each battery cell separately, which reduces costs. The anti-saturation DC-removing amplifier circuit only amplifies the useful signal and removes the DC component. The amplified signal will not be saturated. At the same time, the impedance signal is amplified and then quantized by ADC, which can obtain a more accurate impedance detection result and prevent impedance signal distortion.

[0063] According to a further embodiment of the present application, a battery management system is also provided. The battery management system may include the battery impedance measuring device as described above.

[0064] In the description of this specification, the description with reference to the terms "one embodiment / method", "some embodiments / methods", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment / method or example are included in at least one embodiment / method or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment / method or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments / methods or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments / methods or examples described in this specification and the features of the different embodiments / methods or examples, unless they are contradictory.

[0065] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0066] Those skilled in the art should understand that the above embodiments are only for the purpose of clearly illustrating the present disclosure, and are not intended to limit the scope of the present disclosure. For those skilled in the art, other changes or modifications may be made based on the above disclosure, and these changes or modifications are still within the scope of the present disclosure.

Claims

1. A battery impedance measuring device, characterized in that: The battery impedance measuring device is used to measure the impedance of a battery cell of a battery pack, wherein the battery pack is formed by N battery cells connected in series, wherein N≥2, and the battery impedance measuring device comprises: a pulse current generator capable of generating a pulse current, and the pulse current serves as a current excitation for the battery pack; A series resistor, wherein the series resistor is connected in series with the pulse current generator to form a series circuit, and two ends of the series circuit are respectively connected to the positive electrode and the negative electrode of the battery pack; An impedance acquisition circuit, which can be connected to the positive terminal and the negative terminal of each battery cell respectively, and is used to collect the voltage response signal of each battery cell when the battery pack is current-excited. The impedance acquisition circuit includes a multiplexing circuit, and the positive output terminal and the negative output terminal of the positive terminal of each battery cell are connected respectively by switching the switch of the multiplexing circuit.

2. The battery impedance measuring device according to claim 1, characterized in that: Optionally, the pulse current generator comprises an excitation switch, wherein the excitation switch is connected in series with the series resistor to form the series circuit, wherein the pulse current is generated by turning on and off the excitation switch. Optionally, when the excitation switch is turned on, the amplitude of the pulse current is the ratio of the battery pack voltage to the resistance value of the series resistor. Optionally, the on and off of the excitation switch is controlled by a control signal, wherein the control signal is an excitation signal having a plurality of excitation frequencies, so as to detect the voltage response signal of each battery cell at different excitation frequencies.

3. The battery impedance measuring device according to claim 2, characterized in that: Optionally, the impedance acquisition circuit includes a level converter, a DC removal amplifier and an analog-to-digital converter, wherein the level converter is used to respond to a voltage signal between the positive terminal and the negative terminal of each battery cell, and the output signal of the level converter is used as an input signal of the DC removal amplifier, the DC removal amplifier is used to remove the DC component in the input signal, and the analog-to-digital converter is used to convert the output signal of the DC removal amplifier into a digital signal. Optionally, the battery impedance measuring device further comprises a microprocessor, and the microprocessor is used to determine the battery impedance of each battery cell according to the digital signal.

4. The battery impedance measuring device according to claim 6, characterized in that: The control signal is a signal obtained by dividing the clock signal by the clock divider.

5. The battery impedance measuring device according to claim 6, characterized in that: The DC removal amplifier includes a DC removal circuit and a common-mode voltage regulation circuit, wherein an input end of the DC removal circuit receives the output signal of the level converter, the common-mode voltage regulation circuit receives the output signal of the DC removal circuit, the output of the common-mode voltage regulation circuit is the DC component, and the DC removal circuit is used to remove the DC component from the output signal of the level converter.

6. The battery impedance measuring device according to claim 5, characterized in that: The common-mode voltage regulation circuit includes a comparator, a successive approximation controller and a digital-to-analog converter, wherein the comparator receives the output signal of the DC removal circuit, the successive approximation controller receives the output signal of the comparator, the digital-to-analog converter receives the output signal of the successive approximation controller, and the output signal of the digital-to-analog converter is provided to the other input end of the DC removal circuit, and the DC component in the output signal of the level converter is found through the comparator, the successive approximation controller and the digital-to-analog converter.

7. The battery impedance measuring device according to claim 5, characterized in that: The DC removal circuit includes a first-stage differential amplifier and a second-stage gain amplifier, the first-stage differential amplifier includes a first operational amplifier and a second operational amplifier, the negative input terminals of the first operational amplifier and the second operational amplifier are connected through a resistor, the positive input terminal of the first operational amplifier receives the output signal of the level converter, the positive input terminal of the second operational amplifier receives the output signal of the common-mode voltage regulation circuit, the output terminals of the first operational amplifier and the second operational amplifier are respectively connected to the positive input terminal and the negative input terminal of the second-stage gain amplifier, and the output terminal of the second-stage gain amplifier is connected to the common-mode voltage regulation circuit.

8. The battery impedance measuring device according to claim 5, characterized in that: The DC removal circuit includes an operational amplifier, one input of which is connected to the output of the level converter via a first resistor, one input of which is connected to the output of the operational amplifier via a second resistor, another input of which is connected to the output of the common-mode voltage regulation circuit via a third resistor, and another input is grounded via a fourth resistor, and the output of the operational amplifier can be connected to the input of the common-mode voltage regulation circuit and the input of the analog-to-digital converter.

9. The battery impedance measuring device according to claim 3, characterized in that: The analog-to-digital converter is controlled by an asynchronous clock to convert the output signal of the DC-free amplifier into a digital signal, wherein the voltage, current or temperature of the battery cell is detected during the idle time between two adjacent samplings of the analog-to-digital converter.

10. A battery management system, characterized in that: The invention comprises the battery impedance measuring device as claimed in any one of claims 1 to 9.

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