An optical device test circuit and a test method
By designing an optical device testing circuit including an MCU control unit, an impedance testing device and a housing conduction testing unit, the problem that traditional testing methods cannot effectively detect the insulation condition of the optical device pins and the housing is solved, and more accurate test results and higher safety are achieved.
Patent Information
- Application Number
- CN202510240476.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-03
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2045-03-03
AI Technical Summary
In optical device testing, traditional methods cannot effectively detect the insulation between the optical device pin and the shell, resulting in potential leakage risks, affecting the performance of the optical device and the safety of the equipment.
Design an optical device testing circuit, including an MCU control unit, an impedance testing equipment and a housing conduction testing unit, and realize the controllable connection between the electrode and the optical device through a relay to ensure the accuracy of the test results.
By first testing the normal connection between the optical device shell and the test circuit, avoiding invalid tests, improving the accuracy of the test results, and ensuring that the optical device eliminates potential leakage risks before production.
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Figure CN119716649B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of optical device testing, and particularly relates to an optical device testing circuit and a testing method. Background Art
[0002] After the production of an optical device, the electrical performance between each pin needs to be tested before and after each process operation. In particular, the resistance value between each pin and the outer shell of the optical device needs to be strictly controlled to ensure that other performances are not affected during the high and low temperature aging test. The market demand is that the pins of the optical device are insulated from its outer shell, that is, the resistance between the pins and the outer shell is relatively high, generally reaching the mega level. However, during the test, if the test terminal connected to the outer shell is in poor contact or directly disconnected, the impedance test result of any pin and the outer shell will be infinite. But such a test is simply meaningless and cannot rule out the problem that the pins of the optical device are not insulated from the outer shell. As a result, it flows into the market, and the outer shell of the optical device will leak electricity during use, which will affect the optical device chip and even the optical device equipment. Therefore, there are great risks in the traditional test process. At present, many test schemes do not control the parameter values of the outer shell, resulting in various problems gradually emerging after many products reach the client and are used for a long time. Therefore, this potential risk problem needs to be detected and eliminated before production. Summary of the Invention
[0003] The purpose of the present invention is to ensure the validity of the test results when testing the insulation condition between the pins of an optical device and its outer shell, and to provide an optical device testing circuit and a testing method.
[0004] To achieve the above-mentioned invention purpose, the embodiments of the present invention provide the following technical solutions:
[0005] An optical device testing circuit is connected to an optical device testing structure through an electrode; the testing circuit includes: an MCU control unit, an impedance testing device, and an outer shell conduction testing unit;
[0006] The outer shell conduction testing unit includes a relay. The MCU control unit is connected to the relay. When the MCU control unit controls the relay to disconnect, the relay is not connected to the electrode, and a loop is formed between the relay and the MCU control unit; when the MCU control unit controls the relay to close, the relay is connected to the electrode;
[0007] The impedance testing device is connected to the MCU control unit. The impedance testing device is connected to all the pins of the optical device, and the impedance testing device is also connected to the electrode through a lead wire;
[0008] The optical device is detachably placed on the testing structure, and when placed on the testing structure, the optical device is conducted with the testing structure.
[0009] A method for testing an optical device, comprising the following steps:
[0010] Step S1: Make the electrode SW1, the housing of the optical device, and the electrode SW2 contact through the optical device test structure; the MCU control unit outputs a high level to the relay and outputs a voltage V1 through the DAC port. If the voltage V2 detected through the ADC port is equal to the pre-stored voltage value V2`, then execute Step S2; otherwise, perform exception handling.
[0011] Step S2: The MCU control unit outputs a low level to the relay and notifies the impedance test device to perform a function test on the optical device. When all function tests are completed, execute Step S3;
[0012] Step S3: The MCU control unit outputs a high level 1 to the relay and outputs a voltage V1 through the DAC port. If the voltage V2 detected through the ADC port is equal to the pre-stored voltage value V2`, it indicates that the function test result in Step S2 is valid; otherwise, perform exception handling and return to Step S1.
[0013] Compared with the prior art, the beneficial effects of the present invention: Before testing whether the pins of the optical device and its housing meet the performance requirements (i.e., ensuring insulation between the pins and the housing), the present invention first tests whether the housing of the optical device is normally connected to the test circuit, thereby avoiding the situation where the test results of the pins and the housing are normal when the housing of the optical device is not connected to the test circuit. Therefore, the accuracy of the test results can be improved. Description of the Drawings
[0014] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the embodiments. It should be understood that the following drawings only show some embodiments of the present invention, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.
[0015] Figure 1 It is a schematic diagram of the test structure of the present invention;
[0016] Figure 2 It is a schematic diagram of the test circuit of the present invention.
[0017] Description of the Main Component Symbols
[0018] Base 1, test fixture 2, insulating guide rod 3, first conductive metal block 4, second conductive metal block 5, optical device 6, flexible circuit board 7. Detailed Embodiments
[0019] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Usually, the components of the embodiments of the present invention described and shown in the accompanying drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed present invention, but only represents the selected embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts fall within the protection scope of the present invention.
[0020] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of the present invention, terms such as "first" and "second" are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance, or implying any such actual relationship or order between these entities or operations. In addition, terms such as "connected", "connected to", and "communicated with" can be directly connected between components or indirectly connected through other components.
[0021] The present invention is realized through the following technical solutions. As Figure 1 shown, an optical device test structure includes a base 1, a test fixture 2, an insulating guide rod 3, a first conductive metal block 4, and a second conductive metal block 5. The test fixture 2, the insulating guide rod 3, the first conductive metal block 4, and the second conductive metal block 5 are all placed on the base 1 made of insulating material. Operating the test fixture 2 causes the insulating guide rod 3 to push the first conductive metal block 4 to move towards the second conductive metal block 5 fixedly arranged relative to the base 1. An optical device 6 to be tested can be detachably placed on the second conductive metal block 5. The first conductive metal block 4 is connected to the optical device test circuit through an electrode SW1, and the second conductive metal block 5 is connected to the optical device test circuit through an electrode SW2. When the optical device 6 is placed on the second conductive metal block 5, pushing the first conductive metal block 4 towards the second conductive metal block 5 until they contact. Since the outer shell of the optical device 6 is made of metal material, after contact, the first conductive metal block 4, the outer shell of the optical device 6, and the second conductive metal block 5 are conducted, that is, the electrode SW1 and the electrode SW2 are conducted.
[0022] As Figure 2As shown, the optical device test circuit connected to the test structure includes an MCU control unit, an impedance test device, and a housing conduction test unit. The MCU control unit has a DAC port, an ADC port, a GPIO port, and an IIC communication interface; the housing conduction test unit includes a relay RLY1 and a triode Q1. The ADC port of the MCU control unit is connected to the base of the triode Q1, and the collector of the triode Q1 is connected to the control end of the relay RLY1; the DAC port of the MCU control unit is connected to contact 6 of the relay RLY1, the ADC port of the MCU control unit is connected to contact 3 of the relay RLY1, contact 7 of the relay RLY1 is connected to contact 2, contact 5 of the relay RLY1 is connected to the electrode SW1, and the electrode SW1 is connected to the first conductive metal block 4; contact 4 of the relay RLY1 is connected to the electrode SW2, and the electrode SW2 is connected to the second conductive metal block 5. The optical device 6 also has a flexible circuit board 7 with several pins.
[0023] The impedance test device includes a lead-out wire com. The impedance test device is respectively connected to the flexible circuit board 7 with several pins. Assuming the flexible circuit board 7 has 10 pins, which are NO.1, NO.2,..., NO.10 respectively, they are all connected to the impedance test device; the lead-out wire com of the impedance test device is connected to the electrode SW2. In this solution, when the first conductive metal block 4, the housing of the optical device 6, and the second conductive metal block 5 are conducting, the flexible circuit board 7 can be connected to the electrodes SW1 and SW2 through the lead-out wire com. That is to say, the pin No.i, the impedance test device, the lead-out wire com, the electrode SW1, and the housing cover can be connected in series.
[0024] The functional test of the optical device includes judging the impedance between each pin of the optical device and between each pin and the housing. For easy understanding, use Ri-j to represent the impedance between the i-th pin NO.i and the j-th pin NO.j, i = 1, 2,..., 10, j = 1, 2,..., 10, i ≠ j; use Ri-c to represent the impedance between the i-th pin NO.i and the housing cover of the optical device. If the pins and the housing of the produced optical device are completely insulated, the test of the optical device passes; otherwise, it needs to be returned to the factory or scrapped and cannot be sold and circulated. Therefore, when Ri-c is infinite (usually above the mega level), it means the test passes.
[0025] However, if the electrode SW2 fails to be effectively connected to the housing cover, Ri-c is also infinite. Even if there is a problem of short circuit between the pin NO.i and the housing cover (i.e., the pin NO.i is not insulated from the housing cover), due to the ineffective connection between the electrode SW2 and the housing cover, Ri-c is always infinite. Then the final test result still passes, which will lead to a meaningless test. Therefore, the key point of the present invention is to first test the connection state between the housing cover and the electrode SW2 through the lead wire com of the impedance test device. When the connection between the electrode SW2 and the housing cover is effective, the next step is to test Ri-j and Ri-c.
[0026] Furthermore, please refer to Figure 2 , the optical device test circuit further includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a capacitor C1, and a diode D1. One end of the resistor R1 is connected to the DAC port of the MCU control unit, and the other end of the resistor R1 is connected to the contact 6 of the relay RLY1; one end of the resistor R2 is connected to the contact 5 of the relay RLY1, and the other end of the resistor R2 is connected to the electrode SW1; one end of the resistor R3 is respectively connected to the ADC port of the MCU control unit and the contact 3 of the relay RLY1, and the other end of the resistor R3 is grounded; one end of the resistor R4 is connected to the GPIO port of the MCU control unit, and the other end of the resistor R4 is connected to the base of the triode Q1. The emitter of the triode Q1 is grounded, and the collector of the triode Q1 is connected to the control end of the relay RLY1; the diode D1 is connected in parallel with the relay RLY1; one end of the capacitor C1 is respectively connected to the ADC port of the MCU control unit and the contact 3 of the relay RLY1, and the other end of the capacitor C1 is grounded.
[0027] When the MCU control unit outputs a low level 0 through the GPIO port, the relay RLY1 does not act (i.e., disconnects), the contacts 6 and 7 are connected, the contacts 3 and 2 are connected, and the contacts 6, 7, 2, and 3 form a loop with the MCU control unit. Moreover, the contact resistance of the contacts of the relay RLY1 can be ignored; when the MCU control unit outputs a voltage V1 through the DAC port, the voltage V2 detected by the ADC port is:
[0028] V2 = V1 * R3 / (R1 + R3);
[0029] The MCU control unit determines whether the voltage received at its ADC port is equal to V2. For example, when the voltage V1 = 2V, the resistance R1 = 10KΩ, and the resistance R3 = 10KΩ, then under normal circumstances, V2 should be equal to 1V; but if V2 = 0V, it indicates that the conduction between contact 6 and contact 7, and between contact 3 and contact 2 of the relay RLY1 is abnormal; if V2 > 1V, it indicates that there is a short - circuit in the circuit. In short, when the GPIO port outputs a low level of 0, after V1 outputs a certain voltage value, V2 should satisfy V2 = V1*R3 / (R1 + R3), otherwise it indicates that the test circuit detects an abnormality, either the conduction of the contacts of the relay RLY1 is abnormal, or there is a short - circuit in the loop. Then, troubleshooting is required, and the next - step test can be carried out only when V2 = 1V.
[0030] When the MCU control unit outputs a high level of 1 through the GPIO port, the relay RLY1 operates, contact 6 is connected to contact 5, contact 3 is connected to contact 4, and contact 5 is connected to the electrode SW1 through the resistance R2, and contact 4 is connected to the electrode SW2. If the electrode SW1 and the electrode SW2 are not connected at this time, that is, the first conductive metal block 4 does not contact the housing cover of the optical device 6, after the MCU control unit outputs the voltage V1 through the DAC port, it detects through the ADC port that V2 = 0V. If the electrode SW1 and the electrode SW2 are normally connected at this time, that is, the first conductive metal block 4, the housing cover of the optical device 6, and the second conductive metal block 5 are conducting, then the voltage V2 should be:
[0031] V2 = V1*R3 / (R1 + R2 + R3 + RSW);
[0032] Where RSW is the contact resistance between the electrode SW1 and the electrode SW2. After the MCU control unit outputs the voltage V1 = 2V, if it is known that R1 = 10KΩ, R2 = 10KΩ, R3 = 10KΩ, and RSW = 10Ω, then when V2 is equal to 0.67V, it indicates that the electrode SW1 and the electrode SW2 are normally connected. Since the resistances R1, R2, and R3 are all fixed values, when RSW changes, the voltage V2 will also change accordingly, but as long as V2 is equal to 0V, it indicates that the electrode SW1 and the electrode SW2 are not connected; when V2 < 0.67V, it indicates that the conduction resistance of RSW is too large; when V2 > 0.67V, it indicates that the conduction resistance of RSW is too small.
[0033] In the non-ideal case, the contact resistance RSW between the electrode SW1 and the electrode SW2 will change due to the length of the circuit or long-term wear. Therefore, an adjustable voltage V1 is output through the DAC port to adapt to the changes in actual applications. At the same time, the resistance values of the resistor R1, the resistor R2, and the resistor R3 can also be adjusted to a smaller value to increase the loop test current and improve the test accuracy. Before each test, it is only necessary to perform a spot check once, and the voltage value V2 under normal connection is pre-stored in the MCU control unit. During each subsequent test, the real-time measured voltage V2 is compared with the pre-stored voltage value.
[0034] Based on the above optical device test structure and optical device test circuit, this solution proposes an optical device test method, including the following steps:
[0035] Step S0: The MCU control unit outputs a low level to the relay and outputs the voltage V1 through the DAC port. If the voltage V2 detected through the ADC port is equal to the pre-stored voltage value V02, then step S1 is executed; otherwise, an exception handling is performed.
[0036] Before performing the optical device test, a pre-detection of the optical device test circuit can be carried out. The MCU control unit outputs a low level 0 through the GPIO port, the triode Q1 is cut off, and the relay RLY1 does not act. The MCU control unit outputs the voltage V1 through the DAC port, and then detects the voltage V2 through the ADC port. If the voltage V2 is equal to the pre-stored voltage value V02, it means that the pre-detection of the optical device test circuit passes, and step S1 is executed; otherwise, the operator is prompted to handle the exception. The pre-stored voltage value V02 is:
[0037] V02 = V1 * R3 / (R1 + R3);
[0038] Wherein, R1 is the resistance value of the resistor R1, R3 is the resistance value of the resistor R3, and V1 is the voltage value output by the DAC port of the MCU control unit.
[0039] Step S1: Make the first conductive metal block, the housing of the optical device, and the second conductive metal block contact through the optical device test structure; the MCU control unit outputs a high level to the relay and outputs the voltage V1 through the DAC port. If the voltage V2 detected through the ADC port is equal to the pre-stored voltage value V2`, then step S2 is executed; otherwise, an exception handling is performed.
[0040] Before measuring the impedance between each pin of the optical device and between each pin and the housing, it is necessary to first determine whether the housing cover of the optical device is properly connected to the test circuit. Place the optical device 6 on the second conductive metal block 5, operate the test fixture 2 to move the first conductive metal block 4 towards the second conductive metal block 5 until they make contact. Then, the MCU controller outputs a high level 1 through the GPIO port, the triode Q1 conducts, the relay RLY1 operates, the contact 6 is connected to the contact 5, and the contact 3 is connected to the contact 4. The MCU controller outputs a voltage V1 through the DAC port and detects a voltage V2 through the ADC port. If the voltage V2 is equal to the pre-stored voltage value V2`, it indicates that the electrode SW1, the housing cover of the optical device, and the electrode SW2 are properly connected, that is, the housing cover of the optical device is properly connected to the test circuit; otherwise, they are not connected, and troubleshooting is required. It may be due to poor contact between the first conductive metal block 4, the housing cover of the optical device, and the second conductive metal block 5, or improper clamping between the electrode SW1 and the first conductive metal block 4, or improper clamping between the electrode SW2 and the second conductive metal block 5, etc. In short, when the voltage V2 detected by the ADC port is equal to the pre-stored voltage value V2`, it can ensure that the housing cover of the optical device is properly connected to the test circuit, and then step S2 can be executed.
[0041] The pre-stored voltage value V2` is:
[0042] V2` = V1 * R3 / (R1 + R2 + R3 + RSW);
[0043] Where, RSW is the contact resistance between the electrode SW1 and the electrode SW2, R1 is the resistance value of the resistor R1, R2 is the resistance value of the resistor R2, R3 is the resistance value of the resistor R3, and V1 is the voltage value output by the DAC port of the MCU control unit.
[0044] Since the electrode SW1 and the electrode SW2 will wear during long-term use, the contact resistance RSW will change. Set the acceptable change range of RSW due to wear as [RSW min , RSW max , where RSW min represents the minimum contact resistance, and RSW max represents the maximum contact resistance. Since R1, R2, R3, and V1 are fixed values, when the contact resistance changes within the range [RSW min , RSW max , there is a corresponding change range [V2` min , V2` max of the pre-stored voltage value V2`, where V2` min represents the minimum value of the pre-stored voltage value V2`, and V2` maxRepresents the maximum value of the pre-stored voltage V2`, that is:
[0045] V2` min = V1 * R3 / (R1 + R2 + R3 + RSW min );
[0046] V2` max = V1 * R3 / (R1 + R2 + R3 + RSW max );
[0047] Therefore, ideally, if the voltage V2 detected by the ADC port is equal to the pre-stored voltage V2`, then step S2 is executed; in a non-ideal situation, if the voltage V2 detected by the ADC port is within the pre-stored voltage range [V2` min , V2` max , then step S2 is executed.
[0048] If V2 ≠ V2`, or V2 is not within [V2` min , V2` max , it indicates that the electrode SW1, the cover of the optical device, and the electrode SW2 are not properly connected. That is to say, the cover of the optical device is not properly connected to the test circuit, and then abnormal handling is required.
[0049] Step S2: The MCU control unit outputs a low level to the relay and notifies the impedance test device to perform a function test on the optical device. After all function tests are completed, step S3 is executed.
[0050] In step S1, when V2 is equal to the pre-stored voltage V2` or within [V2` min , V2` max , it indicates that the electrode SW1, the cover of the optical device 6, and the electrode SW2 are already connected and conducting. Then, the MCU control unit outputs a low level 0 through the GPIO port, the relay RLY1 is disconnected, the contact 6 is connected to the contact 7, and the contact 3 is connected to the contact 2; the electrode SW1 is disconnected from the DAC port, and the electrode SW2 is disconnected from the ADC port. The lead-out wire com of the impedance test device is only connected to the electrode SW2, and the electrode SW1 is floating.
[0051] The MCU control unit notifies the impedance test device to start various function tests through the IIC communication interface, including Ri-c and Ri-j. Since the electrode SW2 is already connected to the cover of the optical device 6, and the lead wire com is also connected to the electrode SW2, the pin No.i, the lead wire com, the electrode SW2, and the cover are connected in series. At this time, if the impedance test device measures that Ri-c is infinite, it means that the pin No.i and the cover are insulated inside the optical device 6, that is, the test passes; if it measures that Ri-c is not infinite, it means that there are impurities or connections between the pin No.i and the cover inside the optical device 6, that is, the test of this optical device product fails. For example, if it measures that Ri-c is equal to 0, it means that the pin No.i and the cover are short-circuited inside the optical device 6.
[0052] However, because during the test process, if the electrode SW2 is not connected to the cover, then Ri-c is also infinite. Therefore, after step S2 is executed, step S3 must be executed for further verification to prove that the infinite Ri-c in step S2 is not because the electrode SW2 is not connected to the cover, but because the pin No.i is insulated from the cover.
[0053] In addition, the impedance measured by the impedance test device between the pin No.i and the pin No.j is also valid. However, due to the different functions of each pin, the impedance results are not the same.
[0054] When all function tests are completed, the impedance test device disconnects the connections with all pins of the optical device 6 and notifies the MCU control unit through the IIC communication interface that the test has been completed.
[0055] Step S3: The MCU control unit outputs a high level 1 to the relay and outputs a voltage V1 through the DAC port. If it is detected through the ADC port that the voltage V2 is equal to the pre-stored voltage value V2`, it means that the function test result in step S2 is valid, and step S4 is executed; otherwise, an exception is processed and the process returns to step S1.
[0056] To ensure that all function test results in step S2 are valid, the MCU control unit outputs a high level 1 through the GPIO port again. The relay RLY1 acts again, the contact 6 is connected to the contact 5, the DAC port is connected to the electrode SW1, the contact 3 is connected to the contact 4, and the ADC port is connected to the electrode SW2. The MCU control unit outputs a voltage V1 through the DAC port. The ADC port determines that if the voltage V2 is equal to the pre-stored voltage value V2`, or the voltage V2 is within [V2` min ,V2` maxIf it is within the range, it indicates that Ri-c is infinite in step S2 because the pin No.i is insulated from the housing cover, that is, the electrode SW1, the housing cover, and the electrode SW2 are normally connected, and then step S4 is executed; otherwise, all the functional test results of step S2 are invalid because Ri-c is infinite in step S2 because the electrode SW2 is not connected to the housing cover. At this time, the impedance test result between the pin No.i and the housing cover is already meaningless. Therefore, the operator should be prompted to handle the abnormality, and then return to step S1 or step S0.
[0057] Step S4: Replace the next optical device and return to step S1.
[0058] When all the functional test results are valid, the MCU control unit outputs a low level 0 through the GPIO port, the relay RLY1 is disconnected, and the sliding test fixture 2 moves the first conductive metal block 4 away from the second conductive metal block 5, removes the optical device 6 from the second conductive metal block 5, replaces it with the next optical device for continuous testing, and returns to step S1 or step S0.
[0059] The above is only the specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention can easily think of changes or substitutions, which should all be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims.
Claims
1. An optical device test circuit, characterized in that: The connection is achieved through electrodes and an optical device test structure; the test circuit includes: an MCU control unit, an impedance test device, and a housing conduction test unit; The housing conduction test unit includes a relay, and the MCU control unit is connected to the relay. When the MCU control unit controls the relay to be disconnected, the relay is not connected to the electrode, and the relay and the MCU control unit form a loop; when the MCU control unit controls the relay to be closed, the relay is connected to the electrode; The impedance test device is connected to the MCU control unit, the impedance test device is connected to all pins of the optical device, and the impedance test device is also connected to the electrode through a lead wire; The optical device is detachably placed on the test structure, and when placed on the test structure, the optical device is connected to the test structure; The DAC port of the MCU control unit is connected to the contact 6 of the relay, the ADC port of the MCU control unit is connected to the contact 3, the contact 7 of the relay is connected to the contact 2, the contact 5 of the relay is connected to the electrode SW1, and the contact 4 of the relay is connected to the electrode SW2; the GPIO port of the MCU control unit is connected to the control end of the relay; When the MCU control unit sends a low level to the control end of the relay through the GPIO port, the relay is disconnected, that is, contact 6 of the relay is connected to contact 7, and contact 3 is connected to contact 2; When the MCU control unit sends a high level to the control end of the relay through the GPIO port, the relay is closed, that is, contact 6 of the relay is connected to contact 5, and contact 3 is connected to contact 4; The test structure comprises a test fixture, an insulating guide rod, a first conductive metal block, and a second conductive metal block; the optical device is detachably placed on the second conductive metal block, and when the test fixture is actuated, the insulating guide rod pushes the first conductive metal block to move toward the second conductive metal block until the first conductive metal block contacts the optical device, and the first conductive metal block, the housing of the optical device, and the second conductive metal block are connected; The electrodes include an electrode SW1 and an electrode SW2; the second conductive metal block is connected to a contact 4 of the relay via the electrode SW1, and the first conductive metal block is connected to a contact 5 of the relay via the electrode SW2; The test circuit also includes resistors R1, R2, and R3; one end of the resistor R1 is connected to the DAC port of the MCU control unit, and the other end of the resistor R1 is connected to the contact 6 of the relay; one end of the resistor R2 is connected to the contact 5 of the relay, and the other end of the resistor R2 is connected to the electrode SW1; one end of the resistor R3 is respectively connected to the ADC port of the MCU control unit and the contact 3 of the relay, and the other end of the resistor R3 is grounded.
2. The optical device test circuit according to claim 1, characterized in that: The impedance testing device is connected to the electrode SW2 via a lead wire.
3. A method for testing an optical device, implemented based on the test circuit according to any one of claims 1 to 2, characterized in that: The following steps are involved: Step S1: The first conductive metal block, the housing of the optical device and the second conductive metal block are brought into contact through the optical device test structure; the MCU control unit outputs a high level to the relay and outputs a voltage V1 through the DAC port. If the voltage V2 detected through the ADC port is equal to the pre-stored voltage value V2`, step S2 is executed, otherwise, exception processing is performed; Step S2: The MCU control unit outputs a low level to the relay and notifies the impedance test equipment to perform a functional test on the optical device. When all functional tests are completed, step S3 is executed; Step S3: The MCU control unit outputs a high level 1 to the relay and outputs a voltage V1 through the DAC port. If the voltage V2 detected through the ADC port is equal to the pre-stored voltage value V2`, it means that the functional test result of step S2 is valid; Otherwise, perform exception handling and return to step S1.
4. The optical device testing method according to claim 3, characterized in that: The step S1 specifically includes the following steps: The optical device is placed on the second conductive metal block, and the test fixture is activated to move the first conductive metal block toward the second conductive metal block until they are in contact. The MCU controller outputs a high level through the GPIO port, and the relay RLY1 is activated, and the contact 6 is connected to the contact 5, and the contact 3 is connected to the contact 4. The MCU controller outputs a voltage V1 through the DAC port, and detects the voltage V2 through the ADC port. If the voltage V2 is equal to the pre-stored voltage value V2`, it means that the electrode SW1, the housing cover of the optical device, and the electrode SW2 are normally connected; otherwise, they are not connected, and the abnormality is eliminated until the voltage V2 detected by the ADC port is equal to the pre-stored voltage value V2`, and step S2 is executed; The pre-stored voltage value V2' is: V2`=V1*R3 / (R1+R2+R3+RSW); Wherein, RSW is the contact resistance between the electrode SW1 and the electrode SW2, R1 is the resistance value of the resistor R1, R2 is the resistance value of the resistor R2, R3 is the resistance value of the resistor R3, and V1 is the voltage value output by the DAC port of the MCU control unit.
5. The optical device testing method according to claim 4, characterized in that: The step S2 specifically includes the following steps: The MCU control unit outputs a low level 0 through the GPIO port, the relay RLY1 is disconnected, the contact 6 is connected to the contact 7, and the contact 3 is connected to the contact 2; the lead wire com of the impedance test equipment is connected to the electrode SW2; The MCU control unit notifies the impedance test equipment to start various functional tests, including Ri-c and Ri-j; Ri-j represents the impedance between the i-th pin NO.i and the j-th pin NO.j of the optical device, i=1,2,...,10, j=1,2,...,10, i≠j; Ri-c represents the impedance between the i-th pin NO.i and the housing cover of the optical device; If the impedance test equipment measures that Ri-c is infinite, the test passes; if the measured Ri-c is not infinite, the test fails; When all functional tests are completed, the impedance test equipment disconnects all pins of the optical device and notifies the MCU control unit that the test has been completed.
6. The optical device testing method according to claim 5, characterized in that: The step S3 specifically comprises the following steps: The MCU control unit then outputs a high level through the GPIO port, the relay RLY1 operates again, the contact 6 is connected to the contact 5, the DAC port is connected to the electrode SW1, the contact 3 is connected to the contact 4, and the ADC port is connected to the electrode SW2; The MCU control unit outputs voltage V1 through the DAC port, and the ADC port determines that if the voltage V2 is equal to the pre-stored voltage value V2`, it means that the functional test result of step S2 is valid; otherwise, all functional test results of step S2 are invalid and return to step S1.
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