Band-gap reference circuit, chip, and electronic device

Abstract

A band-gap reference circuit, a chip, and an electronic device, the band-gap reference circuit comprising: a starting circuit for starting an entire circuit of the band-gap reference circuit; the first reference voltage generating circuit is provided with a first zero temperature drift point in a first temperature range, and the first zero temperature drift point corresponds to the first voltage value; the compensation circuit comprises at least one second reference voltage generation circuit formed based on the first reference voltage generation circuit, the second reference voltage generation circuit has a second zero temperature drift point in a second temperature range, the second temperature range and the first temperature range are different but crossed, and the second zero temperature drift point corresponds to the first voltage value; and the control circuit is used for controlling one of the first reference voltage generation circuit and the second reference voltage generation circuit to be turned on in different temperature ranges, so that the absolute value of the difference value between the reference voltage values output in the different temperature ranges and the first voltage value is smaller than a preset threshold value.

Description

Technical Field

[0001] The present application relates to the field of circuit technology, and more specifically to a bandgap reference circuit, a chip and an electronic device. Background Art

[0002] The bandgap reference circuit is a circuit used to generate a stable reference voltage (also called a reference voltage), which can output a highly stable, low-noise voltage and is theoretically not affected by temperature changes. Therefore, the bandgap reference circuit has been widely used in many precision electronic devices, such as analog-to-digital converters, digital-to-analog converters, and sensor measurement systems.

[0003] The temperature drift of the bandgap reference circuit is an extremely important parameter, which refers to the characteristic that the output voltage changes with temperature. The bandgap reference circuit realizes a temperature-independent voltage reference by utilizing the sum of a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient. However, in practical applications, due to the influence of various factors, the output voltage of the bandgap reference circuit will still change with temperature, and this change is temperature drift.

[0004] In order to enhance the temperature stability of the bandgap reference, high-order compensation of the bandgap reference circuit is required. Common compensation methods include exponential compensation and curvature compensation. However, these compensation methods are overly dependent on the original bandgap reference circuit, are not very universal, and have great differences in adaptability to different bandgap reference circuits. Summary of the invention

[0005] The present application is proposed to solve the above problems. According to one aspect of the present application, a bandgap reference circuit is provided, the bandgap reference circuit comprising:

[0006] A startup circuit, used for starting the entire circuit of the bandgap reference circuit;

[0007] a first reference voltage generating circuit, wherein the first reference voltage generating circuit has a first zero temperature drift point within a first temperature range, and the first zero temperature drift point corresponds to a first voltage value;

[0008] a compensation circuit, comprising at least one second reference voltage generating circuit formed based on the first reference voltage generating circuit, the second reference voltage generating circuit having a second zero temperature drift point within a second temperature range, the second temperature range being different from but intersecting with the first temperature range, and the second zero temperature drift point corresponding to the first voltage value;

[0009] The control circuit is used to control one of the first reference voltage generating circuit and the second reference voltage generating circuit to be turned on within different temperature ranges so that the absolute value of the difference between the reference voltage value output within the different temperature ranges and the first voltage value is less than a preset threshold.

[0010] The above technical solution has the following technical effects: it is applicable to bandgap references of various structures and different temperature drift coefficients, and can achieve good compensation effects, so that it can output a highly stable reference voltage.

[0011] In one embodiment of the present application, the second reference voltage generating circuit includes:

[0012] A third reference voltage generating circuit; and / or

[0013] a fourth reference voltage generating circuit;

[0014] The third reference voltage generating circuit is formed by duplicating the first reference voltage generating circuit, extracting current from the duplicated first reference voltage generating circuit and then boosting the voltage to obtain the third reference voltage generating circuit;

[0015] The fourth reference voltage generating circuit is formed by duplicating the first reference voltage generating circuit, injecting current into the duplicated first reference voltage generating circuit and then reducing the voltage to obtain the fourth reference voltage generating circuit.

[0016] The above technical solution has the following technical effects: conveniently realizing the horizontal migration of the zero temperature drift point, thereby obtaining the same reference voltage value corresponding to different temperature ranges.

[0017] In one embodiment of the present application, when the second reference voltage generating circuit includes the third reference voltage generating circuit, the compensation circuit further includes:

[0018] The current generating circuit is used to realize the function of extracting current.

[0019] The above technical solution has the following technical effects: the function of extracting current can be achieved through a simple circuit.

[0020] In one embodiment of the present application, the current generated by the current generating circuit is a negative temperature coefficient current.

[0021] The above technical solution has the following technical effects: negative temperature coefficient current conveniently realizes current extraction.

[0022] In one embodiment of the present application, the first reference voltage generating circuit outputs a third reference voltage;

[0023] The second reference voltage generating circuit comprises:

[0024] Two third reference voltage generating circuits, one of which outputs a first reference voltage and the other outputs a second reference voltage;

[0025] The two fourth reference voltage generating circuits, one of which outputs a fourth reference voltage, and the other of which outputs a fifth reference voltage.

[0026] The above technical solution has the following technical effects: the reference voltage generating circuit obtained by two methods can expand the temperature compensation range to a greater extent.

[0027] In one embodiment of the present application, the control circuit includes a digital programming circuit.

[0028] The above technical solution has the following technical effects: realizing programmable temperature compensation.

[0029] In one embodiment of the present application, the digital programming circuit includes:

[0030] A first over-temperature protector, wherein the output end of the first over-temperature protector is connected to the second input end of the first NAND gate, and is connected to the first input ends of the second NAND gate, the third NAND gate, the fourth NAND gate and the fifth NAND gate via an inverter;

[0031] A second over-temperature protector, wherein the output end of the second over-temperature protector is connected to the second input end of the second NAND gate, and is connected to the second input ends of the third NAND gate, the fourth NAND gate and the fifth NAND gate respectively via an inverter;

[0032] a third over-temperature protector, wherein the output end of the third over-temperature protector is connected to the third input end of the third NAND gate, and is connected to the third input ends of the fourth NAND gate and the fifth NAND gate respectively via an inverter;

[0033] a fourth over-temperature protector, wherein the output end of the fourth over-temperature protector is connected to the fourth input end of the fourth NAND gate, and is connected to the fourth input end of the fifth NAND gate via an inverter;

[0034] The first input terminal of the first NAND gate is connected to a power supply, the output terminal of the first NAND gate is connected to the gate of the first transistor via an inverter, and the drain of the first transistor outputs the fifth reference voltage;

[0035] The output terminal of the second NAND gate is connected to the gate of the second transistor through an inverter, and the drain of the second transistor outputs the fourth reference voltage;

[0036] The output end of the third NAND gate is connected to the gate of the third transistor through an inverter, and the drain of the third transistor outputs the third reference voltage;

[0037] The output end of the fourth NAND gate is connected to the gate of the fourth transistor through an inverter, and the drain of the fourth transistor outputs the second reference voltage;

[0038] The output end of the fifth NAND gate is connected to the gate of the fifth transistor through an inverter, and the drain of the fifth transistor outputs the first reference voltage.

[0039] The above technical solution has the following technical effects: the selection of the bandgap reference is realized through the four-temperature switching circuit.

[0040] In one embodiment of the present application, the first over-temperature protector corresponds to a first temperature threshold;

[0041] The second over-temperature protector corresponds to a second temperature threshold;

[0042] The third over-temperature protector corresponds to a third temperature threshold;

[0043] The fourth over-temperature protector corresponds to a fourth temperature threshold;

[0044] The first temperature threshold is greater than the second temperature threshold, the second temperature threshold is greater than the third temperature threshold, and the third temperature threshold is greater than the fourth temperature threshold.

[0045] The above technical solution has the following technical effects: realizing the selection of bandgap references under different temperature ranges.

[0046] According to another aspect of the present application, a chip is further provided, wherein the chip includes the above-mentioned bandgap reference circuit.

[0047] According to another aspect of the present application, an electronic device is provided, comprising the above-mentioned chip.

[0048] The bandgap reference circuit, chip and electronic device according to the embodiments of the present application are applicable to bandgap references of various structures and different temperature drift coefficients, and can achieve good compensation effects, so that they can output a highly stable reference voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] By describing the embodiments of the present application in more detail in conjunction with the accompanying drawings, the above and other purposes, features and advantages of the present application will become more apparent. The accompanying drawings are used to provide a further understanding of the embodiments of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the present application and do not constitute a limitation of the present application. In the accompanying drawings, the same reference numerals generally represent the same components or steps.

[0050] Figure 1 A schematic structural block diagram of a bandgap reference circuit according to an embodiment of the present application is shown.

[0051] Figure 2 A schematic diagram of a temperature drift curve of a first reference voltage generating circuit in a bandgap reference circuit according to an embodiment of the present application is shown.

[0052] Figure 3 A schematic diagram of the first step in a method for obtaining a compensation circuit in a bandgap reference circuit according to an embodiment of the present application is shown.

[0053] Figure 4 A schematic diagram showing a negative temperature coefficient current used in a method for obtaining a compensation circuit in a bandgap reference circuit according to an embodiment of the present application is shown.

[0054] Figure 5 A schematic diagram of the second step in the method for obtaining a compensation circuit in a bandgap reference circuit according to an embodiment of the present application is shown.

[0055] Figure 6 A simulation effect diagram of a temperature drift curve of a bandgap reference circuit according to an embodiment of the present application is shown.

[0056] Figure 7 An exemplary circuit diagram of a startup circuit, a first reference voltage generating circuit, and a compensation circuit in a bandgap reference circuit according to an embodiment of the present application is shown.

[0057] Figure 8 An exemplary circuit diagram of a control circuit in a bandgap reference circuit according to an embodiment of the present application is shown. DETAILED DESCRIPTION

[0058] In order to make the purpose, technical solutions and advantages of the present application more obvious, the example embodiments according to the present application will be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application, and it should be understood that the present application is not limited to the example embodiments described herein. Based on the embodiments of the present application described in the present application, all other embodiments obtained by those skilled in the art without creative work should fall within the scope of protection of the present application.

[0059] Figure 1 FIG. 1 shows a schematic structural block diagram of a bandgap reference circuit 1 according to an embodiment of the present application. Figure 1As shown, the bandgap reference circuit 1 may include a start-up circuit 11, a first reference voltage generating circuit 12, a compensation circuit 13 and a control circuit 14. Among them, the start-up circuit 11 is used to start the entire circuit of the bandgap reference circuit 1. The first reference voltage generating circuit 12 has a first zero temperature drift point in a first temperature range, and the first zero temperature drift point corresponds to a first voltage value. The compensation circuit 13 includes at least one second reference voltage generating circuit formed based on the first reference voltage generating circuit 12, and the second reference voltage generating circuit has a second zero temperature drift point in a second temperature range, the second temperature range is different from the first temperature range but has an intersection, and the second zero temperature drift point corresponds to the first voltage value. The control circuit 14 is used to control the first reference voltage generating circuit 12 and the second reference voltage generating circuit to start in different temperature ranges, so that the absolute value of the difference between the reference voltage value output in different temperature ranges and the first voltage value is less than a preset threshold.

[0060] In the embodiment of the present application, the bandgap reference circuit 1 is a circuit formed for segmented compensation of the original bandgap reference (i.e., the first reference voltage generating circuit 12). Specifically, the first reference voltage generating circuit 12 has a first zero temperature drift point within the first temperature range, and the zero temperature drift point corresponds to the first voltage value and the first temperature value. That is, for the first reference voltage generating circuit 12, at the first temperature value, the circuit has zero temperature drift and is not affected by temperature. Then, within the range of temperature values ​​(e.g., about 10°C) near the first temperature value (referred to as the stable range), the circuit is little affected by temperature, and the circuit can output a stable reference voltage. Then, within the first temperature range, at temperature values ​​outside the stable range, the temperature drift of the circuit is difficult to ignore, and accordingly, the reference voltage output by the circuit at this time fluctuates greatly.

[0061] Based on this, the present application forms a compensation circuit 13 on the basis of the first reference voltage generating circuit 12, and the compensation circuit includes at least one second reference voltage generating circuit, and the second reference voltage generating circuit has a different temperature range than the first reference voltage generating circuit 12, but they have an intersection with each other, and have a zero temperature drift point corresponding to the same voltage value (referred to as the second zero temperature drift point in order to distinguish it from the first zero temperature drift point). This means that the temperature range corresponding to the output of the stable reference voltage has become larger.

[0062] This is because the original first reference voltage generating circuit 12 can output a stable reference voltage in a temperature range near the first temperature value corresponding to the first zero temperature drift point, and now there is another reference voltage generating circuit with the same temperature drift point, which can also output a stable reference voltage in a temperature range near the second temperature value corresponding to the second zero temperature drift point. Then, if there is a second reference voltage generating circuit, there are two temperature ranges in which a stable reference voltage can be output; if there are two second reference voltage generating circuits, there are three temperature ranges in which a stable reference voltage can be output. Therefore, under the control of the control circuit 14, the first reference voltage generating circuit 12 and one of the at least one second reference voltage generating circuits can be controlled to be turned on in different temperature ranges, so that the reference voltage values ​​output in different temperature ranges are stable and have little fluctuation.

[0063] Here, in order to describe "stability" more clearly, it can be defined as: the absolute value of the difference between the reference voltage value output in different temperature ranges and the first voltage value (i.e., the voltage value corresponding to the first and second zero temperature drift points) is less than the preset threshold. Here, the preset threshold can be set according to specific needs. If ultra-high stability is required, the preset threshold can be set as small as possible; otherwise, the preset threshold can be appropriately increased.

[0064] From the above description, it can be seen that the compensation circuit 13 is generated based on the original bandgap reference (i.e., the first reference voltage generating circuit). Although it depends on the original bandgap reference, its compensation method is relative (because it is based on the original bandgap reference to expand the temperature compensation range), not absolute. Therefore, it can be applied to any bandgap reference circuit to be compensated, and has strong versatility and portability.

[0065] Therefore, the bandgap reference circuit 1 according to the embodiment of the present application is applicable to bandgap references of various structures and different temperature drift coefficients, and can achieve a good compensation effect, so that it can output a reference voltage with high stability.

[0066] The bandgap reference circuit 1 according to an embodiment of the present application is described below with reference to specific examples.

[0067] In one example, the first temperature range corresponding to the first reference voltage generating circuit 12 is -55°C to 125°C, and its temperature drift is 11.7ppm / °C (2.54mv). Figure 2 shown. Figure 2 In the figure, the horizontal axis represents temperature, the vertical axis represents the reference voltage output by the first reference voltage generating circuit 12, and the curve on the coordinate graph is the temperature drift curve of the first reference voltage generating circuit 12, which is a parabola. The vertex of the parabola is the zero temperature drift point of the first reference voltage generating circuit 12, and the corresponding temperature value is approximately 32°C, and the corresponding voltage value is approximately 1.2057V.

[0068] In an embodiment of the present application, a compensation circuit 13 can be obtained based on the first reference voltage generating circuit 12. In one example, the first reference voltage generating circuit 12 can be copied, and the copied first reference voltage generating circuit can be boosted after current is extracted to obtain a second reference voltage generating circuit in the compensation circuit 13. In another example, the first reference voltage generating circuit 12 can be copied, and the copied first reference voltage generating circuit can be stepped down after current is injected to obtain a second reference voltage generating circuit in the compensation circuit 13. In yet another example, it can be a combination of the above two examples. In order to distinguish each other, the second reference voltage generating circuit obtained by boosting the voltage after extracting the current is referred to as the third reference voltage generating circuit, and the second reference voltage generating circuit obtained by stepping down the voltage after injecting the current is referred to as the fourth reference voltage generating circuit. By obtaining the compensation circuit 13 by boosting the voltage after extracting the voltage and / or stepping down the voltage after injecting the current from the copied first reference voltage generating circuit 12, the horizontal migration of the zero temperature drift point can be conveniently achieved, thereby obtaining the same reference voltage value corresponding to different temperature ranges. The following is combined with Figures 3 to 5 to describe.

[0069] Figure 3 A schematic diagram of the first step in a method for obtaining a compensation circuit in a bandgap reference circuit according to an embodiment of the present application is shown. Figure 4 A schematic diagram showing a negative temperature coefficient current used in a method for obtaining a compensation circuit in a bandgap reference circuit according to an embodiment of the present application is shown. Figure 5 FIG. 2 is a schematic diagram showing the second step in the method for obtaining the compensation circuit in the bandgap reference circuit according to an embodiment of the present application. Figure 3 and Figure 5 In the example shown, the compensation circuit 13 includes two third reference voltage generating circuits and two fourth reference voltage generating circuits. It should be understood that this is only exemplary. In other examples, the compensation circuit 13 may include only the third reference voltage generating circuit, or only the fourth reference voltage generating circuit, or may include both. The number of the third reference voltage generating circuit and / or the fourth reference voltage generating circuit that can be included is arbitrary and can be set according to specific requirements. In the case of considering the circuit area, the larger the number, the more stable the reference voltage can be output.

[0070] like Figure 3 As shown, the black curve represents the temperature drift curve corresponding to the first reference voltage generating circuit 12, which is not shown here for simplicity. Figure 2 The entire curve shown only shows a section of the curve near the zero temperature drift point, so Figure 5 The temperature drift curves corresponding to the third and fourth reference voltage generating circuits shown do not intersect with the temperature drift curve corresponding to the first reference voltage generating circuit 12, but are roughly adjacent to each other, so that Figure 5 The effect shown reflects the effect of dividing the entire temperature range of the first reference voltage generating circuit 12 into five parts (the cross-section can be understood as being hidden).

[0071] Continue to refer Figure 3 , two different degrees of current extraction are performed on the first reference voltage generating circuit 12 (the extracted current is, for example, a negative temperature coefficient current (complementary to absolute temperature, inversely proportional to the absolute temperature, referred to as CTAT), such as Figure 4 As shown), two third reference voltage generating circuits are obtained, and their corresponding temperature drift curves are the two red curves at the lower left of the black curve. The temperatures corresponding to the zero temperature drift points of the two red curves are approximately -40°C and 5°C, respectively. Figure 5 , the circuits corresponding to the two red curves are boosted to two different degrees (for example, boosted by CTAT current compensation), so that their zero temperature drift points move to the upper left, achieving the same voltage value corresponding to the zero temperature drift point of the first reference voltage generating circuit 12, such as Figure 5 As shown (after the red curve rises to the upper left, its vertex maintains roughly the same vertical coordinate as the black curve).

[0072] Continue to refer Figure 3 , two different levels of current injection are performed on the first reference voltage generating circuit 12 (the injected current is, for example, CTAT current, such as Figure 4 As shown), two fourth reference voltage generating circuits are obtained, and their corresponding temperature drift curves are the two green curves on the upper right of the black curve. The temperatures corresponding to the zero temperature drift points of the two green curves are approximately 72°C and 109°C, respectively. Figure 5 , the circuits corresponding to the two green curves are subjected to two different degrees of voltage reduction (for example, voltage reduction by positive temperature coefficient (proportional to absolute temperature, proportional to absolute temperature, referred to as PATA) current), so that their zero temperature drift points move to the lower right, and the same voltage value corresponding to the zero temperature drift point of the first reference voltage generating circuit 12 is achieved, such as Figure 5 As shown (after the green curve drops to the lower right, its vertex maintains roughly the same vertical coordinate as the black curve).

[0073] At this point, the entire bandgap reference circuit includes 5 bandgap references, namely reference 1 to reference 5, where reference 3 corresponds to the original first reference voltage generating circuit 12, reference 1 and reference 2 correspond to two third reference voltage generating circuits, and reference 4 and reference 5 correspond to two fourth reference voltage generating circuits. These 5 bandgap references cover the entire range of -55°C to 125°C and have 5 zero temperature drift points, and the voltage reference values ​​of the 5 zero temperature drift points are consistent.

[0074] Based on this, the control unit 14 can be used to control: when -55℃ to -13℃, reference 1 is turned on, and the reference voltage output at this time is on the temperature drift curve corresponding to reference 1, and its voltage value must be near the zero temperature drift point corresponding to -40℃; when -13℃ to 20℃, reference 2 is turned on, and the reference voltage output at this time is on the temperature drift curve corresponding to reference 2, and its voltage value must be near the zero temperature drift point corresponding to 5℃; when 20℃ to 54℃, reference 3 is turned on, and the reference voltage output at this time is on the temperature drift curve corresponding to reference 3, and its voltage value must be near the zero temperature drift point corresponding to 32℃; when 54℃ to 97℃, reference 4 is turned on, and the reference voltage output at this time is on the temperature drift curve corresponding to reference 4, and its voltage value must be near the zero temperature drift point corresponding to 72℃; when 97℃ to 125℃, reference 5 is turned on, and the reference voltage output at this time is on the temperature drift curve corresponding to reference 5, and its voltage value must be near the zero temperature drift point corresponding to 109℃. The simulation effect diagram is as shown in the figure Figure 6 As shown. Figure 1 Compared with the temperature drift curve shown in the figure, the temperature drift curve of the new bandgap reference circuit 1 has very small fluctuation of the output reference voltage in the whole temperature range (-55℃ to 125℃), and the temperature drift is reduced from 11.7ppm / ℃ (2.54mv) to 0.56ppm / ℃ (117uv).

[0075] Combine the following Figure 7 and Figure 8 The circuit diagram for implementing the above example is described below. Figure 7 An exemplary circuit diagram of a start-up circuit 11 , a first reference voltage generating circuit 12 , and a compensation circuit 13 in a bandgap reference circuit 1 according to an embodiment of the present application is shown. Figure 8 FIG. 1 shows an exemplary circuit diagram of the control circuit 14 in the bandgap reference circuit 1 according to an embodiment of the present application. It should be noted that the compensation circuit 13 is formed based on the first reference voltage generating circuit 12, and the control circuit is set based on the number of reference voltage generating circuits in the compensation circuit 13. Figure 7 and Figure 8 The figure is only an example. When the first reference voltage generating circuit 12 is another circuit and the number of reference voltage generating circuits in the compensation circuit 13 is another number, Figure 7 and Figure 8The circuit can be adaptively modified to implement the functions described in this application.

[0076] like Figure 7 As shown, the startup circuit includes transistors M1, M2 and M3. Among them, the gate of M1 is connected to the control signal V4, the source is connected to the power supply VDD, and the drain is connected to the drain of M2; the source of M2 is grounded, and the gate is connected to VDD; the gate of M3 is connected to the drain of M1, the source is connected to VDD, and the drain is connected to the control signal V3.

[0077] The bandgap reference 3 is the first reference voltage generating circuit 12 mentioned above, which includes PMOS tubes M13, M15, M17, M18, NMOS tubes M14, M16, transistors Q6, Q7, Q8 and resistors R11, R12. Among them, the gates of M13 and M15 are connected to the control signal V4, the sources of the two are connected to VDD, and the drains of the two are connected to the drains of M14 and M16 respectively. The gates of M14 and M16 are connected to the control signal V3; the source of M14 is connected to the emitter of Q6 through R11, and the base and collector of Q6 are grounded; the source of M16 is connected to the emitter of Q7, and the base and collector of Q7 are grounded; the source of M16 is also connected to the gate of M17; the gate of M17 is connected to the control signal V1, the source is connected to VDD, and the drain is connected to the source of M18; the gate of M18 is connected to the control signal V2, the drain is connected to the emitter of Q8 through R12, and the base and collector of Q8 are grounded. The drain of M18 outputs the third reference voltage Vref3.

[0078] Bandgap reference 1 and bandgap reference 2 are the third reference voltage generating circuits corresponding to the two red curves mentioned above. Bandgap reference 1 includes PMOS tubes M4, M5, M6, transistors Q1, Q2 and resistors R1, R2, R3, R4. The gate of M4 is connected to the control signal V1, the source is connected to VDD, and the drain is connected to the source of M5; the gate of M5 is connected to the control signal V2, and the drain is connected to the emitter of Q1 through R1; the base and collector of Q1 are grounded; the gate of M6 is connected to the gate of M10 in bandgap reference 2, the source of M6 is connected to VDD, and the drain is connected to R3 and R4 and then grounded; the collector of Q2 is connected to VDD, the emitter is grounded through R2, and the base is connected to the drain of M5 and between R3 and R4. The drain of M6 outputs the first reference voltage Vref1. M5, R3, and R4 are the CTAT current compensation circuit of bandgap reference 1.

[0079] Bandgap reference 2 includes PMOS tubes M10, M11, M12, transistors Q4, Q5, and resistors R7, R8, R9, R10. Among them, the gate of M11 is connected to the control signal V1, the source is connected to VDD, and the drain is connected to the source of M12; the gate of M12 is connected to the control signal V2, and the drain is connected to the emitter of Q5 through R10; the base and collector of Q5 are grounded; the gate of M10 is connected to the gate of M6 in bandgap reference 1, the source of M10 is connected to VDD, and the drain is connected to R7 and R8 and then grounded; the collector of Q4 is connected to VDD, the emitter is grounded through R9, and the base is connected to the drain of M12 and between R7 and R8. The drain of M10 outputs the second reference voltage Vref2. Among them, M10, R7, and R8 are the CTAT current compensation circuit of bandgap reference 2.

[0080] In order to realize current extraction, the circuit also includes a CTAT current generating circuit. Figure 7 As shown, the CTAT current generating circuit includes transistors M7, M8, M9, Q3 and resistors R5 and R6. Among them, the gate of M7 is connected to the gate of M8, the source is connected to VDD, and the drain is grounded through R5; the source of M8 is connected to VDD, and the drain is connected to its gate and the drain of M9; the gate of M9 is connected to the drain of M7, and the source is grounded; one end of R6 is connected to VDD, and the other end is connected to the collector of Q3, the emitter of Q3 is grounded, and the base is connected to the non-grounded end of R5.

[0081] Bandgap reference 4 and bandgap reference 5 are the fourth reference voltage generating circuits corresponding to the two green curves mentioned above. Bandgap reference 4 includes PMOS tubes M19 and M20, transistors Q9 and Q10, and resistors R13, R14, R15, and R16. The gate of M19 is connected to the control signal V1, the source is connected to VDD, and the drain is connected to the source of M20; the gate of M20 is connected to the control signal V2, and the drain is connected to the emitter of Q9 through R13; the base and collector of Q9 are grounded; one end of R14 is connected to VDD, and the other end is connected to the emitter of Q10; the collector of Q10 is grounded, and the base is connected to the drain of M20 and one end of R15, and R15 and the other end are grounded through R16. The other end of R15 outputs the fourth reference voltage Vref4.

[0082] The bandgap reference 5 includes PMOS tubes M21 and M22, transistors Q11 and Q12, and resistors R17, R18, R19, and R20. The gate of M21 is connected to the control signal V1, the source is connected to VDD, and the drain is connected to the source of M22; the gate of M22 is connected to the control signal V2, and the drain is connected to the emitter of Q11 through R20; the base and collector of Q11 are grounded; one end of R19 is connected to VDD, and the other end is connected to the emitter of Q12; the collector of Q12 is grounded, and the base is connected to the drain of M22 and one end of R17, and R17 and the other end are grounded through R18. The other end of R17 outputs the fifth reference voltage Vref5.

[0083] like Figure 8 As shown, the control circuit 14 is implemented as a digital programming circuit, so that it is a programmable circuit. Specifically, the digital programming circuit includes: a first over-temperature protector (Over-Temperature Protection, referred to as OTP), the output end of the first over-temperature protector is connected to the second input end of the first NAND gate, and is connected to the first input end of the second NAND gate, the third NAND gate, the fourth NAND gate and the fifth NAND gate via an inverter; a second over-temperature protector, the output end of the second over-temperature protector is connected to the second input end of the second NAND gate, and is connected to the second input end of the third NAND gate, the fourth NAND gate and the fifth NAND gate via an inverter; a third over-temperature protector, the output end of the third over-temperature protector is connected to the third input end of the third NAND gate, and is connected to the third input end of the fourth NAND gate and the fifth NAND gate via an inverter; a fourth over-temperature protector, the output end of the fourth over-temperature protector is connected to the fourth input end of the fourth NAND gate, and is connected to the fifth NAND gate via an inverter. The fourth input terminal of the gate; the first input terminal of the first NAND gate is connected to the power supply, the output terminal of the first NAND gate is connected to the gate of the first transistor through an inverter, and the drain of the first transistor outputs the fifth reference voltage Vref5; the output terminal of the second NAND gate is connected to the gate of the second transistor through an inverter, and the drain of the second transistor outputs the fourth reference voltage Vref4; the output terminal of the third NAND gate is connected to the gate of the third transistor through an inverter, and the drain of the third transistor outputs the third reference voltage Vref3; the output terminal of the fourth NAND gate is connected to the gate of the fourth transistor through an inverter, and the drain of the fourth transistor outputs the second reference voltage Vref2; the output terminal of the fifth NAND gate is connected to the gate of the fifth transistor through an inverter, and the drain of the fifth transistor outputs the first reference voltage Vref1.

[0084] Among them, the first over-temperature protector corresponds to the first temperature threshold; the second over-temperature protector corresponds to the second temperature threshold; the third over-temperature protector corresponds to the third temperature threshold; the fourth over-temperature protector corresponds to the fourth temperature threshold; wherein the first temperature threshold is greater than the second temperature threshold, the second temperature threshold is greater than the third temperature threshold, and the third temperature threshold is greater than the fourth temperature threshold. In the example described above, the first temperature threshold corresponding to the first over-temperature protector can be 97°C; the first temperature threshold corresponding to the second over-temperature protector can be 54°C; the first temperature threshold corresponding to the third over-temperature protector can be 20°C; and the first temperature threshold corresponding to the fourth over-temperature protector can be -13°C.

[0085] In this example, Figure 8 The four-temperature digital conversion circuit shown is composed of four over-temperature switches with over-temperature switching points at -13°C, 20°C, 54°C, and 97°C, two dual-input NAND gates, one three-input NAND gate, two four-input NAND gates, five NOT gates, and five NOMS tubes. In this embodiment, the four-temperature switching circuit is used to realize the selection of the bandgap reference, and a switching mode with priority is realized by using four circuits with over-temperature switching points at -13°C, 20°C, 54°C, and 97°C and several control circuits. When the over-temperature switching point is 97°C, the over-temperature switching circuit will turn off the other three over-temperature switching circuits when it outputs a high level, and selects the reference 5 at the same time, and so on, as described above.

[0086] Based on the above description, the bandgap reference circuit according to the embodiment of the present application uses the method of extracting or injecting current to change the zero temperature drift point, and then performs segmented current compensation, and then uses the temperature switching circuit (control circuit) to select the bandgap reference. The circuit structure is simple, the switching mode is stable and adjustable, and the applicability to different bandgap references is strong, which is very suitable for voltage-sensitive and low-voltage scenarios. In addition, the bandgap reference circuit according to the embodiment of the present application is portable, and bandgap references with different structures and different temperature drift coefficients can be compensated. The accuracy of the digital programming circuit can be increased or reduced according to the actual application scenario to obtain bandgap reference circuits with different stabilities, and a compromise is made between the circuit area and temperature stability.

[0087] According to another aspect of the present application, a chip is further provided, the chip comprising the above-mentioned bandgap reference circuit according to the embodiment of the present application.

[0088] According to another aspect of the present application, an electronic device is provided, which includes the above-mentioned chip.

[0089] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present application to this. Those of ordinary skill in the art may make various changes and modifications therein without departing from the scope and spirit of the present application. All these changes and modifications are intended to be included within the scope of the present application as required by the appended claims.

[0090] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0091] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0092] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0093] Similarly, it should be understood that in order to streamline the present application and help understand one or more of the various aspects, in the description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present application should not be interpreted as reflecting the following intention: the claimed application requires more features than the features clearly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with features less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby explicitly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present application.

[0094] It will be understood by those skilled in the art that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0095] In addition, those skilled in the art will appreciate that, although some embodiments herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims, any one of the claimed embodiments may be used in any combination.

[0096] The various component embodiments of the present application can be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. It should be understood by those skilled in the art that a microprocessor or digital signal processor (DSP) can be used in practice to implement some or all of the functions of some modules in the article analysis device according to the embodiment of the present application. The present application can also be implemented as a device program (e.g., computer program and computer program product) for executing part or all of the methods described herein. Such a program implementing the present application can be stored on a computer-readable medium, or can have the form of one or more signals. Such a signal can be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0097] It should be noted that the above embodiments illustrate the present application rather than limit the present application, and that those skilled in the art may design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets should not be constructed as a limitation to the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of multiple such elements. The present application may be implemented by means of hardware including several different elements and by means of a suitably programmed computer. In a unit claim that lists several devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.

[0098] The above is only a specific implementation method or description of a specific implementation method of the present application, and the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. The protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A bandgap reference circuit, characterized in that: The bandgap reference circuit comprises: A startup circuit, used for starting the entire circuit of the bandgap reference circuit; a first reference voltage generating circuit, wherein the first reference voltage generating circuit has a first zero temperature drift point within a first temperature range, and the first zero temperature drift point corresponds to a first voltage value; a compensation circuit, comprising at least one second reference voltage generating circuit formed based on the first reference voltage generating circuit, the second reference voltage generating circuit having a second zero temperature drift point within a second temperature range, the second temperature range being different from but intersecting with the first temperature range, and the second zero temperature drift point corresponding to the first voltage value; The control circuit is used to control one of the first reference voltage generating circuit and the second reference voltage generating circuit to be turned on within different temperature ranges so that the absolute value of the difference between the reference voltage value output within the different temperature ranges and the first voltage value is less than a preset threshold.

2. The bandgap reference circuit according to claim 1, characterized in that: The second reference voltage generating circuit comprises: A third reference voltage generating circuit; and / or a fourth reference voltage generating circuit; The third reference voltage generating circuit is formed by duplicating the first reference voltage generating circuit, extracting current from the duplicated first reference voltage generating circuit and then boosting the voltage to obtain the third reference voltage generating circuit; The fourth reference voltage generating circuit is formed by duplicating the first reference voltage generating circuit, injecting current into the duplicated first reference voltage generating circuit and then reducing the voltage to obtain the fourth reference voltage generating circuit.

3. The bandgap reference circuit according to claim 2, characterized in that: When the second reference voltage generating circuit includes the third reference voltage generating circuit, the compensation circuit further includes: The current generating circuit is used to realize the function of extracting current.

4. The bandgap reference circuit according to claim 3, characterized in that: The current generated by the current generating circuit is a negative temperature coefficient current.

5. The bandgap reference circuit according to claim 2, characterized in that: The first reference voltage generating circuit outputs a third reference voltage; The second reference voltage generating circuit comprises: Two third reference voltage generating circuits, one of which outputs a first reference voltage and the other outputs a second reference voltage; The two fourth reference voltage generating circuits, one of which outputs a fourth reference voltage, and the other of which outputs a fifth reference voltage.

6. The bandgap reference circuit according to claim 5, characterized in that: The control circuit includes a digital programming circuit.

7. The bandgap reference circuit according to claim 6, characterized in that: The digital programming circuit comprises: A first over-temperature protector, wherein the output end of the first over-temperature protector is connected to the second input end of the first NAND gate, and is connected to the first input ends of the second NAND gate, the third NAND gate, the fourth NAND gate and the fifth NAND gate via an inverter; A second over-temperature protector, wherein the output end of the second over-temperature protector is connected to the second input end of the second NAND gate, and is connected to the second input ends of the third NAND gate, the fourth NAND gate and the fifth NAND gate respectively via an inverter; a third over-temperature protector, wherein the output end of the third over-temperature protector is connected to the third input end of the third NAND gate, and is connected to the third input ends of the fourth NAND gate and the fifth NAND gate respectively via an inverter; a fourth over-temperature protector, wherein the output end of the fourth over-temperature protector is connected to the fourth input end of the fourth NAND gate, and is connected to the fourth input end of the fifth NAND gate via an inverter; The first input terminal of the first NAND gate is connected to a power supply, the output terminal of the first NAND gate is connected to the gate of the first transistor via an inverter, and the drain of the first transistor outputs the fifth reference voltage; The output terminal of the second NAND gate is connected to the gate of the second transistor through an inverter, and the drain of the second transistor outputs the fourth reference voltage; The output end of the third NAND gate is connected to the gate of the third transistor through an inverter, and the drain of the third transistor outputs the third reference voltage; The output end of the fourth NAND gate is connected to the gate of the fourth transistor through an inverter, and the drain of the fourth transistor outputs the second reference voltage; The output end of the fifth NAND gate is connected to the gate of the fifth transistor through an inverter, and the drain of the fifth transistor outputs the first reference voltage.

8. The bandgap reference circuit according to claim 7, characterized in that: The first over-temperature protector corresponds to a first temperature threshold; The second over-temperature protector corresponds to a second temperature threshold; The third over-temperature protector corresponds to a third temperature threshold; The fourth over-temperature protector corresponds to a fourth temperature threshold; The first temperature threshold is greater than the second temperature threshold, the second temperature threshold is greater than the third temperature threshold, and the third temperature threshold is greater than the fourth temperature threshold.

9. A chip, characterized in that: The chip comprises the bandgap reference circuit according to any one of claims 1-8.

10. An electronic device, characterized in that: The electronic device comprises the chip according to claim 9.

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