Data read-write method, server and storage medium
By introducing shared memory and DMA controllers into the server, the problem of frequent switching of user states, kernel states and multiple data copies during data reading and writing in the prior art is solved, and zero CPU copy is achieved, reducing response delays and improving data reading and writing efficiency and server performance.
Patent Information
- Application Number
- CN202311288843.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-28
- Publication Date
- 2025-03-28
AI Technical Summary
When reading and writing data in a server, it is necessary to frequently switch between user state and kernel state, and copy data multiple times through the CPU, resulting in heavy load on the CPU and memory, delayed response time, affecting data reading and writing efficiency and server performance.
By introducing shared memory into the server, allowing the kernel-state and user-state shared memory space, the application server can directly read and write data in the shared memory, avoiding data copying between kernel-state and user-state. At the same time, the DMA controller is responsible for data transmission and reduces the burden on the CPU.
The CPU zero copy of data is realized, which reduces response delay, improves the efficiency of data reading and writing and server performance.
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Figure CN119718709A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of computer technology, and in particular to a data reading and writing method, a server and a storage medium. Background Art
[0002] In the server, the application server runs in user mode. When the application server needs to perform data processing tasks, it cannot directly access the data in external hardware such as disks and network cards, but needs to initiate read and write requests in the kernel state, which obtains the data in the external hardware and returns it to the application server.
[0003] In the related art, when the application server needs to send data in the local disk to the network card, the application server first initiates a read and write request for the local disk, and the direct memory access (DMA) controller first copies the data in the local disk to the read buffer in the kernel state, and then the central processing unit (CPU) copies the data from the read buffer to the buffer of the application server in the user state. The application server then initiates a read and write request to the network card, and the CPU copies the data from the buffer of the application server to the socket buffer in the kernel state, and then the DMA controller copies the data from the socket buffer to the network card, and finally the network card sends the data.
[0004] However, during the above data reading and writing process, multiple switches between user mode and kernel mode and multiple data copies executed by the CPU occur. When the amount of data to be copied is large, the CPU and memory are heavily loaded and the response delay is long, affecting the efficiency of data reading and writing and the performance of the server. Summary of the invention
[0005] The embodiment of the present application provides a data reading and writing method, a server and a storage medium, which can realize zero copy of data by CPU during data reading and writing, reduce response delay, improve data reading and writing efficiency and enhance server performance. The technical solution is as follows.
[0006] In a first aspect, a data reading and writing method is provided, which is applied to a server, wherein the server includes a DMA controller, an application server, and a shared memory, wherein the application server runs in a user state, and both the user state and the kernel state can access the shared memory, and the method includes:
[0007] When there is a data processing task for target data, the application server sends a first read-write request to the DMA controller, so that the DMA controller obtains the target data and writes the target data into the shared memory. The application server obtains the data from the shared memory and then sends a second read-write request to the DMA controller, so that the DMA controller performs the data processing task based on the target data in the shared memory.
[0008] The data processing task may be data transmission between network cards, between a network card and a disk, or between disks.
[0009] In the above method, the kernel state and the user state share a shared memory, and the shared memory is mapped from the kernel state to the user state, that is, the application server can directly perform operations such as reading and writing data on the shared memory without repeatedly copying data between the buffer in the kernel state and the buffer in the application server, which can improve the processing efficiency of data processing tasks, improve data transmission performance and reduce memory latency.
[0010] Optionally, the shared memory satisfies a non-uniform memory access architecture.
[0011] Among them, non-uniform memory access architecture (NUMA) is an architectural model about how multiple CPUs access memory. NUMA divides a computer into multiple nodes. Each node has multiple CPUs. A shared memory controller is used inside the node. The nodes are connected and information is exchanged through interconnect modules. Therefore, all the memory of a node is the same for all CPUs in the node, but different for all CPUs in other nodes. Therefore, each CPU can access the entire system memory, but the memory access speed of the local node is the fastest (without going through the interconnect module), and the memory access speed of non-local nodes is slower (needs to go through the interconnect module). That is, the speed at which the CPU accesses the memory is related to the distance between the nodes.
[0012] In the above method, the shared memory satisfies the non-uniform memory access architecture, that is, the shared memory has NUMA affinity, therefore, it is possible to avoid the CPU from accessing the shared memory across NUMA nodes, thereby improving the efficiency of the CPU accessing the shared memory.
[0013] Optionally, the DMA controller obtains the target data in response to the first read / write request, and writes the target data into the shared memory, including:
[0014] The DMA controller obtains the target data in response to the first read / write request, and writes the target data into a first memory block in the shared memory.
[0015] In the above method, for a read or write request, the kernel state allocates a block of memory in the shared memory. After the data is read or written, the kernel state only needs to release a memory block without releasing the entire shared memory. That is, the shared memory can be reused by different processes after being allocated once, and there is no need to allocate shared memory and memory mapping every time a read or write request needs to be processed. This can save server kernel resources and improve the processing efficiency of data processing tasks.
[0016] Optionally, the first memory block is a clean memory.
[0017] Among them, clean memory refers to memory that has not been written.
[0018] In the above method, since the first memory block is a clean memory, data can be directly written without initialization before writing the data, thereby improving the processing efficiency of the data processing task.
[0019] Optionally, the application server obtains target data from the shared memory, including:
[0020] The application server obtains the target data from the shared memory through direct memory access.
[0021] Optionally, the kernel state provides a first system call, the first system call instructs to obtain data and write the obtained data into the shared memory, and the sending of the first read / write request to the DMA controller includes:
[0022] The application server sends a first read / write request to the DMA controller through the first system call.
[0023] Among them, the system call is a program interface set up by the operating system specifically for user applications, and is the way for user applications to obtain operating system services.
[0024] Optionally, the first system call is compatible with a portable operating system interface.
[0025] Among them, portable operating system interface of unix (POSIX): in order to run software on the Unix operating system, it is necessary to define an application programming interface (API). POSIX is the general term for a series of interrelated standards that define API.
[0026] In the above method, since the first system call is compatible with POSIX, there is no need to modify the API of the application server. The application server can call the newly defined system call through the existing interface, which can save the development cost and migration cost of the application server.
[0027] Optionally, the kernel state provides a second system call, the second system call instructs to perform a data processing task based on the data in the shared memory, and the sending of the second read / write request to the DMA controller includes:
[0028] The application server sends the second read / write request to the DMA controller through the second system call.
[0029] Optionally, the second system call is compatible with a portable operating system interface.
[0030] Optionally, the method further includes: when the capacity of the released memory in the shared memory reaches a preset capacity, the kernel state initializes the released memory.
[0031] In the above method, since the released memory is reset to zero in batches, the memory block allocated to the application server is clean memory, and data can be written directly without initialization operation before writing data, thereby improving the processing efficiency of data processing tasks.
[0032] Optionally, the data processing task indicates obtaining the target data from the network card and writing the target data to a disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a disk;
[0033] Or, the data processing task indicates obtaining the target data from the network card and sending the target data through the network card, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into the network card, and sending the target data by the network card;
[0034] Or, the data processing task indicates obtaining the target data from the network card, writing the target data to the disk, and sending the target data through the network card, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
[0035] Optionally, the data processing task indicates obtaining the target data from a disk and writing the target data to another disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk;
[0036] Or, the data processing task indicates obtaining the target data from a disk and writing the target data to another disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a network card, and the network card sends the target data;
[0037] Or, the data processing task indicates obtaining the target data from the disk, writing the target data to another disk, and sending the target data through a network card, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
[0038] In a second aspect, a data reading and writing method is provided, the method comprising:
[0039] In response to a first read / write request, the target data is obtained and written into a shared memory in the server. The first read / write request is sent by an application server in the server in response to a data processing task for the target data. In response to a second read / write request, the data processing task is performed based on the target data in the shared memory. The second read / write request is sent by the application server after obtaining the target data from the shared memory.
[0040] Optionally, the shared memory satisfies a non-uniform memory access architecture.
[0041] Optionally, in response to the first read / write request, acquiring target data, and writing the target data into the shared memory includes:
[0042] In response to the first read / write request, the target data is acquired, and the target data is written into a first memory block in the shared memory.
[0043] Optionally, the first memory block is a clean memory.
[0044] Optionally, the data processing task indicates obtaining the target data from the network card and writing the target data to a disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a disk;
[0045] or,
[0046] The data processing task indicates obtaining the target data from the network card and sending the target data through the network card, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into the network card, and sending the target data by the network card;
[0047] or,
[0048] The data processing task indicates obtaining the target data from the network card, writing the target data to the disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
[0049] Optionally, the data processing task indicates obtaining the target data from a disk and writing the target data to another disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk;
[0050] or,
[0051] The data processing task indicates obtaining the target data from a disk and writing the target data into another disk, and executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into a network card, and the network card sends the target data;
[0052] or,
[0053] The data processing task indicates obtaining the target data from the disk, writing the target data to another disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
[0054] In a third aspect, a data reading and writing device is provided, the device comprising at least one functional module, the at least one functional module being used to execute the data reading and writing method provided in the aforementioned second aspect or any possible implementation manner of the second aspect.
[0055] In a fourth aspect, a server is provided, comprising a processor, a memory and a DMA controller, the memory storing program code, and the processor being used to execute the program code, so that the server executes the data reading and writing method provided by the first aspect or any possible implementation method of the first aspect.
[0056] In a fifth aspect, a DMA controller is provided, which is used to execute the data reading and writing method provided by the second aspect or any possible implementation of the second aspect.
[0057] In the sixth aspect, a storage medium is provided, which is used to store at least one piece of program code, and the at least one piece of program code is used to execute the data reading and writing method provided by the first aspect, any possible implementation of the first aspect, the second aspect, or any possible implementation of the second aspect.
[0058] Based on the implementations provided in the above aspects, this application can also be further combined to provide more implementations. BRIEF DESCRIPTION OF THE DRAWINGS
[0059] Figure 1 It is a structural diagram of a server provided in an embodiment of the present application;
[0060] Figure 2 It is a schematic diagram of a zero-copy architecture between kernel state and user state provided in an embodiment of the present application;
[0061] Figure 3 is a flow chart of a data reading and writing method provided in an embodiment of the present application;
[0062] Figure 4 This is a schematic diagram of a process for storing target data in three copies provided by an embodiment of the present application;
[0063] Figure 5 It is a flow chart of sending target data to a server in a network provided by an embodiment of the present application;
[0064] Figure 6 This is a schematic diagram of a process for storing target data in three copies provided by an embodiment of the present application;
[0065] Figure 7 This is a schematic diagram of a process for storing target data in three copies provided by an embodiment of the present application;
[0066] Figure 8 It is a schematic diagram of a process of managing shared memory based on a buddy algorithm provided in an embodiment of the present application;
[0067] Fig. 9 It is a structural schematic diagram of a data reading and writing device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0068] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.
[0069] In order to facilitate understanding of the contents of the embodiments of the present application, several technical terms involved in the embodiments of the present application are first introduced below.
[0070] User space: The space where user applications run that is independent of the operating system.
[0071] Kernel space: The space where operating system-related components run.
[0072] System call (syscall): A program interface set up by the operating system specifically for user applications. It is the way for user applications to obtain operating system services.
[0073] Portable Operating System Interface (POSIX): In order to run software on the Unix operating system, an API needs to be defined. POSIX is the general term for a series of interrelated standards that define APIs.
[0074] Memory mapping (mmap): A memory mapping method that maps a file or other object to the address space of a process, realizing a one-to-one mapping relationship between the file disk address and a virtual address in the process virtual address space. After realizing such a mapping relationship, this section of memory can be read and written using a pointer, and the operating system will automatically write the data back to the address corresponding to the file on the disk.
[0075] Non-Uniform Memory Access Architecture (NUMA): is an architectural model about how multiple CPUs access memory. NUMA divides a computer into multiple nodes. Each node has multiple CPUs. A shared memory controller is used inside the node. The nodes are connected and exchange information through interconnect modules. Therefore, all the memory of a node is the same for all the CPUs in the node, but different for all the CPUs in other nodes. Therefore, each CPU can access the entire system memory, but the memory access speed of the local node is the fastest (without going through the interconnect module), and the memory access speed of non-local nodes is slower (needs to go through the interconnect module). That is, the speed at which the CPU accesses the memory is related to the distance between the nodes.
[0076] NUMA affinity: Prevents the CPU from accessing memory across NUMA nodes.
[0077] Universal block layer: used to provide a unified interface for file system implementers to use without having to worry about the differences between different device drivers, so that the implemented file system can be used for any block device.
[0078] Network protocol stack: responsible for handling the transmission and processing of network data packets between different protocol layers, used for operations such as protocol parsing and data packet forwarding.
[0079] Dirty memory: Memory that has been written to by user applications.
[0080] Clean memory: Memory that has not been written to yet.
[0081] Buddy algorithm: merges two free memory blocks with the same capacity and consecutive physical page numbers. The two memory blocks involved in the merger are called buddies. When allocating memory, if there is no memory block with the right capacity, the merged memory block will be split in half until a memory block of the right capacity is separated. When releasing memory, the memory block adjacent to the released memory block will be searched. If it has been released, the two memory blocks will be merged, and the process will be repeated recursively until they can no longer be merged.
[0082] The following introduces the structure of a server provided in an embodiment of the present application.
[0083] Figure 1 This is a schematic diagram of the structure of a server provided by this application, such as Figure 1 As shown, the server 100 can be implemented by a general bus architecture. The server 100 includes at least one processor 101 , a communication bus 102 , a memory 103 , a DMA controller 104 , at least one communication interface 105 , a network card 106 , and a disk 107 .
[0084] The processor 101 is, for example, a general-purpose central processing unit (CPU), a network processor (NP), a graphics processing unit (GPU), a neural-network processing unit (NPU), a data processing unit (DPU), a microprocessor, or one or more integrated circuits for implementing the solution of the present application. For example, the processor 101 includes an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The PLD is, for example, a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.
[0085] The communication bus 102 is used to transmit information between the various components of the server 100. The communication bus 102 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 1 The fact that only one line is used in the diagram does not mean that there is only one bus or only one type of bus.
[0086] The memory 103 may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, or a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by the server, but is not limited thereto. The memory 103 may exist independently and be connected to the processor via a communication bus. The memory 103 may also be integrated with the processor 101. Among them, the memory 103 includes a user state memory and a kernel state memory, and the kernel state memory includes a shared memory, and both the user state and the memory state can access the shared memory.
[0087] The DMA controller 104 is used to transfer data between the memory and an external device (eg, a network card 106 or a disk 106, etc.), and the data transfer does not require the use of CPU resources.
[0088] The communication interface 105 uses any transceiver-like device to communicate with other devices or communication networks, for example, to communicate with the network card 106 and the disk 107 through the communication interface 105. The communication interface 105 includes a wired communication interface and may also include a wireless communication interface. Among them, the wired communication interface may be, for example, an Ethernet interface. The Ethernet interface may be an optical interface, an electrical interface or a combination thereof. The wireless communication interface may be a wireless local area network (WLAN) interface, a cellular network communication interface or a combination thereof, etc.
[0089] Exemplarily, an application server is running on the server 100, and the application server is used to respond to a data processing task for target data and send a data read and write request for the target data to the DMA controller 104 through a system call to execute the data processing task.
[0090] The network card 106 is used to connect the server 100 to the network and to transmit data between the server 100 and the network. The number of the network card 106 can be one or more, and the embodiment of the present application does not limit this. The network card driver is an interface for the processor 101 to control and use the network card 106. In some embodiments, the network card 106 and the processor 101 communicate based on a network protocol stack, which is used to process the transmission and processing of network data packets between different protocol layers, and to perform operations such as protocol parsing and forwarding on network data packets.
[0091] The disk 107 is used to store data and program codes, etc. The number of the disk 107 can be one or more, and the embodiment of the present application does not limit this. The disk drive is used to read and write data to the disk 107. In some embodiments, the disk 107 and the processor 101 communicate based on a common block layer, and the common block layer is used to provide a unified interface for file system implementers to use without having to worry about the differences between different device drivers, so that the implemented file system can be used for any block device.
[0092] As an embodiment, the processor may include one or more CPUs.
[0093] As an embodiment, the server 100 may include multiple processors, each of which may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor here may refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).
[0094] As an embodiment, the server 100 may further include an output device and an input device. The output device communicates with the processor and can display information in a variety of ways. For example, the output device may be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector. The input device communicates with the processor and can receive user input in a variety of ways. For example, the input device may be a mouse, a keyboard, a touch screen device, or a sensor device.
[0095] In some embodiments, the memory is used to store the program code for executing the solution of the present application, and the processor can execute the program code stored in the memory. That is, the server 100 can implement the data reading and writing method provided by the method embodiment through the processor and the program code in the memory.
[0096] Based on the above Figure 1In the implementation environment shown, the present application provides a zero-copy framework between kernel state and user state. Figure 2 is a schematic diagram of a zero-copy architecture between kernel state and user state provided by an embodiment of the present application, such as Figure 2 As shown, the zero-copy architecture is applied to the server. In the zero-copy architecture, the kernel state and the user state share a shared memory, which is managed by the kernel state and mapped (mmap) from the kernel state to the user state, that is, the application server can directly read and write data to the shared memory through direct memory access, without repeatedly copying data between the buffer in the kernel state and the buffer in the application server. In order to achieve zero copy of data between the kernel state and the user state, the zero-copy architecture newly defines a first system call and a second system call, wherein the first system call indicates to obtain data and write the obtained data to the shared memory. , the second system call indicates to perform data processing tasks based on the data in the shared memory. The application server can send read and write requests to the DMA controller through the first system call and the second system call, and then the DMA controller completes the corresponding data transmission work, without the need for the CPU to complete the data transmission, which can reduce the burden on the CPU; further, since the above-mentioned newly defined first system call and second system call are compatible with the Portable Operating System Interface (POSIX), there is no need to modify the API of the application server. The application server can call the above-mentioned newly defined system call through the existing interface, which can save the development cost and migration cost of the application server.
[0097] The above zero-copy architecture can be applied to the application scenario of data reading and writing. In this scenario, when there is a data processing task for target data, the application server sends a first read-write request to the DMA controller, so that the DMA controller obtains the target data and writes the target data into the shared memory. The application server obtains data from the shared memory and then sends a second read-write request to the DMA controller, so that the DMA controller performs the data processing task based on the target data in the shared memory. According to different data processing tasks, the specific process of the DMA controller performing the data processing task based on the target data in the shared memory is also different. The specific execution process of different data processing tasks will be illustrated below.
[0098] The first case: the data processing task indicates obtaining the target data from the network card and writing the target data to the disk. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk;
[0099] The second case: the data processing task indicates obtaining the target data from the network card and sending the target data through the network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into the network card, and sending the target data by the network card.
[0100] The third case: the data processing task indicates obtaining the target data from the network card, writing the target data to the disk, and sending the target data through the network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
[0101] A fourth situation: the data processing task indicates obtaining the target data from a disk and writing the target data into another disk. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into another disk.
[0102] The fifth case: the data processing task indicates obtaining the target data from a disk and writing the target data into another disk. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into a network card, and the network card sends the target data.
[0103] The sixth case: the data processing task indicates obtaining the target data from the disk, writing the target data to another disk, and sending the target data through the network card. Executing the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
[0104] It should be noted that the above six situations are only exemplary. In some embodiments, the data processing task is a combination of two or more of the above situations, and may also include other data reading and writing situations between any two hardware devices based on the server, for example, obtaining the target data from a USB flash drive and writing the target data to a CD, or obtaining the target data from a disk and writing the target data to a USB flash drive, etc. The embodiments of the present application are not limited to this.
[0105] The following takes the data processing task of storing the target data received by the network card in three copies as an example to introduce the data reading and writing method. Storing the target data received by the network card in three copies means obtaining the target data from the network card, writing the target data to the disk, and sending the target data to the other two servers in the network through the network card, respectively, and the two servers respectively store the received target data to form three copies of the target data. Figure 3is a flow chart of a data reading and writing method provided in an embodiment of the present application, such as Figure 3 As shown, taking the method executed by a server as an example, the server includes a DMA controller, an application server and a shared memory, the application server runs in user mode, and both the user mode and the kernel mode can access the shared memory. The method includes the following steps 301 to 306.
[0106] 301. In response to a data processing task for target data, the application server sends a first read / write request for the target data to the DMA controller through a first system call. The data processing task instructs the target data received by the network card to be stored in three copies.
[0107] In response to the startup of the application server, the kernel state of the server allocates a section of memory in the memory as shared memory, and maps the shared memory to the virtual address space of the application server through a memory mapping (mmap) method. The kernel state manages the shared memory using a partner algorithm and a slabs mechanism. In some embodiments, the shared memory satisfies a non-uniform memory access architecture (NUMA), that is, the shared memory has NUMA affinity, so it is possible to avoid the CPU from accessing the shared memory across NUMA nodes, thereby improving the efficiency of the CPU accessing the shared memory.
[0108] The kernel state of the server provides a first system call, and the first system call indicates to obtain data and write the obtained data into the shared memory. In some embodiments, the first system call is compatible with a portable operating system interface. The first read-write request is used to read the target data from the network card and write the target data into the shared memory.
[0109] Storing the target data received by the network card in three copies means obtaining the target data from the network card, writing the target data to the disk, and sending the target data to two other servers in the network through the network card. The two servers store the received target data respectively to form three copies of the target data. Figure 4 To express, Figure 4 is a schematic diagram of a process for storing target data in three copies provided by an embodiment of the present application, such as Figure 4As shown, the server includes a message module and a logic processing module, step ①: the message module receives the network message sent by the client; step ②: the logic processing module is used to parse the network message, and the result of the parsing determines the data processing task instruction to store the target data received by the network card in three copies; step ③: write the target data from the shared memory to the local disk; step ④: send the target data to a remote server through the network; step ⑤: send the target data to another remote server through the network.
[0110] It should be noted that the above step 301 is an implementation method in which the application server sends a first read / write request to the DMA controller in response to a data processing task for the target data. In some embodiments, this step is also implemented based on other methods, which is not limited in the embodiments of the present application.
[0111] 302. The DMA controller obtains the target data from the network card in response to the first read / write request, and writes the target data into a first memory block in the shared memory.
[0112] Wherein, in response to the first read-write request, the kernel state determines a first memory block in the shared memory, and the first memory block is used to store the target data. The DMA controller writes the target data obtained from the network card into the first memory block, and sends a completion response to the first read-write request to the application server. In the above method, for a read-write request, the kernel state allocates a piece of memory in the shared memory for storing related data. When the read-write request is completed, the kernel state only needs to release the memory block without releasing the entire shared memory, that is, the shared memory can be reused by different processes after being allocated once, and there is no need to perform a shared memory allocation and memory mapping every time a read-write request needs to be processed, which can save the resources of the server kernel state and improve the processing efficiency of read-write requests.
[0113] In some embodiments, the kernel state uses the best adaptation algorithm to find a memory block that can meet the job requirements and has the smallest size from the free area of the shared memory, and the memory block is the first memory block. In the above method, by using the best adaptation algorithm to allocate memory blocks from the shared memory, the fragments in the shared memory can be made as small as possible, thereby improving the utilization rate of the shared memory. Among them, the free area of the shared memory includes a zeroing area and a non-zeroing area, and the memory in the zeroing area is all clean memory, and data can be directly written without first performing an initialization operation (memset); the memory in the non-zeroing area is all dirty memory, and it needs to be initialized before writing data to make it a clean memory. In some embodiments, the kernel state determines the first memory block from the zeroing area of the free area of the shared memory, that is, the first memory block is a clean memory, and data can be directly written without first initializing it before writing data, thereby improving the processing efficiency of read and write requests.
[0114] It should be noted that step 302 is an implementation method in which the DMA controller responds to the first read / write request, obtains the target data, and writes the target data into the shared memory. In some embodiments, this step is also implemented based on other methods, which is not limited in the embodiments of the present application.
[0115] 303. The application server obtains the target data from the shared memory through direct memory reading.
[0116] Among them, the application server obtains the starting address (virtual address) and length of the target data in the shared memory through the write interface, obtains the target data from the shared memory through direct memory reading, and determines the message header and verification information for the first server and the message header and verification information for the second server based on the starting address and length.
[0117] 304. The application server sends a second read / write request for the target data to the DMA controller through a second system call.
[0118] The kernel state of the server provides a second system call, and the second system call indicates that the data processing task is performed based on the data in the shared memory. In some embodiments, the second system call is compatible with a portable operating system interface. The second read-write request is used to write the target data in the shared memory to a disk and send the target data to the first server and the second server respectively through a network card. The second read-write request carries the starting address and length information of the target data in the shared memory.
[0119] The second read / write request can be split into a write request for the disk, a write request for the first server, and a write request for the second server. The write request for the first server also carries a message header and verification information for the first server; the write request for the second server also carries a message header and verification information for the second server.
[0120] 305. The DMA controller writes the target data from the shared memory to the disk and writes the target data to the network card in response to the second read / write request.
[0121] Wherein, in response to the second read / write request, the DMA controller converts the virtual address carried by the second read / write request into a physical address, and reads the data segment corresponding to the length information carried by the second read / write request from the shared memory to obtain the target data. The second read / write request can be split into a write request for the disk, a write request for the first server, and a write request for the second server. Correspondingly, in response to the write request for the disk, the DMA controller writes the read target data to the disk; in response to the write request for the first server, the DMA controller writes the read target data, the message header and the check information for the first server to the network card; in response to the write request for the second server, the DMA controller writes the read target data, the message header and the check information for the second server to the network card.
[0122] The process shown in the above steps 303 to 305 can be used Figure 5 To express, Figure 5 It is a flowchart of sending target data to a server in a network provided by an embodiment of the present application.
[0123] 306. The network card sends the target data to a first server and a second server in the network respectively.
[0124] After the network card sends the target data to the first server and the second server, it starts asynchronous snooping to monitor the receiving responses of the first server and the second server.
[0125] In some embodiments, after the network card receives the receiving responses returned by the first server and the second server, the network card returns a sending completion response for the target data to the application server. If the network card does not receive the receiving response returned by any of the first server and the second server within a preset time, the operating system returns a sending failure response for the target data to the application server.
[0126] It should be noted that the above steps 301 to 306 are described by taking the first system call indicating the acquisition of data and writing the acquired data into the shared memory, and the second system call indicating the execution of the data processing task based on the data in the shared memory as an example. In some embodiments, the first system call includes a receiving system call (indicating the acquisition of data and writing the acquired data into the shared memory), and the second system call includes a sending system call (indicating the writing of data from the shared memory into the network card, and the network card sending the data) and a writing system call (indicating the writing of data from the shared memory into the disk). In some embodiments, the first system call and the second system call can also be split or combined according to actual needs, and the embodiments of the present application do not limit this.
[0127] Below Figure 6 and Figure 7 Taking as an example, the process shown in the above steps 301 to 306 is illustrated. Figure 6 This is a schematic diagram of a process for storing data in three copies provided in an embodiment of the present application. Figure 7 is a schematic diagram of a process for storing data in three copies provided in an embodiment of the present application, such as Figure 6 As shown, the network card receives the network message, and the kernel state applies for a memory block in the shared memory; the application server calls the receiving interface to receive the network message, and sends a receiving request to the DMA controller through the receiving system call, and the DMA controller writes the network message from the network card to the memory block applied in the shared memory (corresponding to Figure 7 Step ① in the above); the application server reads the network message from the shared memory, and parses the network message to obtain the parsing result (that is, the data processing task); the application server calls the sending interface to call the sending system call, sends a write request for the first server and the second server to the DMA controller, and the DMA controller sends data to the first server and the second server in the network (corresponding to Figure 7 Steps ② and ③ in the above); the application server calls the write interface to call the write system call, sends a write request for the disk to the DMA controller, and the DMA controller writes data to the disk (corresponding to Figure 7 Step ④); the application server asynchronously receives the results returned by the first server and the second server and the results returned by the disk (corresponding to Figure 7 Steps ⑤ to ⑦ in the above process, if the return result of the first server or the second server is not received, a failure response for the data processing task is returned to the application server, and if the return result of the first server and the second server is received, a completion response for the data processing task is returned to the application server (corresponding to Figure 7 Step ⑧).
[0128] In some embodiments, when the data processing task is completed, the kernel state releases the first memory block. In which, the kernel state releases the first memory block, that is, puts the first memory block into the non-zero area in the shared memory free area. When the capacity of the content in the non-zero area reaches the preset capacity, the kernel state performs batch zeroing (that is, batch initialization) on the memory in the non-zero area, and puts the zeroed memory into the zero area. This process is also a response to the first memory block being released. If the capacity of the released memory in the shared memory reaches the preset capacity, the kernel state initializes the released memory. In some embodiments, the process is also implemented based on other methods, and the embodiments of the present application do not limit this.
[0129] Among them, the kernel state manages the shared memory based on the partner algorithm. Figure 8 FIG. 1 is a flow chart of managing shared memory based on a buddy algorithm provided in an embodiment of the present application, such as Figure 8 As shown, the kernel state performs a memset operation on the dirty memory in the shared memory, converts the dirty memory into clean memory, merges the memory block with a capacity of 1 page in the clean memory with its adjacent clean memory block, and obtains a clean memory block with a capacity of 2 pages. If the memory block with a capacity of 2 pages adjacent to the clean memory block with a capacity of 2 pages is also clean memory, it is merged into a clean memory with a capacity of 4 pages, and the process is recursively repeated until it can no longer be merged. In the above method, a buddy algorithm is used for shared memory management, and the clean memory blocks that can be merged in the shared memory are merged, so that when allocating memory, the memory block with the smallest size that meets the job requirements can be allocated first, thereby reducing the generation of memory fragmentation and improving the utilization of shared memory.
[0130] In the above method, the kernel state and the user state share a shared memory, and the shared memory is mapped from the kernel state to the user state, that is, the application server can directly perform operations such as reading and writing data on the shared memory through direct memory access, without repeatedly copying data between the buffer in the kernel state and the buffer in the application server; in addition, zero copy of data between the kernel state and the user state is realized through the newly defined system call. Since the newly defined system calls are compatible with the POSIX interface, there is no need to modify the API of the application server. The application server can call the newly defined system call through the existing interface, which can save the development cost and migration cost of the application server; further, the shared memory has NUMA affinity, which can avoid the CPU from accessing the shared memory across NUMA nodes, thereby improving the efficiency of the CPU accessing the shared memory. In addition, the released memory is batch-zeroed, and the memory block allocated to the application server is a clean memory, which can directly write data without performing an initialization operation before writing data, thereby improving the processing efficiency of network messages, improving data transmission performance by 50%, and reducing memory latency by 20%.
[0131] Fig. 9 9 is a schematic diagram of the structure of a data reading and writing device provided in an embodiment of the present application. The device includes a writing module 901 and an execution module 902.
[0132] The writing module 901 is used to obtain target data in response to a first read / write request and write the target data into a shared memory in the server. The first read / write request is sent by the application server in the server in response to a data processing task for the target data.
[0133] The execution module 902 is used to execute the data processing task based on the target data in the shared memory in response to the second read / write request sent by the application server. The second read / write request is sent by the application server after obtaining the target data from the shared memory.
[0134] Optionally, the shared memory satisfies a non-uniform memory access architecture.
[0135] Optionally, the writing module 901 is used for:
[0136] In response to the first read / write request, the target data is acquired, and the target data is written into a first memory block in the shared memory.
[0137] Optionally, the first memory block is a clean memory.
[0138] Optionally, the data processing task indicates obtaining the target data from the network card and writing the target data to a disk, and the execution module 902 is used to: write the target data from the shared memory to a disk;
[0139] or,
[0140] The data processing task indicates obtaining the target data from the network card and sending the target data through the network card, and the execution module 902 is used to: write the target data from the shared memory into the network card, and the network card sends the target data;
[0141] or,
[0142] The data processing task indicates obtaining the target data from the network card, writing the target data to the disk and sending the target data through the network card. The execution module 902 is used to: write the target data from the shared memory to the disk, write the target data from the shared memory to the network card, and send the target data by the network card.
[0143] Optionally, the data processing task indicates obtaining the target data from a disk and writing the target data to another disk, and the execution module 902 is used to: write the target data from the shared memory to another disk;
[0144] or,
[0145] The data processing task indicates obtaining the target data from a disk and writing the target data into another disk, and the execution module 902 is used to: write the target data from the shared memory into the network card, and the network card sends the target data;
[0146] or,
[0147] The data processing task instructs obtaining the target data from the disk, writing the target data to another disk, and sending the target data through the network card. The execution module 902 is used to: write the target data from the shared memory to another disk, write the target data from the shared memory to the network card, and send the target data by the network card.
[0148] Wherein, the writing module 901 and the execution module 902 can be implemented by software or by hardware. Exemplarily, the implementation of the writing module 901 is introduced below by taking the writing module 901 as an example. Similarly, the implementation of the execution module 902 can refer to the implementation of the writing module 901.
[0149] As an example of a software functional unit, the write module 901 may include code running on a computing instance. Among them, the computing instance may include at least one of a physical host (computing device), a virtual machine, and a container. Further, the above-mentioned computing instance may be one or more. For example, the write module 901 may include code running on multiple hosts / virtual machines / containers. It should be noted that the multiple hosts / virtual machines / containers used to run the code may be distributed in the same region (region) or in different regions. Furthermore, the multiple hosts / virtual machines / containers used to run the code may be distributed in the same availability zone (AZ) or in different AZs, each AZ including one data center or multiple data centers with similar geographical locations. Among them, usually a region may include multiple AZs.
[0150] Similarly, multiple hosts / virtual machines / containers used to run the code can be distributed in the same virtual private cloud (VPC) or in multiple VPCs. Usually, a VPC is set up in a region. For cross-region communication between two VPCs in the same region and between VPCs in different regions, a communication gateway needs to be set up in each VPC to achieve interconnection between VPCs through the communication gateway.
[0151] As an example of a hardware functional unit, the write module 901 may include at least one computing device, such as a server, etc. Alternatively, the write module 901 may also be a device implemented using an application-specific integrated circuit (ASIC) or a programmable logic device (PLD). The PLD may be a complex programmable logical device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.
[0152] The multiple computing devices included in the write module 901 can be distributed in the same region or in different regions. The multiple computing devices included in the write module 901 can be distributed in the same AZ or in different AZs. Similarly, the multiple computing devices included in the write module 901 can be distributed in the same VPC or in multiple VPCs. The multiple computing devices can be any combination of computing devices such as servers, ASICs, PLDs, CPLDs, FPGAs, and GALs.
[0153] It should be noted that, in other embodiments, the steps that the above modules are responsible for implementing can be specified as needed, and the above modules respectively implement different steps in the above data reading and writing method to realize all the functions of the above device. That is, the data reading and writing device provided by the above embodiment only uses the division of the above functional modules as an example when implementing the data reading and writing method. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above. In addition, the device provided in the above embodiment belongs to the same concept as the corresponding method embodiment, and its specific implementation process is detailed in the method embodiment, which will not be repeated here.
[0154] An embodiment of the present application provides a DMA controller, which is used to execute a data reading and writing method provided by any possible implementation method in the above method embodiment.
[0155] An embodiment of the present application provides a storage medium, which is used to store at least one section of program code, and the at least one section of program code is used to execute a data reading and writing method provided by any possible implementation method in the above method embodiment.
[0156] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, stored data, displayed data, etc.) and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions. For example, the network messages and data involved in this application are obtained with full authorization.
[0157] Those of ordinary skill in the art will appreciate that the various method steps and units described in the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the steps and components of each embodiment have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those of ordinary skill in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.
[0158] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0159] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the unit is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or it can be an electrical, mechanical or other form of connection.
[0160] The unit described as a separate component may or may not be physically separated, and the component displayed as a unit may or may not be a physical unit, that is, it may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment of the present application.
[0161] In addition, each unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or software unit.
[0162] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computing device (which can be a personal computer, a server, or a computing device, etc.) to execute all or part of the steps of the method in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk, etc., various media that can store program codes.
[0163] In this application, the terms "first", "second", etc. are used to distinguish between identical or similar items having substantially the same effects and functions. It should be understood that there is no logical or temporal dependency between "first", "second", and "nth", nor is the quantity and execution order limited. It should also be understood that although the following description uses the terms first, second, etc. to describe various elements, these elements should not be limited by the terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of various examples, a first read-write request may be referred to as a second read-write request, and similarly, a second read-write request may be referred to as a first read-write request. Both the first read-write request and the second read-write request may be read-write requests, and in some cases, may be separate and different read-write requests.
[0164] It should also be understood that the term "if" may be interpreted to mean "when" or "upon" or "in response to determining" or "in response to detecting." Similarly, the phrase "if it is determined that ..." or "if [a stated condition or event] is detected" may be interpreted to mean "upon determining that ..." or "in response to determining that ..." or "upon detecting [a stated condition or event]" or "in response to detecting [a stated condition or event]," depending on the context.
[0165] The above description is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.
[0166] In the above embodiments, it can be implemented in whole or in part by software, hardware, firmware or any combination thereof. When implemented using software, it can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer program instructions. When the computer program instructions are loaded and executed on a computer, the process or function in accordance with the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
[0167] The computer instructions may be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer program instructions may be transmitted from one website, computer, server or data center to another website, computer, server or data center by wired or wireless means. The computer-readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media integrated therein. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a magnetic tape), an optical medium (e.g., a digital video disc (DVD), or a semiconductor medium (e.g., a solid-state drive)), etc.
[0168] A person skilled in the art will understand that all or part of the steps to implement the above embodiments may be accomplished by hardware or by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a disk or an optical disk, etc.
[0169] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.
Claims
1. A data reading and writing method, characterized in that: Applied to a server, the server includes a DMA controller, an application server and a shared memory, the application server runs in a user state, and both the user state and the kernel state can access the shared memory, the method includes: The application server sends a first read / write request to the DMA controller in response to a data processing task for target data; The DMA controller obtains the target data in response to the first read / write request, and writes the target data into the shared memory; The application server obtains the target data from the shared memory and sends a second read / write request to the DMA controller; The DMA controller executes the data processing task based on the target data in the shared memory in response to the second read / write request.
2. The method according to claim 1, characterized in that The shared memory satisfies a non-uniform memory access architecture.
3. The method according to claim 1, characterized in that The DMA controller obtains the target data in response to the first read / write request, and writes the target data into the shared memory, including: The DMA controller obtains the target data in response to the first read / write request, and writes the target data into a first memory block in the shared memory.
4. The method according to claim 3, characterized in that The first memory block is a clean memory.
5. The method according to claim 1, characterized in that The application server obtains the target data from the shared memory including: The application server obtains the target data from the shared memory through direct memory access.
6. The method according to claim 1, characterized in that The kernel state provides a first system call, the first system call indicates obtaining data and writing the obtained data into the shared memory, and the sending of the first read / write request to the DMA controller includes: The application server sends the first read / write request to the DMA controller through the first system call.
7. The method according to claim 6, characterized in that The first system call is compatible with a portable operating system interface.
8. The method according to claim 1, characterized in that The kernel state provides a second system call, the second system call indicates to perform a data processing task based on the data in the shared memory, and the sending a second read / write request to the DMA controller includes: The application server sends the second read / write request to the DMA controller through the second system call.
9. The method according to claim 8, characterized in that The second system call is compatible with a portable operating system interface.
10. The method according to any one of claims 1 to 9, characterized in that The method further comprises: When the capacity of the released memory in the shared memory reaches a preset capacity, the kernel state initializes the released memory.
11. The method according to claim 1, characterized in that: The data processing task indicates obtaining the target data from the network card and writing the target data to a disk, and the performing of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to a disk; or, The data processing task indicates obtaining the target data from the network card and sending the target data through the network card, and the performing of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory into the network card, and sending the target data by the network card; or, The data processing task indicates obtaining the target data from the network card, writing the target data to the disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to the disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
12. The method according to claim 1, characterized in that The data processing task indicates obtaining the target data from a disk and writing the target data into another disk, and the performing of the data processing task based on the target data in the shared memory comprises: writing the target data from the shared memory into another disk; or, The data processing task indicates obtaining the target data from a disk and writing the target data into another disk, and the performing of the data processing task based on the target data in the shared memory comprises: writing the target data from the shared memory into a network card, and the network card sending the target data; or, The data processing task indicates obtaining the target data from the disk, writing the target data to another disk, and sending the target data through the network card. The execution of the data processing task based on the target data in the shared memory includes: writing the target data from the shared memory to another disk, writing the target data from the shared memory to the network card, and sending the target data by the network card.
13. A data reading and writing method, characterized in that: The method comprises: Responding to a first read / write request, acquiring target data, and writing the target data into a shared memory of the server, wherein the first read / write request is sent by an application server in the server in response to a data processing task for the target data; In response to a second read / write request, the data processing task is performed based on the target data in the shared memory, and the second read / write request is sent by the application server after obtaining the target data from the shared memory.
14. A data reading and writing device, characterized in that: The device comprises: A writing module, configured to obtain target data in response to a first read / write request and write the target data into a shared memory in the server, wherein the first read / write request is sent by an application server in the server in response to a data processing task for the target data; The execution module is used to execute the data processing task based on the target data in the shared memory in response to a second read / write request, wherein the second read / write request is sent by the application server after obtaining the target data from the shared memory.
15. A server, characterized in that: The server includes a processor, a memory and a DMA controller, the memory stores program codes, and the processor is used to execute the program codes, so that the server executes the data reading and writing method according to any one of claims 1 to 12.
16. A DMA controller, characterized in that: The DMA controller is used to execute the data reading and writing method as claimed in claim 13.
17. A storage medium, characterized in that: The storage medium is used to store at least one section of program code, and the at least one section of program code is used to execute the data reading and writing method according to any one of claims 1 to claim 13.
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