A hardware verification method, device, electronic device and storage medium

Abstract

An embodiment of the present invention provides a hardware verification method, device, electronic device, and storage medium, which relate to the technical field of hardware verification. The method includes: dividing a time slice into an execution time slice of a software test tool and an execution time slice of a hardware emulator; in the execution time slice of the software test tool, after all the events executable at the current moment in the software test tool are executed, writing simulation input data into the hardware emulator through a data interface of the hardware emulator; converting the time slice into an execution time slice of the hardware emulator, and in a software environment, calling a control interface of the hardware emulator to control the operation of the hardware emulator for hardware verification; converting the time slice into an execution time slice of the software test tool, and obtaining the result of hardware verification through the data interface of the hardware emulator. The present invention synchronizes the data of the event managers of software and hardware through the data interface, and supports using a software test tool to perform hardware verification in a software environment.

Description

Technical Field

[0001] The present invention relates to the technical field of hardware verification, and in particular, to a hardware verification method, a hardware verification device, an electronic device, and a storage medium. Background Art

[0002] Hardware verification refers to a method of verifying whether a hardware design works as expected. In this process, a hardware emulator helps engineers discover design problems and debug them by simulating the behavior of the hardware under different conditions.

[0003] During the hardware verification process, a hardware emulator usually needs its own event manager to handle the events generated during the hardware simulation process.

[0004] However, the event manager of the hardware emulator is usually implemented as an internal private module, resulting in the inability of software testing tools to access the event manager of the hardware emulator and handle events based on the event manager of the hardware emulator. At the same time, due to the non-interoperability between the event manager of the software testing tool and the event manager of the hardware emulator, the events on both sides cannot be synchronously processed, resulting in the inability to use existing software testing tools for hardware verification. Summary of the Invention

[0005] In view of the above problems, embodiments of the present invention are proposed to provide a hardware verification method that overcomes the above problems or at least partially solves the above problems, so as to support the use of existing software testing tools for hardware verification.

[0006] In a first aspect, the present invention provides a hardware verification method, including:

[0007] Dividing a time slice into an execution time slice of a software testing tool and an execution time slice of a hardware emulator;

[0008] In the execution time slice of the software testing tool, after all the events executable at the current moment in the software testing tool are executed, simulation input data is written into the hardware emulator through the data interface of the hardware emulator;

[0009] Converting the time slice into the execution time slice of the hardware emulator, and in a software environment, calling the control interface of the hardware emulator to control the operation of the hardware emulator for hardware verification;

[0010] Converting the time slice into the execution time slice of the software testing tool, and obtaining the result of the hardware verification through the data interface of the hardware emulator.

[0011] In a second aspect, the present invention provides a hardware verification device, including:

[0012] A partitioning module, configured to partition a time slice into an execution time slice of a software testing tool and an execution time slice of a hardware emulator;

[0013] A writing module, configured to, in the execution time slice of the software testing tool, after all the events executable at the current moment in the software testing tool are executed, write simulation input data into the hardware emulator through a data interface of the hardware emulator;

[0014] A hardware verification module, configured to convert a time slice into the execution time slice of the hardware emulator, and in a software environment, call a control interface of the hardware emulator to control the operation of the hardware emulator for hardware verification;

[0015] A result acquisition module, configured to convert a time slice into the execution time slice of the software testing tool, and obtain the result of the hardware verification through the data interface of the hardware emulator.

[0016] In a third aspect, the present invention provides an electronic device, including: a processor, a memory, and a computer program stored on the memory and executable on the processor, where when the processor executes the program, the above-mentioned hardware verification method is implemented.

[0017] In a fourth aspect, the present invention provides a readable storage medium, where when instructions in the storage medium are executed by a processor of an electronic device, the electronic device can execute the above-mentioned hardware verification method.

[0018] In a fifth aspect, the present invention provides a computer program product, including instructions, where when the instructions are executed by a processor in an electronic device, the electronic device executes any one of the above-mentioned hardware verification methods.

[0019] The present invention has at least the following advantages:

[0020] In the present invention, first, through two types of encapsulations of a data interface and a control interface of a hardware emulator, and by partitioning a time slice into an execution time slice of a software testing tool and an execution time slice of a hardware emulator, then by writing simulation input data into the hardware emulator through the data interface of the hardware emulator and obtaining the hardware verification result in the hardware emulator, the hardware verification result in the hardware emulator is mainly the execution result data of the event manager of the hardware emulator, that is, the data of the event managers of software and hardware is synchronized through the data interface, so that the present application supports hardware verification in a software environment using a software testing tool, expanding the way of hardware verification. Description of the Drawings

[0021] To more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the accompanying drawings required for the description of the embodiments of the present invention. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can be obtained based on these drawings.

[0022] Figure 1 The flowchart of the steps of an embodiment of a hardware verification method of the present invention is shown;

[0023] Figure 2 The schematic diagram of the process of an embodiment of a hardware verification method of the present invention is shown;

[0024] Figure 3 The flowchart of the steps of another embodiment of a hardware verification method of the present invention is shown;

[0025] Figure 4 The structural block diagram of an embodiment of a hardware verification device of the present invention is shown;

[0026] Figure 5 It is the structural diagram of an electronic device provided by an embodiment of the present invention. Specific embodiments

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0028] The present application provides a hardware verification method. Referring to Figure 1 , the hardware verification method may specifically include the following steps.

[0029] Step 101: Divide the time slice into the execution time slice of the software test tool and the execution time slice of the hardware emulator.

[0030] In the hardware verification process, the software test tool is mainly used to test the software related to the hardware to ensure that the software can correctly interact with the hardware and meet the design requirements. The software test tool usually controls the input of the software and observes the output results to judge the correctness and accuracy of the software.

[0031] Here, the time slice of the processor is mainly divided into the execution time slice of the software test tool and the execution time slice of the hardware emulator. Figure 2 It is the schematic diagram of the process of a hardware verification method provided by the present application. Referring to Figure 2 ,Figure 2 The part enclosed by the dashed box in the middle is the part executed during the execution time slice of the hardware emulator. Figure 2 The part outside the dashed box in the middle is the part executed during the execution time slice of the software testing tool or software testing framework. The relative lengths of the execution time slices of the software testing tool and the hardware emulator are not limited and can be equal or unequal.

[0032] Optionally, the software testing tool here includes: a software testing tool that supports code-driven and object-oriented. Specifically, these software testing tools that support code-driven and object-oriented run in a high-level language environment and have an event manager developed based on a high-level language; the object-oriented programming here can divide the hardware design into multiple modules, and each module represents a part or function of the hardware. This modular design enables the testing tool to independently verify each module, reducing the complexity of testing and verification; in an object-oriented environment, classes and objects can be called and reused multiple times, improving the testing efficiency and reducing costs; the encapsulation mechanism in object-oriented programming hides the internal details of the hardware design and only exposes the necessary interfaces to the testing tool, which helps to reduce interference factors during the testing process and makes the testing more focused on verifying the functions and performance of the hardware; in summary, the code-driven and object-oriented software testing tool enables the software testing tool to more efficiently and accurately verify the correctness and reliability of the hardware design in hardware verification.

[0033] There is no specific limitation on the specific types of software testing tools that support code-driven and object-oriented. For example, the software testing tool here can be Gtest (Google C++ testing framework), JUNIT (Junit software testing tool), Pytest (PyTest), Go Test (Go testing tool), etc.

[0034] It should be noted that there is no specific limitation on the hardware emulator. For example, the hardware emulator here can fully implement the IEEE 1800-2023 standard of Verilog (a hardware description language) and SystemVerilog (system-level Verilog hardware description language). For example, it can be the open-source Verilator (Verilator hardware emulator) and Icarus Verilog (Icarus Verilog hardware emulator), as well as some commercial hardware emulators, such as Synopsys VCS (Synopsys VCS hardware emulator), etc.

[0035] Step 102: After all the events that can be executed at the current moment in the software test tool have been completed within the execution time slice of the software test tool, write simulation input data to the hardware emulator through the data interface of the hardware emulator.

[0036] Figure 2 In, the solid arrows represent the control flow, and the dashed arrows represent the data flow. Step 102 here can correspond to Figure 2 executing the events in the software test tool and writing data to the hardware emulator. Writing data to the hardware emulator here refers to the upper dashed arrow among the two dashed arrows in Figure 2 shown. Figure 2 In, the events that can be executed at the current moment in the software test tool can refer to the following here: R (referring to the events that can be executed at the current moment in the software test tool), R... the event queue in the software test tool, Figure 2 and cb in can refer to the callback task.

[0037] The simulation input data refers to the input data required for the event operation of the hardware emulator in the subsequent step 103. The specific simulation input data is determined according to the actual hardware verification.

[0038] Optionally, the data interface here includes: the Direct Programming Interface (DPI) based on the SystemVerilog hardware description language. Specifically, the simulation input data is written before the Step() function is executed and the latest execution result is read after the Step() function is completed. The advantage of using the SV (SystemVerilog) standard lies in its wide compatibility because most modern hardware description languages (HDLs) support compilation into Verilog. In addition, most modern tools support the aforementioned DPI standard. Compared with the virtual programming interface (VPI) that accesses and controls specific ports through string operations, directly accessing pins through DPI tasks can achieve a speed increase of approximately 50 times, significantly reducing the execution time and improving the hardware verification efficiency. In addition, DPI supports calling custom tasks from C to HDL, making data transmission more flexible and not limited to integer or character types only.

[0039] Step 103: Convert the time slice into the execution time slice of the hardware emulator, and in the software environment, call the control interface of the hardware emulator to control the operation of the hardware emulator for hardware verification.

[0040] Step 103 here can correspond to Figure 2The Step function (executing events in the hardware simulation tool), where the Step function here refers to the step function or staircase function. Specifically, the control interface of the hardware emulator can correspond to the Step function here. In step 103, it is necessary to execute Figure 2 in to . The invocation of the commands of the hardware emulator is realized through the control interface of the hardware emulator. For example, the execution time, waveform recording, etc. of the hardware emulator are encapsulated in the Step() function, and during initialization, a constructor for setting options such as coverage collection, debug level, and simulation parameters is added to the hardware class encapsulated by the software.

[0041] Here, the time slice is converted into the execution time slice of the hardware emulator. Or rather, calling the Step function means that the software hands over the control right or time slice to the hardware, and it's the turn of the hardware emulator to execute. Calling the Step function allows the hardware emulator to run for a specified time slice and update its state.

[0042] It should be noted that for software developers, in the software environment, calling the control interface of the hardware emulator to control the operation of the hardware emulator for hardware verification is hidden or invisible. The process of the hardware emulator running here can be as follows: When the Step() function is executed, the control flow privilege transfers to the hardware emulator, instructing it to run from the current time T0 until T1 = T0 + t. If all events at the current time have been processed, but T0 < T1, then T0 = T0 + 1, and the events at the new T0 are processed. Once T0 = T1, the hardware emulator exits, and the control flow privilege returns to the software environment.

[0043] Step 104: Convert the time slice into the execution time slice of the software testing tool, and obtain the result of the hardware verification through the data interface of the hardware emulator.

[0044] Converting the time slice into the execution time slice of the software testing tool here means that the hardware hands over the control right or time slice to the software, and it's the turn of the software testing framework to execute. Obtaining the result of the hardware verification through the data interface of the hardware emulator here can correspond to Figure 2 reading data from the hardware emulator in Figure 2 as shown by the lower dotted arrow among the two dotted arrows in

[0045] The result of the hardware verification here is used to trigger a callback according to a preset condition, mark the corresponding event as executable, and prepare for subsequent event execution.

[0046] Combined with Figure 2 , the control path of this application is mainly divided into three categories, and the labels of each category are identified in Figure 2 with different fonts. The first category, from ① to ⑤ on the left, represents the verification control flow visible to software developers; the second category, from to , consists of the hidden hardware environment control flow; the third category, from to , covers the processing of events and callbacks of software testing tools. The above steps 101 to 104 mainly describe ① to ④ in the first category of control paths.

[0047] In the present invention, first, through the two encapsulations of the data interface and the control interface of the hardware emulator, and by dividing the time slice into the execution time slice of the software testing tool and the execution time slice of the hardware emulator, then through the data interface of the hardware emulator, simulation input data is written into the hardware emulator, and the hardware verification result in the hardware emulator is obtained. The hardware verification result in the hardware emulator is mainly the execution result data of the event manager of the hardware emulator, which realizes synchronizing the event manager data of software and hardware through the data interface, enabling this application to support using software testing tools to perform hardware verification in a software environment and expanding the way of hardware verification.

[0048] Figure 3 shows the step flowchart of another embodiment of the hardware verification method of the present invention. Referring to Figure 3 , this hardware verification method may specifically include the following steps.

[0049] Step 201: Divide the time slice into the execution time slice of the software testing tool and the execution time slice of the hardware emulator.

[0050] Step 201 may refer to the aforementioned step 101. To avoid repetition, it will not be elaborated here.

[0051] Step 202: Use an automatic code generator to provide the data interface and the control interface for the hardware emulator.

[0052] Through the automatic code generator, two encapsulations of the data path interface and the control interface are provided for the hardware emulator. The code of this hardware module can be input into the automatic code generator, which will parse the design code and provide a data interface for inputting data in the software testing tool and reading out the hardware verification result, as well as the above control interface. Through the above automatic code generator, it is convenient to provide the data interface and the control interface for the hardware emulator.

[0053] More specifically, the automatic code generator processes the hardware code through technical means such as code parsing and code generation; then generates a part of the interfaces for the hardware code and the outer software encapsulation; subsequently compiles these interfaces and software encapsulation together to form a software dynamic library. The outer layer of this software dynamic library is the software data interface / control interface, and the inner layer is the hardware emulator and hardware logic. This control interface is the Step() function. These code packaging methods abstractly define the interfaces, combine and compile them, turning the operation of the entire hardware event manager into a software event.

[0054] Step 203: In the execution time slice of the software test tool, after all the events executable at the current moment in the software test tool have been executed, write the simulation input data into the hardware emulator through the data interface of the hardware emulator.

[0055] Step 203 can refer to the aforementioned Step 102. To avoid repetition, it will not be elaborated here.

[0056] Step 204: Convert the time slice into the execution time slice of the hardware emulator, and in the software environment, call the control interface of the hardware emulator to control the hardware emulator to run the events executable at the current moment in the hardware emulator for hardware verification.

[0057] The main difference between Step 204 and the aforementioned Step 103 is that the events executable at the current moment in the hardware emulator are the events executable at the current moment in the event manager of the hardware emulator. It should be noted that the events executable at the current moment in the hardware emulator are mainly determined by the event trigger conditions at the moment before the current moment.

[0058] Step 205: Convert the time slice into the execution time slice of the software test tool, and through the data interface of the hardware emulator, obtain the execution results of the events executable at the current moment in the hardware emulator.

[0059] The main difference between Step 205 and the aforementioned Step 104 is that the content of the execution results is refined.

[0060] Step 206: Based on the results of the hardware verification, determine the events to be executed in the software test tool.

[0061] The results of the hardware verification can be used as the trigger conditions for the events in the software test tool. Therefore, according to the preset conditions, trigger a callback and mark the corresponding events as executable.

[0062] Step 207: Execute at least some of the events to be executed in the software test tool.

[0063] Step 207 can be to enter Figure 2For example, the next loop of the first type of control path, etc.

[0064] Based on the above, the control paths of this application are mainly divided into three categories. The first category, from ① to ⑤, represents the verification control flow visible to software developers; the second category, from to , consists of hidden hardware environment control flows; the third category, from to , covers the processing of events and callbacks. Combining Figure 2 , the first type of control path can generally be: ① When there are no more executable software environment events or events in the software test tool at the current moment, all software events or events in the software test tool will be processed. ② Through the data interface of the hardware emulator, simulation input data is written into the hardware emulator, that is, input signals are provided to the hardware design or the hardware emulator. ③ The Step() function is called, allowing the hardware emulator to run for a specified time slice and update its state. ④ Through the data interface of the hardware emulator, the output port data of the hardware design or the hardware verification result is read. ⑤ According to preset conditions, a callback is triggered to mark the corresponding event as executable. The second type of hidden hardware environment control flow or control path can generally be: When the Step() function is executed, the control flow privilege transfers to the hardware emulator, instructing it to run from the current time T0 until T1 = T0 + t. If all executable events at the current moment have been processed, but T0 < T1, then T0 = T0 + 1, and the events of the new T0 are processed. Once T0 = T1, the emulator exits, and the control flow privilege returns to the software environment. The third type of control path can generally be: The event queues of the hardware and software operate independently. During the execution phase , the software test framework processes the event queue in the software or the software test tool, which includes executing the software events executable at the current moment, such as obtaining the latest results from the reference model and adding new events to the event queue as needed. In addition, new callback tasks can be registered in the event queue, such as the task of triggering an alarm when sum < 0. At the same time, the hardware emulator independently processes hardware events. Then, in , the software test framework checks the callback tasks in the software event queue and marks the corresponding events as executable when the conditions are met.

[0065] It should be noted that for the method embodiments, for the sake of simple description, they are all expressed as a series of action combinations. However, those skilled in the art should know that the embodiments of the present invention are not limited by the described action sequence, because according to the embodiments of the present invention, some steps can be carried out in other sequences or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily essential for the embodiments of the present invention.

[0066] The following further explains and illustrates the present application in combination with specific embodiments.

[0067] The function of the hardware module or hardware emulator is to recognize the numbers in the image. The following interfaces are provided for this hardware emulator: a data input interface (INPUT), which specifically may include: an Image (image) interface and a Clock (clock) interface; a data output interface (OUTPUT), which specifically may include: a first output interface and a second output interface. When the hardware emulator runs, it reads the input image data from the Image interface, and after the Clock changes a certain number of times, it outputs the digital recognition result from the first output interface, and outputs from the second output interface the number of times the corresponding hardware emulator of the hardware module has output results.

[0068] The code of this hardware emulator is input into an automatic code generator. The automatic code generator will parse the design code and provide set_image (set image interface) and set_clock (set clock interface) for writing simulation input data in a software test tool, as well as get_number (obtain the output result of the first output interface) and get_cnt (obtain the output result of the second output interface) for reading the results of the hardware test environment. At the same time, a Step() function is provided to support the hardware emulator to run for a specified time during the Step() process to perform the digital recognition task and end after the recognition is completed.

[0069] The software test tool records the simulation of the hardware emulator through the following process: The software test tool generates a picture, inputs the picture to the hardware emulator through set_image, runs the Step() function, and registers it to the callback of the software event manager. After the Step() ends, the callback is triggered. Based on get_number, the verification result is read. If the recognition is correct, the software test tool records the result and continues to run, returning to the step where the software test tool generates a picture. If the recognition is incorrect, the software test tool records the result, pauses running, and waits for inspection; if the inspection deems it acceptable, it returns to the step where the software test tool generates a picture. If the inspection deems it unacceptable, it ends.

[0070] In this application, a set of data interfaces are provided for data transmission, encapsulating the details of the hardware emulator, avoiding interference with the software event manager, and being non-invasive. It is an external encapsulation of the hardware emulation process. At the same time, it has better compatibility and versatility. Moreover, this application suppresses the interference of hardware verification on software testing to a minimum. In summary, this application uses the software testing tool in the software testing framework to allocate execution time slices to the hardware emulator, turning the operation of the entire hardware event manager into a software event, thereby shielding the internal details. In this way, the event managers of the software testing tool and the hardware emulator are synchronized to ensure correctness, and data synchronization is carried out through the data interface to ensure the consistency of the software and hardware environment data. Furthermore, the ability of the software testing tool-driven hardware verification emulator is provided, and finally the ability for any software testing tool to directly use the hardware verification emulator is achieved.

[0071] Referring to Figure 4 , Figure 4 FIG. shows a structural block diagram of an embodiment of a hardware verification device of the present invention. The device may specifically include the following modules:

[0072] A division module 301 for dividing the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware emulator;

[0073] A writing module 302 for, in the execution time slice of the software testing tool, after all the events executable at the current moment in the software testing tool are executed, writing simulation input data into the hardware emulator through the data interface of the hardware emulator;

[0074] A hardware verification module 303 for converting the time slice into the execution time slice of the hardware emulator and, in the software environment, calling the control interface of the hardware emulator to control the operation of the hardware emulator for hardware verification;

[0075] A result acquisition module 304 for converting the time slice into the execution time slice of the software testing tool and acquiring the result of the hardware verification through the data interface of the hardware emulator.

[0076] Optionally, the hardware verification module 303 includes:

[0077] A hardware verification sub-module for converting the time slice into the execution time slice of the hardware emulator and, in the software environment, calling the control interface of the hardware emulator to control the hardware emulator to run the executable events at the current moment in the hardware emulator for hardware verification;

[0078] The result acquisition module 304 includes:

[0079] A result acquisition sub-module, configured to convert a time slice into an execution time slice of the software test tool, and acquire an execution result of an executable event at the current moment in the hardware emulator through a data interface of the hardware emulator.

[0080] Optionally, the apparatus further includes:

[0081] A to-be-executed time determination module, configured to determine each event to be executed in the software test tool based on a result of the hardware verification;

[0082] An execution module, configured to execute at least a part of the events to be executed in the software test tool.

[0083] Optionally, the apparatus further includes:

[0084] An interface providing module, configured to provide the data interface and the control interface for the hardware emulator by using an automatic code generator.

[0085] Optionally, the data interface includes a direct programming interface based on a system-level Verilog hardware description language.

[0086] Optionally, the software test tool includes a software test tool that supports code-driven and object-oriented.

[0087] It should be noted that the hardware verification apparatus may refer to the relevant parts of the foregoing hardware verification method, and the two have the same or similar beneficial effects. To avoid repetition, details are not described herein again.

[0088] Figure 5 is a structural diagram of an electronic device provided by an embodiment of the present invention. Referring to Figure 5 , the present invention further provides an electronic device. Refer to Figure 5 , including: a processor 501, a memory 502, and a computer program 5021 stored on the memory and executable on the processor. When the processor executes the program, the steps of each of the foregoing embodiments of the hardware verification are implemented.

[0089] The present invention further provides a readable storage medium. When instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the steps of each of the foregoing embodiments of the hardware verification method.

[0090] The present invention further provides a computer program product, including instructions. When the instructions are executed by a processor in an electronic device, the electronic device is enabled to execute the steps of each of the foregoing embodiments of the hardware verification method.

[0091] Each embodiment in this specification is described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. For the same or similar parts among the embodiments, reference can be made to each other.

[0092] Those skilled in the art should understand that the embodiments of the present invention can be provided as a method, a device, or a computer program product. Therefore, the embodiments of the present invention can take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0093] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be realized by computer program instructions. These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data transmission terminal devices to generate a machine, so that the instructions executed by the processor of the computer or other programmable data transmission terminal devices generate a device for realizing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0094] These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data transmission terminal device to work in a predictive manner, so that the instructions stored in the computer-readable memory generate a manufactured product including an instruction device, and the instruction device realizes the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0095] These computer program instructions can also be loaded onto a computer or other programmable data transmission terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to generate a computer-implemented process. Thus, the instructions executed on the computer or other programmable terminal device provide steps for realizing the functions specified in Figure 1 one process or multiple processes and / or blocks Figure 1 one block or multiple blocks.

[0096] Although the preferred embodiments of the embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications to these embodiments once they learn the basic creative concepts. Therefore, the appended claims are intended to be construed as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0097] Finally, it should also be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or terminal device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or also includes elements inherent to such process, method, article or terminal device. Without further limitation, an element defined by the statement "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or terminal device comprising the element.

[0098] The above has introduced in detail a hardware verification method and device, an electronic device, and a storage medium provided by the present invention. Specific examples are used in this article to elaborate on the principle and implementation manner of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of the present invention; at the same time, for those of ordinary skill in the art, according to the idea of the present invention, there will be changes in the specific implementation manner and application scope. In summary, the content of this specification should not be construed as a limitation to the present invention.

Claims

1. A hardware verification method, characterized in that: include: Dividing the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware simulator; Using an automatic code generator to provide a data interface and a control interface for the hardware emulator, and providing a data interface and a control interface for inputting data into the software testing tool and reading out hardware verification results; In the execution time slice of the software testing tool, after all events that can be executed at the current moment in the software testing tool are executed, writing simulation input data into the hardware emulator through the data interface of the hardware emulator; Convert the time slice into an execution time slice of the hardware emulator, and in a software environment, call the control interface of the hardware emulator to control the operation of the hardware emulator to perform hardware verification; The time slice is converted into an execution time slice of the software testing tool, and the result of the hardware verification is obtained through the data interface of the hardware simulator.

2. The hardware verification method according to claim 1, characterized in that: The step of converting the time slice into the execution time slice of the hardware emulator and calling the control interface of the hardware emulator in a software environment to control the operation of the hardware emulator to perform hardware verification includes: Convert the time slice into an execution time slice of the hardware emulator, and in a software environment, call the control interface of the hardware emulator to control the hardware emulator to run the executable event at the current moment in the hardware emulator to perform hardware verification; The converting the time slice into the execution time slice of the software testing tool, and obtaining the result of the hardware verification through the data interface of the hardware simulator, comprises: The time slice is converted into the execution time slice of the software testing tool, and the execution result of the executable event at the current moment in the hardware emulator is obtained through the data interface of the hardware emulator.

3. The hardware verification method according to claim 1, characterized in that: The method further comprises: Based on the result of the hardware verification, determining various events to be executed in the software testing tool; At least part of the events to be performed are executed in the software testing tool.

4. The hardware verification method according to any one of claims 1 to 3, characterized in that: The data interface includes: a direct programming interface based on the system-level Vlog hardware description language.

5. The hardware verification method according to any one of claims 1 to 3, characterized in that: The software testing tool includes: a software testing tool that supports code-driven and object-oriented testing.

6. A hardware verification device, characterized in that: include: A division module, used for dividing the time slice into an execution time slice of the software testing tool and an execution time slice of the hardware simulator; The hardware verification device is also used to: use an automatic code generator to provide a data interface and a control interface for the hardware emulator, and provide a data interface and a control interface for inputting data into the software testing tool and reading out hardware verification results; A writing module, used for writing simulation input data into the hardware emulator through the data interface of the hardware emulator in the execution time slice of the software testing tool after all events that can be executed at the current moment in the software testing tool have been executed; A hardware verification module, used for converting the time slice into the execution time slice of the hardware emulator, and in a software environment, calling the control interface of the hardware emulator to control the operation of the hardware emulator to perform hardware verification; The result acquisition module is used to convert the time slice into the execution time slice of the software testing tool, and obtain the result of the hardware verification through the data interface of the hardware simulator.

7. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor implements the hardware verification method according to any one of claims 1 to 5 when executing the program.

8. A readable storage medium, characterized in that: When the instructions in the storage medium are executed by a processor of an electronic device, the electronic device is enabled to execute the hardware verification method according to any one of claims 1 to 5.

9. A computer program product, characterized in that The method comprises instructions, which, when executed by a processor in an electronic device, enable the electronic device to execute the hardware verification method according to any one of claims 1 to 5.

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