Semiconductor device and operating method of semiconductor device

By introducing an internal switching circuit into a semiconductor device, the external pulse signal is converted into an internal pulse signal, and the problem of insufficient reading accuracy in 3D X-point memory is solved, achieving higher reading window margin and accurate intrinsic holding voltage.

CN119724291AActive Publication Date: 2025-03-28SHENZHEN HONGQIXIN TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202411559741.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-04
Publication Date
2025-03-28
Estimated Expiration
2044-11-04

AI Technical Summary

Technical Problem

In 3D X-point memory, the method of increasing the storage density is approaching the limit, and the reading accuracy is insufficient, resulting in insufficient reading window margin (RWM), which is difficult to effectively solve.

Method used

By designing a semiconductor device, including a bidirectional threshold switching device and an internal switching circuit, the internal switching circuit is used to convert the external pulse signal into an internal pulse signal, thereby improving pulse accuracy, reducing bias stress, and accurately obtaining the device's intrinsic holding voltage through testing of different currents.

Benefits of technology

It achieves improving pulse accuracy, reducing bias stress, accurately obtaining the device's intrinsic holding voltage, thereby improving read accuracy and read window margin.

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Abstract

The invention provides a semiconductor device and an operation method of the semiconductor device, and the semiconductor device comprises the components of a bidirectional threshold switching device which is provided with a first end and a second end which are electrically connected; and the internal switching circuit is used for connecting the first end and the second end, receiving an external signal and applying an internal pulse signal of which the bias time is shorter than the bias time of the external signal to the bidirectional threshold switching device. According to the semiconductor device and the operation method of the semiconductor device provided by the invention, the external pulse signal can be converted into the internal pulse signal, so that the pulse precision is greatly improved, the bias stress is reduced, and the intrinsic holding voltage of the device can be accurately obtained through testing of different currents according to formula fitting.
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Description

Technical Field

[0001] The present application generally relates to the field of electronic devices, and more particularly to a semiconductor device for measurement and an operating method of the semiconductor device. Background Art

[0002] In 3D X-point memory, the memory cell consists of a selector (a switch used as a cell selection element, or OTS, Ovonic Threshold Switch) and a storage element (Phase Change Memory PCM). It has the so-called 1S1R configuration. There are two main ways to increase storage density using this architecture, one is miniaturization, and the other is to increase the number of three-dimensional stacked memory cell arrays. However, these two methods have almost reached their limits in the second generation of 3D X-point memory (4 layers).

[0003] What hinders its further development is the increase in etching difficulty and the increase in thermal interference between adjacent cells. The memory cell with a cross-point structure has an elongated columnar shape and a large etching depth-to-width ratio. Reducing the processing size means making the support of the memory cell worse without changing the height of the memory cell, resulting in an increased risk of etching failure.

[0004] Unlike 3D X-point memory, when the selector is used as memory, it is also called selector only memory (SOM), where the stored data is the difference in threshold voltage. The results of the memory cell prototype design show that even with a processing size of 15nm, the high threshold voltage (reset) and low threshold voltage states (set) can be maintained. In addition, the write time of the SOM device is short, and the write time can be basically consistent between the reset (reset) and set (set) states, and the life of the write cycle is much longer than that of the 1S1R structure.

[0005] However, how to increase the reading accuracy and thereby increase the read window margin (RWM) of the SOM has always been a problem that needs to be solved. Although various solutions have been proposed, they have not been well solved. Summary of the invention

[0006] The purpose of the present application is to provide a semiconductor device and an operating method of the semiconductor device, which are used to solve the problems of bias stress and reading accuracy.

[0007] In a first aspect, the present application provides a semiconductor device, the semiconductor device comprising: a bidirectional threshold switch device having a first end and a second end connected for power supply; and

[0008] The internal switch circuit connects the first end and the second end and is used to receive an external signal and to cause the bidirectional threshold switch device to be subjected to an internal pulse signal with a bias time shorter than the bias time of the external signal.

[0009] Optionally, the internal switch circuit includes: a first switch, which is connected to the first end and the second end of the bidirectional threshold switch device in parallel at a first node and a second node, and is selectively disconnected according to a first control signal.

[0010] Optionally, the internal switch circuit further includes: a second switch, connecting one of the first node and the second node, and selectively conducting the external signal according to a second control signal.

[0011] Optionally, the semiconductor device further includes a first bias access point and a second bias access point for receiving the external signal, and the external signal includes a first bias voltage and a second bias voltage which can be respectively conducted to the first node and the second node through the first bias access point and the second bias access point.

[0012] Optionally, the semiconductor device further includes: a current mirror circuit having a read line connected to the second node, wherein the read line can be used to provide a measurement current to the bidirectional threshold switch device or to read the current.

[0013] Optionally, the semiconductor device further includes: a first voltage measurement point and a second voltage measurement point, respectively connected to the first end and the second end, for respectively extracting a first voltage and a second voltage when current passes through the bidirectional threshold switch device.

[0014] Optionally, the semiconductor device also includes a third bias access point connected to the read line and receiving a third bias as one of the external signals, and the second switch is arranged between the second bias access point and the second node, or between the first bias access point and the first node.

[0015] Optionally, the read line is connected between the second node and the second bias access point, the second switch is arranged in the read line or between the first bias access point and the first node, and the second bias access point receives a third bias as one of the external signals.

[0016] Optionally, the semiconductor device is arranged in a cutting path of a wafer.

[0017] In a second aspect, the present application provides an operating method for a semiconductor device, the operating method comprising:

[0018] applying an external signal; and

[0019] Control the internal switch circuit so that the bidirectional threshold switch device is applied with an internal pulse signal whose bias time is shorter than the bias time of the external signal, and wherein the bidirectional threshold switch device has a first end and a second end connected for power supply, and the internal switch circuit connects the first end and the second end and is used to receive the external signal.

[0020] Optionally, the operation method further includes:

[0021] sequentially providing a plurality of conduction currents through the bidirectional threshold switch device;

[0022] By respectively connecting a first voltage measurement point and a second voltage measurement point of the first end and the second end, a plurality of device voltage drops of the bidirectional threshold switch device corresponding to the plurality of conduction currents are obtained; and

[0023] According to the formula fitting method, the device voltage drop when the on-current is zero is calculated to obtain the intrinsic holding voltage of the bidirectional threshold switch device.

[0024] The semiconductor device and the method for operating the semiconductor device provided by the present application can not only convert the external pulse signal into the internal pulse signal through the internal switching circuit, thereby greatly improving the pulse accuracy and reducing the bias stress, but also can accurately obtain the intrinsic holding voltage of the device according to the formula fitting through the test of different currents. On the other hand, not only the voltage drop caused by the online resistance is eliminated, but also the short-term alternating current (AC) measurement can avoid the bias stress and heat accumulation caused by direct current (DC), and obtain a more accurate intrinsic holding voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The technical solution and other beneficial effects of the present application will be made apparent by describing in detail the specific implementation methods of the present application in conjunction with the accompanying drawings.

[0026] Figure 1 This is a schematic diagram of a circuit structure of a semiconductor device provided according to some embodiments of the present application.

[0027] Figure 2 It is a waveform diagram of an external signal and a control signal of an internal switch circuit provided according to some embodiments of the present application.

[0028] Figure 3a It is a schematic diagram of the structure of an OTS device provided according to some embodiments of the present application.

[0029] Figure 3b It is a schematic diagram of the threshold flip characteristics of the OTS device provided according to some embodiments of the present application.

[0030] Figure 3cIt is a schematic diagram of the current-voltage correspondence curve of the OTS device provided according to some embodiments of the present application.

[0031] Figure 4 This is another waveform diagram of an external signal and a control signal of an internal switch circuit provided according to some embodiments of the present application.

[0032] Figure 5 This is another circuit structure schematic diagram of a semiconductor device provided according to some embodiments of the present application.

[0033] Figure 6 This is another waveform diagram of an external signal and a control signal of an internal switch circuit provided according to some embodiments of the present application.

[0034] Figure 7 The measured current and corresponding voltage distribution diagram of a semiconductor device provided according to some embodiments of the present application.

[0035] Figure 8 is a flowchart of an operating method of a semiconductor device provided according to some embodiments of the present application.

[0036] Fig. 9 is a flowchart of another semiconductor device operating method provided according to some embodiments of the present application. DETAILED DESCRIPTION

[0037] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0038] It should be understood that although the terms first, second, etc. may be used herein to describe various components, these components should not be limited to these terms. These terms are used to distinguish one component from another component. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component without departing from the scope of the present application.

[0039] It should be understood that when a component is said to be "on" or "connected" another component, it can be directly on or connected to another component, or there may be an intervening component. Other words used to describe the relationship between components should be interpreted in a similar manner.

[0040] As used herein, the term "layer" refers to a portion of a material including an area having a thickness. A layer may extend over the entire underlying or superstructure, or may have an extent that is less than the extent of the underlying or superstructure. In addition, a layer may be an area of ​​a uniform or non-uniform continuous structure having a thickness that is less than the thickness of a continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure or between any set of horizontal planes at the top and bottom surfaces. A layer may extend horizontally, vertically and / or along a tapered surface. A substrate may be a layer, which may include one or more layers, and / or may have one or more layers on, above and / or below it. A layer may include multiple layers. For example, an interconnect layer may include one or more conductive layers and a contact layer and one or more dielectric layers.

[0041] It should be noted that the illustrations provided in the embodiments of the present application are only used to illustrate the basic concept of the present application in a schematic manner. Although the illustrations only show components related to the present application and are not drawn according to the number, shape and size of components in actual implementation, the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the component layout may also be more complicated.

[0042] According to some embodiments of the present application, a semiconductor device includes a bidirectional threshold switch device and an internal switch circuit. The bidirectional threshold switch device has a first end and a second end connected for power supply; the internal switch circuit connects the first end and the second end and is used to receive an external signal and to apply an internal pulse signal with a bias time shorter than the bias time of the external signal to the bidirectional threshold switch device.

[0043] Specifically, Figure 1 As shown, Figure 1 1 is a schematic diagram of a circuit structure of a semiconductor device provided according to some embodiments of the present application. Figure 1 In the embodiment, the semiconductor device 100 includes a bidirectional threshold switch device 110 and an internal switch circuit 120. The bidirectional threshold switch device 110 has a first terminal 110a and a second terminal 110b which are electrically connected.

[0044] The internal switch circuit 120 includes a first switch 120a and a second switch 120b. The first switch 120a is connected in parallel with the first end 110a and the second end 110b of the bidirectional threshold switch device 110 to the first node N1 and the second node N2, and is selectively switched between an on and off state according to a first control signal Ctrl_1, thereby selectively bypassing the bidirectional threshold switch device 110 or allowing the bidirectional threshold switch device 110 to be subjected to an external bias. The second switch 120b is connected to the second node N2, and selectively conducts the external signal according to a second control signal Ctrl_2.

[0045] The semiconductor device 100 further includes a first bias access point WL and a second bias access point BL for receiving the external signal, and the external signal includes a first bias voltage V wl and a second bias voltage V bl which can be respectively conducted to the first node N1 and the second node N2 through the first bias access point WL and the second bias access point BL.

[0046] Figure 2 The waveform diagram shows the external signal and the control signal of the internal switch circuit. Figure 2 As shown, through Figure 1 In the circuit shown, when the first bias voltage Vwl and the second bias voltage Vbl as external signals are applied to the first bias access point WL and the second bias access point BL at the first time point T1, since the first switch 120a is originally in the on state, this state constitutes a bypass path for the bidirectional threshold switch device 110, and thus the external signals Vwl and Vbl will not be immediately applied to the bidirectional threshold switch device 110, until the first switch is selectively disconnected by the control of the first control signal Ctrl_1 at the time point T2, and then the external signal Vwl will be applied to the bidirectional threshold switch device 110.

[0047] It can be further understood that if a continuous signal Vwl is received from the first bias input access point WL connected to the bidirectional threshold switch (OTS) device 110, according to the control of the first switch 120a described above, the bidirectional threshold switch (OTS) device 110 can also receive an internal pulse signal with pulses. Therefore, through the setting of the internal switch circuit 120, the external signal can be internally converted into a pulse signal and applied to the bidirectional threshold switch (OTS) device 110, so the internal switch circuit 120 has the function of converting the external signal into an internal pulse signal.

[0048] In some embodiments, when the internal switch circuit 120 does not include the second switch 120b, and the second end 110b is directly connected to the second bias access point BL, after receiving the external signal, the bidirectional threshold switch device 110 can still be subjected to an internal pulse signal with a bias time shorter than the bias time of the external signal. Therefore, in achieving the purpose of applying an internal pulse signal with a bias time shorter than the bias time of the external signal, the second switch 120b can be selectively omitted without affecting the purpose.

[0049] Further Figure 1 As shown, when the internal switch circuit 120 includes a second switch 120b, and the second end 110b is connected to the second bias access point BL through the second switch 120b, as shown in FIG. Figure 2As shown, since the second switch 120b is originally in the off state, the external signal Vbl will not be immediately applied to the bidirectional threshold switch device 110 until the second switch is selectively turned on under the control of the second control signal Ctrl_2 at time point T2, and then the external signal Vbl will be applied to the bidirectional threshold switch device 110.

[0050] Compared with the embodiment in which only the first switch 120 a is used to control the conversion of the external signal into the internal pulse signal, the embodiment in which the second switch 120 b is added can make the control of the external signal more reliable.

[0051] In some embodiments, the second switch 120b of the internal switch circuit 120 may also be disposed between the first bias access point WL and the first node (not shown), which may also achieve the effect of applying the external signal to the OTS device at time T2. Therefore, it can be said that the second switch 120b is connected to one of the first node and the second node, and selectively conducts the external signal according to the second control signal.

[0052] Through the embodiments described above, since the internal switching circuit 120 converts the external signal into an internal pulse signal, the pulse accuracy can be greatly improved, and the voltage drop caused by the online resistance can be eliminated. At the same time, the shorter time alternating current (AC) bias (internal pulse signal) can avoid the stress and heat accumulation caused by direct current (DC) (external signal).

[0053] In some embodiments, Figure 1 The specific structure and operation of the bidirectional threshold switch device 110 are shown in FIG. Figure 3a , Figure 3b as well as Figure 3c shown. Figure 3a is a schematic structural diagram of a bidirectional threshold switch device 110 provided according to some embodiments of the present application; Figure 3b is a schematic diagram of threshold flip characteristics of a bidirectional threshold switch device 110 provided according to some embodiments of the present application; Figure 3c Schematic diagram of a current-voltage relative curve of a bidirectional threshold switch device 110 provided according to some embodiments of the present application.

[0054] Specifically, Figure 3a A schematic diagram of the structure of a bidirectional threshold switch (OTS) device 110 is shown. Figure 3aAs shown, the bidirectional threshold switch (OTS) device 110 includes a first end 110a and a second end 110b connected to a first bias access point WL and a second bias access point BL, respectively, and a top electrode 110c and a bottom electrode 110d located at the first end 110a and the second end 110b, a chalcogenide compound material 110e located between the top electrode 110c and the bottom electrode 110d, and a dielectric material or insulating material 110f located between the first end 110a and the second end 110b and surrounding the chalcogenide compound material 110e. The chalcogenide compound material 110e of the bidirectional threshold switch (OTS) device 110 may include one or more phase change materials such as materials based on germanium-antimony-tellurium (Ge-Sb-Te, GST), one example of which may be Ge2Sb2Te5, or may be composed of a phase change material such as Ge-Te-As-Si. The top electrode 110c and the bottom electrode 110d are arranged opposite to each other, and their positions can be interchanged and matched with the outer first end 110a and the second end 110b to overlap, thereby forming a 3D structure.

[0055] Figure 3b A graph showing the logarithmic current of the OTS device 110 versus the voltage applied across the two electrodes is shown. Starting from the high resistance cut-off state (reset) under low electric field, the current in the OTS device 110 increases with increasing voltage at a very small current value Ic until reaching the threshold voltage V at the fast return point 115. TH OTS After that, it will enter the low resistance conduction state (set state) and enter the holding voltage V H OTS .

[0056] After the fast return point 115, as long as a current higher than the holding current I H OTS When a current of 100 flows through the OTS device 110, a highly conductive dynamic ON state is maintained in the OTS device 110, and an ON current Io is provided. The transient highly conductive state is electronically originated and does not involve a phase change in the OTS device 110.

[0057] When the threshold voltage V of the OTS device 110 is exceeded TH OTSWhen the bidirectional threshold switch (OTS) device 110 is switched from the cut-off (OFF) state to the conduction (ON) state, and current flows through the bidirectional threshold switch (OTS) device 110. In the ON state, as the current flowing through the bidirectional threshold switch (OTS) device 110 increases, the voltage across the bidirectional threshold switch (OTS) device 110 remains close to the holding voltage (V H OTS ).

[0058] The OTS device 110 may be kept in the ON state until the current through the OTS device 110 is lower than the holding current (I H OTS ). H OTS ) value, the OTS device 110 may return to a high-resistance, non-conductive OFF state until V is exceeded again. TH OTS or I TH OTS Whenever it is guided, the bidirectional threshold switch (OTS) device 110 can be repeatedly and reversibly switched between the OFF state and the ON state, but it is not crystallized, which phenomenon makes the OTS device 110 have a threshold flip characteristic.

[0059] Figure 3c Another current-voltage corresponding curve diagram of the bidirectional threshold switch device 110 provided according to some embodiments of the present application is shown. Figure 3c As shown, when the bias voltage applied to the bidirectional threshold switch device 110 is greater than Vth, the current jumps from a trace current to Ion and is in the on state. The applied bias voltage continues to increase, and the current of Ion maintains the flowing state; when the bias voltage is reduced to the holding voltage Vhold, the current jumps from the flowing state to a state close to Ioff; when the bias voltage is reduced to a state close to, for example, Figure 3c When the threshold voltage is half of the value shown, that is, Vth / 2, the current passing through the bidirectional threshold switch device 110 is 0, that is, the Ioff state.

[0060] Furthermore, in further research of the present application, it is understood that the threshold voltage Vth in the bidirectional threshold switch device (OTS device) 110 is affected by many factors, such as changes in device structure, amplitude of applied pulses, pulse width, ramp rate and relaxation time. In further research, it is found that when the OTS device is composed of a phase change material such as Ge-Te-As-Si, the threshold voltage Vth of the OTS device 110 will be controlled by the polarity of the applied voltage and change, more specifically, the threshold voltage changes with the change of the polarity of the applied voltage. Therefore, the OTS device can be used independently for binary storage devices, so the OTS device 110 is called SOM memory (selector only memory) or SSM memory (self-selecting memory) in addition to being called a fast return selector or access element. Therefore, for the convenience of expression, the bidirectional threshold switch (OTS) device is unified here as a general term for the aforementioned various names, so the aforementioned various names are included in the OTS device described in the present application. That is, the OTS device described herein includes SOM devices, SSM devices, and the like.

[0061] Figure 4 The OTS device is shown as a selector-only memory device (SOM). Figure 2 The waveform diagram of the external signal and the control signal of the internal switch circuit when the bias direction is opposite. Figure 4 As shown, through Figure 1 In the circuit shown, when the reverse first bias voltage Vwl and the forward second bias voltage Vbl as external signals are applied to the first bias access point WL and the second bias access point BL at the first time point T1, since the first switch 120a is originally in the on state, this state constitutes a bypass path for the bidirectional threshold switch device 110, and thus the external signals Vwl and Vbl will not be immediately applied to the bidirectional threshold switch device 110, until the first switch is selectively disconnected by the control of the first control signal Ctrl_1 at the time point T2, and then the external signal Vwl will be applied to the bidirectional threshold switch device 110.

[0062] The conditions of the second terminal 110b, the second switch 120b, and the second bias access point BL are similar to those described above. Figure 2 That is, Figure 4 As shown, since the second switch 120b is originally in the off state, the external signal Vbl will not be immediately applied to the bidirectional threshold switch device 110 until the second switch is selectively turned on by the control of the second control signal Ctrl_2 at time point T2, and the forward second bias voltage Vbl as the external signal will be applied to the bidirectional threshold switch device 110.

[0063] Figure 4 and Figure 2 The only difference is that the polarity of the first bias voltage Vwl is different from that of the second bias voltage Vbl. Figure 2 The pulse signal shown will generate a forward write operation to obtain a threshold voltage representing a value of 1, for example; Figure 4 The pulse signal shown will generate a reverse writing operation to obtain a threshold voltage representing a value of 0, for example.

[0064] Furthermore, in further research of the present application, it is understood that when the bidirectional threshold switch device 110 is used as a switch or a memory SOM, Figure 3c As shown, between the current shutoff Ioff and the holding voltage Vhold, a small amount of current will pass through the bidirectional threshold switch device 110. For the bidirectional threshold switch device 110 as a memory, since it is necessary to sense the value stored in the bidirectional threshold switch device 110 through current sensing, it is important to obtain the intrinsic holding voltage when the current is shut off Ioff, that is, the holding voltage when the current passing through the bidirectional threshold switch device 110 is zero, for determining the read window margin. The so-called intrinsic holding voltage here is between the holding voltage Vhold and the corresponding voltage Vth / 2 of the current shutoff Ioff. The following will further explain the device and method for obtaining the intrinsic holding voltage disclosed in some embodiments of the present application.

[0065] Figure 5 Another circuit structure schematic diagram of a semiconductor device provided according to some embodiments of the present application is shown. Figure 5 As shown, the semiconductor device 200 provided according to some embodiments of the present application includes Figure 1 In addition to the OTS device 110 and the internal switch circuit 120, the OTS device 110 further includes a current mirror circuit 130. The current mirror circuit 130 has a read line RL connected to the second node N2, and provides a conducting current for measurement to the bidirectional threshold switch device 110 through the read line RL, or reads a read current passing through the bidirectional threshold switch device 110.

[0066] In some embodiments, the contact C3 of the current mirror circuit 130 may be connected to a comparator to sense the current flowing through the OTS device when both ends of the OTS device are subjected to a read bias, and to read the value stored in the OTS device (as a SOM device at this time) when the OTS device is used as a memory. In other embodiments of the present application, the contact C3 may also be connected to a current source to provide a variable current, which is sent to the OTS device 110 via the read line RL, that is, to measure the intrinsic holding voltage of the OTS device.

[0067] Therefore, when the OTS device 110 is to sense the stored value therein, the bias voltage to which the OTS device is subjected can be applied to the bidirectional threshold switch (OTS) device 110 only after it is converted into a pulse signal inside the device through the internal switch circuit 120. In this way, the pulse accuracy can be greatly improved, and the voltage drop caused by the line resistance can be eliminated. At the same time, the shorter AC bias (internal pulse signal) can avoid the bias stress and heat accumulation caused by the DC (external signal). Therefore, the external signal and the internal switch circuit 120 described in the present application can be used not only when writing values, but also when reading the stored values ​​of the OTS device.

[0068] exist Figure 5 In the illustrated embodiment, the semiconductor device 200 further includes a third bias access point Iprober, which is connected to the read line and receives a third bias voltage as one of the external signals, i.e., a read bias voltage applied to the other end of the OTS device relative to the WL end during reading, and the second switch 120b is disposed between the second bias access point BL and the second node N2, or is disposed between the first bias access point WL and the first node N1 as described above (not shown).

[0069] In some other embodiments (not shown), the read line RL may also be connected between the second node N2 and the second bias access point BL, the second switch 120b is disposed in the read line RL or between the first bias access point WL and the first node N1, and the second bias access point BL receives a third bias voltage as one of the external signals, i.e., a read bias voltage applied to the BL end of the OTS device relative to the WL end during reading. In such an embodiment, the second bias access point BL serves as a bias application point during writing and reading operations. It is believed that under this description, the circuit diagram should be understandable even without a diagram, so the diagram is omitted.

[0070] Further, if Figure 5 As shown, the semiconductor device 200 provided according to some embodiments of the present application includes, in addition to the OTS device 110, the internal switch circuit 120, and the current mirror circuit 130, a first voltage measurement point C1 and a second voltage measurement point C2, for measuring the intrinsic holding voltage Vhold0 of the OTS device. The first voltage measurement point C1 and the second voltage measurement point C2 are connected to the first end 110a and the second end 110b, respectively, for extracting the first voltage V1 and the second voltage V2, respectively, when the conduction current for measurement passes through the bidirectional threshold switch device 110.

[0071] Figure 6A waveform diagram showing a selected magnitude of the conduction current current is sent to the OTS device 110 via the contact C3. Figure 5 and Figure 6 As shown, the first bias access point WL and the second bias access point BL are respectively applied with a forward bias from the first bias access point WL to the second bias access point BL, but are controlled by the first switch 120a of the internal switch circuit 120. That is, at the beginning, the first switch 120a is turned on, so that the OTS device 110 is bypassed, and at time T2, the first switch 120a is turned off, so that the external signals Vwl, Vbl and the conduction current current pass through the OTS device 110.

[0072] When current passes through the OTS device, by extracting the voltages V1 and V2 at both ends of the OTS device from the first voltage measurement point C1 and the second voltage measurement point C2, the voltage drop in the OTS device when the conduction current passes through the OTS device can be measured, and then the intrinsic holding voltage of the OTS device can be obtained.

[0073] It can be understood that the semiconductor device 100 / 200 disclosed herein can reduce bias stress through an internal switching circuit, and can more accurately control the time when the OTS device is biased, so it can be applied to the storage circuit in the chip and set in the chip. In addition, after the first and second voltage measurement points are added, in addition to being set in the chip and obtaining the intrinsic holding voltage of the OTS device through a detection calculation unit (not shown) set outside or in the same chip, it can also be set in the cutting path of the wafer and used as a detection device, and then calculated by a detection calculation unit (not shown) placed outside or in other chips. Since this detection calculation unit can be set in the same chip as the semiconductor device shown, or in an external device, it is not separately illustrated in the drawings of the present application, but it should be understood based on this description.

[0074] Specifically, the detection calculation unit described here can obtain a set of the first voltage V1 and the second voltage V2 corresponding to the on-current I, and then obtain the device voltage drop of the bidirectional threshold switch device 110 under the on-current I according to the formula V0=(V1-V2) / (Ix(Rswl+Rsbl+Rcwl+Rcbl+Rcell)); wherein V0 is the device voltage drop, V1 is the first voltage, V2 is the second voltage, I is the on-current, Rswl and Rcwl are respectively the line resistance and contact resistance between the first voltage measurement point C1 and the first end 110a, Rsbl and Rcbl are respectively the line resistance and contact resistance between the second voltage measurement point C2 and the second end 110b, and Rcell is the resistance of the bidirectional threshold switch device 110 itself.

[0075] After obtaining the first device voltage drop V0 corresponding to the first on-current I, the on-current I can be changed, and a new device voltage drop V0_n corresponding to the new on-current In can be obtained, and a plurality of device voltage drops V0[1:n] corresponding to the plurality of on-currents I[1:n] can be obtained, for example Figure 7 The current-to-voltage distribution diagram shown in the figure shows that the device voltage drop V0 values ​​corresponding to the on-currents I1 to I5 are obtained. That is, by connecting the first voltage measurement point and the second voltage measurement point of the first end and the second end respectively, the multiple device voltage drops of the bidirectional threshold switch device corresponding to the multiple on-currents are obtained. Then, according to the formula fitting method, the device voltage drop V0_0 corresponding to the on-current is zero (I_0) is calculated, and the intrinsic holding voltage of the bidirectional threshold switch device 110 is obtained.

[0076] Since the detection calculation unit described here can be implemented in various known or possible ways after the formula listed above has been disclosed, no further explanation is given here. In short, the detection calculation unit can be, for example, a computer or detection instrument separated from the chip or wafer, or another chip, or it can be set in another chip packaged together with the semiconductor device 100 / 200.

[0077] In short, the semiconductor device provided by the present application can not only convert the external pulse signal into an internal pulse signal through the internal switching circuit, thereby greatly improving the pulse accuracy. And through the test of different currents, according to the formula fitting, the intrinsic holding voltage of the device can be accurately obtained. Not only the voltage drop caused by the online resistance is eliminated, but also the short-term alternating current (AC) measurement can avoid the bias stress and heat accumulation caused by direct current (DC), and obtain a more accurate intrinsic holding voltage.

[0078] According to the semiconductor device disclosed above, some embodiments of the present application further provide a method for operating a semiconductor device, which is used to accurately control the bias time and reduce the bias stress, and can measure the intrinsic holding voltage under the state of accurately controlling the bias time and reducing the bias stress. This measurement method is also considered as a method for operating a semiconductor device. Further description is given below.

[0079] like Figure 8 As shown, with Figure 1 and Figure 5 As shown, the operating method of the semiconductor device 100 / 200 provided according to some embodiments of the present application includes:

[0080] In step S1, external signals Vwl and Vbl are applied; and

[0081] In step S2, the internal switch circuit 120 is controlled so that the bidirectional threshold switch device 110 is applied with an internal pulse signal having a bias time shorter than the bias time of the external signals Vwl and Vbl, wherein the bidirectional threshold switch device 110 has a first end 110a and a second end 110b connected for power supply, and the internal switch circuit 120 connects the first end 110a and the second end 110b and is used to receive the external signals Vwl and Vbl.

[0082] Specifically, in some embodiments, the step of controlling the internal switch circuit 120 includes: providing a first control signal Ctrl_1 to selectively disconnect a first switch 120a connected in parallel with the first end 110a and the second end 110b of the bidirectional threshold switch device 110 to the first node N1 and the second node N2, so that the bidirectional threshold switch device 110 changes from being bypassed to being biased during the application of the external signals Vwl and Vbl, thereby generating the internal pulse signal applied to the bidirectional threshold switch device 110.

[0083] In some embodiments, the step of controlling the internal switch circuit 120 includes: providing a second control signal Ctrl_2 to selectively turn on a second switch 120b connecting one of the first node N1 and the second node N2, for turning on the external signal during the period of applying the external signal (Vwl or Vbl).

[0084] In some embodiments, the operating method also includes: receiving the external signals Vwl and Vbl through a first bias access point WL and a second bias access point BL, and the external signal includes a first bias voltage Vwl and a second bias voltage Vbl that can be respectively conducted to the first node N1 and the second node N2 through the first bias access point WL and the second bias access point BL.

[0085] The specific circuit structure for implementing the above steps and operation methods can be referred to Figure 1 The examples and descriptions shown are sufficient, so no further elaboration is required here.

[0086] In some embodiments, Figure 5 and Fig. 9 As shown, the operation method further includes: in step S3, providing a measurement conduction current I to the bidirectional threshold switch device 110 or reading a read current passing through the bidirectional threshold switch device through a read line RL arranged in the current mirror circuit 130 and connected to the second node N2.

[0087] Through the embodiments described above, since the internal switching circuit 120 converts the external signal into an internal pulse signal, the pulse accuracy can be greatly improved, and the voltage drop caused by the online resistance can be eliminated. At the same time, the shorter time alternating current (AC) bias (internal pulse signal) can avoid the stress and heat accumulation caused by direct current (DC) (external signal).

[0088] In some embodiments, Figure 5 and Fig. 9 As shown, the operation method further includes:

[0089] In step S4, by respectively connecting the first voltage measurement point C1 and the second voltage measurement point C2 of the first end 110a and the second end 110b, when the bidirectional threshold switch device 110 is biased by the internal pulse signal and the measurement current I passes through the bidirectional threshold switch device 110, the first voltage V1 and the second voltage V2 are respectively extracted.

[0090] Through step S4, the aforementioned intrinsic holding voltage can be measured.

[0091] In some embodiments, the operating method further includes receiving a measurement bias voltage Vs through a third bias access point Iprober connected to the read line RL, and disconnecting the second switch 120b disposed between the second bias access point BL and the second node N2.

[0092] In some embodiments, the operating method includes providing the measured on-current I or reading the read current through the bidirectional threshold switch device 110 through the read line RL located between the second node N2 and the second bias access point BL, turning on the second switch 120b, and receiving the measured bias voltage Vs through the second bias access point BL.

[0093] The above two embodiments are merely illustrative of various possible current mirror connection methods, and appropriate changes may be made without departing from the spirit of the present application.

[0094] In some embodiments, applying an external signal includes: applying a write bias including a first bias voltage Vwl and a second bias voltage Vbl, applying a read voltage, or applying a measurement bias Vs. That is, the method shown in this embodiment can be applied to write, read, or measure voltages specifically provided in this application.

[0095] Further, in some embodiments, Figure 5 and Fig. 9As shown, the operation method also includes: in step S5, after obtaining a set of the first voltage V1 and the second voltage V2 corresponding to the measuring on-current I, further obtaining the device voltage drop V0 of the bidirectional threshold switch device 110 under the measuring on-current I according to the formula V0=(V1-V2) / (Ix(Rswl+Rsbl+Rcwl+Rcbl+Rcell)); wherein V0 is the device voltage drop, V1 is the first voltage, V2 is the second voltage, I is the on-current, Rswl and Rcwl are respectively the line resistance and contact resistance between the first voltage measurement point and the first end, Rsbl and Rcbl are respectively the line resistance and contact resistance between the second voltage measurement point and the second end, and Rcell is the resistance of the bidirectional threshold switch device.

[0096] In some embodiments, Figure 5 and Fig. 9 As shown, the operation method further includes: in step S6, each time the device voltage drop V0 is obtained, the on-current I is changed, and a new device voltage drop V0_n corresponding to the new on-current In is obtained, and a plurality of device voltage drops V0_n corresponding to the plurality of on-currents In are obtained, such as Figure 7 The currents I1 to I5 shown are used to calculate the device voltage drop V0_0 when the on-current is 0 according to the formula fitting method, thereby obtaining the intrinsic holding voltage of the bidirectional threshold switch device 110.

[0097] Based on the contents of the above steps S3 to S6, steps S3 to S6 can be summarized as the operation method further comprising:

[0098] sequentially providing a plurality of conduction currents through the bidirectional threshold switch device 110;

[0099] By connecting a first voltage measurement point C1 and a second voltage measurement point C2 of the first end 110a and the second end 110b respectively, a plurality of device voltage drops V0 of the bidirectional threshold switch device 110 corresponding to the plurality of conduction currents I are obtained; and

[0100] According to the formula fitting method, the device voltage drop V0_0 when the on-current is zero (I_0) is calculated to obtain the intrinsic holding voltage of the bidirectional threshold switch device 110.

[0101] Through the following steps S3 to S6, the intrinsic holding voltage measurement method described above can be performed. Again, although the main purpose is measurement, the process is also an operation, so it is named here as a semiconductor device operation method.

[0102] The operating method of the semiconductor device provided by some embodiments of the present application can not only convert the external pulse signal into an internal pulse signal through the internal switching circuit, thereby greatly improving the pulse accuracy. And through the test of different currents, according to the formula fitting, the intrinsic holding voltage of the device can be accurately obtained. Not only the voltage drop caused by the online resistance is eliminated, but also the short-term alternating current (AC) measurement can avoid the bias stress and heat accumulation caused by direct current (DC), and obtain a more accurate intrinsic holding voltage.

[0103] The description of the above embodiments is only used to help understand the technical solutions and core ideas of the present application. Ordinary technical personnel in this field should understand that they can still modify the technical solutions recorded in the aforementioned embodiments, or replace some of the technical features therein with equivalents. However, these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A semiconductor device, characterized in that: The semiconductor device comprises: A bidirectional threshold switch device having a first end and a second end connected for power supply; and The internal switch circuit connects the first end and the second end and is used to receive an external signal and to cause the bidirectional threshold switch device to be subjected to an internal pulse signal with a bias time shorter than the bias time of the external signal.

2. The semiconductor device according to claim 1, wherein: The internal switch circuit comprises: The first switch is connected to the first node and the second node in parallel with the first end and the second end of the bidirectional threshold switch device, and is selectively disconnected according to a first control signal.

3. The semiconductor device according to claim 2, characterized in that The internal switch circuit also includes: The second switch is connected to one of the first node and the second node, and selectively conducts the external signal according to a second control signal.

4. The semiconductor device according to claim 3, characterized in that The semiconductor device further includes a first bias access point and a second bias access point for receiving the external signal, and the external signal includes a first bias voltage and a second bias voltage which can be respectively conducted to the first node and the second node through the first bias access point and the second bias access point.

5. The semiconductor device according to claim 4, characterized in that The semiconductor device further comprises: The current mirror circuit has a read line connected to the second node, and the read line can be used to provide a conduction current for measurement to the bidirectional threshold switch device or to read a read current passing through the bidirectional threshold switch device.

6. The semiconductor device according to claim 5, characterized in that The semiconductor device further comprises: The first voltage measurement point and the second voltage measurement point are connected to the first end and the second end respectively, and are used to extract a first voltage and a second voltage respectively when a current passes through the bidirectional threshold switch device.

7. The semiconductor device according to claim 4, characterized in that The semiconductor device also includes a third bias access point connected to the read line and receiving a third bias as one of the external signals, and the second switch is arranged between the second bias access point and the second node, or between the first bias access point and the first node.

8. The semiconductor device according to claim 4, characterized in that The read line is connected between the second node and the second bias access point, the second switch is arranged in the read line or between the first bias access point and the first node, and the second bias access point receives a third bias voltage as one of the external signals.

9. The semiconductor device according to claim 1, wherein: The semiconductor device is arranged in a dicing street of a wafer.

10. A method for operating a semiconductor device, characterized in that: The operation method comprises: applying an external signal; and Control the internal switch circuit so that the bidirectional threshold switch device is applied with an internal pulse signal whose bias time is shorter than the bias time of the external signal, and wherein the bidirectional threshold switch device has a first end and a second end connected for power supply, and the internal switch circuit connects the first end and the second end and is used to receive the external signal.

11. The method for operating a semiconductor device according to claim 10, wherein: The operation method also includes: sequentially providing a plurality of conduction currents through the bidirectional threshold switch device; By respectively connecting a first voltage measurement point and a second voltage measurement point of the first end and the second end, a plurality of device voltage drops of the bidirectional threshold switch device corresponding to the plurality of conduction currents are obtained; and According to the formula fitting method, the device voltage drop when the on-current is zero is calculated to obtain the intrinsic holding voltage of the bidirectional threshold switch device.

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