Semiconductor device and method of operating a semiconductor device
By converting external signals into internal pulse signals through internal switching circuits and current mirror circuits, and combining voltage measurement points and formula fitting, the problem of insufficient reading accuracy in 3D X-point memory is solved, and high-precision reading window margin is enhanced.
Patent Information
- Application Number
- CN202411559741.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-04
- Publication Date
- 2026-01-13
- Estimated Expiration
- 2044-11-04
AI Technical Summary
In 3D X-point memory, current solutions for increasing read accuracy to expand the read window margin of SOM devices have not yielded satisfactory results.
An internal switching circuit is used to convert external signals into internal pulse signals, and the voltage drop of the device is accurately measured through a current mirror circuit and a voltage measurement point. The intrinsic holding voltage is obtained by fitting a formula.
It improves pulse accuracy, reduces bias stress and heat accumulation, accurately obtains the intrinsic holding voltage of the device, and enhances readout accuracy.
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Figure CN119724291B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of electronic devices, and in particular to a semiconductor device for measurement and a method of operating a semiconductor device. BACKGROUND
[0002] In 3D X-point memory, a memory cell is composed of a selector (a switch used as a cell selection element, or OTS, Ovonic Threshold Switch) and a memory element (PCM, Phase Change Memory). It has a so-called 1S1R configuration. There are two main methods to increase the storage density using this architecture, one is miniaturization, and the other is to increase the number of three-dimensional stacked memory cell arrays. However, these two methods have almost reached the limit in the second generation of 3D X-point memory (4 layers).
[0003] What hinders its further development is the increase in etching difficulty and the increase in thermal interference between adjacent cells. The memory cell with a cross-point structure has an elongated columnar shape and has a large etching aspect ratio. Reducing the processing size means that the support of the memory cell is deteriorated without changing the height of the memory cell, thereby increasing the risk of etching failure.
[0004] Unlike 3D X-point memory, when the selector is used as a memory, also known as Selector Only Memory (SOM), the data stored is the difference in threshold voltage. The results of the memory cell prototype design show that even if the processing size is 15 nm, the high threshold voltage (reset) and the low threshold voltage state (set) can be maintained. In addition, the write time of the SOM device is short, the write time can be maintained basically consistent between the reset and set states, and the life of the write cycle is also much more than the 1S1R structure.
[0005] However, how to increase the reading accuracy and thus increase the read window margin (RWM) of SOM has always been a problem to be solved. Although various solutions have been proposed, a good solution has not been obtained. SUMMARY
[0006] The purpose of the present application is to provide a semiconductor device and a method of operating a semiconductor device for solving the problem of bias stress and reading accuracy.
[0007] In a first aspect, the present application provides a semiconductor device, comprising: a bidirectional threshold switch device having a first end and a second end connected in power supply; and
[0008] An internal switching circuit connects the first terminal and the second terminal, and is used to receive external signals and to subject the bidirectional threshold switching device to an internal pulse signal with a bias time shorter than that of the external signal.
[0009] Optionally, the internal switching circuit includes: a first switch, connected in parallel with the first and second terminals of the bidirectional threshold switching device at the first and second nodes, and selectively disconnected according to a first control signal.
[0010] Optionally, the internal switching circuit further includes a second switch, connecting one of the first node and the second node, and selectively activating the external signal according to a second control signal.
[0011] Optionally, the semiconductor device further includes a first bias access point and a second bias access point for receiving the external signal, and the external signal includes a first bias and a second bias that can be respectively conducted to the first node and the second node through the first bias access point and the second bias access point.
[0012] Optionally, the semiconductor device further includes a current mirror circuit having a readout line connected to the second node, the readout line being used to provide a measurement current to the bidirectional threshold switching device or to read the current.
[0013] Optionally, the semiconductor device further includes: a first voltage measurement point and a second voltage measurement point, respectively connected to the first terminal and the second terminal, for extracting the first voltage and the second voltage respectively when current flows through the bidirectional threshold switch device.
[0014] Optionally, the semiconductor device further includes a third bias access point connected to the read line and receiving a third bias as one of the external signals, and the second switch is disposed between the second bias access point and the second node, or between the first bias access point and the first node.
[0015] Optionally, the read line is connected between the second node and the second bias access point, the second switch is disposed in the read line or between the first bias access point and the first node, and the second bias access point receives a third bias as one of the external signals.
[0016] Optionally, the semiconductor device is disposed in the dicing channel of the wafer.
[0017] Secondly, this application provides a method for operating a semiconductor device, the method comprising:
[0018] Apply external signals; and
[0019] An internal switching circuit is controlled to subject a bidirectional threshold switching device to an internal pulse signal with a bias time shorter than that of the external signal, wherein the bidirectional threshold switching device has a first terminal and a second terminal with power supply connection, and the internal switching circuit is connected to the first terminal and the second terminal and is used to receive the external signal.
[0020] Optionally, the operation method further includes:
[0021] Multiple conduction currents are sequentially supplied through the bidirectional threshold switching device;
[0022] By connecting the first voltage measurement point and the second voltage measurement point of the first terminal and the second terminal respectively, the voltage drops of the bidirectional threshold switch device corresponding to the plurality of conduction currents are obtained; and
[0023] Based on the formula fitting method, the voltage drop of the device when the conduction current is zero is calculated, and the intrinsic holding voltage of the bidirectional threshold switch device is obtained.
[0024] The semiconductor device and its operating method provided in this application not only allow for the conversion of external pulse signals into internal pulse signals via an internal switching circuit, thereby significantly improving pulse accuracy and reducing bias stress, but also enable the accurate acquisition of the device's intrinsic holding voltage through formula fitting by testing different currents. Furthermore, it eliminates the voltage drop caused by line resistance, and the shorter AC measurement time avoids bias stress and heat accumulation caused by DC, thus achieving a more accurate intrinsic holding voltage. Attached Figure Description
[0025] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.
[0026] Figure 1 This is a schematic diagram of a circuit structure of a semiconductor device provided according to some embodiments of this application.
[0027] Figure 2 This is a waveform diagram of the external signal and the control signal of the internal switching circuit provided according to some embodiments of this application.
[0028] Figure 3a This is a schematic diagram of the structure of an OTS device provided according to some embodiments of this application.
[0029] Figure 3b This is a schematic diagram of the threshold switching characteristics of an OTS device provided according to some embodiments of this application.
[0030] Figure 3cThis is a schematic diagram of the current-voltage correspondence curves of an OTS device provided according to some embodiments of this application.
[0031] Figure 4 This is another waveform diagram of the external signal and the control signal of the internal switching circuit provided according to some embodiments of this application.
[0032] Figure 5 This is a schematic diagram of another circuit structure of a semiconductor device provided according to some embodiments of this application.
[0033] Figure 6 This is another waveform diagram of the external signal and the control signal of the internal switching circuit provided according to some embodiments of this application.
[0034] Figure 7 This is a diagram showing the measured current and corresponding voltage distribution of a semiconductor device according to some embodiments of this application.
[0035] Figure 8 This is a flowchart of an operation method for a semiconductor device provided according to some embodiments of this application.
[0036] Figure 9 This is a flowchart of another method of operating a semiconductor device according to some embodiments of this application. Detailed Implementation
[0037] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0038] It should be understood that although the terms first, second, etc., may be used herein to describe various components, these components should not be limited to these terms. These terms are used to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the scope of this application.
[0039] It should be understood that when a component is said to be "on" or "connected" to another component, it can be directly on or connected to the other component, or there may be an inserted component. Other terms used to describe relationships between components should be interpreted in a similar manner.
[0040] As used herein, the term "layer" refers to a portion of material comprising a region having thickness. A layer may extend over the entirety of an underlying or upper layer structure, or may have a range smaller than that of the underlying or upper layer structure. Furthermore, a layer may be a region of a uniform or non-uniform continuous structure with a thickness less than the thickness of the continuous structure. For example, a layer may be located between the top and bottom surfaces of a continuous structure or between any set of horizontal planes at the top and bottom surfaces. A layer may extend horizontally, vertically, and / or along a tapered surface. A substrate may be a layer, which may include one or more layers, and / or may have one or more layers on, above, and / or below it. A layer may include multiple layers. For example, an interconnect layer may include one or more conductive layers and contact layers, as well as one or more dielectric layers.
[0041] It should be noted that the illustrations provided in the embodiments of this application are only schematic representations of the basic concept of this application. Although the illustrations only show the components related to this application and are not drawn according to the actual number, shape and size of the components, the form, quantity and proportion of each component in actual implementation can be arbitrarily changed, and the layout of the components may also be more complex.
[0042] The semiconductor device provided according to some embodiments of this application includes a bidirectional threshold switch and an internal switching circuit. The bidirectional threshold switch has a first terminal and a second terminal that are electrically connected; the internal switching circuit is connected to the first terminal and the second terminal and is used to receive an external signal and to apply an internal pulse signal to the bidirectional threshold switch with a bias time shorter than the bias time of the external signal.
[0043] Specifically, such as Figure 1 As shown, Figure 1 This is a schematic diagram of a circuit structure for a semiconductor device according to some embodiments of this application. Figure 1 In the semiconductor device 100, there are bidirectional threshold switching devices 110 and internal switching circuits 120. The bidirectional threshold switching devices 110 have a first terminal 110a and a second terminal 110b that are electrically connected.
[0044] The internal switching circuit 120 includes a first switch 120a and a second switch 120b. The first switch 120a is connected in parallel with the first terminal 110a and the second terminal 110b of the bidirectional threshold switch device 110 to the first node N1 and the second node N2, and is selectively switched between on and off states according to a first control signal Ctrl_1, thereby selectively bypassing the bidirectional threshold switch device 110 or subjecting the bidirectional threshold switch device 110 to an external bias voltage. The second switch 120b is connected to the second node N2 and is selectively turned on by the external signal according to a second control signal Ctrl_2.
[0045] The semiconductor device 100 further includes a first bias access point WL and a second bias access point BL for receiving the external signal, and the external signal includes a first bias Vwl and a second bias Vbl that can be respectively connected to the first node N1 and the second node N2 through the first bias access point WL and the second bias access point BL.
[0046] Figure 2 The diagram shows the waveforms of external signals and control signals from the internal switching circuit. For example... Figure 2 As shown, through Figure 1 In the circuit shown, when the first bias voltage Vwl and the second bias voltage Vbl, which are external signals, are applied to the first bias access point WL and the second bias access point BL at the first time point T1, the first switch 120a is originally in the conducting state. This state constitutes a bypass path for the bidirectional threshold switch device 110. Therefore, the external signals Vwl and Vbl will not be applied to the bidirectional threshold switch device 110 immediately. It is not until the first switch is selectively turned off by the first control signal Ctrl_1 at the time point T2 that the external signal Vwl will be applied to the bidirectional threshold switch device 110.
[0047] Furthermore, it can be understood that if a continuous signal Vwl is received from the first bias input access point WL of the bidirectional threshold switch (OTS) device 110, the bidirectional threshold switch (OTS) device 110 can also be subjected to an internal pulse signal with a pulse according to the control of the first switch 120a described above. Therefore, by setting the internal switch circuit 120, an external signal can be internally converted into a pulse signal and applied to the bidirectional threshold switch (OTS) device 110. Thus, the internal switch circuit 120 has the function of converting an external signal into an internal pulse signal.
[0048] In some embodiments, when the internal switching circuit 120 does not include the second switch 120b, and the second terminal 110b is directly connected to the second bias access point BL, after receiving an external signal, the bidirectional threshold switching device 110 can still be subjected to an internal pulse signal with a bias duration shorter than that of the external signal. Therefore, in achieving the goal of applying an internal pulse signal with a bias duration shorter than that of the external signal, the second switch 120b can be selectively omitted without affecting the achievement of the goal.
[0049] Further as Figure 1 As shown, when the internal switching circuit 120 includes a second switch 120b, and the second terminal 110b is connected to the second bias input point BL through the second switch 120b, as follows: Figure 2As shown, since the second switch 120b was originally in the off state, the external signal Vbl will not be immediately applied to the bidirectional threshold switch device 110 until time point T2, when the second switch is selectively turned on by the second control signal Ctrl_2, and then the external signal Vbl will be applied to the bidirectional threshold switch device 110.
[0050] Compared to the embodiment that only uses the first switch 120a to control the conversion of external signals into internal pulse signals, the embodiment with the second switch 120b can make the control of external signals more reliable.
[0051] In some embodiments, the second switch 120b of the internal switching circuit 120 may also be disposed between the first bias access point WL and the first node (not shown), which can also achieve the effect of applying the external signal to the OTS device only at time T2. Therefore, it can be said that the second switch 120b is connected to one of the first node and the second node, and selectively conducts the external signal according to the second control signal.
[0052] Through the embodiments described above, since the internal switching circuit 120 converts the external signal into an internal pulse signal, the pulse accuracy can be greatly improved, and the voltage drop caused by the line resistance can be eliminated. At the same time, the short-duration AC bias (internal pulse signal) can avoid the stress and heat accumulation caused by DC (external signal).
[0053] In some embodiments, Figure 1 The specific structure and operation of the bidirectional threshold switch device 110 shown are as follows: Figure 3a , Figure 3b as well as Figure 3c As shown. Figure 3a This is a schematic diagram of the structure of a bidirectional threshold switch device 110 provided according to some embodiments of this application; Figure 3b This is a schematic diagram of the threshold switching characteristics of a bidirectional threshold switching device 110 provided according to some embodiments of this application; Figure 3c This is a schematic diagram of the current-voltage relative curve of a bidirectional threshold switching device 110 provided according to some embodiments of this application.
[0054] Specifically, Figure 3a A schematic diagram of a bidirectional threshold switch (OTS) device 110 is shown. Figure 3aAs shown, the bidirectional threshold switch (OTS) device 110 includes a first terminal 110a and a second terminal 110b respectively connected to a first bias access point WL and a second bias access point BL, a top electrode 110c and a bottom electrode 110d located between the first terminal 110a and the second terminal 110b, a chalcogenide material 110e located between the top electrode 110c and the bottom electrode 110d, and a dielectric or insulating material 110f located between the first terminal 110a and the second terminal 110b and surrounding the chalcogenide material 110e. The chalcogenide material 110e of the bidirectional threshold switch (OTS) device 110 may include one or more phase change materials, such as germanium-antimony-tellurium (Ge-Sb-Te, GST) materials, one example of which may be Ge2Sb2Te5, or it may be composed of a phase change material such as Ge-Te-As-Si. The top electrode 110c and the bottom electrode 110d are arranged opposite to each other, and their positions can be interchanged and overlapped with the outer first end 110a and the second end 110b to form a 3D structure.
[0055] Figure 3b The graph shows the logarithmic current of the bidirectional threshold switch (OTS) device 110 relative to the voltage applied to the two electrodes. Starting from the high-resistance off state (reset) under low electric field, the current in the bidirectional threshold switch (OTS) device 110 increases with voltage, but at a very small current value Ic, until it reaches the threshold voltage V at the fast return point 115. TH OTS After that, it will enter a low-resistance conduction state (set state) and enter the holding voltage V. H OTS .
[0056] After the fast return point 115, as long as a bidirectional threshold switch (OTS) device 110 is provided with a current higher than the holding current I... H OTS When a current flows through the bidirectional threshold switch (OTS) device 110, a highly conductive dynamic ON state is maintained in the bidirectional threshold switch (OTS) device 110, and there is a conduction current Io. This transient high conductivity state originates electronically and does not involve a phase transition in the bidirectional threshold switch (OTS) device 110.
[0057] When the threshold voltage V of the bidirectional threshold switch (OTS) device 110 is exceeded TH OTSWhen the bidirectional threshold switch (OTS) device 110 switches from the OFF state to the ON state, current flows through the OTS device 110. In the ON state, as the current flowing through the OTS device 110 increases, the voltage across the OTS device 110 remains close to the holding voltage (V). H OTS ).
[0058] The bidirectional threshold switch (OTS) device 110 can remain in the ON state until the current through the bidirectional threshold switch (OTS) device 110 is lower than the holding current (I0). H OTS Until the holding current (I) is reached. H OTS After exceeding the specified value, the bidirectional threshold switch (OTS) device 110 can return to a high-resistance, non-conductive OFF state until the value is exceeded again. TH OTS Or I TH OTS Until then. Whenever it is guided, the bidirectional threshold switch (OTS) device 110 can repeatedly and reversibly switch between the OFF and ON states, but it does not crystallize. This phenomenon gives the OTS device 110 a threshold flipping characteristic.
[0059] Figure 3c This diagram illustrates another current-voltage correspondence curve for a bidirectional threshold switching device 110 provided according to some embodiments of this application. For example... Figure 3c As shown, when the bias voltage applied to the bidirectional threshold switch 110 is greater than Vth, the current jumps from a small current to Ion, indicating a conducting state. As the applied bias voltage continues to increase, the current in Ion remains in a flowing state. When the applied bias voltage decreases to the holding voltage Vhold, the current jumps from the flowing state to a state close to Ioff. When the applied bias voltage decreases to approximately... Figure 3c When the threshold voltage shown is half, that is, Vth / 2, the current through the bidirectional threshold switch device 110 is 0, that is, the Ioff state.
[0060] Furthermore, in further research of this application, it was understood that the threshold voltage Vth in the bidirectional threshold switching device (OTS device) 110 is affected by many factors, such as changes in device structure, the amplitude of the applied pulse, the pulse width, the ramp rate, and the relaxation time. Further research revealed that when the OTS device is composed of a phase-change material such as Ge-Te-As-Si, the threshold voltage Vth of the OTS device 110 is controlled by the polarity of the applied voltage; more specifically, the threshold voltage changes with the polarity of the applied voltage. Therefore, the OTS device can be used independently as a binary storage device. Thus, the OTS device 110 is also referred to as a fast-return selector or access element, as well as an SOM memory (selector only memory) or an SSM memory (self-selecting memory). Therefore, for ease of description, the term "bidirectional threshold switching (OTS) device" is used here as a general term for all the aforementioned names, and all of the aforementioned names are included in the OTS device described in this application. That is, the OTS device described herein includes SOM devices, SSM devices, etc.
[0061] Figure 4 When the OTS device is displayed as a selector-only memory device (SOM), it is in contrast to... Figure 2 The diagram shows the waveforms of the external signal and the control signal of the internal switching circuit when the bias directions are opposite. Figure 4 As shown, through Figure 1 In the circuit shown, when the reverse first bias voltage Vwl and the positive second bias voltage Vbl, which are external signals, are applied to the first bias access point WL and the second bias access point BL at the first time point T1, since the first switch 120a was originally in the conducting state, this state constitutes a bypass path for the bidirectional threshold switch device 110. Therefore, the external signals Vwl and Vbl will not be immediately applied to the bidirectional threshold switch device 110 until the first switch is selectively turned off by the first control signal Ctrl_1 at the time point T2. Only then will the external signal Vwl be applied to the bidirectional threshold switch device 110.
[0062] The status of the second terminal 110b, the second switch 120b, and the second bias connection point BL is the same as before. Figure 2 The same as described above. That is, as... Figure 4 As shown, since the second switch 120b was originally in the off state, the external signal Vbl will not be immediately applied to the bidirectional threshold switch device 110 until time point T2, when the second switch is selectively turned on by the second control signal Ctrl_2, and the positive second bias voltage Vbl as the external signal will be applied to the bidirectional threshold switch device 110.
[0063] Figure 4 and Figure 2 The only difference is the polarity of the first bias voltage Vwl and the second bias voltage Vbl. (This is achieved through...) Figure 2 The pulse signal shown will generate a positive write operation, thereby obtaining, for example, a threshold voltage representing the value 1; through Figure 4 The pulse signal shown will generate a reverse write operation, thereby obtaining, for example, a threshold voltage representing the value 0.
[0064] Furthermore, in further research of this application, it is understood that when the bidirectional threshold switch device 110 is used as a switch or a memory SOM, such as Figure 3c As shown, between the current-off Ioff and the holding voltage Vhold, a small current flows through the bidirectional threshold switch 110. For the bidirectional threshold switch 110, which functions as a memory, it is crucial to determine the intrinsic holding voltage when the current is off Ioff—that is, the holding voltage when the current through the bidirectional threshold switch 110 is zero—since the value stored in the bidirectional threshold switch 110 needs to be sensed via current sensing. This is essential for determining the read window margin. The intrinsic holding voltage here lies between the holding voltage Vhold and the corresponding voltage Vth / 2 when the current is off Ioff. The apparatus and method for obtaining the intrinsic holding voltage, as disclosed in some embodiments of this application, will be further described below.
[0065] Figure 5 This diagram illustrates another circuit structure of a semiconductor device according to some embodiments of this application. For example... Figure 5 As shown, the semiconductor device 200 provided according to some embodiments of this application includes, in addition to, Figure 1 In addition to the OTS device 110 and the internal switching circuit 120 shown, a current mirror circuit 130 is also included. The current mirror circuit 130 has a read line RL connected to the second node N2, and provides a measurement-use on-state current to the bidirectional threshold switch device 110 or reads the read current passing through the bidirectional threshold switch device 110 through the read line RL.
[0066] In some embodiments, the contact C3 of the current mirror circuit 130 may be connected to a comparator to sense the current flowing through the OTS device when its terminals are subjected to a read bias voltage, and to read the value stored in the OTS device (which is then used as an SOM device) when the OTS device is used as memory. In other embodiments of this application, the contact C3 may also be connected to a current source to provide a variable current, which is sent to the OTS device 110 via the read line RL, i.e., to measure the intrinsic holding voltage of the OTS device.
[0067] Therefore, when the value stored in the OTS device 110 needs to be sensed, the bias voltage applied to the OTS device can be converted into a pulse signal internally by the internal switching circuit 120 before being applied to the bidirectional threshold switch (OTS) device 110. This significantly improves pulse accuracy and eliminates voltage drop caused by line resistance. Furthermore, the shorter AC bias voltage (internal pulse signal) avoids bias stress and heat accumulation caused by DC (external signal). Therefore, the external signal and internal switching circuit 120 described in this application can be used not only for writing values but also for reading the stored values from the OTS device.
[0068] exist Figure 5 In the illustrated embodiment, the semiconductor device 200 further includes a third bias access point Iprober, which is connected to the read line and receives a third bias as one of the external signals, namely, the read bias applied to the other end of the OTS device relative to the WL terminal during read. The second switch 120b is disposed between the second bias access point BL and the second node N2, or disposed between the first bias access point WL and the first node N1 as described above (not shown).
[0069] In some other embodiments (not shown), the read line RL may also be connected between the second node N2 and the second bias access point BL, with the second switch 120b disposed in the read line RL or between the first bias access point WL and the first node N1. The second bias access point BL receives a third bias voltage as one of the external signals, i.e., the read bias voltage applied to the OTS device relative to the WL terminal during reading. In such embodiments, the second bias access point BL serves as the bias application point for both write and read operations. It is believed that the circuit diagram can be understood under this description even without illustrations, therefore, illustrations are omitted.
[0070] Furthermore, such as Figure 5 As shown, the semiconductor device 200 provided according to some embodiments of this application includes, in addition to the OTS device 110, the internal switching circuit 120, and the current mirror circuit 130, a first voltage measurement point C1 and a second voltage measurement point C2, used to measure the intrinsic holding voltage Vhold0 of the OTS device. The first voltage measurement point C1 and the second voltage measurement point C2 are respectively connected to the first terminal 110a and the second terminal 110b, and are used to extract the first voltage V1 and the second voltage V2 respectively when the conducting current for measurement passes through the bidirectional threshold switching device 110.
[0071] Figure 6This diagram shows a waveform of a selected current being supplied to OTS device 110 via contact C3. (Example) Figure 5 and Figure 6 As shown, the first bias access point WL and the second bias access point BL are each subjected to a positive bias voltage from the first bias access point WL to the second bias access point BL, but are controlled by the first switch 120a of the internal switching circuit 120. That is, initially, the first switch 120a is on, so the OTS device 110 is bypassed. At time T2, the first switch 120a is turned off, allowing the external signals Vwl, Vbl and the current current to pass through the OTS device 110.
[0072] When current flows through the OTS device, by extracting the voltages V1 and V2 across the OTS device from the first voltage measurement point C1 and the second voltage measurement point C2, the voltage drop in the OTS device when there is conducting current can be measured, and the intrinsic holding voltage of the OTS device can be obtained.
[0073] Understandably, the semiconductor devices 100 / 200 disclosed herein, due to their internal switching circuitry, can reduce bias stress and more precisely control the bias duration of the OTS device, thus enabling their application in chip-based memory circuits and their placement within the chip. Furthermore, with the addition of the first and second voltage measurement points, in addition to being placed within the chip and using a detection and calculation unit (not shown) located externally or within the same chip to determine the intrinsic holding voltage of the OTS device, they can also be placed in the wafer dicing channel as a detection device, and then calculated using a detection and calculation unit (not shown) located externally or in another chip. Since this detection and calculation unit can be located within the same chip as the illustrated semiconductor device or in an external device, it is not separately illustrated in the figures of this application, but this explanation should suffice.
[0074] Specifically, the detection and calculation unit described here can obtain a set of first voltages V1 and second voltages V2 corresponding to a conduction current I, and then calculate the device voltage drop of the bidirectional threshold switch device 110 under the conduction current I according to the formula V0=(V1-V2) / (Ix(Rswl+Rsbl+Rcwl+Rcbl+Rcell)). Wherein, V0 is the device voltage drop, V1 is the first voltage, V2 is the second voltage, I is the conduction current, Rswl and Rcwl are the line resistance and contact resistance between the first voltage measurement point C1 and the first terminal 110a, respectively, Rsbl and Rcbl are the line resistance and contact resistance between the second voltage measurement point C2 and the second terminal 110b, respectively, and Rcell is the resistance of the bidirectional threshold switch device 110 itself.
[0075] After obtaining the first device voltage drop V0 corresponding to the first on-current I, the on-current I can be varied, and the new device voltage drop V0_n corresponding to the new on-current In can be obtained. This allows for the calculation of multiple device voltage drops V0[1:n] corresponding to multiple on-currents I[1:n], for example... Figure 7 The current-to-voltage distribution diagram shown illustrates the device voltage drops V0 corresponding to the conduction currents I1 to I5. That is, by connecting the first voltage measurement point and the second voltage measurement point to the first and second terminals respectively, the device voltage drops of the bidirectional threshold switch device corresponding to the multiple conduction currents are obtained. Then, using a formula fitting method, the device voltage drop V0_0 corresponding to the conduction current being zero (I_0) is calculated, thus obtaining the intrinsic holding voltage of the bidirectional threshold switch device 110.
[0076] Since the detection calculation unit described herein can be implemented in various known or possible ways after the formulas listed above have been disclosed, it will not be described in detail here. Simply put, the detection calculation unit can be, for example, a computer or detection instrument separate from the chip or wafer, or another chip, or it can be disposed in another chip packaged together with the semiconductor device 100 / 200.
[0077] In summary, the semiconductor device provided in this application can not only convert external pulse signals into internal pulse signals through internal switching circuits, thereby significantly improving pulse accuracy, but also accurately obtain the intrinsic hold voltage of the device through testing with different currents and fitting the formula. This not only eliminates the voltage drop caused by line resistance, but also avoids bias stress and heat accumulation caused by direct current (DC) measurements during shorter AC measurements, thus achieving a more accurate intrinsic hold voltage.
[0078] Based on the semiconductor devices disclosed above, some embodiments of this application further provide an operating method for a semiconductor device, used to precisely control the bias time and reduce bias stress, and to measure the intrinsic holding voltage while precisely controlling the bias time and reducing bias stress. This measurement method is also considered an operating method for a semiconductor device. Further explanation follows.
[0079] like Figure 8 As shown, in conjunction with Figure 1 and Figure 5 As shown, the operation method of the semiconductor device 100 / 200 provided according to some embodiments of this application includes:
[0080] In step S1, external signals Vwl and Vbl are applied; and
[0081] In step S2, the internal switching circuit 120 is controlled to apply an internal pulse signal to the bidirectional threshold switching device 110, which has a bias time shorter than that of the external signals Vwl and Vbl. The bidirectional threshold switching device 110 has a first terminal 110a and a second terminal 110b that are electrically connected, and the internal switching circuit 120 is connected to the first terminal 110a and the second terminal 110b and is used to receive the external signals Vwl and Vbl.
[0082] Specifically, in some embodiments, the step of controlling the internal switch circuit 120 includes: providing a first control signal Ctrl_1 to selectively disconnect a first switch 120a connected in parallel with the first terminal 110a and the second terminal 110b of the bidirectional threshold switch device 110 to the first node N1 and the second node N2, thereby causing the bidirectional threshold switch device 110 to change from being bypassed to being biased during the application of the external signals Vwl and Vbl, thereby generating the internal pulse signal applied to the bidirectional threshold switch device 110.
[0083] In some embodiments, the step of controlling the internal switch circuit 120 includes: providing a second control signal Ctrl_2 to selectively turn on a second switch 120b connecting one of the first node N1 and the second node N2, for turning on the external signal (Vwl or Vbl) during the application of the external signal.
[0084] In some embodiments, the operation method further includes: receiving external signals Vwl and Vbl through a first bias access point WL and a second bias access point BL, wherein the external signals include a first bias Vwl and a second bias Vbl that can be respectively connected to the first node N1 and the second node N2 through the first bias access point WL and the second bias access point BL.
[0085] The specific circuit structure for implementing the aforementioned steps and operating methods can be found in [reference needed]. Figure 1 The examples and explanations shown are sufficient, so we will not elaborate further here.
[0086] In some embodiments, such as Figure 5 and Figure 9 As shown, the operation method further includes: in step S3, providing a measurement-use conduction current I to the bidirectional threshold switch device 110 or reading the read current passing through the bidirectional threshold switch device through the read line RL provided in the current mirror circuit 130 and connected to the second node N2.
[0087] Through the embodiments described above, since the internal switching circuit 120 converts the external signal into an internal pulse signal, the pulse accuracy can be greatly improved, and the voltage drop caused by the line resistance can be eliminated. At the same time, the short-duration AC bias (internal pulse signal) can avoid the stress and heat accumulation caused by DC (external signal).
[0088] In some embodiments, such as Figure 5 and Figure 9 As shown, the operation method further includes:
[0089] In step S4, by connecting the first voltage measurement point C1 and the second voltage measurement point C2 to the first terminal 110a and the second terminal 110b respectively, when the bidirectional threshold switch device 110 is biased by the internal pulse signal and the measurement current I passes through the bidirectional threshold switch device 110, the first voltage V1 and the second voltage V2 are extracted respectively.
[0090] Step S4 allows for the measurement of the intrinsic holding voltage described above.
[0091] In some embodiments, the operation method further includes receiving a measured bias voltage Vs through a third bias access point Iprober connected to the reading line RL, and disconnecting the second switch 120b located between the second bias access point BL and the second node N2.
[0092] In some embodiments, the operation method includes providing the measurement conduction current I or reading the read current through the read line RL located between the second node N2 and the second bias access point BL, turning on the second switch 120b, and receiving the measurement bias Vs through the second bias access point BL.
[0093] The two embodiments above are merely illustrative of various possible current mirror connection methods, and appropriate changes can be made without departing from the spirit of this application.
[0094] In some embodiments, applying an external signal includes: applying a write bias voltage including a first bias voltage Vwl and a second bias voltage Vbl, applying a read voltage, or applying a measurement bias voltage Vs. That is, the method shown in this embodiment can be applied to writing, reading, or the measurement voltage specifically provided in this application.
[0095] Furthermore, in some embodiments, such as Figure 5 and Figure 9As shown, the operation method further includes: in step S5, after obtaining a set of first voltages V1 and second voltages V2 corresponding to a measurement conduction current I, the device voltage drop V0 of the bidirectional threshold switch device 110 under the measurement conduction current I is further calculated according to the formula V0=(V1-V2) / (Ix(Rswl+Rsbl+Rcwl+Rcbl+Rcell)); where V0 is the device voltage drop, V1 is the first voltage, V2 is the second voltage, I is the conduction current, Rswl and Rcwl are the line resistance and contact resistance between the first voltage measurement point and the first terminal, respectively, Rsbl and Rcbl are the line resistance and contact resistance between the second voltage measurement point and the second terminal, and Rcell is the resistance of the bidirectional threshold switch device.
[0096] In some embodiments, such as Figure 5 and Figure 9 As shown, the operation method further includes: in step S6, after each acquisition of the device voltage drop V0, the conduction current I is changed, and the new device voltage drop V0_n corresponding to the new conduction current In is calculated, and multiple device voltage drops V0_n corresponding to multiple conduction currents In are calculated, such as... Figure 7 The currents I1 to I5 are shown. Then, according to the formula fitting method, the voltage drop V0_0 of the device when the conduction current is 0 is calculated, and the intrinsic holding voltage of the bidirectional threshold switch device 110 is obtained.
[0097] Based on the content of steps S3 to S6 described above, steps S3 to S6 can be summarized as follows: The operation method further includes:
[0098] Multiple conduction currents are sequentially supplied through the bidirectional threshold switching device 110;
[0099] By connecting the first voltage measurement point C1 and the second voltage measurement point C2 of the first terminal 110a and the second terminal 110b respectively, the device voltage drops V0 of the bidirectional threshold switch device 110 corresponding to the plurality of conduction currents I are obtained; and
[0100] Based on the formula fitting method, the device voltage drop V0_0 when the conduction current is zero (I_0) is calculated, and the intrinsic holding voltage of the bidirectional threshold switch device 110 is obtained.
[0101] Through the subsequent steps S3 to S6, the intrinsic holding voltage measurement method described above can be performed. Furthermore, although the primary purpose is measurement, the process itself is also an operation, so it is here named a semiconductor device operation method.
[0102] The semiconductor device operation methods provided by some embodiments of this application can not only significantly improve pulse accuracy by converting external pulse signals into internal pulse signals through internal switching circuits, but also accurately obtain the intrinsic hold voltage of the device by fitting a formula through testing with different currents. This not only eliminates the voltage drop caused by line resistance, but also avoids bias stress and heat accumulation caused by direct current (DC) measurements in a shorter time, thus obtaining a more accurate intrinsic hold voltage.
[0103] The above description of the embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application; those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A semiconductor device, characterized by, The semiconductor device comprises: a bidirectional threshold switching device having a first terminal and a second terminal connected in series, and the first terminal and the second terminal are connected to a word line and a bit line, respectively; and a first switch connected in parallel with the bidirectional threshold switching device between the first terminal and the second terminal, and selectively disconnected according to a first control signal, so that the bidirectional threshold switching device is biased by an internal pulse signal with a shorter bias time than an external signal; and a first voltage measurement point and a second voltage measurement point connected to the first terminal and the second terminal, respectively, for extracting a first voltage and a second voltage of the first terminal and the second terminal, respectively, when a current passes through the bidirectional threshold switching device.
2. The semiconductor device according to claim 1, wherein The semiconductor device further comprises: a second switch connected to one of the first terminal and the second terminal, and selectively turns on one of the word line and the bit line to the bidirectional threshold switching device according to a second control signal.
3. The semiconductor device of claim 1, wherein The semiconductor device further comprises: a current mirror circuit having a read line connected to the second terminal, and providing a current to the bidirectional threshold switching device through the read line, or reading a read current passing through the bidirectional threshold switching device.
4. The semiconductor device according to claim 3, wherein The semiconductor device further comprises a second switch disposed between the second terminal and the read line, and selectively turned on according to a second control signal.
5. The semiconductor device of claim 1, wherein The semiconductor device is disposed in a scribe lane of a wafer.
6. A method of operating a semiconductor device, characterized by, The operation method comprises: applying an external signal to a word line and a bit line connected to a first terminal and a second terminal of a bidirectional threshold switching device, respectively; and selectively disconnecting a first switch connected in parallel with the first terminal and the second terminal of the bidirectional threshold switching device according to a first control signal, so that the bidirectional threshold switching device is biased by an internal pulse signal with a shorter bias time than an external signal; and extracting a first voltage and a second voltage of the first terminal and the second terminal, respectively, when a current passes through the bidirectional threshold switching device, through a first voltage measurement point and a second voltage measurement point connected to the first terminal and the second terminal, respectively.
7. The method of operating a semiconductor device of claim 6, wherein, The operation method further comprises: sequentially providing a plurality of currents through the bidirectional threshold switching device; corresponding to the plurality of currents, respectively, obtaining a plurality of device voltage differences between the first voltage and the second voltage of the bidirectional threshold switching device under each of the currents; and obtaining an intrinsic holding voltage of the bidirectional threshold switching device by a formula fitting method according to the plurality of device voltage differences to calculate the device voltage difference when the current is zero.
8. The method of operating a semiconductor device of claim 6, wherein, The operation method further comprises: connecting one of the word line and the bit line to the bidirectional threshold switching device through a second switch connected to one of the first terminal and the second terminal and selectively turned on according to a second control signal.
9. The method of operating a semiconductor device of claim 6, wherein, The operation method further comprises: providing the current to the bidirectional threshold switching device through a current mirror circuit, wherein the current mirror circuit has a read line connected to the second terminal, and provides the current through the read line, or reads a read current passing through the bidirectional threshold switching device.
10. The method of operating a semiconductor device of claim 9, wherein, The operation method further includes selectively providing the current to the bi-directional threshold switching device through a second switch disposed between the second terminal and the read line and selectively turned on by a second control signal.
Citation Information
Patent Citations
Data recording method for semiconductor storage device
JP2012248249A