A driving circuit for suppressing SiC MOSFET bridge arm crosstalk

Abstract

The present invention discloses a driving circuit for suppressing crosstalk in SiC MOSFET bridge arms, which relates to the field of power electronics technology. The key points of the technical solution are that a push-pull circuit is connected to the gate of each bridge arm SiC MOSFET, a gate voltage clamping circuit is connected in parallel between the push-pull circuit and the SiC MOSFET gate, two field effect tube G terminals of the push-pull circuit are connected to a PWM1 signal, and an electrical isolation barrier exists between the PWM1 signal and the field effect tube G terminal. b 1 The D terminal of the field effect tube is connected to the gate of the SiC MOSFET. The gate voltage clamping circuit includes a capacitor C and an auxiliary MOS tube connected in series. The G terminal of the auxiliary MOS tube is also connected to a comparator circuit. The present invention is easy to integrate, has a simple control strategy, and does not include any additional control signals.

Description

Technical Field

[0001] The present invention belongs to the technical field of power electronics, and in particular relates to a driving circuit formula for suppressing SiC MOSFET bridge arm crosstalk. Background Art

[0002] In recent years, broadband semiconductor materials, particularly SiC MOSFETs, have gradually become the preferred devices for high-frequency, high-temperature, and high-power density power electronic converters due to their many excellent properties, such as wider bandgap, high thermal conductivity, fast switching speed, high blocking voltage, and excellent high-temperature resistance. These characteristics give SiC MOSFETs significant advantages in demanding applications such as electric vehicles, renewable energy systems, aerospace, and industrial power drives. The superior performance of SiC MOSFETs not only improves system efficiency and power density, but also significantly reduces system size and weight, making more compact and reliable power electronic solutions possible.

[0003] However, as SiC MOSFETs gain increasing popularity in practical applications, new challenges are emerging. Due to their inherently high-speed switching capabilities, SiC MOSFETs generate large voltage change rates (dv / dt) and current change rates (di / dt) during switching, which inadvertently amplifies the negative impact of parasitic parameters in circuits and devices. Particularly in high-speed switching applications, the rapid turn-on and turn-off of SiC MOSFETs can lead to a series of potential problems. For example, in power converters using a phase-leg configuration, the rapid switching action can easily cause parasitic gate voltage spikes between adjacent SiC MOSFETs. These voltage spikes can cause severe crosstalk. Once crosstalk occurs, it can have a range of serious consequences. When the forward gate-source voltage spike exceeds the MOSFET's threshold voltage, it can cause the MOSFET to turn on at an inappropriate time, triggering a shoot-through phenomenon in the bridge arm structure. This phenomenon can cause a short circuit and, in severe cases, even damage the power device. In addition, if the negative gate-source voltage spike exceeds the minimum allowable voltage of the MOSFET, it may cause overvoltage breakdown of the adjacent MOSFET, thereby affecting the normal operation of the device and even causing system failure.

[0004] Therefore, to fully leverage the advantages of SiC MOSFETs in high-frequency, high-power density applications while overcoming the associated crosstalk issues, the development of fast and efficient gate drivers with crosstalk suppression capabilities is crucial. These gate drivers must not only respond quickly to accommodate the high-speed switching characteristics of SiC MOSFETs, but also optimize their design to reduce or eliminate parasitic effects caused by high-speed switching, ensuring the safe, stable, and efficient operation of SiC MOSFETs in a variety of complex application scenarios. Research and progress in this area will have a profound impact on the future development of power electronics technology.

[0005] Numerous research reports on gate drivers have previously proposed various methods for addressing crosstalk in SiC MOSFETs. Currently, crosstalk mitigation strategies can be broadly categorized into three main categories: reducing the dv / dt rate, providing a low-impedance path, and using multi-level voltage shutdown.

[0006] The above technology has the following disadvantages: it only has an inhibitory effect when the MOSFET is turned on, and is powerless against the negative gate crosstalk voltage generated during the turn-off transient, or it may simultaneously reduce the switching speed of the device or increase the circuit design difficulty and system control complexity and increase the driving loss. Summary of the Invention

[0007] The present invention aims to provide a driving circuit for suppressing crosstalk in SiC MOSFET bridge arms.

[0008] To achieve the above object, the present invention provides the following technical solutions:

[0009] A drive circuit for suppressing crosstalk in SiC MOSFET bridge arms, wherein a push-pull circuit is connected to the gate of each bridge arm SiC MOSFET, a gate voltage clamping circuit is connected in parallel between the push-pull circuit and the SiC MOSFET gate, two field effect transistor G terminals of the push-pull circuit are connected to a PWM1 signal, and an electrical isolation barrier exists between the PWM1 signal and the field effect transistor G terminal б 1 The D terminal of the field effect tube is connected to the gate of the SiC MOSFET. The gate voltage clamping circuit includes a capacitor C and an auxiliary MOS tube connected in series. The G terminal of the auxiliary MOS tube is also connected to a comparator circuit.

[0010] As a preferred solution of the present invention, the comparator circuit includes an amplifying module, and a resistor R5 is connected in series between the output end of the amplifying module and the auxiliary MOS tube. One end of the resistor R5 is connected to the G end of the auxiliary MOS tube, and the other end is connected to the output end of the amplifying module.

[0011] As a preferred solution of the present invention, the output end of the amplification module is connected in parallel with resistors R1, R2, R3 and R4, one end of resistor R1 is connected to the gate voltage VCC, and the other end is connected to resistor R2, the other end of resistor R2 is grounded, one end of resistor R3 is connected to the gate voltage VEE, and the other end is connected to resistor R4, and the other end of resistor R4 is grounded.

[0012] As a preferred solution of the present invention, the non-phase input terminal of the amplifying module is connected to the PWM2 signal, and the inverting input terminal of the amplifying module is connected to the reference voltage.

[0013] As a preferred solution of the present invention, there is an electrical isolation barrier between the PWM2 signal and the positive phase input terminal. б 2 .

[0014] In summary, the beneficial technical effects of the present invention are as follows: the method is easy to integrate, utilizes a comparator to control an active clamping circuit consisting of an auxiliary power tube and an auxiliary capacitor, and provides an isolation unit during the switching period of the switch tube to achieve signal delay and create a low-impedance loop. This effectively suppresses bridge arm crosstalk without reducing the high switching speed of the SiC power tube. At the same time, the drive circuit can clamp gate voltage spikes to a safe voltage range without reducing switching speed or increasing switching losses. The circuit does not include any additional control signals, and the control strategy is simple. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The accompanying drawings are used to provide a further understanding of the present invention and constitute a part of the specification, but do not constitute a limitation of the present invention. In the accompanying drawings:

[0016] Figure 1 1 is a circuit diagram of a driving circuit for suppressing SiC MOSFET bridge arm crosstalk according to this embodiment;

[0017] Figure 2 1 is a circuit diagram of operation modes 1 to 4 of a driving circuit for suppressing SiC MOSFET bridge arm crosstalk in this embodiment;

[0018] Figure 3 This is a circuit diagram of operating modes 5 to 8 of a driving circuit for suppressing SiC MOSFET bridge arm crosstalk in this embodiment;

[0019] Figure 4 1 is a schematic diagram of the switching sequence of a driving circuit for suppressing crosstalk in a SiC MOSFET bridge arm according to this embodiment;

[0020] Figure 5 This embodiment uses a different gate driver lower bridge arm Q H Turn on the transient simulation waveform comparison chart;

[0021] Figure 6 This embodiment uses a different gate driver lower bridge arm Q H Comparison of turn-off transient simulation waveforms;

[0022] Figure 7 This is a comparative test result of the crosstalk voltage between the PGD circuit and the traditional drive circuit when the lower bridge arm power device of this embodiment is turned on: A in the figure is the CGD circuit, and B is the PGD circuit;

[0023] Figure 8 The following are the comparison test results of the bridge arm crosstalk voltage between the PGD circuit and the traditional drive circuit when the lower bridge arm power device of this embodiment is turned off: A in the figure is the CGD circuit, and B is the PGD circuit;

[0024] Figure 9 This embodiment is V DC Change graph in the comparison test of changes;

[0025] Figure 10 This is a diagram showing the changes in the load current during a comparative test of this embodiment. DETAILED DESCRIPTION

[0026] The present invention will be further described in detail below with reference to the accompanying drawings.

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0028] See also Figure 1 The present invention provides a technical solution: a driving circuit for suppressing crosstalk in SiC MOSFET bridge arms, wherein a push-pull circuit is connected to the gate of each bridge arm SiC MOSFET, a gate voltage clamping circuit is connected in parallel between the push-pull circuit and the SiC MOSFET gate, and the two field effect tube G terminals of the push-pull circuit are connected to the PWM1 signal, and an electrical isolation barrier is provided between the PWM1 signal and the field effect tube G terminal. б 1 The D terminal of the field effect tube is connected to the gate of the SiC MOSFET. The gate voltage clamping circuit includes a capacitor C and an auxiliary MOS tube connected in series. The G terminal of the auxiliary MOS tube is also connected to a comparator circuit.

[0029] In this embodiment

[0030] The SiC MOSFET includes two bridge arms, a DC voltage source V DC, and inductor L, where the upper bridge arm includes: switch Q H , parasitic capacitance C gdH , parasitic capacitance C gsH , parasitic capacitance C dsH , parasitic resistance R gH(in) and inductor L gH The lower bridge arm includes: switch Q L , parasitic capacitance C gdL、 Parasitic capacitance C gsL , parasitic capacitance C dsL , parasitic resistance R gL(in) and inductor L gL .

[0031] Switch Q H The gates are connected to parasitic resistors R gH(in) One end of the parasitic capacitance C gdH One end and the parasitic capacitance C dsH One end of the parasitic capacitance C gsH The other end is connected to the switch Q H The source, inductor L gH One end and the parasitic capacitance C dsH One end of the parasitic capacitance C gdH The other end of the switch Q H The drain and parasitic capacitance C dsH The other end is connected to the DC voltage source V DC The positive electrode, parasitic capacitance C gdH The other end of the inductor L is connected to one end of the inductor L, and the other end of the inductor L is connected to the switch Q H The drain of the MOSFET is connected to the positive electrode of the DC voltage source Vdc.

[0032] Switch Q L The gates are connected to parasitic resistors R gL(in) One end of the parasitic capacitance C gdL One end and the parasitic capacitance C gsL One end of the parasitic capacitance C gsL The other end is connected to the switch Q L The source, inductor L gL One end and the parasitic capacitance C dsL One end of the parasitic capacitance C gdL The other end of the switch Q L The drain and parasitic capacitance C dsL The other end and the DC voltage source V DC The negative pole of the power supply is also connected to the power ground.

[0033] The G terminals of the two field effect tubes in the push-pull circuit are connected to the PWM1 signal, and there is an electrical isolation barrier between the PWM1 signal and the G terminals of the field effect tubes. б1 The D end of the field effect tube is connected to the gate of the SiC MOSFET, and the source of the field effect tube is connected in series with a resistor R g .

[0034] The comparator circuit includes an amplifier module. A resistor R5 is connected in series between the output end of the amplifier module and the auxiliary MOS tube. One end of the resistor R5 is connected to the G end of the auxiliary MOS tube, and the other end is connected to the output end of the amplifier module.

[0035] in б 1 It is the delay time required from the issuance of PWM signal to the change of gate drive voltage. б 2 Represents the propagation delay required for the PWM signal to reach the input of the complementary bridge arm comparator.

[0036] A SiC MOSFET crosstalk suppression driving circuit described in this embodiment includes a bridge arm portion and a complementary bridge arm portion.

[0037] The bridge arm part includes: resistor R 5H , resistor R 1H , resistor R 2H , resistor R 3H and resistor R 4H , resistor R 1H One end is connected to the gate voltage VCC H , the other end is connected to the resistor R 2H , resistor R 2H The other end is grounded, and the resistor R 3H One end is connected to the gate voltage VEE H , the other end is connected to the resistor R 4H , resistor R 4H The other end is grounded, the positive input of the amplifier module is connected to the PWM2 signal, and the negative input of the amplifier module is connected to the reference voltage. There is an electrical isolation barrier between the PWM2 signal and the positive input. б 2 , push-pull circuit, capacitor C H , inductance L SH2 .

[0038] The PWM1 signal passes through the electrical isolation barrier б 1 There is a signal transmission delay. After the signal is delayed, it is output through the S pole of the two field effect tubes and then connected to the capacitor C. H One end of the connection, C H The other end is connected to the D pole of the auxiliary MOS tube, the S pole of the auxiliary MOS tube is grounded, and the G pole of the auxiliary MOS tube is connected to the resistor R 5HThe other end of the resistor R5 is connected to the output end of the amplifier module. The positive input end of the amplifier module is connected to the PWM2 signal. The negative input end of the amplifier module is connected to the reference voltage. The output end of the amplifier module is connected in parallel with the resistor R 1H , resistor R 2H , resistor R 3H and resistor R 4H , resistor R 1H One end is connected to the gate voltage VCC and the other end is connected to the resistor R 2H , resistor R 2H The other end is grounded, and the resistor R 3H One end is connected to the gate voltage VEE, and the other end is connected to the resistor R 4H , resistor R 4H The other end is grounded, the inductor L SH2 One end is connected to the switch Q H The S pole is connected, the inductor L SH2 The other end is connected to one end of the inductor L.

[0039] The complementary bridge arm part includes: resistor R 5L , resistor R 1L , resistor R 2L , resistor R 3L and resistor R 4L , resistor R 1L One end is connected to the gate voltage VCC L , the other end is connected to the resistor R 2L , resistor R 2L The other end is grounded, and the resistor R 3L One end is connected to the gate voltage VEE L , the other end is connected to the resistor R 4L , resistor R 4L The other end is grounded, the positive input of the amplifier module is connected to the PWM2 signal, and the negative input of the amplifier module is connected to the reference voltage. There is an electrical isolation barrier between the PWM2 signal and the positive input. б 2 , push-pull circuit, capacitor C H , inductance L SH2 .

[0040] PWM2 signal passes through the electrical isolation barrier б 1 There is a signal transmission delay. After the signal is delayed, it is output through the S pole of the two field effect tubes and then connected to the capacitor C. H One end of the connection, C H The other end is connected to the D pole of the auxiliary MOS tube, the S pole of the auxiliary MOS tube is grounded, and the G pole of the auxiliary MOS tube is connected to the resistor R 5L One end of the resistor R 5LThe other end is connected to the output end of the amplifier module, the positive input end of the amplifier module is connected to the PWM1 signal, the negative input end of the amplifier module is connected to the reference voltage, and the output end of the amplifier module is connected in parallel with the resistor R 1L , resistor R 2L , resistor R 3L and resistor R 4L , resistor R 1L One end is connected to the gate voltage VCC and the other end is connected to the resistor R 2L , resistor R 2L The other end is grounded, and the resistor R 3L One end is connected to the gate voltage VEE, and the other end is connected to the resistor R 4L , resistor R 4L The other end is grounded, the inductor L SL2 One end is connected to the switch Q L The S pole is connected, the inductor L SL2 The other end is grounded.

[0041] In this embodiment, the PGD timing diagram is as follows: Figure 4 As shown, the operation mode is as follows Figure 2 、 3 The 8 operating modes are described as follows:

[0042] Mode 1 [t0-t1]: At t0, to turn on the lower bridge arm, the PWM2 signal transitions from low to high. After a propagation delay of б2, the signal reaches the high-side comparator input +IN_H. At t1, the voltage at +IN_H exceeds the set voltage, causing the comparator to output a voltage that turns on the auxiliary MOSFET, preparing to eliminate the forward crosstalk voltage. Throughout the lower bridge switching process, the high bridge remains off, so the PWM1 signal remains low. PWM1 is transmitted to the low-side comparator input +IN_L, where the voltage is less than the set voltage. The comparator outputs a negative voltage, keeping the low-side auxiliary MOSFET off.

[0043] Mode 2 [t1~t2]: from time t0 through б 1 After a delay of , the gate voltage of the lower bridge arm changes from the off-state voltage to the on-state voltage at time t2.

[0044] Mode 3 [t2~t3]: Forward crosstalk occurs at t2~t3. Since the parasitic capacitance of the auxiliary power tube is several orders of magnitude smaller than the capacitance of the series connection, the influence of the parasitic capacitance of the auxiliary MOS tube can be ignored. L The parasitic capacitance value is much larger, which provides a low-impedance loop for the Miller current at the moment when the upper tube crosstalk occurs, thereby greatly reducing the upper tube gate-source crosstalk voltage and suppressing the crosstalk.

[0045] Mode 4 [t3~t4]: The switching states of all power tubes remain unchanged, the circuit is stable, and no crosstalk occurs in the circuit.

[0046] Mode 5 [t4~t5]: PWM2 signal changes from high level to low level, and after the transmission time б 2 The post-conversion signal reaches the input terminal +IN_H of the upper bridge comparator. At time t5, the voltage value of +IN_H is lower than the set voltage value, so the comparator turns off the auxiliary MOS tube.

[0047] Mode 6 [t5~t6]: From time t5 through ( б 1 - б 2 ) after a delay of t6, the gate voltage of the lower bridge arm changes from the on-state voltage to the off-state voltage

[0048] Mode 7 [t6~t7]: At this time, negative crosstalk occurs. The Miller current will flow through the low-impedance loop formed by the parasitic diode and series capacitor of the auxiliary power tube. The negative voltage crosstalk generated by the gate-source of the upper tube will be reduced, which inhibits the damage of the negative crosstalk voltage to the upper tube when the lower tube is turned off.

[0049] Mode 8 [t7~t0]: The circuit reaches stability and no crosstalk occurs in the circuit.

[0050] According to the working principle of the proposed PGD, the crosstalk voltage can be minimized without slowing down the switching speed. The proposed PGD circuit is suitable for SiC MOSFETs with fast switching capability.

[0051] The proposed PGD was simulated and experimentally verified using a double-pulse test. In this implementation, LTspice was used to simulate both a conventional gate driver (CGD) and the proposed gate driver (PGD). To match the experimental conditions, the positive and negative gate voltages were set to +20V and -5V, respectively. The main circuit DC voltage was set to 200V, and the inductive load was 200μH. The external gate resistor was 5Ω, and the parasitic inductance of all gate drivers in the simulation was 10nH.

[0052] Table I lists the switching performance parameters of different gate drivers. Figure 5 The following figure compares the transient waveforms of the lower bridge arm QH turn-on using different gate drivers. The positive peak gate voltage of the traditional gate driver reaches -1.8 V, while the gate driver proposed in this article is around -2.8 V. Figure 6The following is a comparison of the transient simulation waveforms of the lower bridge arm QH turn-off using different gate drivers. The simulation results show that compared with the traditional drive circuit, the drive circuit proposed in this article not only ensures good crosstalk suppression, but also increases the system switching rate and reduces the total switching loss.

[0053] TABLE I. Parameters of PGD

[0054] Simulation results show that the proposed PGD has good crosstalk suppression performance.In order to gain a deeper understanding of the characteristics of the proposed PGD, a double-pulse test platform was built for experimental verification.

[0055] The double pulse experiment parameters are shown in Table II. Figure 7 and Figure 8 The comparison test results of the PGD crosstalk suppression drive circuit and the traditional drive circuit are given when the lower-arm power device is turned on and off. The switching characteristic parameters of the experimental results are shown in Table VI.

[0056] TABLE II. Double-pulse experimental parameters

[0057] from Figure 7 As can be seen in the figure, the peak positive crosstalk voltage of the conventional gate drive circuit reaches -2.54 V. During the turn-on transient of the lower MOSFET, the gate-source voltage VgsH increases by 3.26 V. Although VgsH remains within the safe range, the additional turn-on time increases the device's turn-on losses. The gate driver proposed in this paper has a peak positive crosstalk voltage of -3.11 V. After applying PGD, the crosstalk impact of the gate-source voltage VgsH is reduced by 0.57 V. Compared with the conventional method, the proposed PGD ensures the stability of the gate-source voltage VgsH during positive crosstalk, significantly improving the reliability of the power device. At the same time, the turn-on transient is shortened by 65.2%, reducing the device's turn-on losses.

[0058] Figure 8 The waveforms during the turn-off transient are shown. Similar to the turn-on transient, the peak negative crosstalk voltage of the conventional driver circuit is -8.51 V. During the turn-off transient, the gate-source voltage decreases by 3.51 V. Using PGD, the gate-generated negative crosstalk voltage is -6.63 V, reducing the peak negative crosstalk voltage by 22.1%. The turn-off transient is shortened from 110.0 ns to 41.6 ns, a 62.2% reduction, effectively suppressing the negative crosstalk generated during communication.

[0059] Figure 9The figure shows the comparative test results of DC voltage when the load current is 5 A, the gate resistance is 5 Ω, and Vdc varies from 100 to 400 V. When Vdc increases, the crosstalk phenomenon becomes more significant.

[0060] Figure 10 The comparison test results of load current variation are shown, where VDC is 200V and the external gate resistor is 5Ω. When the load current varies from 2 to 10A, the switching loss increases and the spike increases.

[0061] The working principle of the present invention is to use a comparator to control the active clamp circuit composed of an auxiliary power tube and an auxiliary capacitor, creating a low-impedance loop during the switching period of the switch tube. This can effectively suppress the bridge arm crosstalk problem while not reducing the high switching speed of the SiC power tube.

[0062] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that includes a list of elements includes not only those elements but also other elements not explicitly listed, or elements inherent to such process, method, article, or apparatus.

[0063] Finally, it should be noted that the above descriptions are merely preferred embodiments of the present invention and are not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art will be able to modify the technical solutions described in the aforementioned embodiments or substitute equivalents for some of the technical features. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention shall be included within the scope of protection of the present invention.

Claims

1. A driving circuit for suppressing SiC MOSFET bridge arm crosstalk, characterized in that: The gates of the upper and lower bridge arms of the SiC MOSFET are both connected to a push-pull circuit. A gate voltage clamp circuit is connected in parallel between the push-pull circuit and the SiC MOSFET gate. The two field effect tube G terminals of the push-pull circuit are connected to the PWM1 signal. There is an electrical isolation barrier between the PWM1 signal and the field effect tube G terminal. б 1 The D terminal of the field effect tube is connected to the gate of the SiC MOSFET, the gate voltage clamping circuit includes a capacitor C and an auxiliary MOS tube connected in series, and the G terminal of the auxiliary MOS tube is also connected to a comparator circuit; The comparator circuit includes an amplifier module, and a resistor R5 is connected in series between the output end of the amplifier module and the auxiliary MOS tube. One end of the resistor R5 is connected to the G end of the auxiliary MOS tube, and the other end is connected to the output end of the amplifier module; The positive input terminal of the amplifying module is connected to the PWM2 signal, and the negative input terminal of the amplifying module is connected to the reference voltage; There is an electrical isolation barrier between the PWM2 signal and the positive phase input terminal б 2 ; The PWM1 signal passes through the electrical isolation barrier б 1 There is a signal transmission delay. After the signal is delayed, it is output through the S pole of the two field effect tubes and then connected to the capacitor C. H One end of the capacitor C H The other end is connected to the D pole of the first auxiliary MOS tube, the S pole of the first auxiliary MOS tube is grounded, and the G pole of the first auxiliary MOS tube is connected to the resistor R 5H One end of the resistor R 5H The other end is connected to the amplifier module U H The output terminal; PWM2 signal passes through the electrical isolation barrier б 2 There is a signal transmission delay. After the signal is delayed, it is output through the S pole of the two field effect tubes and then connected to the capacitor C. L One end of the capacitor C L The other end is connected to the D pole of the second auxiliary MOS tube, the S pole of the second auxiliary MOS tube is grounded, and the G pole of the second auxiliary MOS tube is connected to the resistor R 5L One end of the resistor R 5L The other end is connected to the amplifier module U L The output terminal; The upper bridge arm includes: switch Q H 、Inductor L gH ; The lower bridge arm includes: switch Q L 、Inductor L gL ; Switch Q H The gate connection parasitic resistance R gH(in) One end of the parasitic resistance R gH(in) The other end of the inductor L gH One end of the inductor L gH The other end is connected to the capacitor C H One end of the connection; Switch Q L The gate connection parasitic resistance R gL(in) One end of the parasitic resistance R gL(in) The other end of the inductor L gL One end of the inductor L gL The other end is connected to the capacitor C L one end of the .

2. The driving circuit for suppressing SiC MOSFET bridge arm crosstalk according to claim 1, characterized in that: The output end of the amplifier module is connected in parallel with resistors R1, R2, R3 and R4. One end of resistor R1 is connected to the gate voltage VCC, and the other end is connected to resistor R2. The other end of resistor R2 is grounded. One end of resistor R3 is connected to the gate voltage VEE, and the other end is connected to resistor R4. The other end of resistor R4 is grounded.

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