Instruction processing method, electronic device, chip system and computer-readable storage medium

Abstract

The embodiments of the present application provide an instruction processing method, an electronic device, a chip system and a computer-readable storage medium, which relate to the field of communication technology. The method includes: the electronic device includes a first execution unit and a second execution unit. After receiving the MIPI instruction, the first execution unit determines which algorithm should be used to process the MIPI instruction based on the working mode information of the current electronic device. The first execution unit then sends at least one first processing instruction of the corresponding algorithm to the second execution unit in the electronic device, and the second execution unit executes the above-mentioned first processing instruction to obtain at least one adjusted MIPI instruction. The first processing instruction is a custom RISC‑V instruction, and the second execution unit can be developed based on the custom RISC‑V instruction. In this way, the number of instructions can be effectively reduced, and hardware acceleration can be combined to shorten the time for MIPI instruction algorithm processing, improve communication efficiency, and enhance user experience.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to an instruction processing method, electronic equipment, chip system and computer-readable storage medium. Background Art

[0002] Nowadays, with the popularization of mobile phones and the development of communication technology, general manufacturers will preset a variety of wireless communication methods and modes for users, such as cellular networks, Bluetooth, WiFi, etc.

[0003] MIPI commands are commonly used in communication devices to control related RF components. To accommodate various wireless communication methods and modes, corresponding algorithms are often used to perform various processing on MIPI commands. The resulting MIPI commands are then sent to the RF front-end module, which executes them.

[0004] However, in some cases in the prior art, the processing of MIPI instructions may take a long time, which may increase communication delay and reduce communication quality. Summary of the Invention

[0005] The present invention provides an instruction processing method, electronic device, chip system, and computer-readable storage medium for use in the field of communications technology. By adding an execution unit based on custom RISC-V instructions to the existing architecture, and having this execution unit perform the MIPI instruction adjustment process, the time required to adjust MIPI instructions can be effectively shortened, thereby improving communication efficiency and meeting the needs of communication scenarios requiring rapid response.

[0006] In a first aspect, an embodiment of the present application provides an instruction processing method, which is applied to an electronic device, wherein the electronic device includes a first execution unit and a second execution unit;

[0007] Methods include:

[0008] The first execution unit receives a first mobile industry processor interface (MIPI) instruction and obtains at least one first processing instruction from a first instruction set according to the first MIPI instruction, wherein the first processing instruction is used to adjust the first MIPI instruction, and the first instruction set includes a plurality of custom processing instructions;

[0009] The first execution unit sends at least one first processing instruction to the second execution unit, so that the second execution unit executes the at least one first processing instruction to obtain a second MIPI instruction that is adjusted with respect to the first MIPI instruction;

[0010] The first execution unit receives the second MIPI instruction sent by the second execution unit, and sends the second MIPI instruction to the first RF control module.

[0011] In this implementation, the first execution unit includes two execution units, wherein the first execution unit is the main execution unit and the second execution unit is the cooperative execution unit. The first execution unit can send instructions to the second execution unit for execution by the second execution unit. The sending of instructions here can also be understood as the execution of the first execution unit by the second execution unit after the first execution unit generates the corresponding instructions. When the first execution unit receives the first MIPI instruction, it will determine what adjustments should be made based on the content of the first MIPI instruction, that is, which first processing instructions should be used for adjustment. The first instruction set here can be understood as a customized instruction set, which is an instruction set customized for the corresponding communication scenario and / or mode, and can achieve the same function with fewer instructions than the conventional standard instruction set. In addition, the second execution unit can be understood as an execution unit designed based on the first instruction set, which can achieve an acceleration effect at the hardware level. After the second execution unit executes at least one first processing instruction, a second MIPI instruction can be obtained, and the second MIPI instruction can be used to control related radio frequency communication devices. It is understandable that since the customized instruction set is customized for specific communication scenarios and / or modes, it can have higher execution efficiency. Coupled with the acceleration effect at the hardware level, it can effectively improve the adjustment speed of MIPI instructions, thereby shortening communication delays and meeting some communication scenarios that require fast response.

[0012] In one possible implementation, obtaining at least one first processing instruction from a first instruction set according to the first MIPI instruction includes:

[0013] The first execution unit obtains a processing instruction matching the first MIPI instruction from the first instruction set based on a preset matching rule to obtain at least one first processing instruction.

[0014] In one possible implementation, the method further includes:

[0015] The first execution unit obtains working information of the electronic device, where the working information includes at least one of the following: working scene information, working mode information, and device status information.

[0016] In one possible implementation, obtaining at least one first processing instruction from a first instruction set according to the first MIPI instruction includes:

[0017] The first execution unit obtains a processing instruction that matches the first MIPI instruction and the work information from the first instruction set based on a preset matching rule to obtain at least one first processing instruction.

[0018] In this implementation, the process of determining the first processing instruction by the first execution unit is described. In some implementations, at least one first processing instruction can be determined based on the first MIPI instruction. For example, in the preset matching rule, when the address in the first MIPI instruction is specified as a specific address, it is necessary to modify the information of the instruction, or to use a certain algorithm for processing, such as replacing the corresponding address. When the first MIPI instruction meets condition A of the preset matching rule, the corresponding algorithm 1 is used for adjustment; when the first MIPI instruction meets condition B of the preset matching rule, the corresponding algorithm 2 is used for adjustment, and so on.

[0019] In other implementations, the first processing instruction can be determined in conjunction with the electronic device's operating information and the first MIPI instruction. The operating information includes operating scenario information related to the current communication scenario of the electronic device, such as whether the electronic device currently communicates via a cellular network, WiFi, or other wireless communication methods, or whether multiple wireless communication methods are used simultaneously. Operating mode information can indicate the current operating mode of the electronic device, such as an energy-saving mode, a low-power mode, airplane mode, or a do-not-disturb mode. Device status information can refer to information about various attributes or states of the electronic device, such as the power level of the electronic device, the processor load, or the storage capacity. By combining the electronic device's operating information with the first MIPI instruction, the adjustment algorithm for the first MIPI instruction can be further refined. For example, in some cases, the same first MIPI instruction may correspond to different operating scenario information or different operating mode information. Therefore, the first instruction set can be designed for specific operating scenarios or operating modes. By fully customizing the first instruction set and using specific first processing instructions under specific conditions, the efficiency of adjusting the first MIPI instruction can be further improved.

[0020] In one possible implementation, the method further includes:

[0021] A plurality of processing instructions are written into the first instruction set, and the plurality of processing instructions are instructions for executing MIPI instruction adjustment.

[0022] In one possible implementation, the method further includes:

[0023] The first execution unit receives a third instruction, and obtains at least one second processing instruction from the second instruction set according to the third instruction, wherein the second processing instruction is used to adjust the third instruction, the third instruction is a non-MIPI type instruction, and the second instruction set includes multiple processing instructions initially included in the instruction set;

[0024] The first execution unit executes at least one second processing instruction to obtain a fourth instruction obtained by adjusting the third instruction;

[0025] The first execution unit sends a fourth instruction to the first RF control module.

[0026] In this implementation, the second instruction set can be understood as a standard instruction set that can be run on the first execution unit, and the second processing instruction can be correspondingly understood as an instruction existing in the second instruction set. In this method, a judgment mechanism for event processing is added to the first execution unit. If the third instruction received by the first execution unit is a MIPI type instruction, it is processed according to the above method. If the third instruction received by the first execution unit is a non-MIPI type instruction, it is not processed with the help of the second execution unit, but the first execution unit executes the corresponding at least one second processing instruction and obtains the fourth instruction. By adding the judgment step in this implementation, both MIPI type instructions and non-MIPI type instructions can be processed, which can make the entire method more complete and flexible.

[0027] In one possible implementation, the method further includes:

[0028] The first execution unit receives the first MIPI instruction and obtains at least one third processing instruction from a second instruction set according to the first MIPI instruction, wherein the third processing instruction is used to adjust the first MIPI instruction, and the second instruction set includes a plurality of processing instructions initially included in the instruction set; wherein the number of the first processing instructions is less than the number of the third processing instructions;

[0029] The first execution unit executes at least one third processing instruction to obtain a third MIPI instruction obtained by adjusting the first MIPI instruction;

[0030] The first execution unit sends a second instruction to the first radio frequency control module.

[0031] In one possible implementation, the first instruction set is RISC-V and the second instruction set is ARM.

[0032] In this implementation, a method for adjusting the first MIPI instruction by using a third processing instruction based on a second instruction set is described. The second instruction set may be an ARM instruction set, etc. The first instruction set may be RISC-V. Due to the open source nature of RISC-V, it is more conducive to customization according to specific scenarios or modes, thereby obtaining a customized RISC-V instruction set. The customized custom RISC-V instruction set can use fewer instructions to complete tasks in corresponding scenarios or modes, and the corresponding execution time is also less than that of the standard instruction set. In this way, it can be seen that the custom RISC-V instruction set can be more efficient in processing MIPI instructions in the communication field.

[0033] In a possible implementation, the first execution unit and the second execution unit are both included in the first processing unit; or, the first execution unit is the first processing unit, and the second execution unit is the second processing unit.

[0034] The first processing unit is a main processing unit, which can also be understood as a main processor, and the second processing unit is a co-processing unit, which can also be understood as a co-processor.

[0035] In this implementation, one architecture is that both the first execution unit and the second execution unit are included in the first processing unit. This architecture is also called a tightly coupled architecture. Based on this tightly coupled architecture, the second execution unit can share other units or modules in the first processing unit like the first execution unit. For example, the sharable units or modules include an instruction fetch unit, a decoding unit, a load / store unit, etc. In this way, hardware resources can be better utilized and unnecessary redundancy can be reduced. In addition, considering that some mobile devices or terminal devices have restrictions on the size of hardware, this method sets the newly added second execution unit within the first processing unit, which can also minimize the occupation of valuable device space and does not affect the normal operation of other modules in the electronic device.

[0036] In addition, another architecture is also included, in which the first execution unit and the second execution unit are two independent processing units, namely the first processing unit and the second processing unit. This architectural approach is also called a loosely coupled architectural approach. Under this architectural approach, the second processing unit has an independent set of CPU processing hardware and processes when running, and the computing power can be more abundant. And the update and iteration of the instruction processing method and the radio frequency control device will also be more convenient. For example, when new communication scenarios and services are added, the processing algorithm and the custom RISC-V instruction set need to be updated accordingly, and only the second processing unit needs to be replaced. In addition, when the electronic device cannot effectively dissipate heat, the performance of the hardware will sometimes be actively reduced. Because the second processing unit and the first processing unit are separate and independent in this method, the second processing unit can be cooled more easily and maintain better performance.

[0037] In a second aspect, an embodiment of the present application provides a radio frequency control device, comprising: a first processing unit, the first processing unit including a first execution unit and a second execution unit;

[0038] The first execution unit is configured to execute the method described in the first aspect or any possible implementation manner of the first aspect;

[0039] The second execution unit is used to receive at least one first processing instruction sent by the first execution unit, and execute at least one first processing instruction to obtain a second MIPI instruction obtained after adjusting the first MIPI instruction.

[0040] In a third aspect, an embodiment of the present application provides an electronic device, comprising a processor and a memory, wherein the memory is used to store code instructions, and the processor is used to run the code instructions to execute the method described in the first aspect or any possible implementation of the first aspect.

[0041] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which a computer program or instruction is stored. When the computer program or instruction is run on a computer, the computer executes the method described in the first aspect or any possible implementation of the first aspect.

[0042] In a fifth aspect, the present application provides a chip or chip system, comprising at least one processor and a communication interface, wherein the communication interface and the at least one processor are interconnected via a line, and the at least one processor is configured to execute a computer program or instruction to perform the method described in the first aspect or any possible implementation of the first aspect. The communication interface in the chip may be an input / output interface, a pin, or a circuit.

[0043] In one possible implementation, the chip or chip system described above in this application further includes at least one memory, wherein instructions are stored in the at least one memory. The memory may be a storage unit within the chip, such as a register or cache, or a storage unit of the chip (such as a read-only memory or random access memory).

[0044] It should be understood that the second to fifth aspects of the present application correspond to the technical solutions of the first aspect of the present application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation methods are similar and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A schematic diagram illustrating implementation of terminal communication provided in an embodiment of the present application;

[0046] Figure 2 A schematic diagram illustrating implementation of communication at the transmitting end provided in an embodiment of the present application;

[0047] Figure 3 A schematic diagram of an implementation of a radio frequency communication device provided in an embodiment of the present application;

[0048] Figure 4 A schematic diagram of the data structure of the MIPI instruction provided in an embodiment of the present application;

[0049] Figure 5 Schematic diagram of the implementation of the MIPI command communication architecture provided in the embodiment of the present application;

[0050] Figure 6 A schematic diagram of the MIPI instruction adjustment duration provided in an embodiment of the present application;

[0051] Figure 7 A schematic diagram of the functional interface of a terminal provided in an embodiment of the present application;

[0052] Figure 8 A schematic diagram of the antenna layout of a terminal provided in an embodiment of the present application;

[0053] Figure 9 A schematic diagram of the hardware structure of a terminal device provided in an embodiment of the present application;

[0054] Figure 10 A schematic diagram of the software structure of the terminal device provided in the embodiment of the present application;

[0055] Figure 11 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 1 ;

[0056] Figure 12 A schematic diagram of a process flow executed by a processing unit according to an embodiment of the present application;

[0057] Figure 13 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 2 ;

[0058] Figure 14 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 3 ;

[0059] Figure 15 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 4 ;

[0060] Figure 16 Schematic diagram of the instruction processing method provided in this embodiment of the application Figure 1 ;

[0061] Figure 17 Scenario diagram of MIPI instruction processing provided in the embodiment of this application Figure 1 ;

[0062] Figure 18 Scenario diagram of MIPI instruction processing provided in the embodiment of this application Figure 2 ;

[0063] Figure 19 Schematic diagram of data processed by MIPI instructions provided in the embodiment of this application Figure 1 ;

[0064] Figure 20 Schematic diagram of the instruction processing method provided in this embodiment of the application Figure 2 ;

[0065] Figure 21 Schematic diagram of the implementation of the custom RISC-V instructions provided in the embodiment of the present application;

[0066] Figure 22 Schematic diagram of data processed by MIPI instructions provided in the embodiment of this application Figure 2 ;

[0067] Figure 23 Schematic diagram of the comparison of processing instructions provided in the embodiment of this application Figure 1 ;

[0068] Figure 24 Schematic diagram of the comparison of processing instructions provided in the embodiment of this application Figure 2 ;

[0069] Figure 25 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0070] To facilitate a clear description of the technical solutions of the embodiments of the present application, some of the terms and technologies involved in the embodiments of the present application are briefly introduced below:

[0071] 1. Instruction Set

[0072] In the embodiments of the present application, the instruction set, also known as the machine language instruction set or instruction set architecture (ISA), is the interface between software and hardware. It defines all the basic operations that the CPU can recognize and execute. Based on the complexity and design purpose of the instruction set, they are divided into two categories: Complex Instruction Set Computing (CISC) and Reduced Instruction Set Computing (RISC). CISC contains a large number of complex instructions, aiming to complete complex operations with fewer machine language instructions; while RISC simplifies the instruction set and emphasizes the use of simple instructions to build more efficient processing flows.

[0073] For software developers, understanding the target platform's instruction set can help optimize code performance. For hardware designers, the instruction set influences CPU design and implementation. Furthermore, with technological advancements, some modern CPUs now support vector instruction sets, such as Advanced Vector Extensions (AVX), specifically designed to accelerate large-scale data processing tasks in multimedia and scientific computing. This demonstrates that instruction sets are constantly evolving to meet ever-increasing computing demands.

[0074] RISC-V

[0075] RISC-V is an open-source instruction set architecture based on the principles of reduced instruction set computing. Unlike most instruction sets owned by commercial companies, RISC-V's design and use are open and free, making it an ideal choice for academic research, industrial applications, and personal hobby projects. RISC-V aims to implement a modern, stable, and extensible instruction set architecture. Its key feature is its modular design, allowing users to select different instruction subsets to meet specific application requirements. The basic integer instruction set provides essential operations, while other advanced features such as floating-point operations and vector processing are implemented through optional extensions.

[0076] The open nature of RISC-V offers numerous advantages, including reducing chip development costs, fostering innovation and education, and enhancing security. With no licensing fees or restrictions, any organization or individual can freely adopt RISC-V for processor design. Furthermore, a vast RISC-V community has emerged globally, providing extensive resources and support. As technology advances, more and more companies are adopting the RISC-V architecture in their products, covering a wide range of application scenarios from embedded systems to data centers. This trend demonstrates that RISC-V is becoming a significant force in the future of computing.

[0077] 3. Radio Frequency

[0078] Radio frequency (RF) refers to electromagnetic waves in the 30kHz to 300GHz frequency range, widely used in wireless communications. This frequency range allows for information transmission. Wireless connections such as television broadcasting, mobile phone communications, Wi-Fi, and Bluetooth are all based on RF technology.

[0079] The importance of radio frequency technology lies in its ability to transmit information over long distances without the need for physical connections, making mobile communications possible in modern society. Whether making voice calls via radio waves or browsing the internet using Wi-Fi, RF technology is essential. RF technology also plays an indispensable role in fields such as medicine, military, and aerospace.

[0080] 4. MIPI

[0081] The Mobile Industry Processor Interface (MIPI) is a collection of standardized interface specifications designed to provide efficient communication and connectivity between various components within mobile devices. MIPI's advantages lie in its low power consumption, high performance, and adaptability to small form factors, making it a key technical standard in smartphones and other portable electronic devices. By using MIPI standards, manufacturers can ensure interoperability between components.

[0082] The MIPI Radio Frequency Front End (RFFE) is a standard defined by the MIPI Alliance and is specifically used to control and manage RF front-end modules in mobile devices. RF front-end modules typically include components such as power amplifiers (PAs), low-noise amplifiers (LNAs), filters, and switches, which are critical to the quality of wireless communications. In the embodiments of this application, references to MIPI commands are understood to specifically refer to MIPI RFFE commands.

[0083] 5. MDM

[0084] A modem (MDM), short for Modulator-Demodulator, is a device or program that converts digital signals into analog signals and back again. This conversion process enables data to be transmitted over traditional telephone lines, cables, or other communications media.

[0085] Modems play a central role in modern wireless communications, handling the transmission of data from devices to base stations, including but not limited to 4G LTE and 5G network technologies. Modems perform the following functions: modulation, converting binary data generated by computers or other digital devices into a form suitable for transmission over analog communication channels; and demodulation, converting received analog signals back into their original digital form for easy understanding and processing by the receiving device.

[0086] 6. FEM

[0087] In the field of communications technology, the front-end module (FEM) is a key component in wireless communication devices responsible for processing radio frequency (RF) signals. Its primary function is to amplify signals at the transmitting end and filter and amplify received signals at the receiving end. FEMs are widely used in various wireless communication devices, such as smartphones, tablets, Wi-Fi routers, and IoT devices. With technological advancements, the performance requirements for FEMs are increasing. Higher data rates and more complex modulation schemes require more precise and efficient RF front-end processing capabilities.

[0088] The main functions of FEM may include: power amplifier (PA), which amplifies the signal on the transmission path so that it can be effectively transmitted through the antenna; switch, which is used to switch between transmit and receive modes to ensure that only transmission or reception operations can be performed at the same time; filtering, which removes unnecessary frequency components to ensure that only signals in the target frequency band are processed, which helps reduce interference and improve communication quality.

[0089] 7. Other terms

[0090] In the embodiments of this application, terms such as "first" and "second" are used to distinguish between identical or similar items with substantially the same functions and effects. For example, the terms "first chip" and "second chip" are used solely to distinguish between different chips and do not define their order. Those skilled in the art will understand that terms such as "first" and "second" do not define the quantity or execution order, and do not necessarily define differences.

[0091] It should be noted that in the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described in this application as "exemplary" or "for example" should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0092] In the embodiments of the present application, "at least one" refers to one or more, and "more" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: the existence of A alone, the existence of A and B at the same time, and the existence of B alone, where A and B can be singular or plural. The character " / " generally indicates that the previous and next associated objects are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, a--c, bc, or abc, where a, b, c can be single or plural.

[0093] 8. Electronic devices

[0094] The electronic devices of the embodiments of the present application may include handheld devices, vehicle-mounted devices, etc. with communication functions. For example, some electronic devices include: mobile phones, tablet computers, PDAs, laptop computers, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to wireless modems, in-vehicle devices, wearable devices, and terminal devices in 5G networks or future evolved public land mobile communication networks. The embodiments of the present application do not limit this.

[0095] As an example and not a limitation, in the embodiments of the present application, the electronic device may also be a wearable device. Wearable devices may also be referred to as wearable smart devices, which are a general term for wearable devices that are intelligently designed and developed using wearable technology for daily wear, such as glasses, gloves, watches, clothing, and shoes. A wearable device is a portable device that is worn directly on the body or integrated into the user's clothes or accessories. Wearable devices are not only hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include those that are fully functional, large in size, and can achieve complete or partial functions without relying on smartphones, such as smart watches or smart glasses, as well as those that only focus on a certain type of application function and need to be used in conjunction with other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0096] In addition, in the embodiments of the present application, the electronic device can also be a terminal device in the Internet of Things (IoT) system. IoT is an important part of the future development of information technology. Its main technical feature is to connect objects to the network through communication technology, thereby realizing an intelligent network that interconnects people and machines and things.

[0097] The electronic devices in the embodiments of the present application may also be referred to as: terminal equipment, user equipment (UE), mobile station (MS), mobile terminal (MT), access terminal, user unit, user station, mobile station, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent or user device, etc.

[0098] In the embodiments of the present application, electronic devices or network devices include a hardware layer, an operating system layer running on top of the hardware layer, and an application layer running on top of the operating system layer. The hardware layer includes hardware such as a central processing unit (CPU), a memory management unit (MMU), and memory (also known as main memory). The operating system can be any one or more computer operating systems that implement business processing through processes, such as the Linux operating system, Unix operating system, Android operating system, iOS operating system, or Windows operating system. The application layer includes applications such as browsers, address books, word processing software, and instant messaging software.

[0099] Based on the above introduction, the relevant technologies involved in this application are further introduced in detail below.

[0100] Nowadays, people’s normal life and work are inseparable from communication. A common communication method is Figure 1 As shown. Figure 1In communication, there are transmitters and receivers. The transmitter can include information encoding, modulation, and transmission. Information encoding involves encoding the original information, converting it into a digital signal suitable for transmission over a communication channel. For example, ASCII encoding is used to convert letters and symbols into binary numbers, enabling computers to understand and process the information. Once the information is encoded into a digital signal, it needs to be modulated. Modulation is the process of combining a digital signal with a carrier signal to enable efficient transmission over wireless or wired media. Common modulation methods include amplitude modulation (AM), frequency modulation (FM), and phase modulation (PM). The modulation process enhances the signal's resistance to interference and allows multiple signals to share the same communication channel. The modulated signal is then sent to an antenna and transmitted via radio waves or other means. The antenna converts the electrical signal into electromagnetic waves, enabling them to propagate through free space. Factors such as transmission power and antenna design affect the transmission distance and quality of the signal.

[0101] After transmission, electromagnetic waves carry information through the air or other media, traveling from one point to another. When the electromagnetic waves reach the receiving end, they are captured by an antenna and reconverted into electrical signals. The receiving device must accurately identify the target signal while minimizing the effects of other interfering signals. This typically involves applying filters to remove unnecessary frequency components. The received signal is then demodulated, extracting the original digital signal from the carrier signal. This is the inverse of the modulation process, aiming to restore the original representation of the information sent by the sender. Effective demodulation is crucial to ensuring the reliability and accuracy of communication systems. Finally, the demodulated digital signal must be converted back to its original form, such as text, sound, or image. This process, known as message decoding, reconstructs the message content intended by the sender. The success of decoding is directly related to the effectiveness of communication.

[0102] Furthermore, the actual communication process is generally more complicated. Take the sending end as an example. Figure 2 As shown, more steps may be involved. For example, it may include source coding, channel coding, grouping and formatting, modulation mapping, carrier generation, modulation execution, up-conversion, power amplification, filtering, and antenna transmission. Among them, steps such as power amplification and filtering can be performed by the RF front-end module FEM. Power amplification is one of the core functions of FEM. The power amplifier in FEM is used to enhance the strength of the RF signal after modulation and up-conversion, ensuring that the signal has enough energy to be sent out through the antenna and cover the required transmission distance. Some FEMs also contain filters to select signals within a specific frequency range and remove unnecessary frequency components to avoid interference and improve signal quality. This is important in both the transmission path and the reception path. Figure 2 The rest of the steps can be referred to Figure 1 The relevant content or prior art in will not be repeated here.

[0103] In order to understand the relevant structure of FEM, you can refer to Figure 3 The content shown. Figure 3 The baseband module includes baseband components and FEMs. The baseband module includes modulation and demodulation modules, corresponding to the modulation and demodulation functions. The frequency generator module primarily generates the required frequency signals during the baseband processing stage. These frequency signals are typically used in processes such as data encoding and modulation. Specifically, in digital communication systems, a frequency generator can be used to generate a carrier signal, which is modulated with the transmitted data. Furthermore, a frequency generator may also be used to generate a local oscillator signal for subsequent mixing operations. This ensures high accuracy and stability of the generated signal, which is crucial for maintaining the quality of the communication link. The basic function of an RF mixer is to convert signal frequencies. On the transmitter side, a mixer combines a baseband signal or a modulated signal with a high-frequency carrier signal, generating a new higher-frequency signal through frequency multiplication. This process is called upconversion. This new signal is then amplified and transmitted. On the receiver side, the mixer performs the opposite operation, downconversion, converting the received high-frequency signal to a lower intermediate frequency signal or directly to baseband for subsequent demodulation and information extraction.

[0104] After the baseband, there is usually at least one FEM. Figure 3 In the figure, the FEM includes a power amplifier (PA), a filter module, a low-noise amplifier (LNA), and a switch 301. Switch 301 switches between transmit and receive modes, ensuring that only one is in operation at a time. Antenna 302 is connected to switch 301 for both signal transmission and reception. The functions of other modules and components can be found in the previous section or in existing technologies and will not be detailed here.

[0105] It is understandable that for a key communication device such as FEM, the state of the internal device or module needs to be changed according to the needs of communication, and MIPI instructions can be used to control FEM to make changes. Figure 4 As shown in FIG, a standard format of a MIPI instruction may include a start bit, an address bit, a read / write bit, a register address, a data bit, and a stop bit. Figure 5The document describes an architecture for information exchange under MIPI commands. This requires a master control module (also known as a master device, such as a baseband processor or application processor) to control at least one slave control module, such as a FEM. The master and slave control modules can be connected via SCLK (Serial Clock) and SDATA (Serial Data). These two key signal lines form the fundamental communication link of the MIPI RFFE interface. These two lines are used to transmit data and synchronization information between the master and slave devices. SCLK, which stands for serial clock, is a clock signal generated by the master and provided to the slave devices. It provides a timing reference for data transmission, ensuring that data is transmitted in the correct order and at the correct intervals. The SCLK frequency determines the data transmission speed. Different application scenarios may require different clock frequencies to optimize performance and power consumption. SDATA is the serial data signal used to transmit actual data or commands between the master and slave devices. This can be data written to registers, register status information read, or other control commands. Although the master primarily sends data to the slave, the slave also returns data to the master via the SDATA line during a read operation.

[0106] In a typical MIPI RFFE communication cycle, the master device first generates an SCLK signal and, based on this signal, sends commands or data via the SDATA line. The following is a simplified communication process: 1. Using the start bit, the master device pulls the SDATA line low for a period of time to indicate the beginning of a new communication cycle. 2. Subsequently, the master device transmits the target slave device's address, read / write flag, and specific commands or data on the SDATA line in sequence, according to the beat of the SCLK signal. 3. After receiving the command, the slave device may return an acknowledgment signal or, if it is a read operation, the requested data via the SDATA line. 4. Finally, using the stop bit, the master device marks the end of the communication cycle by a specific method, such as pulling the SDATA line high.

[0107] With the development of communication technology and the increasing diversity of wireless communication methods, some electronic devices now make certain adjustments to the MIPI instructions in some cases before transmitting them to the RF front-end device. One processing flow may be that first, when the processing unit in the electronic device receives a specific MIPI instruction, it enters the interrupt service program. The interrupt service program here can be understood as interrupting and caching other non-important programs that may be currently being executed, and giving priority to executing the algorithm processing program for the MIPI instruction. Then, it will be determined what kind of algorithm the MIPI instruction needs to be processed. Next, the corresponding algorithm is used to adjust the MIPI instruction to obtain a new MIPI instruction. And after execution, exit the interrupt service program. Such as Figure 6 As shown, it shows the approximate time spent in each stage of the above process. Among them, the start of processing corresponds to the processing unit entering the interrupt service routine after reading the MIPI instruction, and the judgment scenario corresponds to determining what algorithm to use to adjust the MIPI instruction. For the two stages from the start of processing to the execution of the algorithm, the total time taken in the entire process is relatively small, while the time from the execution of the algorithm to the completion of the processing generally takes up most of the time. For example, in some cases, assuming the total time is about 50 microseconds, the time required to execute the algorithm to process the MIPI instruction may take 30-40 microseconds.

[0108] The above discussion introduces some current wireless communication technologies and the process of communication control based on MIPI commands. However, the aforementioned implementation methods for adjusting or processing MIPI commands have some shortcomings. To better illustrate this issue, the following first uses some practical scenarios to illustrate.

[0109] Scenario 1: Management of multiple wireless communication modes.

[0110] like Figure 7 As shown, a mobile phone's quick function interface is displayed. For example, in some mobile phones, users can see a similar interface by pulling down or pulling up. This interface generally includes some commonly used functions, such as whether to enable the WLAN function, which corresponds to the WiFi communication method. It may also include flight mode, Bluetooth, personal hotspot, mobile data, screen rotation, screen recording, flashlight and other functions. Users can turn the function on or off by clicking the corresponding function control. For example, in Figure 7 In the , the user clicks to open the WLAN, Bluetooth and mobile data functions. Figure 7The functional interface displayed already includes a variety of commonly used wireless communication modes, including WiFi, flight mode, Bluetooth, personal hotspot, and mobile data. Among them, Internet data can be accessed through WiFi and mobile data. WiFi uses radio waves to transmit data and is usually provided by a wireless router that converts wired network connections into wireless signals. Mobile data refers to the Internet connection provided by the cellular network, which means that users can use the network service provided by the operator to access the Internet anywhere there is signal coverage. Mobile data consumes the traffic in the user's package and may incur additional charges. Bluetooth is a short-range wireless communication technology that allows data to be exchanged between two compatible devices. Common uses include connecting peripherals such as headphones, speakers, keyboards, mice, and enabling file sharing and communication between close-range devices. Personal hotspot refers to connecting a device with a mobile data connection, such as Figure 7 The mobile phone shown here functions as a WiFi router. Other devices can access the Internet through this temporarily created WiFi network, which is very useful when no WiFi is available. Airplane mode is a mobile phone setting or mode that turns off all wireless communication functions, including mobile data, WiFi, Bluetooth, and GPS, when turned on. This is designed to prevent mobile phone signals from interfering with aircraft navigation systems, but it can also be used to save power or avoid being disturbed in a quiet environment. In addition, some mobile phones may also include a Near Field Communication (NFC) module, which can also be considered a wireless communication method. NFC is a short-range, high-frequency wireless communication technology that allows electronic devices to exchange data when they are close to each other. Its effective working distance is usually within 4 cm.

[0111] At the same time, different wireless communication methods in mobile phones, as well as network technologies such as 4G / 5G, require operation within specific frequency bands. Frequency bands refer to the range of radio frequencies, and different wireless communication technologies and applications utilize different frequency bands to avoid interference and ensure efficient data transmission. For example, Wi-Fi typically operates in the 2.4 GHz and 5 GHz bands, each with its own advantages and disadvantages. The 2.4 GHz band offers strong penetration but is susceptible to interference, while the 5 GHz band offers high speeds but a limited coverage area. Bluetooth typically operates primarily in the 2.4 GHz ISM band, sharing this frequency band with Wi-Fi, which can potentially cause interference in some situations. NFC typically operates in the 13.56 MHz band and is primarily used for short-range data exchange and payment functions. The Global Positioning System (GPS) utilizes the L1 (1575.42 MHz), L2 (1227.60 MHz), and L5 (1176.45 MHz) bands, each offering varying degrees of accuracy and service. For mobile communications on cellular networks, 4G LTE supports multiple frequency bands, ranging from a few hundred MHz to a few thousand MHz. For example, Band 7 (2600 MHz) is suitable for high-speed data services in densely populated urban areas, while Bands 12 / 17 (700 MHz) are ideal for wide coverage in rural or remote areas. 5G NR (New Radio) is divided into low-band (Sub-1 GHz), mid-band (1 GHz to 6 GHz), and high-band (millimeter wave, above 24 GHz). Each frequency band has its own specific application scenarios. Low-band, such as 600 MHz, is suitable for large-area coverage and indoor penetration. Mid-band, such as 3.5 GHz, balances speed and coverage and is the preferred band for most 5G deployments. High-band, such as 28 GHz, offers extremely high data rates but limited coverage and is primarily used in hotspots.

[0112] In short, lower-frequency signals travel farther and better penetrate buildings and other obstacles. Higher frequencies, on the other hand, can carry more data, resulting in faster download and upload speeds. Different frequency bands also have varying interference resistance. Choosing the right one can reduce signal interference and improve service quality. By properly selecting and allocating frequency bands, operators and technology developers can maximize the use of limited radio resources while meeting user needs. Therefore, modern smartphones must support multiple frequency bands and seamlessly switch and connect across a variety of wireless communication modes, providing users with a better wireless network experience. This requires the relevant wireless communication components, or RF components, within the phone to adapt to changing wireless communication modes. Furthermore, in some cases, multiple wireless communication modes may coexist. To address these complex and potentially even more complex situations, it is necessary to adapt MIPI commands within the processing unit to control the wireless communication components within the phone.

[0113] Scenario 2: Control of multiple RF front-end modules and antennas.

[0114] Current mobile phones generally have multiple RF front-end modules and corresponding antennas. Figure 8 The figure shows multiple antennas and their corresponding layout in a mobile phone, using the back view as an example. The mobile phone includes six antennas, of which the first antenna 801, the second antenna 802, the third antenna 803, the fourth antenna 804, and the fifth antenna 805 are cellular antennas, and the sixth antenna 806 is a wireless communication antenna. The first antenna 801 and the second antenna 802 are located on the left side of the mobile phone, the third antenna 803 and the fourth antenna 804 are located on the right side of the mobile phone, the fifth antenna 805 is located at the bottom of the mobile phone, and the sixth antenna 806 is located at the top of the mobile phone.

[0115] In some cases, it is necessary to monitor the signal strength of each antenna. For example, when a user holds the phone in portrait mode, the signal of the fifth antenna 805 may be blocked, thereby reducing the communication quality. In this case, it is necessary to analyze the signal strength of each other antenna and promptly distribute the work of the fifth antenna 805 to other unblocked antennas. Similarly, when a user holds the phone in both hands in landscape mode, the signal strength of the first antenna 801 and the second antenna 802 may be reduced due to being blocked. At this time, the remaining third antenna 803, fourth antenna 804 and fifth antenna 805 need to take over the work of the first antenna 801 and the second antenna 802.

[0116] In other cases, it's necessary to balance and adjust the loads on each antenna. For example, if the load on antenna 801 is consistently high for a period of time, the system can then determine whether any antennas from antenna 802 to antenna 805 currently have lower loads. If a less complex antenna exists, some of the communication tasks originally assigned to antenna 801 can be transferred to the corresponding idle antenna.

[0117] As you can understand, the coordinated use of multiple antennas is generally performed by multiple corresponding RF front-end modules, which in turn need to be controlled and managed by MIPI instructions. This involves the processing unit using various algorithms to adjust the MIPI instructions.

[0118] In addition, there are other scenarios related to wireless communication that may involve the need for rapid response. Please refer to relevant materials and will not be described in detail here.

[0119] All of the above scenarios involve the need for electronic devices to quickly respond to the management and switching of various communication modes in wireless communication scenarios. At the same time, corresponding control is also required for the multiple wireless communication hardware inside the electronic device. From the methods and technologies introduced above, it can be seen that when the processing unit of the electronic device enters the interrupt service routine and uses various algorithms to adjust the MIPI instructions, the execution of the algorithm processing part accounts for the majority of the time. When the amount of communication data of the electronic device is small and the wireless communication mode is single, the communication delay caused by the execution of the algorithm processing process may not cause a significant impact. However, when the amount of communication data of the electronic device is large, or multiple wireless communication modes coexist, and switching between different wireless communication modes is required, it may cause significant communication delays and reduce the communication quality, thereby affecting the user experience.

[0120] Based on this, the embodiment of the present application proposes the following technical concept: for various wireless communication scenarios under specific working modes, a customized RISC-V instruction set is designed, and a corresponding execution unit is developed based on the customized RISC-V, which can be referred to as the second execution unit here. The execution unit that originally used the algorithm to adjust the MIPI instruction is referred to as the first execution unit here. After reading the MIPI instruction, the first execution unit will first determine what algorithm needs to be used to adjust the MIPI instruction, and thus determine which customized RISC-V instructions are needed. Among them, it can be understood that the customized RISC-V instruction can implement various algorithms for processing MIPI instructions. Then, the second execution unit can execute the above-mentioned customized RISC-V instruction to adjust the MIPI instruction. After the execution is completed, a new MIPI instruction is obtained, and the first execution unit then sends the new MIPI instruction to the subsequent wireless communication device to control the corresponding device to perform operations according to the new MIPI instruction.

[0121] In this way, by using a customized RISC-V instruction set to adjust MIPI instructions, the number of instructions can be reduced and execution speed can be increased compared to using a first execution unit based on a standard instruction set. The standard instruction set can be the Advanced RISC Machine (ARM) instruction set. Furthermore, the customized second execution unit can also achieve a hardware-level acceleration effect.

[0122] The technical solution provided in this application can be applied to terminal devices. The following first briefly introduces the terminal devices.

[0123] For example, Figure 9 A schematic diagram of the hardware structure of a terminal device provided in an embodiment of the present application is shown.

[0124] Figure 9 Schematic diagram of the structure of a terminal device provided in an embodiment of the present application. The terminal device may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a speaker 170A, a receiver 170B, a microphone 170C, an earphone interface 170D, a sensor module 180, a button 190, a motor 191, a radio frequency control device 196, an indicator 192, a camera 193, a display 194, and a subscriber identification module (SIM) card interface 195, etc.

[0125] It is understood that the structures illustrated in the embodiments of the present application do not constitute specific limitations on the terminal device. In other embodiments of the present application, the terminal device may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0126] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors.

[0127] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0128] Processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 110 is a cache memory. This memory can store instructions or data that have just been used or are being recycled by processor 110. If processor 110 needs to use the instruction or data again, it can retrieve it from the memory. This avoids duplicate accesses, reduces processor 110 latency, and thus improves system efficiency.

[0129] In some embodiments, the processor 110 may include one or more interfaces. The interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuits sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface.

[0130] The MIPI interface can be used to connect the processor 110 to peripheral devices such as the display 194 and the camera 193. MIPI interfaces include the camera serial interface (CSI) and the display serial interface (DSI). In some embodiments, the processor 110 and the camera 193 communicate via the CSI interface to implement the terminal device's camera function. The processor 110 and the display 194 communicate via the DSI interface to implement the terminal device's display function.

[0131] It is understood that the interface connection relationship between the modules illustrated in the embodiments of the present application is for illustrative purposes only and does not constitute a structural limitation on the terminal device. In other embodiments of the present application, the terminal device may also adopt a different interface connection method from the above embodiments, or a combination of multiple interface connection methods.

[0132] The wireless communication function of the terminal device can be implemented through antenna 1, antenna 2, mobile communication module 150, wireless communication module 160, modem processor and baseband processor.

[0133] Antenna 1 and Antenna 2 are used to transmit and receive electromagnetic wave signals. The antennas in a terminal device can be used to cover a single or multiple communication frequency bands. Different antennas can also be reused to improve antenna utilization. For example, antenna 1 can be reused as a diversity antenna for a wireless local area network. In other embodiments, the antennas can be used in conjunction with a tuning switch.

[0134] It will be understood that the example description of antenna 1 and antenna 2 does not mean that the terminal device can only include two antennas. In some embodiments, more antennas may be included.

[0135] The mobile communication module 150 can provide wireless communication solutions, including 2G / 3G / 4G / 5G, for use in terminal devices. The mobile communication module 150 can include at least one filter, a switch, a power amplifier, a low-noise amplifier (LNA), and the like. The mobile communication module 150 can receive electromagnetic waves from antenna 1, filter and amplify the received electromagnetic waves, and transmit them to the modem processor for demodulation. The mobile communication module 150 can also amplify the signals modulated by the modem processor and convert them into electromagnetic waves for radiation via antenna 1. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be located in the processor 110. In some embodiments, at least some of the functional modules of the mobile communication module 150 can be located in the same device as at least some of the modules of the processor 110.

[0136] The modem processor may include a modulator and a demodulator. The modulator is used to modulate the low-frequency baseband signal to be transmitted into a medium- or high-frequency signal. The demodulator is used to demodulate the received electromagnetic wave signal into a low-frequency baseband signal. The demodulator then transmits the demodulated low-frequency baseband signal to the baseband processor for processing. After processing by the baseband processor, the low-frequency baseband signal is passed to the application processor. The application processor outputs audio signals through an audio device (including but not limited to the speaker 170A, the receiver 170B, etc.) or displays images or videos on the display 194. In some embodiments, the modem processor may be a standalone device. In other embodiments, the modem processor may be independent of the processor 110 and may be located in the same device as the mobile communication module 150 or other functional modules.

[0137] The wireless communication module 160 can provide wireless communication solutions for terminal devices, including wireless local area networks (WLAN) (such as wireless fidelity (Wi-Fi) networks), Bluetooth (BT), global navigation satellite system (GNSS), frequency modulation (FM), near field communication (NFC), infrared (IR), etc. The wireless communication module 160 can be one or more devices that integrate at least one communication processing module. The wireless communication module 160 receives electromagnetic waves via the antenna 2, frequency modulates and filters the electromagnetic wave signals, and sends the processed signals to the processor 110. The wireless communication module 160 can also receive signals to be transmitted from the processor 110, frequency modulate them, amplify them, and convert them into electromagnetic waves for radiation through the antenna 2.

[0138] In some embodiments, antenna 1 of the terminal device is coupled to mobile communication module 150, and antenna 2 is coupled to wireless communication module 160, so that the terminal device can communicate with a network and other devices via wireless communication technologies. The wireless communication technologies may include Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Time-Division Code Division Multiple Access (TD-SCDMA), Long Term Evolution (LTE), Bluetooth, GNSS, WLAN, NFC, FM, and / or IR technologies. GNSS may include Global Positioning System (GPS), Global Navigation Satellite System (GLONASS), Beidou Navigation Satellite System (BDS), Quasi-Zenith Satellite System (QZSS), and / or Satellite-Based Augmentation System (SBAS).

[0139] The RF control device 196 can be understood as being used to read MIPI instructions sent by the modem and adjust or process the MIPI instructions based on specific scenario or mode information to obtain new MIPI instructions. The RF control device 196 can obtain global information about the terminal device from the processor 110. The RF control device 196 may include a processing unit, which, in addition to a standard execution unit, may also include a customized execution unit for executing a custom RISC-V instruction set.

[0140] The software system of the terminal device can adopt a layered architecture, an event-driven architecture, a micro-kernel architecture, a microservice architecture, or a cloud architecture, etc. The embodiment of the present application takes the Android system of the layered architecture as an example to exemplify the software structure of the terminal device.

[0141] For example, Figure 10A software structure diagram of a terminal device provided in an embodiment of the present application. Figure 10 As shown, the layered architecture divides the software into several layers, each with a clear role and division of labor. The layers communicate with each other through interfaces. In some embodiments, the system may include an application layer, an application framework layer, an Android runtime (Android runtime) and system libraries, a hardware abstraction layer (HAL), and a kernel layer. It should be noted that the embodiments of the present application are illustrated using the Android system as an example. In other operating systems (such as Hongmeng system, IOS system, etc.), as long as the functions implemented by each functional module are similar to those of the embodiments of the present application, the solutions of the present application can also be implemented.

[0142] Among them, the application layer can include a series of application packages.

[0143] like Figure 10 As shown, the application layer may include applications such as camera, gallery, calendar, call, map, navigation, wireless local area network (WLAN), Bluetooth, music, video, short message, lock screen application, setting application, etc. Of course, the application layer may also include other application packages, such as payment applications, shopping applications, banking applications, social applications, and other third-party applications, which are not limited in this application.

[0144] Among them, third-party applications can have functions such as face recognition, video calls, scanning, photo taking and video recording.

[0145] The application framework layer provides an application programming interface (API) and programming framework for applications in the application layer. The application framework layer includes some predefined functions. For example, it may include an activity manager, a window manager, a content provider, a view system, a resource manager, a notification manager, etc., but this embodiment of the application does not impose any restrictions on this.

[0146] System libraries can include multiple functional modules, such as surface managers, media libraries, 3D graphics processing libraries (such as OpenGL ES), and 2D graphics engines (such as SGL).

[0147] The Android runtime consists of core libraries and a virtual machine (VM). The Android runtime is responsible for scheduling and management of the Android system. The core library consists of two parts: one for Java-based functions and the other for the Android core library. The application layer and application framework layer run in the VM. The VM executes Java files from the application and application framework layers as binary files. The VM is responsible for managing object lifecycles, stack management, thread management, security and exception management, and garbage collection.

[0148] The HAL layer is an encapsulation of the Linux kernel driver, providing an interface to the upper layer and shielding the implementation details of the low-level hardware.

[0149] The HAL layer may include Wi-Fi HAL, audio HAL, HAL layer camera service (Camera HALServer) unit and software code library, etc.

[0150] The HAL layer may also include a radio frequency device control function, which is used to control radio frequency devices related to wireless communication in the terminal device. For example, it may include generating MIPI instructions, transmitting MIPI instructions, and transmitting MIPI instructions.

[0151] It is understandable that, in some implementations, the RF device control function may also be set in the system library or framework layer, and the embodiments of the present application do not impose specific limitations thereto.

[0152] The kernel layer is the layer between hardware and software. The kernel layer includes at least display driver, camera driver, audio driver, sensor driver, charging driver, etc.

[0153] The following, in conjunction with the accompanying drawings, describes in detail the technical solutions of the embodiments of the present application and how the technical solutions of the embodiments of the present application solve the above-mentioned technical problems. The following specific embodiments can be implemented independently or in combination with each other, and the same or similar concepts or processes may not be repeated in some embodiments.

[0154] First combine Figures 11 to 13 A radio frequency control device provided in an embodiment of the present application is described. Figure 11 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 1 , Figure 12 A schematic diagram of a process flow executed by a processing unit according to an embodiment of the present application is provided. Figure 13 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 2 .

[0155] refer to Figure 11In the device, the first processing unit includes two execution units, namely the first execution unit and the second execution unit. The first processing unit also includes the CPU mainstream pipeline, IFU, IDU, LSU, ITCM and DTCM, etc. Among them, the first execution unit can be understood as a standard execution unit that can run instructions in the corresponding standard instruction set, such as ARM instructions. The second execution unit can be understood as a customized execution unit used to run customized instructions, such as customized RISC-V instructions. It should be noted that the customized RISC-V instructions in the embodiment of the present application are used to implement multiple algorithms to process MIPI instructions in specific working scenarios or modes to play a role in accelerating processing. In addition, IFU refers to the Instruction Fetch Unit (IFU), ID refers to the Instruction Decode Unit (IDU), and LSU refers to the Load / Store Unit (LSU). And ITCM refers to the Instruction Tightly Coupled Memory, and DTCM refers to the Data Tightly Coupled Memory. The above units or modules can interact with the CPU mainstream pipeline to control the order of program execution and data transmission. In addition to the above Figure 11 In addition to the units or modules appearing in the figure, there are some other related units or modules, which have little to do with the radio frequency control device proposed in the embodiment of the present application, so they will not be described here.

[0156] for Figure 11 The RF control device shown in the figure can refer to the process followed when running the program. Figure 12 Steps in:

[0157] S1201, fetch instruction.

[0158] In each clock cycle, when the previous instruction is executed, the IFU calculates the address of the next instruction and fetches the instruction from the memory into the instruction register inside the CPU.

[0159] S1202: Decode. Determine the instruction type. If it is a first processing instruction, execute S1203; otherwise, execute S1204.

[0160] Parse the instruction code obtained in the instruction fetch stage to determine the instruction type, operand location, and resources to be used. This step prepares the necessary control signals for subsequent execution. In an embodiment of the present application, the IDU can determine whether the instruction belongs to a first processing instruction or a non-first processing instruction. Among them, the first processing instruction can be understood as a custom instruction for adjusting the MIPI instruction, as distinguished from the standard instruction that can be executed on the first execution unit. When the IDU determines that the instruction is a first processing instruction, S1203 is executed, that is, the second execution unit executes the instruction. Conversely, when the IDU determines that the instruction is a non-first processing instruction, S1204 is executed, that is, the first execution unit executes the instruction.

[0161] S1203: The second execution unit executes the instruction.

[0162] After the IDU determines that the instruction to be executed belongs to the first processing instruction, the second execution unit will complete the corresponding calculation or processing according to the operation code and operand of the instruction.

[0163] S1204: The first execution unit executes the instruction.

[0164] After the IDU determines that the instruction to be executed is not a first processing instruction, that is, the instruction is a regular standard instruction, the first execution unit will perform the actual operation according to the information provided in the decoding stage, such as addition, subtraction, logical operation, etc.

[0165] S1205: Memory access.

[0166] This step involves both the LSU and the MMU. In some cases, for instructions that require data exchange with memory, the LSU is responsible for loading data from memory into registers or storing data in registers back into memory. The MMU handles the translation of virtual addresses to physical addresses during this process.

[0167] S1206, write back.

[0168] If the instruction requires it, the register file unit writes the execution results or data read from the memory back to the register file or other storage location for use by subsequent instructions.

[0169] Further, more complete radio frequency control devices such as Figure 13 As shown. Figure 13 In the embodiment, the first processing unit includes a first execution unit and a second execution unit, and Figure 11It is consistent with the first processing unit in, and will not be repeated here. It also includes a modem MDM, a second RF control module, a first RF control module, a FEM and an antenna. Among them, the MDM is connected to the second RF control module, the second RF control module is connected to the first processing unit, the first processing unit is connected to the first RF control module, the first RF control module is connected to the FEM, and the FEM antenna is connected. In one implementation method, the MIPI instruction can be transmitted to the second RF control module through the MDM, and received by the first execution unit of the first processing unit, and adjusted by the second execution unit, and then the new MIPI instruction is sent to the first RF control module by the first execution unit. Then, the above-mentioned new MIPI instruction is further sent to the FEM, and the MIPI instruction is executed by the FEN. Next, for Figure 13 The various modules in the radio frequency control device shown are described as follows:

[0170] 1. MDM

[0171] In the embodiment of the present application, the MDM acts as a modem. The relevant functions can be referred to in the previous content and will not be repeated here. In addition, in addition to processing communication data messages, the MDM can also send corresponding MIPI instructions according to the relevant communication configuration to control the subsequent FEM to make corresponding changes.

[0172] In some implementations, the MDM can also be replaced by a radio frequency integrated circuit (RFIC), which is an integrated circuit specifically designed to process radio frequency signals. RFIC can convert received high-frequency signals into lower-frequency signals for further processing, or convert low-frequency signals into high-frequency signals for transmission. RFIC can also perform modulation and demodulation functions. Compared with discrete components, RFIC integrates multiple radio frequency functions on a single chip, thereby reducing size, cost, and power consumption. In some scenarios, such as wireless communication modules in smartphones and tablets, RFICs are used extensively to support multiple wireless standards, such as 4G LTE, 5G, Wi-Fi, and Bluetooth.

[0173] 2. Second RF control module

[0174] In the embodiment of the present application, the second RF control module can be understood as a module that controls the transmission and forwarding of MIPI instructions. The second RF control module is connected to the above-mentioned MDM, and the connection method can adopt the SCLK and SDATA described above, that is, the second RF control module can receive MIPI instructions transmitted from the MDM.

[0175] At the same time, the second RF control module is also connected to the first processing unit and can forward MIPI instructions to the first processing unit. In some cases, the second RF control module can first store multiple MIPI instructions received from the MDM in sequence, for example, in a queue, and wait for the first processing unit to read them. The first processing unit can read one MIPI instruction from the second RF control module at a time. When reading, the second RF control module can also encapsulate the pure MIPI instruction to meet the requirements of the program run by the first processing unit. The existence of the second RF control module can connect different devices in the RF control device, and can also optimize the transmission of MIPI instructions. In the embodiment of the present application, the second RF control module can also be referred to as a MIPI slave control module or a control receive (C-RX) module.

[0176] 3. First execution unit

[0177] As previously mentioned, the first execution unit manages the execution logic and process within the entire RF control device. The first execution unit reads MIPI instructions from the second RF control module connected to it through the first processing unit, and then, based on the MIPI instruction information or other information, determines which algorithm should be used to adjust the MIPI instruction. After determining which algorithm to use, the corresponding instruction is transmitted to the second execution unit, which then actually executes it. The instructions corresponding to the aforementioned algorithm are custom RISC-V instructions, specifically designed to handle tasks in specific operating scenarios and modes. The aforementioned transmission of instructions to the second execution unit can be understood as the first execution unit adding the instruction corresponding to the algorithm for processing the MIPI instruction to the instruction register, which is then executed by the second execution unit after instruction fetching and decoding.

[0178] After the second execution unit completes execution, a new MIPI instruction is obtained, and the first execution unit sends the new MIPI instruction to the first RF control module.

[0179] 4. Second execution unit

[0180] In embodiments of the present application, the second execution unit can be a customized execution unit. Unlike the standard first execution unit, the second execution unit can execute customized RISC-V instructions. The second execution unit is used to adapt MIPI instructions using corresponding algorithms in specific operating scenarios or modes. Compared to the first execution unit that does not use customized RISC-V instructions but instead uses a standard instruction set, such as the ARM instruction set, the second execution unit can complete the algorithm processing flow for MIPI instructions more quickly. This is because customized RISC-V instructions generally require fewer instructions to achieve the same results than instructions from the standard instruction set, i.e., new MIPI instructions. It is understandable that the execution time of an execution unit is generally proportional to the number of instructions. When the number of instructions is smaller, the total execution time is shorter, and the execution efficiency is higher. On the other hand, from a hardware perspective, a second execution unit developed based on a customized RISC-V instruction set can accelerate the execution of instructions. For example, in some implementations, instructions that are partially executed in a loop can be customized to execute in parallel. In this way, the second execution unit completes the actual algorithm processing of the MIPI instruction, which can significantly improve efficiency compared to still being completed by the first execution unit.

[0181] 5. First RF control module

[0182] In the embodiment of the present application, the first RF control module can be similar to the second RF control module and also plays a role in transmitting and forwarding MIPI instructions. The first RF control module can be connected to the FEM via SCLK and SDATA to transmit MIPI instructions to the FEM. The first RF control module is also connected to the first processing unit to receive MIPI instructions from the first processing unit after algorithm adjustment.

[0183] In some implementations, the first RF control module can receive multiple MIPI instructions from the first processing unit at one time. These multiple MIPI instructions may not be simple MIPI instructions, but rather encapsulated by an application program. After receiving the multiple MIPI instructions from the first processing unit, the first RF control module converts the encapsulated MIPI instructions to obtain corresponding multiple simple MIPI instructions. The MIPI instructions are then sent to the FEM one by one. In this embodiment of the present application, the second RF control module may also be referred to as a MIPI master control module or a control transmit (C-TX) module.

[0184] 6. FEM

[0185] exist Figure 13In the figure, only one FEM is shown as an example. It is understood that in an actual RF device control device, more FEMs may be included, and different FEMs may focus on different wireless communication modes. In the embodiments of this application, one FEM is used as an example for illustration, but the specific number is not limited. For more information about FEMs, please refer to the previous content and will not be repeated here.

[0186] 7. Antenna

[0187] Here, the antenna is located after the FEM and is used to receive and transmit RF signals. For more information, please refer to the previous article and will not be repeated here.

[0188] The following is a summary based on the above description: A radio frequency control device is proposed in the embodiment of the present application, the focus of which is to add a second execution unit in addition to the original first execution unit of the first processing unit. In addition, unlike the first execution unit, the second execution unit is developed based on a customized RISC-V instruction set. The second execution unit optimizes the algorithm processing flow of MIPI instructions in various working scenarios and modes, so that the processing speed can be significantly improved. In this way, the time taken for the overall process can be shortened, thereby reducing communication delays and improving user experience.

[0189] Furthermore, by adding a second execution unit to the original first execution unit of the first processing unit, such a device can be called a tightly coupled device. Because the second execution unit and the first execution unit are co-located within the first processing unit, they can also share other units or modules in the first processing unit. For example, shareable units or modules include an instruction fetch unit, a decoding unit, a load / store unit, etc. Thus, when the first processing unit is running, except for distinguishing between the first and second execution units based on the type of instruction, the remaining units or modules can continue to operate in the same manner, making better use of hardware resources. Furthermore, since some mobile devices or terminal devices have restrictions on the size of hardware, it is desirable to reduce the size of the hardware as much as possible. However, since this method places the newly added second execution unit within the first processing unit, it can also minimize the use of valuable device space and does not affect the normal operation of other units or modules in the electronic device other than the first processing unit.

[0190] In addition to the contents of the above embodiments, Figure 14 and Figure 15 Another radio frequency control device provided in an embodiment of the present application is described. Figure 14 Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 3 , Figure 15Schematic diagram of the structure of the radio frequency control device provided in the embodiment of the present application Figure 4 .

[0191] refer to Figure 14 The device includes two processing units, namely a first processing unit and a second processing unit. The first execution unit described above can be understood as the first processing unit here, and the second execution unit described above can be understood as the second processing unit here.

[0192] The following is an introduction based on the first processing unit and the second processing unit. For example, the first data unit and the second processing unit can be connected through a data path, and instructions can be transmitted in the data path. Among them, the first processing unit can be understood as a standard processing unit that can run instructions in the corresponding standard instruction set, such as ARM instructions. The second processing unit can be understood as a customized processing unit for running customized instructions, such as customized RISC-V instructions. It should be noted that the customized RISC-V instructions in the embodiment of the present application are used to implement a variety of algorithms to process MIPI instructions in specific working scenarios or modes to accelerate processing.

[0193] Further, more complete radio frequency control devices such as Figure 15 As shown. Figure 15 In the embodiment, a first processing unit and a second processing unit are included, both of which are Figure 14 The processing units in are consistent and will not be described here. It also includes a modem MDM, a second RF control module, a first RF control module, a FEM and an antenna. Among them, the MDM is connected to the second RF control module, the second RF control module is connected to the first processing unit, the first processing unit is connected to the first RF control module, the first RF control module is connected to the FEM, and the FEM antenna is connected. In one implementation method, the MIPI instruction can be transmitted to the second RF control module through the MDM, and received by the first processing unit, and adjusted by the second processing unit, and then the first processing unit sends the new MIPI instruction to the first RF control module. Then, the above-mentioned new MIPI instruction is further sent to the FEM, and the FEN executes the MIPI instruction. Next, for Figure 15 The various modules in the radio frequency control device shown are described as follows:

[0194] 1. MDM

[0195] Please refer to the relevant content of the previous embodiment, which will not be repeated here.

[0196] 2. Second RF control module

[0197] Please refer to the relevant content of the previous embodiment, which will not be repeated here.

[0198] 3. First processing unit

[0199] As mentioned above, the first processing unit plays a role in managing the execution logic and process of the entire RF control device. The first processing unit reads the MIPI instructions from the second RF control module connected to it, and then combines the information of the MIPI instructions or more other information to determine which algorithm should be used to adjust the MIPI instructions. After determining which algorithm to use, the corresponding instructions are transmitted to the second processing unit, which actually executes them. The instructions corresponding to the above algorithms are custom RISC-V instructions, which are specifically used to handle tasks in specific working scenarios and modes.

[0200] After the second processing unit completes the execution, a new MIPI instruction is obtained, and the first processing unit sends the new MIPI instruction to the first RF control module.

[0201] 4. Second processing unit

[0202] In embodiments of the present application, the second processing unit may be a customized processing unit. Unlike the standard first processing unit, the second processing unit can execute customized RISC-V instructions. The second processing unit is configured to adapt MIPI instructions using corresponding algorithms in specific operating scenarios or modes. Compared to a first processing unit that does not use customized RISC-V instructions but instead uses a standard instruction set, such as the ARM instruction set, the second processing unit can complete the algorithmic processing flow for MIPI instructions more quickly. This is because customized RISC-V instructions generally require fewer instructions to achieve the same results than instructions from a standard instruction set, i.e., new MIPI instructions. It is understood that the execution time of a processing unit is generally proportional to the number of instructions. When the number of instructions is smaller, the total execution time is shorter, and the execution efficiency is higher. Furthermore, from a hardware perspective, a second processing unit developed based on a customized RISC-V instruction set can accelerate the execution of instructions. For example, in some implementations, instructions that are partially executed in a loop can be customized to execute in parallel. In this way, the second processing unit completes the actual algorithm processing of the MIPI instruction, which can significantly improve efficiency compared to still being completed by the first processing unit.

[0203] 5. First RF control module

[0204] Please refer to the relevant content of the previous embodiment, which will not be repeated here.

[0205] 6. FEM

[0206] Please refer to the relevant content of the previous embodiment, which will not be repeated here.

[0207] 7. Antenna

[0208] Here, the antenna is located after the FEM and is used to receive and transmit RF signals. For more information, please refer to the previous article and will not be repeated here.

[0209] Based on the above description, we will summarize here: another radio frequency control device is proposed in the embodiment of this application. The key point is that in addition to the original first processing unit, a second processing unit is added. Moreover, unlike the first processing unit, the second processing unit is developed based on a customized RISC-V instruction set. The second processing unit optimizes the algorithm processing flow of MIPI instructions for various working scenarios and modes, which can significantly improve the processing speed.

[0210] Furthermore, connecting a relatively independent second processing unit to the first processing unit can be considered a loosely coupled architecture. Under this architecture, the second processing unit can reduce its impact on the first processing unit during operation, providing more computing power. Furthermore, a loosely coupled architecture facilitates updates and iterations of the RF control device. For example, the addition of more communication scenarios or services requires corresponding updates to the custom RISC-V instruction set of the second processing unit. In such cases, only the second processing unit needs to be replaced, without replacing other modules in the RF control device. Furthermore, it is understandable that heat dissipation is often a key factor limiting hardware performance in electronic devices. When modules in electronic devices cannot effectively dissipate heat, performance may be proactively reduced in some cases to protect the hardware. In the loosely coupled RF control device proposed in the embodiments of the present application, because the second processing unit is separate from the first processing unit, in principle, the second processing unit can be located in an area of the electronic device that is easily dissipated. This allows the second processing unit to effectively cool down, thereby maintaining optimal performance.

[0211] Based on the above embodiments, Figures 16 to 19 A method for processing instructions provided in an embodiment of the present application is described in detail. Figure 16 Schematic diagram of the instruction processing method provided in this embodiment of the application Figure 1 , Figure 17 Scenario diagram of MIPI instruction processing provided in the embodiment of this application Figure 1 , Figure 18 Scenario diagram of MIPI instruction processing provided in the embodiment of this application Figure 2 , Figure 19Schematic diagram of data processed by MIPI instructions provided in the embodiment of this application Figure 1 .

[0212] The instruction processing method proposed in the embodiment of the present application can be understood as running in the radio frequency control device introduced in the above embodiment, and can be specifically executed by the first execution unit in the radio frequency control device.

[0213] refer to Figure 16 The method flow in:

[0214] S1401. A first execution unit receives a first mobile industry processor interface (MIPI) instruction, and obtains at least one first processing instruction from a first instruction set according to the first MIPI instruction.

[0215] In order to more clearly illustrate the instruction processing method provided in the embodiment of the present application, the following will be combined with Figure 17 To understand this, we need to understand the following. Consistent with the RF control device described in the previous embodiment, the MDM is connected to the second RF control module, which is in turn connected to the first processing unit. Therefore, the MIPI instruction received by the first execution unit is actually sent by the MDM and then forwarded by the second RF control module. This MIPI instruction is also referred to as the first MIPI instruction in the embodiments of this application.

[0216] As can be determined from the two different architectures described above, either the first execution unit is a subunit of the first processing unit, or the first execution unit is the first processing unit. In the current step, the second RF control module sends the MIPI instruction to the first processing unit. Therefore, it can be understood that regardless of the architecture, the first execution unit can receive the first MIPI instruction.

[0217] For example, after the first execution unit enters the interrupt service program and obtains the first MIPI instruction from the second RF control module, at least one first processing instruction is determined based on the first MIPI instruction. The first processing instruction here belongs to the first instruction set, which is used to adjust the first MIPI instruction. The above-mentioned first instruction set can be understood as an instruction set that is customized and modified and / or expanded on the basis of an open source instruction set. Unlike general standard instruction sets, the first instruction set is specially customized for the wireless communication or radio frequency field of electronic devices. As mentioned above, with the increase in wireless communication methods and working modes of electronic devices, it is necessary to use a variety of adaptive algorithms to adjust the original MIPI instructions, and the first instruction set in the embodiment of the present application can be regarded as being used to implement the adjustment of MIPI instructions.

[0218] For example, for a first MIPI instruction received by the first execution unit, it is determined based on the address information and / or data information of the first MIPI instruction that a certain algorithm needs to be used for processing. Then, the algorithm can be implemented using at least one first processing instruction from the first instruction set to achieve the effect of the algorithm.

[0219] S1402: The first execution unit sends at least one first processing instruction to the second execution unit, so that the second execution unit executes the at least one first processing instruction to obtain a second MIPI instruction that is obtained after adjusting the first MIPI instruction.

[0220] After the first execution unit determines at least one first processing instruction, it transmits the first processing instruction to the second execution unit. For the understanding of the transmission instruction here, please refer to the relevant content above. It can be understood that the first execution unit adds the first processing instruction to the instruction register, and then the first processing instruction can be transferred to the second execution unit through instruction fetching and decoding. The second execution unit in the embodiment of the present application can be understood as an execution unit developed according to the first instruction set, which can execute the instructions in the first instruction set and can also have a hardware acceleration effect.

[0221] After receiving at least one first processing instruction, the second execution unit executes the first processing instruction one by one, and in the process of executing the at least one first processing instruction, the second execution unit completes the adjustment of the first MIPI instruction to obtain the second MIPI instruction.

[0222] like Figure 17 As shown, in Figure 17 Two FEMs are connected to the first RF control module: the first FEM and the second FEM. For example, in some implementations, the first FEM can be used for both WiFi and Bluetooth, while the second FEM can be used for both cellular and Bluetooth. In this case, the address information in the first MIPI instruction may point to the first FEM. However, if the first FEM is already occupied by WiFi, it is desirable to use the second FEM instead. This requires rewriting the original address information in the first MIPI instruction.

[0223] In another architecture, such as Figure 18 As shown, Figure 17 The content shown in is similar to that shown in , except that the first execution unit is specifically a first processing unit, and the second execution unit is specifically a second processing unit. These are two relatively independent processing units. The first processing unit and the second processing unit can transmit the first processing instruction and the like via a data path, and the second processing unit actually executes the first processing instruction. Figure 18 The rest of the reference Figure 17The content in will not be repeated here.

[0224] like Figure 19 As shown, it is assumed here that the fourth MIPI instruction 1601 is a simplified MIPI instruction, which can be understood as the first MIPI instruction mentioned above. The address bit is address A, the read / write bit is write, the register address is address B, and the data bit is data C. As mentioned above, if the address information in the fourth MIPI instruction 1601 needs to be adjusted, then a new MIPI instruction will be obtained after the adjustment. That is, Figure 19 The fifth MIPI instruction 1602 in FIG. 1 can be understood as the second MIPI instruction mentioned above. In the fifth MIPI instruction 1602, the read / write bit and data bit are the same as those in the fourth MIPI instruction 1601, while the address bit is modified to address D and the register address is modified to address E.

[0225] The above practical example illustrates a processing process, whereby after the second execution unit executes at least one first processing instruction, it adjusts the first MIPI instruction and obtains a new second MIPI instruction. In the above example, the address information of the second MIPI instruction has changed compared to the first MIPI instruction, and how this information changes needs to be determined based on a specific algorithm. A more specific algorithm is beyond the scope of the present application and will not be described in detail here.

[0226] S1403: The first execution unit receives the second MIPI instruction sent by the second execution unit, and sends the second MIPI instruction to the first RF control module.

[0227] When the second execution unit completes the adjustment of the first MIPI instruction and obtains the second MIPI instruction, the second execution unit can send the second MIPI instruction to the first execution unit. For the second execution unit sending the second MIPI instruction to the first execution unit here, it can be understood that the second execution unit obtains the second MIPI instruction after executing the first processing instruction, and then can inform the first execution unit of the storage address of the second MIPI instruction. For example, the second execution unit can implement the above process by generating an instruction containing the storage address of the second MIPI instruction and adding the instruction to the instruction register of the first processing unit. Next, the first execution unit sends the second MIPI instruction to the first RF control module, wherein the first RF module of the embodiment of the present application can be regarded as the first RF control module mentioned above, or it can also be called a main control module.

[0228] After receiving the second MIPI instruction, the first RF control module (i.e., the first RF control module) forwards the instruction to the subsequently connected FEM based on the information in the MIPI instruction, and the FEM then executes the MIPI instruction. For example, the MIPI instruction can be transmitted to the corresponding FEM based on the address bit information in the MIPI instruction.

[0229] In summary, in the instruction processing method proposed in the embodiment of the present application, the task of adjusting the MIPI instruction that could have been completed by the first execution unit is transferred to the second execution unit for completion. As a co-execution unit of the first execution unit, the second execution unit does not have the general processing capabilities of the first execution unit. However, in the algorithm processing of MIPI instructions in the communication field, since it is developed based on a custom instruction set, it has significant advantages in processing speed and can effectively shorten the time of algorithm processing. And because the time of algorithm processing is the longest in the entire process, this can make the overall process more efficient, thereby reducing communication delay. Furthermore, from a hardware perspective, in the instruction processing method proposed in the embodiment of the present application, only a second execution unit needs to be set up in the first processing unit. On the one hand, this approach allows the second execution unit and the first execution unit to share other units or modules, thereby making full use of resources. On the other hand, it can also effectively avoid the space occupied by additional electronic devices, and other units or modules in the electronic device other than the first processing unit hardly need to be adjusted or changed.

[0230] In addition to using a tightly coupled architecture to execute this method, a loosely coupled architecture can also be used. That is, a second processing unit is connected to the first processing unit. In this way, the second processing unit can avoid affecting the first processing unit during operation, and has more computing power and an independent set of CPU processing hardware and processes. In addition, it is more conducive to the update and iteration of the instruction processing method and the radio frequency control device. For example, if communication scenarios and services are added, the processing algorithm and the custom RISC-V instruction set need to be updated or modified. In this case, only the second processing unit needs to be replaced, and other units or modules remain unchanged. And, it is understandable that heat dissipation is usually very important in electronic devices. When electronic devices cannot effectively dissipate heat, in order to protect the hardware from damage, in some cases, the hardware performance will be actively reduced. In the instruction processing method proposed in the embodiment of the present application, since the second processing unit is separated from the first processing unit, the second processing unit can be cooled more easily and maintain better performance.

[0231] Based on the above embodiments, Figures 20 to 22Another instruction processing method provided in the embodiment of the present application is described. Figure 20 Schematic diagram of the instruction processing method provided in this embodiment of the application Figure 2 , Figure 21 Schematic diagram of the implementation of the custom RISC-V instructions provided in the embodiment of this application, Figure 22 Schematic diagram of data processed by MIPI instructions provided in the embodiment of this application Figure 2 .

[0232] The embodiments of the present application can be viewed as extensions of the previous embodiments. The following content is applicable to both architectures described above. For example, the first execution unit and the second execution unit described below can both be sub-units included in the first processing unit (corresponding to the tightly coupled architecture described above), or it can also be understood that the first execution unit is the first processing unit, and the second execution unit is the second processing unit (corresponding to the loosely coupled architecture described above). Therefore, the following will no longer distinguish between the architectural relationships corresponding to the first execution unit and the second execution unit, and will only introduce the first execution unit and the second execution unit.

[0233] refer to Figure 20 The steps in the process are explained in conjunction with the radio frequency control device mentioned above:

[0234] S1701: Receive instructions.

[0235] The first execution unit obtains the first MIPI instruction from the second RF control module. This step can refer to the above embodiment. Figure 16 S1401 in the description will not be described in detail here.

[0236] In addition, in some implementations, the first execution unit may also obtain non-MIPI instructions corresponding to the execution of other functions. In the embodiment of the present application, the instruction received by the first execution unit may be referred to as a third instruction, which may be a MIPI instruction type or a non-MIPI instruction type.

[0237] S1702: Determine whether it is a MIPI instruction. If so, execute S1703; otherwise, execute S1704.

[0238] It is understandable that for the first execution unit, since the received third instruction may be a non-MIPI instruction, it is necessary to judge the type of instruction after receiving the third instruction. When judging, it can be determined whether it is a MIPI instruction based on the format of the third instruction. As mentioned above, the MIPI instruction itself needs to comply with certain specifications and protocols, and the type of instruction can be judged from the format of the instruction. Or in some implementations, the type of instruction can be determined by the receiving upstream module. Or in other implementations, the instruction type of the third instruction can also be directly marked by the upstream module.

[0239] If the third instruction is determined to be a MIPI instruction type, S1703 is executed, that is, the second execution unit is required to participate in the processing flow. Otherwise, if the third instruction is determined to be a non-MIPI instruction type, S1704 is executed, that is, processing is performed as usual.

[0240] It should be noted that determining whether the third instruction is a MIPI instruction type here is different from the determination of whether the instruction is a first processing instruction by the IFU and IDU in the first execution unit as described in the previous embodiment. It can be understood that in this step, determining whether the third instruction is a MIPI instruction type is performed by the first execution unit based on at least one instruction.

[0241] S1703: The second execution unit assists in processing.

[0242] This step is performed after the first execution unit determines that the third instruction is a MIPI instruction type. The overall process of this step is consistent with the method flow of the previous embodiment. In both cases, the first execution unit first determines which algorithm to use to process the third instruction, then sends the first processing instruction corresponding to the algorithm to the second execution unit, which then completes the execution. For more details, please refer to the previous embodiment and will not be repeated here.

[0243] In some implementations, when the first execution unit determines which algorithm to use to adjust the third instruction, or the first MIPI instruction, in addition to determining it based on the MIPI instruction itself, it can also be combined with the working information of the electronic device. The working information may include working scene information, working mode information, and device status information. For example, the working scene information may contain the wireless communication method currently used by the electronic device, such as WiFi, cellular network, etc. The working mode information may include, for example, the preset mode of the electronic device, such as flight mode, do not disturb mode, etc. For more relevant content, please refer to the corresponding part of the previous text, which will not be repeated here.

[0244] It is understandable that in some cases, even the same first MIPI instruction may be in different working modes. Further refining the adjustment of the first MIPI instruction in combination with different working modes and adopting a more detailed algorithm can be more in line with the increasingly rich communication scenarios. When the first execution unit determines the first processing instruction, it can be determined according to the preset matching rules. For example, according to actual business needs, a set of matching rules can be maintained in advance by R&D personnel. In the matching rule, the relevant information of the MIPI instruction and the corresponding working mode information can be used as matching conditions or matching keys, and the corresponding processing algorithm can be used as the matching result or value. The matching rule can be updated or modified as the actual needs change, and the specific style of the matching rule is not limited in the embodiment of this application.

[0245] After the algorithm for processing the first MIPI instruction is determined by the preset matching rule, the algorithm can be implemented by at least one first processing instruction from the first instruction set. Figure 21 As shown, in Figure 21 A definition and construction method of a first instruction set is shown in FIG. In the embodiment of the present application, the first instruction set may be RISC-V. Figure 21 (a) shows the structure of a custom RISC-V instruction. A custom RISC-V instruction consists of 32 bits or 4 bytes. From right to left, they represent the low bit to the high bit, namely the opcode, result register, instruction parameter 1, instruction parameter 2, instruction parameter 3, algorithm parameter 1, algorithm parameter 2, and function code. Among them, the opcode represents the main function of the instruction, and the instruction parameters can be combined with the opcode to represent how the instruction is executed. The result register indicates where the result after the instruction is executed is stored. The function code can be understood as a further subdivision of the instruction function. For example, some custom instructions have the same opcode but different function codes. The algorithm parameters generally carry various data information for use by the algorithm corresponding to the instruction.

[0246] Here we assume that multiple RISC-V instructions are customized and designed based on the requirements of the working modes in various communication scenarios, then we can get the following Figure 21 (b) shows the custom instruction description table. In this table, the functions and parameter meanings of the custom instructions are explained. When developing the corresponding execution unit, you can manufacture it according to this table. Figure 21In (b), two custom instructions are shown: Custom Instruction 1 and Custom Instruction 2. For example, the opcode for Custom Instruction 1 is 1111011, indicating the use of Algorithm 1. The corresponding instruction parameter 1 has a value of 1, indicating that the result needs to be written back to the result register. The corresponding instruction parameter 2 has a value of 1, indicating that Algorithm Parameter 1 needs to be read and used. The corresponding instruction parameter 3 also has a value of 1, indicating that Algorithm Parameter 2 also needs to be read and used. The function code is 7, indicating that Custom Instruction 1 executes Sub-Algorithm A, which can be understood as a subdivision of Algorithm 1. Similarly, Custom Instruction 2 has an opcode of 1111011, differing from Custom Instruction 1 in the instruction parameters and function code. Both Instruction Parameter 1 and Instruction Parameter 3 of Custom Instruction 2 are 0. The former indicates that the result does not need to be written back to the result register, while the latter indicates that Algorithm Parameter 2 does not need to be read. The value of Custom Instruction 2 is 8, indicating that this instruction executes Sub-Algorithm B, which can also be understood as a subdivision of Algorithm 1.

[0247] That is to say, by Figure 21 In this way, a customized RISC-V instruction set can be designed in combination with algorithms for specific scenarios.

[0248] To further help understand the role of the custom RISC-V instruction set, you can refer to Figure 22 This is explained using the content in [1]. Consider a communication scenario where, to conserve power, an electronic device enters low-power mode when no communication is taking place or when traffic is low. In this mode, some components within the FEM become inactive, or what can be considered a dormant state. If one of the dormant FEMs needs to start up and send signals, it is necessary to activate the components within the FEM, or transition them to an active state, or a normal operating state. These FEM components may include, for example, power amplifiers, filters, and switches.

[0249] In the above scenario, the first MIPI instruction received by the first execution unit can be used to instruct the FEM to switch to an active state. Simultaneously, the first execution unit can also obtain the current operating information of the electronic device from the application processing unit (AP) of the electronic device. This operating information indicates that the electronic device is in low-power mode and the target FEM is in an inactive state. Therefore, it is necessary to adjust the FEM state using a MIPI instruction, and further, to adjust the states of individual components in the target FEM using the MIPI instruction.

[0250] Figure 22The sixth MIPI instruction 1901, the seventh MIPI instruction 1902, the eighth MIPI instruction 1903 and the ninth MIPI instruction 1904 can be regarded as a simplified MIPI instruction for ease of explanation and understanding. Among them, the sixth MIPI instruction 1901 can correspond to the first MIPI instruction mentioned above. Its address bit is address A, the read / write bit is write, the register address is address B, and the data bit is data C. It can be understood that the address bit corresponds to the target FEM, the register address bit corresponds to a functional device in the target FEM, and the data bit represents a parameter in the functional device. After the first execution unit determines the processing algorithm in combination with the first MIPI instruction and the current working information, the first processing instruction is transmitted to the second execution unit for execution. After the second execution unit completes the execution of the first processing instruction, it is assumed that 3 second MIPI instructions are obtained, which corresponds to Figure 22 The seventh MIPI instruction 1902, the eighth MIPI instruction 1903, and the ninth MIPI instruction 1904 are shown in FIG. For example, the seventh MIPI instruction 1902 is unchanged from the sixth MIPI instruction 1901. The register address bits in the eighth MIPI instruction 1903 are modified to address D, and the data bits are modified to data F, compared to the sixth MIPI instruction 1901. The register address bits in the ninth MIPI instruction 1904 are modified to address E, and the data bits are modified to data G, compared to the sixth MIPI instruction 1901. It will be appreciated that, in this example, the three second MIPI instructions can be used to indicate state adjustments to three functional components in the target FEM.

[0251] S1704: Process normally.

[0252] If the first execution unit determines that the received third instruction is a non-MIPI instruction, then the second execution unit will no longer assist in processing. The instruction used by the first execution unit to process the third instruction can be called the second processing instruction, and the corresponding result can be called the fourth instruction. Similarly, after receiving the fourth instruction, the first execution unit can also send the fourth instruction to the first RF module.

[0253] The following is a summary based on the above description: In the embodiment of the present application, based on the above embodiment, it is explained that the first execution unit will judge the type of instruction received, and perform different subsequent processing procedures according to the instruction type. In addition, when determining the first processing instruction, the first execution unit will combine the current working information of the electronic device in addition to the first MIPI instruction, so as to achieve further refined processing. In this way, on the one hand, the integrity and flexibility of the method are enhanced, so that the method can be adapted to more usage scenarios. On the other hand, combining more information to determine the specific processing algorithm for MIPI instructions can make the algorithm more targeted and more efficient.

[0254] Next, based on the above-mentioned embodiments, Figure 23 and Figure 24 Another instruction processing method provided in the embodiment of the present application is described. Figure 23 Schematic diagram of the comparison of processing instructions provided in the embodiment of this application Figure 1 , Figure 24 Schematic diagram of the comparison of processing instructions provided in the embodiment of this application Figure 2 .

[0255] In the above-mentioned embodiments, the radio frequency control device and the corresponding instruction processing method are described. In order to better reflect the effectiveness of the above method, the embodiments of this application will use some specific instruction codes for description.

[0256] In the embodiments of the present application, compared to the first instruction set in the previous embodiments, a standard instruction set is referred to as the second instruction set, and correspondingly, the instructions in the second instruction set used to adjust the MIPI instructions are referred to as third processing instructions. It is assumed here that the second instruction set is the ARM instruction set and the first instruction set is a custom RISC-V instruction set.

[0257] Suppose you need to use instructions from an instruction set to implement the basic functionality of an algorithm: reading data from a register or memory, modifying it, and then writing the modified data to a result register or memory. To ensure that the data is modified accurately, atomic modifications are used. For example, in a loop, the target data is modified and the success or failure of the modification is determined. If the modification fails, the modification is repeated again.

[0258] like Figure 23As shown in the figure, the left side shows an ARM instruction code that implements the above function. "loop_start" on line 1 indicates loop execution. "ldrex r4, [r0]" on line 2 can be understood as loading data from register r4, with register r0 being the exclusive access flag. "add r5, r4, #1" on line 3 increments the value in register r4 by 1 and saves the result in register r5. "strex r3, r5, [r0]" on line 4 attempts to store the new value in register r3 and clears the exclusive access flag. "cmp r3, #0" on line 5 determines whether the modification is successful by comparing the value in register r3 to 0. "bne loop_start" on line 6 indicates that if the modification in line 5 fails, the loop will be repeated at line 1.

[0259] Correspondingly, in Figure 23 The right side of the figure shows a RISC-V-based custom instruction. In this implementation, lines 1 through 3 of the RISC-V custom instruction are functionally similar to lines 1 through 3 of the ARM instruction on the left. Similarly, line 5 of the RISC-V custom instruction on the right is functionally similar to line 6 of the ARM instruction on the left. These details will not be repeated here. The "sc.w t0, t2, (a0)" line 4 of the RISC-V custom instruction on the right can be understood as including both the write-back function of line 4 and the comparison function of line 5 of the ARM instruction on the left. In other words, the custom RISC-V instruction can combine two ARM instructions into a single instruction.

[0260] The process of executing instructions by processing units such as CPUs and MCUs involves the concept of clock cycles. A clock cycle refers to the unit of time required for a processor to perform basic operations. It is one of the fundamental units of time in computer systems and is typically correlated to the processor's clock speed, measured in hertz per second (Hz). For example, a processor with a clock speed of 3 GHz (gigahertz) has 3 billion clock cycles per second. The execution time of an instruction typically consists of one or more clock cycles, depending on the complexity of the instruction and the processor architecture. Simple instructions may require only one or a few clock cycles, while complex instructions may require more. Furthermore, in custom RISC-V instructions, compared to ARM instructions, some consecutive ARM instructions can be appropriately combined into a single RISC-V instruction, allowing it to execute in fewer clock cycles than the original multiple ARM instructions.

[0261] For example, in Figure 23As shown on the left side of the ARM instructions, assuming that each instruction in each row requires one clock cycle, then a complete execution requires 6 clock cycles. Figure 23 On the right side, although the RISC-V custom instruction on line 4 combines the functionality of both the ARM instructions on lines 4 and 5, the original two instructions are consecutive and functionally related, and the functions themselves are simple instructions. Therefore, the RISC-V custom instruction on line 4 can still be executed in one clock cycle on the second execution unit instead of two clock cycles. As a result, the RISC-V custom instruction on the right side requires only five clock cycles to execute completely, which is lower than the ARM instruction on the left.

[0262] In addition, after being optimized, the instructions in RISC-V can have better performance in specific scenarios. For example Figure 23 The RISC-V custom instructions "lr.w" and "sc.w" on the right are both atomic read and write operations, just like the ARM instructions "ldrex" and "strex" on the left. However, the "lr.w" and "sc.w" instructions have a higher success rate. This significantly reduces the number of re-executions after failures, further reducing the clock cycles required for actual execution.

[0263] Based on the above examples, Figure 24 Let's look at an example of a custom RISC-V instruction. For example, in the previous article Figure 22 In the corresponding example, the second execution unit needs to obtain multiple second MIPI instructions based on the first MIPI instruction. In some implementations, a corresponding number of MIPI instructions can be initialized first, and then the data therein can be cyclically modified to obtain multiple second MIPI instructions. Figure 24The ARM instructions on the left implement this functionality, modifying multiple values in a loop. Here, we assume four changes are required. The "mov r4, #0" instruction on line 1 initializes the r4 counter to 0. The "loop_start" instruction on line 2 begins the loop. The "cmp r4, #4" instruction on line 3 and the "bge loop_end" instruction on line 4 compare whether the r4 counter has reached 4, breaking the loop if so. The "ldr r5, [r0, r4, LSL #2]" instruction on line 5 loads the current value from memory, where LSL #2 indicates a left shift of 2 bits. The "add r5, r5, #1" instruction on line 6 increments the current value by 1, modifying the original value in this example. The "str r5, [r0, r4, LSL #2]" instruction on line 7 stores the new value back to the original address. The "addr4, r4, #1" instruction on line 8 and the "b loop_start" instruction on line 9 increment the counter by 1 and return to the loop starting point. The "loop_end" instruction on line 10 ends the loop.

[0264] Let's look at it again Figure 24 The RISC-V custom instructions on the right side of the figure are simplified by the special instruction "custom_modify_memory" in this example. Here, a0 is the memory base address and a1 is the number of modifications. It is understandable that on the one hand, by combining complex tasks that were originally completed by multiple instructions into one custom instruction, it can have faster running efficiency and consume fewer clock cycles when completing the same task. In addition, further optimization can be performed in combination with hardware. For example, in this example, Figure 24 The ARM instruction on the left in the middle modifies multiple values in a loop, while the custom "custom_modify_memory" instruction can modify multiple values simultaneously in parallel. This optimization is feasible in RISC-V and can greatly improve instruction execution efficiency.

[0265] In summary, the embodiments of the present application, based on the previous embodiments, show some relatively specific examples. For the same task, how can the ARM instruction set and the customized RISC-V instruction set be implemented? And by comparing the implementation of the two, the clock cycles and operating efficiency required to execute instructions are analyzed. It can be seen that various processing algorithms for adjusting MIPI instructions in the communication field under multiple working modes can be implemented using customized RISC-V, which can reduce the number of instructions and even combine complex functions corresponding to multiple ARM instructions into a customized RISC-V instruction, effectively reducing the clock cycles required for operation. At the same time, it can also be optimized in combination with hardware. For example, for some tasks that require cyclic processing, parallel processing can be used to complete them, further significantly improving operating efficiency. It can also reduce communication delays as a whole and enhance user experience.

[0266] It should be noted that the module names involved in the embodiments of the present application can be defined as other names as long as the functions of each module can be achieved, and there is no specific restriction on the names of the modules.

[0267] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the embodiments of this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0268] The image processing method of the embodiment of the present application has been described above. The following describes the device for executing the above method. Those skilled in the art will understand that the method and the device can be combined and referenced with each other, and the relevant device can execute the steps in the above image processing method.

[0269] The above image processing method can be applied to electronic devices with communication functions. The electronic devices include terminal devices. The specific device form of the terminal device can refer to the above related descriptions and will not be repeated here.

[0270] In one implementation, an embodiment of the present application provides an electronic device, Figure 25 Schematic diagram of the hardware structure of the electronic device.

[0271] like Figure 25 As shown, the electronic device 2200 includes: a processor 2201 and a memory 2202; the memory 2202 stores computer-executable instructions; the processor 2201 executes the computer-executable instructions stored in the memory 2202, so that the electronic device 2200 executes the above method.

[0272] When the memory 2202 is independently provided, the electronic device further includes a bus 2203 for connecting the memory 2202 and the processor 2201 .

[0273] The present embodiment provides a chip. The chip includes a processor configured to invoke a computer program stored in a memory to execute the technical solution of the above embodiment. The implementation principles and technical effects are similar to those of the above-mentioned related embodiments and will not be further described here.

[0274] The embodiments of the present application also provide a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the above-mentioned method is implemented. The methods described in the above embodiments can be implemented in whole or in part by software, hardware, firmware, or any combination thereof. If implemented in software, the functions can be stored as one or more instructions or codes on a computer-readable medium or transmitted on a computer-readable medium. Computer-readable media can include computer storage media and communication media, and can also include any medium that can transfer a computer program from one place to another. The storage medium can be any target medium that can be accessed by a computer.

[0275] In one possible implementation, computer-readable media may include RAM, ROM, compact disc read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium designed to carry or store the desired program code in the form of instructions or data structures and accessible by a computer. Furthermore, any connection is appropriately referred to as a computer-readable medium. For example, if software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, include optical discs, laser discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs, where disks typically reproduce data magnetically, while optical discs reproduce data optically using lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0276] The above specific implementation methods further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent replacements, improvements, etc. made on the basis of the technical solutions of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for processing an instruction, characterized in that: Applied to an electronic device, the electronic device comprises a first execution unit and a second execution unit; The method comprises: The first execution unit receives a first MIPI instruction, and obtains at least one first processing instruction from a first instruction set according to the first MIPI instruction, where the first processing instruction is used to adjust the first MIPI instruction, and the first instruction set includes multiple customized processing instructions; The first execution unit sends the at least one first processing instruction to the second execution unit, so that the second execution unit executes the at least one first processing instruction to obtain a second MIPI instruction that is adjusted for the first MIPI instruction; wherein the number of the first processing instructions is less than the number of instructions in the standard instruction set; The first execution unit receives the second MIPI instruction sent by the second execution unit, and sends the second MIPI instruction to the first RF control module.

2. The method according to claim 1, characterized in that The acquiring at least one first processing instruction from the first instruction set according to the first MIPI instruction includes: The first execution unit obtains a processing instruction matching the first MIPI instruction from the first instruction set based on a preset matching rule to obtain the at least one first processing instruction.

3. The method according to claim 2, characterized in that The method further comprises: The first execution unit obtains working information of the electronic device, where the working information includes at least one of the following: working scene information, working mode information, and device status information.

4. The method according to claim 3, characterized in that The acquiring at least one first processing instruction from the first instruction set according to the first MIPI instruction includes: The first execution unit obtains a processing instruction that matches the first MIPI instruction and the work information from the first instruction set based on a preset matching rule to obtain the at least one first processing instruction.

5. The method according to any one of claims 1 to 4, characterized in that The method further comprises: A plurality of processing instructions are written into the first instruction set, where the plurality of processing instructions are instructions for executing MIPI instruction adjustment.

6. The method according to any one of claims 1 to 4, characterized in that The method further comprises: The first execution unit receives a third instruction, and obtains at least one second processing instruction from a second instruction set according to the third instruction, wherein the second processing instruction is used to adjust the third instruction, the third instruction is a non-MIPI type instruction, and the second instruction set includes multiple processing instructions initially included in the instruction set; The first execution unit executes the at least one second processing instruction to obtain a fourth instruction obtained by adjusting the third instruction; The first execution unit sends the fourth instruction to the first radio frequency control module.

7. The method according to any one of claims 1 to 4, characterized in that The method further comprises: The first execution unit receives the first MIPI instruction and obtains at least one third processing instruction from a second instruction set according to the first MIPI instruction, wherein the third processing instruction is used to adjust the first MIPI instruction, and the second instruction set includes multiple processing instructions initially included in the instruction set; wherein the number of the first processing instructions is less than the number of the third processing instructions; The first execution unit executes the at least one third processing instruction to obtain a third MIPI instruction obtained by adjusting the first MIPI instruction; The first execution unit sends the third MIPI instruction to the first RF control module.

8. The method according to claim 6, characterized in that The first instruction set is the Reduced Instruction Set V (RISC-V) instruction set, and the second instruction set is the Advanced Reduced Instruction Set Machine (ARM) instruction set.

9. The method according to any one of claims 1 to 4, characterized in that The first execution unit and the second execution unit are both included in the first processing unit; or, The first execution unit is the first processing unit, and the second execution unit is the second processing unit; The first processing unit is a main processing unit, and the second processing unit is a co-processing unit.

10. A radio frequency control device, characterized in that: include: a first execution unit and a second execution unit; The first execution unit is configured to execute the method according to any one of claims 1 to 9; The second execution unit is configured to receive at least one first processing instruction sent by the first execution unit, and execute the at least one first processing instruction to obtain a second MIPI instruction that is obtained by adjusting the first MIPI instruction.

11. An electronic device, characterized in that: The electronic device includes: one or more processors and memory; The memory is coupled to the one or more processors, and the memory is used to store computer program code, where the computer program code includes computer instructions. The one or more processors call the computer instructions to enable the electronic device to execute the method according to any one of claims 1 to 9.

12. A chip system, characterized in that: The chip system is applied to an electronic device, and the chip system includes one or more processors, and the one or more processors are used to call computer instructions so that the electronic device executes the method as described in any one of claims 1 to 9.

13. A computer-readable storage medium, characterized in that The computer-readable storage medium comprises computer instructions, and when the computer instructions are executed on an electronic device, the electronic device is caused to perform the method according to any one of claims 1 to 9.

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