Signal demodulation circuit, method, device and medium suitable for PICC card TYPEB protocol

Abstract

The embodiment of the present disclosure relates to a signal demodulation circuit, method, device and medium suitable for PICC card TYPEB protocol, the circuit comprises: an NRZ demodulation module and a protocol analysis module, the NRZ demodulation module is used to determine the rising edge and the falling edge of the received analog-digital conversion signal according to a preset rising and falling edge threshold value, and according to the rising edge and the falling edge of the SOF stage, a SOF estimation signal is generated according to the principle of encountering edge flip and is sent to the protocol analysis module; the protocol analysis module searches whether there is a SOF signal satisfying the SOF length threshold value in the SOF estimation signal based on a preset SOF length threshold value, and feeds back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched; the NRZ demodulation module is also used to generate a data signal according to the rising edge and the falling edge of the data stage according to the principle of encountering valid edge flip and send the data signal to the protocol analysis module after receiving the frame header search completion flag. By adopting the above technical scheme, the PICC card can correctly find the SOF signal from different phase noises.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of non-contact communication, in particular to a signal demodulation circuit, method, device and medium suitable for PICC card TYPEB protocol. BACKGROUND

[0002] With the development of Internet of Things technology, more and more industries attach electronic tags RFID (Radio Frequency Identification, also known as radio frequency identification) to different objects to form an identification system, such as access control cards, identity cards, car card keys, bank cards, etc. Therefore, the requirements for non-contact communication are further improved, and the efficiency of communication is also improved while ensuring the correctness of communication. Due to the particularity of non-contact communication, the process of communication is easily disturbed by the external environment, so that the transmitted signal has different degrees of noise interference. Therefore, how to eliminate the noise in the signal and improve the anti-interference performance of communication has become a problem to be solved at present. SUMMARY

[0003] In order to solve the above technical problems or at least partially solve the above technical problems, the present disclosure provides a signal demodulation circuit, method, device and medium suitable for PICC card TYPEB protocol.

[0004] In a first aspect, the embodiments of the present disclosure provide a signal demodulation circuit suitable for PICC card TYPEB protocol, comprising an NRZ demodulation module and a protocol analysis module.

[0005] The NRZ demodulation module is configured to determine the rising edge and the falling edge of the received analog-to-digital conversion signal according to a preset rising and falling edge threshold, and generate a SOF estimation signal according to the rising edge and the falling edge of the SOF stage and send it to the protocol analysis module according to the edge flip principle.

[0006] The protocol analysis module is configured to search whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal based on a preset SOF length threshold after receiving the SOF estimation signal, and feed back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched.

[0007] The NRZ demodulation module is further configured to generate a data signal according to the rising edge and the falling edge of the data stage and send it to the protocol analysis module according to the valid edge flip principle after receiving the frame header search completion flag.

[0008] In a second aspect, the embodiments of the present disclosure provide a signal demodulation method suitable for a PICC card TYPEB protocol, applied to an NRZ demodulation module of the signal demodulation circuit suitable for the PICC card TYPEB protocol as described in the first aspect, and the method comprises the following steps:

[0009] determining rising edges and falling edges of the received analog-to-digital conversion signal according to preset rising and falling edge thresholds;

[0010] generating a SOF estimation signal according to the rising edges and the falling edges of the SOF stage, in accordance with the principle of edge flip;

[0011] sending the SOF estimation signal to a protocol analysis module of the signal demodulation circuit suitable for the PICC card TYPEB protocol, searching, by the protocol analysis module, whether there is a SOF signal satisfying a preset SOF length threshold in the SOF estimation signal based on the SOF length threshold, and feeding back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched;

[0012] generating a data signal according to the rising edges and the falling edges of the data stage, in accordance with the principle of valid edge flip, and sending the data signal to the protocol analysis module after receiving the frame header search completion flag.

[0013] In a third aspect, the embodiments of the present disclosure provide a signal demodulation method suitable for a PICC card TYPEB protocol, applied to a protocol analysis module of the signal demodulation circuit suitable for the PICC card TYPEB protocol as described in the first aspect, and the method comprises the following steps:

[0014] receiving a SOF estimation signal sent by an NRZ demodulation module of the signal demodulation circuit suitable for the PICC card TYPEB protocol, the SOF estimation signal being generated by the NRZ demodulation module according to rising edges and falling edges of a received analog-to-digital conversion signal determined according to preset rising and falling edge thresholds, and according to the rising edges and the falling edges of the SOF stage, in accordance with the principle of edge flip;

[0015] searching, based on a preset SOF length threshold, whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal;

[0016] in response to searching for the SOF signal, feeding back a frame header search completion flag to the NRZ demodulation module, so that the NRZ demodulation module generates a data signal according to rising edges and falling edges of a data stage, in accordance with the principle of valid edge flip, and sends the data signal to the protocol analysis module after receiving the frame header search completion flag.

[0017] In a fourth aspect, an electronic device is provided, and the electronic device includes a processor, a memory for storing executable instructions for the processor, and the processor is configured to read the executable instructions from the memory and execute the executable instructions to implement the signal demodulation method for the PICC card TYPEB protocol according to the second aspect or the third aspect.

[0018] In a fifth aspect, a computer readable storage medium is provided, and the storage medium stores a computer program for implementing the signal demodulation method for the PICC card TYPEB protocol according to the second aspect or the third aspect.

[0019] Compared with the prior art, the technical solutions provided by the embodiments of the present disclosure have the following advantages:

[0020] The signal demodulation method for the PICC card TYPEB protocol provided by the embodiments of the present disclosure, the NRZ demodulation module determines the rising edge and the falling edge of the received analog-to-digital conversion signal according to the preset rising and falling edge threshold, and generates the SOF estimation signal according to the rising edge and the falling edge of the SOF stage and sends the SOF estimation signal to the protocol analysis module according to the edge flip principle. After receiving the SOF estimation signal, the protocol analysis module searches whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal based on the preset SOF length threshold, and feeds back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched. After receiving the frame header search completion flag, the NRZ demodulation module generates the data signal according to the rising edge and the falling edge of the data stage and sends the data signal to the protocol analysis module according to the valid edge flip principle. By adjusting the SOF flip point strategy of the NRZ demodulation module and combining the SOF search strategy of the protocol analysis module, the PICC card can correctly find the SOF signal from different phase noises, effectively eliminate the influence of different position noises, effectively identify the SOF signal, and then correctly receive the subsequent communication data, thereby improving the communication efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0021] The above and other features, advantages, and aspects of the embodiments of the present disclosure will become more apparent by describing in detail the following specific embodiments with reference to the attached drawings. Throughout the drawings, the same or similar reference numerals refer to the same or similar elements. It should be understood that the drawings are schematic, and the original and elements are not necessarily drawn according to the scale.

[0022] FIG. 1(a) shows a schematic diagram of the existing PICC TYPEB NRZ decoding logic;

[0023] FIG. 1(b) shows a schematic diagram of decoding the PICC TYPEB NRZ signal disturbed by single noise using the existing decoding logic.

[0024] Figure 1(c) shows a schematic diagram of decoding a PICC TYPEB NRZ signal with multiple noise interference using existing decoding logic;

[0025] Figure 2 Figure 2 shows a schematic diagram of a comparison between an existing demodulation strategy and an improved demodulation strategy provided by the present disclosure;

[0026] Figure 3 Figure 3 shows a schematic diagram of a signal demodulation circuit for a PICC card TYPEB protocol according to an exemplary embodiment of the present disclosure;

[0027] Figure 4 Figure 4 shows a schematic diagram of a receive state machine of a protocol analysis module according to an exemplary embodiment of the present disclosure;

[0028] Figure 5 Figure 5 shows a schematic diagram of the effect of a signal demodulation circuit according to the present disclosure on a single noise resolved waveform according to an exemplary embodiment of the present disclosure;

[0029] Figure 6 Figure 6 shows a schematic diagram of the effect of a signal demodulation circuit according to the present disclosure on a multiple noise resolved waveform according to an exemplary embodiment of the present disclosure;

[0030] Figure 7 Figure 7 shows a flowchart of a signal demodulation method for a PICC card TYPEB protocol according to an exemplary embodiment of the present disclosure;

[0031] Figure 8 Figure 8 shows a flowchart of a signal demodulation method for a PICC card TYPEB protocol according to another exemplary embodiment of the present disclosure. DETAILED DESCRIPTION

[0032] Embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings. While several embodiments of the present disclosure are shown in the drawings, it is understood that the present disclosure can be embodied in various forms and should not be construed as being limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and fully convey the scope of the present disclosure to those skilled in the art. It should be understood that the drawings and embodiments are for illustrative purposes only and are not intended to limit the scope of the present disclosure.

[0033] It should be understood that the various steps of the method embodiments of the present disclosure can be performed in different orders and / or in parallel. In addition, the method embodiments can include additional steps and / or omit performing the steps shown. The scope of the present disclosure is not limited in this regard.

[0034] As used herein, the term "includes" and its variants are to be read to be equivalent to "includes, but is not limited to." The term "based on" is to be read as "based, at least in part, on." The term "one embodiment" means "at least one embodiment." The term "another embodiment" means "at least one additional embodiment." The term "some embodiments" means "at least some embodiments." Related terms have corresponding definitions.

[0035] It should be noted that the terms "first", "second", and the like in the present disclosure are used only to distinguish different devices, modules or units, and do not imply the order or interdependence of the functions performed by these devices, modules or units.

[0036] It should be noted that the terms "one", "multiple" in the present disclosure are illustrative and not restrictive, and those skilled in the art should understand that "one or more" should be understood unless otherwise explicitly indicated in the context.

[0037] The names of the messages or information exchanged between the devices in the embodiments of the present disclosure are only for illustrative purposes, and are not used to limit the scope of the messages or information.

[0038] Before explaining the specific embodiments of the present disclosure, the Chinese names or English abbreviations that may be involved in the present disclosure are explained as follows:

[0039] PICC: Proximity Card, NFC induction IC card;

[0040] TYPEB: Non-contact IC card standard protocol, a protocol type specified in ISO / IEC 14443 protocol supporting near field identification, ISO 14443 TYPEB protocol;

[0041] SOF: Frame synchronization header information specified in ISO / IEC 14443 TYPEB protocol, indicating the start of the frame; the shape of the SOF signal is 10 ETU (10 or 11 ETU) low and 2 ETU (2 or 3 ETU) high, only the correct SOF shape can normally obtain the subsequent frame information;

[0042] ETU: Elementary Time Unit, basic time unit, 1 ETU is equivalent to the time required for transmitting 1 data bit (bit);

[0043] EOF: indicating the end of the frame, for details, please refer to the definition in ISO / IEC 14443-1, 2, 3;

[0044] IDLE: idle state;

[0045] DATA: data part in frame format, carrying valid communication content information;

[0046] NRZ: NON Return Zero Code, non-return-to-zero coding, high level is 1, low level is 0; PICC TYPEB protocol uses NRZ coding mode;

[0047] RAM: Random Access Memory, random access memory, is the internal memory directly exchanging data with CPU;

[0048] valid edge: the current edge change must be opposite to the last edge change direction to be a valid edge, judging the rising edge valid needs to judge the current is rising edge and the last edge change is falling edge, judging the falling edge valid needs to judge the current is falling edge and the last edge change is rising edge, containing polarity protection characteristics;

[0049] adc: analog-to-digital conversion signal obtained by quantizing the received field information by the analog receiver circuit;

[0050] fall_eg: valid falling edge flag in adc data;

[0051] rise_eg: valid rising edge flag in adc data;

[0052] rxd: signal generated by NRZ demodulation module according to ISO / IEC 14443 TYPEB protocol requirements and according to demodulation strategy;

[0053] SOFL: represents the low level part in SOF signal;

[0054] SOFH: represents the high level part in SOF signal.

[0055] Currently, in the related art, the PICC TYPEB NRZ decoding follows the polarity judgment principle, that is, the level is flipped only when an effective edge is encountered. FIG. 1(a) shows a schematic diagram of the existing PICC TYPEB NRZ decoding logic. In FIG. 1(a), adc represents the analog-to-digital conversion signal received by the NRZ demodulation module, fall eg represents the valid falling edge flag bit in the adc data, rise eg represents the valid rising edge flag bit in the adc data, rxd represents the signal with data information generated by the NRZ demodulation module after analyzing the adc data according to the polarity judgment principle, and the states in format are frame analysis states conforming to the TYPEB protocol requirements. The generation logic of the rxd signal shown in FIG. 1(a) is as follows: (1) the default idle state of the rxd signal is high; (2) if the valid fall eg signal is high (with polarity judgment), the rxd signal is pulled low; (3) if the valid rise eg signal is high (with polarity judgment), the rxd signal is pulled high.

[0056] In a noise-free environment, the existing NRZ decoding following the polarity judgment principle can accurately identify the SOF signal and the data signal. However, due to the complexity of the non-contact communication environment, the communication process is easily disturbed by external interference, which forms noise in the adc data. FIG. 1(b) shows a schematic diagram of decoding a single noise disturbed PICC TYPEB NRZ signal using the existing decoding logic, and FIG. 1(c) shows a schematic diagram of decoding a multiple noise disturbed PICC TYPEB NRZ signal using the existing decoding logic. In FIGS. 1(b) and 1(c), analyze state represents the state analysis result of the protocol analysis module analyzing the rxd signal. As shown in FIG. 1(b), before the card machine sends the SOF, there is a downward noise disturbance to the card machine. The decoding effect based on the existing polarity judgment principle is shown in the rxd signal in FIG. 1(b). As can be seen, the rxd signal has a SOFL code type of more than 11 ETU, which causes the protocol analysis module to identify the SOFL length as abnormal, so that the correct SOF signal cannot be identified, and the frame information cannot be effectively received. The card machine can only retransmit and receive, which greatly affects the communication efficiency. As shown in FIG. 1(c), before the card machine sends the SOF, there are multiple noises of different phases (two noises are taken as an example in the figure). The decoding effect based on the existing polarity judgment principle is shown in the rxd signal in FIG. 1(c). The rxd signal has a very short SOFL code type, which causes the protocol analysis module to identify the SOFL length as abnormal, so that the correct SOF signal cannot be identified, and the frame information cannot be effectively received. The card machine can only retransmit and receive, which greatly affects the communication efficiency.

[0057] It can be seen that the existing NRZ decoding strategy relies on effective edge change judgment, for example, to judge that the current adc data is a rising edge and the last time is a falling edge, so as to judge that the rising edge this time is an effective rising edge, which contains polarity protection characteristics. The negative effect of polarity protection is that if there is noise in the SOF stage, the frame header cannot be found, the frame information is missed, the communication is affected, the data cannot be correctly received, and the communication efficiency is reduced. However, as can be seen from the dashed box part of the rxd signal in FIG. 1(b) and FIG. 1(c), there is actually a correct SOF signal pattern in the rxd signal, but the protocol analysis module is affected by the previous noise, resulting in an error and the inability to identify valid information.

[0058] To solve the above problems, the present disclosure provides an improved signal demodulation circuit suitable for PICC card TYPEB protocol, as shown in Figure 2 The present scheme improves the existing overall decoding strategy based on the polarity judgment principle. In the NRZ demodulation module, the decoding work is divided into two parts, and different flip principles are used to process different phase noises, while ensuring that the SOF and valid data are not lost. One part is to search for the SOF signal. In the SOF stage, the decoding is performed by using the edge flip principle, that is, the edge polarity judgment is ignored, the level is flipped when there is an edge, and the SOF signal is identified by the protocol analysis module. The other part is to receive data. In the data decoding stage, the effective edge flip principle (i.e. the polarity judgment principle) is followed, so that the same edge noise is effectively filtered out, and the data part is ensured to be noise-resistant. When there are different phase noises, the SOF signal can still be accurately identified by using the scheme of the present disclosure, and the frame format can be correctly parsed to obtain the communication content. The effective SOF can be identified under noise interference, and the same phase edge noise can be effectively filtered out in the data stage to reduce the bit error rate and improve the noise resistance performance of the PICC TYPEB protocol. The scheme of the present disclosure is suitable for NRZ data with baud rates of 106k / 212k / 424k / 848k / 1.7M in accordance with ISO / IEC 14443 TYPEB protocol.

[0059] The signal demodulation circuit, method, device and medium suitable for PICC card TYPEB protocol provided by the present disclosure will be explained in detail below in combination with the drawings.

[0060] Figure 3 The structure schematic diagram of the signal demodulation circuit suitable for PICC card TYPEB protocol of an example embodiment of the present disclosure is shown in FIG. 1(a), as shown in Figure 3 The signal demodulation circuit suitable for PICC card TYPEB protocol includes an NRZ demodulation module 110 and a protocol analysis module 120, and can also include an analog receiver circuit 130 and a RAM 140.

[0061] The analog receiver circuit 130 is configured to quantize the received field information into an analog-to-digital conversion signal and send the analog-to-digital conversion signal to the NRZ demodulation module 110. The NRZ demodulation module 110 is configured to determine the rising edge and the falling edge of the received analog-to-digital conversion signal according to a preset rising and falling edge threshold, and generate a SOF estimation signal according to the rising edge and the falling edge of the SOF stage and send the SOF estimation signal to the protocol analysis module 120 according to the edge-encountering flip principle. The protocol analysis module 120 is configured to search for a SOF signal that satisfies a preset SOF length threshold in the SOF estimation signal after receiving the SOF estimation signal, and feed back a frame header search completion flag to the NRZ demodulation module 110 when the SOF signal is searched. The protocol analysis module 120 can parse the corresponding frame information after finding the correct frame header signal (SOF signal). The NRZ demodulation module 110 is further configured to generate a data signal according to the rising edge and the falling edge of the data stage and send the data signal to the protocol analysis module 120 according to the valid edge-encountering flip principle after receiving the frame header search completion flag. The protocol analysis module 120 stores the data in the corresponding RAM 140 after parsing the received data signal.

[0062] The edge-encountering flip principle means that there is no need to judge the polarity of the edge, and the edge is flipped when the rising edge or the falling edge is encountered. For example, the first edge is a falling edge, and when the second edge is encountered, whether the second edge is a rising edge or a falling edge, the SOF estimation signal is flipped to a rising edge. The valid edge-encountering flip principle needs to judge the polarity of the edge, and the current edge change must be opposite to the direction of the last edge change to be a valid edge, and the data signal is flipped when generated.

[0063] In addition, the protocol analysis module 120 also generates an interrupt signal to read the valid information by software and make corresponding operations to complete the information interaction with the TYPEB card machine and further complete the identity authentication and related applications.

[0064] The protocol analysis module 120 parses the protocol frame according to the level of the signal output by the NRZ demodulation module 110, Figure 4 The receiving state machine schematic diagram of the protocol analysis module of an example embodiment of the present disclosure is shown, and the meanings of the state machines are as follows:

[0065] IDLE: idle state, when starting to receive a signal, entering the WAIT_SOF state;

[0066] WAIT_SOF: the current state is a receiving state, and the state is waiting for a SOF signal, and when the falling edge of the SOF estimation signal is received, entering the RX_SOFL state;

[0067] RX_SOFL: In the RX_SOFL state, the length of the low level of the SOF estimated signal is calculated. If the length of the low level of the SOF estimated signal meets the requirements of SOFL (i.e., it is consistent with the SOF low level length threshold), it indicates that the correct SOFL has been received, and the state machine enters RX_SOFH; if the low level length does not meet the requirements of SOFL, it will enter the WAIT_SOF state.

[0068] RX_SOFH: In the RX_SOFH state, the length of the high level of the SOF estimated signal is calculated. If the SOF estimated signal is at a rising edge and the length of the high level of the SOF estimated signal meets the SOFH requirement (i.e., it is consistent with the SOF high level length threshold), it indicates that the correct SOFH signal has been received, and the state machine enters the RX_DATA state; if the high level length does not meet the SOFH requirement, it will enter the WAIT_SOF state.

[0069] RX_DATA: In the RX_DATA state, data is received according to the frame format. After the data is received, the system enters the RX_EOF state.

[0070] RX_EOF: In the RX_EOF state, the EOF signal is received according to the frame format, and the reception is completed.

[0071] based on Figure 4 In an optional embodiment of the receiver state machine design shown in this disclosure, the SOF length threshold includes an SOF low-level length threshold and an SOF high-level length threshold. The SOF low-level length threshold can be set to, for example, 10 ETU, and the SOF high-level length threshold can be set to, for example, 2 ETU. In this embodiment, the protocol analysis module 120 is further configured to: enter a waiting state (denoted as WAIT_SOF) to wait for the SOF estimation signal; when the falling edge of the SOF estimation signal is received, enter a SOF low-level reception state (denoted as RX_SOFL); in the SOF low-level reception state, calculate the low-level length between the current falling edge and the adjacent rising edge in the SOF estimation signal, and if the low-level length matches the SOF low-level length threshold, enter a SOF high-level reception state (denoted as RX_SOFH); in the SOF high-level reception state, calculate the SOF high-level length between the current falling edge and the adjacent rising edge in the SOF estimation signal. The F-estimation signal estimates the high-level length between the adjacent rising edge and the next falling edge. If the high-level length matches the SOF high-level length threshold, it determines that there is an SOF signal in the SOF estimation signal that meets the SOF length threshold, and enters the data reception state (denoted as RX_DATA). In the data reception state, it receives the data signal sent by the NRZ demodulation module according to the frame format of the TYPEB protocol, and enters the end state (denoted as RX_EOF) after the data reception is completed. In the end state, it receives the EOF signal sent by the NRZ demodulation module according to the frame format, and completes the reception.

[0072] Further, in an optional embodiment of the present disclosure, the protocol analysis module 120 is further configured to: in the case that the low level length is inconsistent with the SOF low level length threshold, enter a waiting state, and perform level inversion on the signal after the adjacent rising edge; in the waiting state, when a falling edge of the inverted signal is received, enter a SOF low level receiving state to count the low level length. The counted low level length is compared with the SOF low level length threshold again, and according to the comparison result, the SOF high level receiving state or the waiting state is selected to enter. The above process is repeated until the correct SOF signal is searched.

[0073] In an optional embodiment of the present disclosure, the protocol analysis module 120 is further configured to: in the case that the high level length is inconsistent with the SOF high level length threshold, enter a waiting state, and after entering the waiting state, enter a SOF low level receiving state when a falling edge is received. The above process is repeated until the correct SOF signal is searched.

[0074] Figure 5 The effect diagram of the signal demodulation circuit of the present disclosure coping with a single noise analysis waveform is shown in an exemplary embodiment of the present disclosure, as shown in Figure 5 The rxd signal output by the NRZ demodulation module using the existing polarity-based judgment principle has a low level with a length of 15 ETU, which does not meet the requirement of the SOF low level length of 10 ETU, and is therefore incorrect. However, using the signal demodulation circuit of the present disclosure, the SOF estimation signal output by the NRZ demodulation module according to the edge inversion principle (without considering polarity) is shown in the rxd Search_sof signal in Figure 5 In combination with the receiving state machine logic of the protocol analysis module provided by the present disclosure, the protocol analysis module corrects the level of the rxd Search_sof signal according to the rxd Search_sof signal and the internal state machine jump, searches for a SOF shape that meets the SOF low level length threshold and the SOF high level length threshold in real time, and is shown in the rxd rectify signal in Figure 5 After the state machine jumps back to the WAIT_SOF state from the SOFL state, the logic circuit corrects the rxd Search_sof signal, corrects the high level to a low level, and then enters the SOFL state to check the low level length. The rxd rectify signal in

[0075] Figure 6The effect diagram of the signal demodulation circuit of the present disclosure coping with multi-noise analysis waveform of an exemplary embodiment of the present disclosure is shown as follows: Figure 6 As shown, the low level with a length less than 10 ETU exists in the rxd signal output by the NRZ demodulation module using the existing polarity judgment principle, which is wrong. However, the SOF estimation signal output by the NRZ demodulation module according to the edge-encountering flip principle (without considering polarity) using the signal demodulation circuit of the present disclosure is shown as the rxd Search_sof signal in Figure 6 In combination with the receiving state machine logic of the protocol analysis module provided by the present disclosure, the protocol analysis module corrects the level of the rxd Search_sof signal according to the rxd Search_sof signal and the internal state machine jump, and searches for the SOF shape with a legal length in real time, as shown by the rxd rectify signal in Figure 6 After the state machine jumps back to the WAIT_SOF state from the SOFL state, the logic circuit corrects the rxd Search_sof signal, corrects the high level to a low level, and then enters the SOFL state to check the low level length. However, the low level length still does not meet the requirement of the SOH low level length threshold, and the state machine jumps back to the WAIT_SOF state from the SOFL state again. After receiving the low level, the state machine enters the SOFL state to check the low level length again, and detects in real time until the SOF signal with a legal length is identified. The dotted box part of the rxd rectify signal is the correct SOF signal searched after the level correction. After the valid SOF signal is identified, subsequent data reception processing is performed.

[0076] As can be seen, the protocol analysis module provided by the present disclosure corrects the received signal according to the state machine jump, uses the state machine and level flip to search for the legal SOF signal at all times, and no longer simply searches for the 10 ETU low frequency + 2 ETU high level. It can also search for the signal with 10 ETU high level and 2 ETU low level, flip the signal to correct the level after finding such a shape, and then enter the frame data analysis state, so as to identify the correct SOF signal from different shape waveforms and then perform data reception processing. Through the improved demodulation strategy of the NRZ demodulation module combined with the SOF search logic of the protocol analysis module, the present disclosure can effectively filter out the noise interference in the SOF stage, identify the valid SOF signal, enhance the robustness of signal reception, and improve the communication efficiency.

[0077] The signal demodulation circuit suitable for the PICC card TYPEB protocol provided by the embodiment of the present disclosure comprises an NRZ demodulation module and a protocol analysis module. The NRZ demodulation module determines the rising edge and the falling edge of the received analog-to-digital conversion signal according to a preset rising and falling edge threshold value, and generates a SOF estimation signal according to the rising edge and the falling edge of the SOF stage and according to the principle of encountering edge flipping and sends the SOF estimation signal to the protocol analysis module. After receiving the SOF estimation signal, the protocol analysis module searches whether there is a SOF signal satisfying the SOF length threshold value in the SOF estimation signal based on a preset SOF length threshold value, and feeds back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched. After receiving the frame header search completion flag, the NRZ demodulation module generates a data signal according to the rising edge and the falling edge of the data stage and according to the principle of encountering valid edge flipping and sends the data signal to the protocol analysis module. By adjusting the SOF flipping point strategy of the NRZ demodulation module and combining the SOF search strategy of the protocol analysis module, the PICC card can correctly find the SOF signal from different phase noises, effectively eliminate the influence of different position noises, effectively identify the SOF signal, and then correctly receive subsequent communication data, thereby improving the communication efficiency.

[0078] Figure 7 The flowchart of the signal demodulation method suitable for the PICC card TYPEB protocol provided by the example embodiment of the present disclosure. The method can be applied to the NRZ demodulation module of the signal demodulation circuit suitable for the PICC card TYPEB protocol described in the foregoing embodiments.

[0079] As shown in Figure 7 The signal demodulation method suitable for the PICC card TYPEB protocol can comprise the following steps:

[0080] Step 201, determining the rising edge and the falling edge of the received analog-to-digital conversion signal according to a preset rising and falling edge threshold value.

[0081] The rising and falling edge threshold value can be preset, for example, the voltage lower than 0.3 volts can be set as the falling edge, and the voltage higher than 1.2 volts can be set as the rising edge.

[0082] In the embodiment, after the NRZ demodulation module receives the analog-to-digital conversion signal, the rising edge and the falling edge in the analog-to-digital conversion signal can be identified according to the rising and falling edge threshold value.

[0083] Step 202, generating a SOF estimation signal according to the rising edge and the falling edge of the SOF stage and according to the principle of encountering edge flipping.

[0084] Wherein, the edge encountered flip principle is that the edge is flipped without judging the polarity of the edge, and the edge is flipped when the first edge is encountered, for example, the first edge is a falling edge, and the second edge is flipped to a rising edge when the second edge is encountered.

[0085] Step 203, the SOF estimation signal is sent to the protocol analysis module of the signal demodulation circuit suitable for the PICC card TYPEB protocol, and the protocol analysis module searches whether the SOF signal satisfying the SOF length threshold exists in the SOF estimation signal based on the preset SOF length threshold, and feeds back the frame header search completion flag to the NRZ demodulation module when the SOF signal is searched.

[0086] In the embodiment, the NRZ demodulation module sends the generated SOF estimation signal to the protocol analysis module, and the protocol analysis module searches whether the SOF signal satisfying the SOF length threshold exists in the SOF estimation signal based on the preset SOF length threshold after receiving the SOF estimation signal. Specifically, after receiving the SOF estimation signal, the protocol analysis module enters a waiting state to wait for receiving the SOF estimation signal, and enters a SOF low level receiving state when the falling edge of the SOF estimation signal is received. In the SOF low level receiving state, the low level length between the current falling edge and the adjacent rising edge in the SOF estimation signal is counted, and whether the low level length is consistent with the SOF low level length threshold is compared. In the case that the low level length is not consistent with the SOF low level length threshold, the waiting state is re-entered, and the signal after the adjacent rising edge is flipped, and in the waiting state, the SOF low level receiving state is entered to count the low level length when the falling edge of the flipped signal is received. In the case that the low level length is consistent with the SOF low level length threshold, the SOF high level receiving state is entered. In the SOF high level receiving state, the high level length between the adjacent rising edge and the next falling edge (i.e. the next edge adjacent to the adjacent rising edge) in the SOF estimation signal is counted, and whether the high level length is consistent with the SOF high level length threshold is compared. In the case that the high level length is not consistent with the SOF high level length threshold, the waiting state is re-entered, and the SOF low level receiving state is entered when the falling edge is received. In the case that the high level length is consistent with the SOF high level length threshold, it is determined that the SOF estimation signal exists the SOF signal satisfying the SOF length threshold, and the frame header search completion flag is fed back to the NRZ demodulation module.

[0087] Step 204, after receiving the frame header search completion flag, the data signal is generated according to the rising edge and the falling edge of the data stage and sent to the protocol analysis module according to the effective edge encountered flip principle.

[0088] In this embodiment, after the NRZ demodulation module receives the frame header search completion flag fed back by the protocol analysis module, the data signal is generated according to the rising edge and the falling edge of the data stage according to the principle of encountering valid edge flip and is sent to the protocol analysis module.

[0089] The principle of encountering valid edge flip needs to judge the polarity of the edge, and the current edge change must be opposite to the direction of the last edge change to be a valid edge, and the flip is performed when the data signal is generated.

[0090] The signal demodulation method for the PICC card TYPEB protocol provided in the embodiments of the present disclosure, the NRZ demodulation module determines the rising edge and the falling edge of the received analog-to-digital conversion signal according to the preset rising and falling edge threshold, generates the SOF estimation signal according to the rising edge and the falling edge of the SOF stage according to the principle of encountering edge flip, and sends the SOF estimation signal to the protocol analysis module. The protocol analysis module searches whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal based on the preset SOF length threshold, and feeds back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched. Then, after receiving the frame header search completion flag, the data signal is generated according to the rising edge and the falling edge of the data stage according to the principle of encountering valid edge flip and is sent to the protocol analysis module. By using the scheme of the present disclosure, noise can be effectively discriminated, SOF and valid information can be correctly recognized under noise interference, and correct communication data can be parsed, thereby reducing the card machine retransmission caused by noise error, increasing the time of communication interaction, and effectively improving the efficiency of TYPEB communication.

[0091] Figure 8 The flowchart of the signal demodulation method for the PICC card TYPEB protocol provided in another exemplary embodiment of the present disclosure, which can be applied to the protocol analysis module of the signal demodulation circuit for the PICC card TYPEB protocol described in the foregoing embodiments.

[0092] As shown in Figure 8 , the signal demodulation method for the PICC card TYPEB protocol can include the following steps:

[0093] Step 301, receiving the SOF estimation signal sent by the NRZ demodulation module of the signal demodulation circuit for the PICC card TYPEB protocol, the SOF estimation signal is generated by the NRZ demodulation module according to the principle of encountering edge flip according to the rising edge and the falling edge of the SOF stage.

[0094] It should be noted that in this embodiment, the detailed description of the SOF estimation signal generated by the NRZ demodulation module can be referred to the related description of the foregoing embodiments, which will not be repeated here.

[0095] Step 302, search whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal based on the preset SOF length threshold.

[0096] The SOF length threshold includes a SOF low level length threshold and a SOF high level length threshold.

[0097] When the protocol analysis module searches whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal, it can first enter a waiting state to wait for receiving the SOF estimation signal, and enter a SOF low level receiving state when a falling edge of the SOF estimation signal is received. In the SOF low level receiving state, the length of the low level between the current falling edge and the adjacent rising edge in the SOF estimation signal is counted, and in the case that the low level length is inconsistent with the SOF low level length threshold, the waiting state is re-entered, and the signal after the adjacent rising edge is flipped. In the waiting state, when a falling edge of the flipped signal is received, the SOF low level receiving state is entered to count the low level length. In the case that the low level length is consistent with the SOF low level length threshold, a SOF high level receiving state is entered. In the SOF high level receiving state, the length of the high level between the adjacent rising edge and the next falling edge in the SOF estimation signal is counted, and in the case that the high level length is consistent with the SOF high level length threshold, it is determined that there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal; in the case that the high level length is inconsistent with the SOF high level length threshold, the waiting state is re-entered, and the SOF low level receiving state is entered to count the low level length when a falling edge is received.

[0098] Step 303, in response to searching the SOF signal, a frame header search completion flag is fed back to the NRZ demodulation module, so that the NRZ demodulation module generates a data signal according to the rising edge and the falling edge of the data stage and sends it to the protocol analysis module after receiving the frame header search completion flag according to the principle of flipping when encountering a valid edge.

[0099] In this embodiment, when the protocol analysis module searches the SOF signal conforming to the SOF level length threshold from the SOF estimation signal, a frame header search completion flag is fed back to the NRZ demodulation module, and the NRZ demodulation module generates a data signal according to the principle of flipping when encountering a valid edge and sends it to the protocol analysis module after receiving the frame header search completion flag.

[0100] Further, after the protocol analysis module determines that the SOF signal conforming to the SOF level length threshold is searched from the SOF estimation signal, it enters a data receiving state, receives the data signal sent by the NRZ demodulation module according to the frame format of the TYPEB protocol in the data receiving state, and enters an end state after the data receiving is completed; in the end state, the EOF signal sent by the NRZ demodulation module is received according to the frame format, and the receiving is completed.

[0101] The signal demodulation method suitable for the PICC card TYPEB protocol provided by the embodiments of the present disclosure, the NRZ demodulation module determines the rising edge and the falling edge of the received analog-to-digital conversion signal according to the preset rising and falling edge threshold, generates a SOF estimation signal according to the rising edge and the falling edge of the SOF stage and according to the principle of encountering edge flipping, and sends the SOF estimation signal to the protocol analysis module, the protocol analysis module searches whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal based on the preset SOF length threshold, and feeds back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched; then, after receiving the frame header search completion flag, a data signal is generated according to the rising edge and the falling edge of the data stage and according to the principle of encountering valid edge flipping and is sent to the protocol analysis module. By using the scheme of the present disclosure, noise can be effectively discriminated, SOF and valid information can be correctly recognized under noise interference, correct communication data can be parsed, the situation that the card machine retransmits due to the error code generated by noise is reduced, the time of communication interaction is increased, and the efficiency of TYPEB communication is effectively improved.

[0102] The present disclosure also provides a computer program product, including computer programs / instructions, which, when executed by a processor, implement the signal demodulation method suitable for the PICC card TYPEB protocol provided by any of the embodiments of the present disclosure.

[0103] According to one or more embodiments of the present disclosure, the present disclosure provides an electronic device, including:

[0104] a processor;

[0105] a memory for storing executable instructions of the processor;

[0106] the processor is configured to read the executable instructions from the memory and execute the executable instructions to implement the signal demodulation method suitable for the PICC card TYPEB protocol provided by any of the embodiments of the present disclosure.

[0107] According to one or more embodiments of the present disclosure, the present disclosure provides a computer readable storage medium, which stores a computer program, and the computer program is used to implement the signal demodulation method suitable for the PICC card TYPEB protocol provided by any of the embodiments of the present disclosure.

[0108] It should be noted that the computer-readable medium described above can be a computer-readable signal medium or a computer-readable storage medium or any combination thereof. The computer-readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus or device, or any suitable combination of the above. More specific examples of the computer-readable storage medium can include, but are not limited to, an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this disclosure, the computer-readable storage medium can be any tangible medium that contains or stores a program used by or in connection with an instruction execution system, apparatus or device. In this disclosure, the computer-readable signal medium can include a computer-readable storage medium in a baseband or propagated as a carrier wave in a propagated signal, where the computer-readable program code is contained in the computer-readable storage medium or propagated as a carrier wave in the propagated signal. The propagated signal can take any of a variety of forms, including but not limited to, electro-magnetic, optical, or any suitable combination thereof. The computer-readable signal medium can also be any computer-readable medium that is not a computer-readable storage medium and that can communicate, propagate or transport a program for use by or in connection with an instruction execution system, apparatus or device. Program code contained in the computer-readable medium can be transmitted using any suitable medium, including but not limited to, wire, cable, RF, infrared, or any suitable combination thereof.

[0109] The computer-readable medium described above can be contained in the electronic device described above; or can exist separately and not be assembled into the electronic device.

[0110] The flowcharts and block diagrams in the drawings illustrate the possible architectures, functionality, and operations of systems, methods, and computer program products in accordance with various embodiments of the present disclosure. In this regard, each block in the flowcharts or block diagrams can represent a module, a segment, or a portion of code, which comprises one or more executable instructions for implementing the specified logical functions. It should also be noted that in some alternative implementations, the functions noted in the blocks can occur out of the order noted in the figures. For example, two blocks noted in succession can in fact be executed substantially concurrently or can sometimes be executed in reverse order, depending on the functionality involved. It will also be noted that each block of the block diagrams and / or flowcharts, and combinations thereof, can be implemented by special purpose hardware-based systems that perform the specified functions or operations, or combinations of special purpose hardware and computer instructions.

[0111] The units described in the embodiments of the present disclosure can be implemented by software or by hardware. In some cases, the names of the units do not limit the units themselves.

[0112] The functions described above can be performed at least in part by one or more hardware logic components. For example, non-limiting, exemplary types of hardware logic components that can be used include: field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system on a chip (SOCs), complex programmable logic devices (CPLDs), etc.

[0113] In the context of the present disclosure, a machine-readable medium can be a tangible medium that contains or stores a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium can include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of the machine-readable storage medium will include one or more lines of electrical connections, portable computer disks, hard disk drives, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or Flash memory), optical fibers, portable compact disc read-only memories (CD-ROMs), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0114] The above description is merely exemplary of the disclosure and the application of the principles thereof. It is not intended to limit the disclosure to the specific form set forth above. Rather, the disclosure is to cover by the appended claims whatever falls within the true scope of the disclosure, including equivalents. For example, the features of the disclosure are not limited to the specific embodiments described above but can be applied to other embodiments without departing from the scope of the disclosure. The features of the disclosure can be combined with other features without departing from the scope of the disclosure.

[0115] Moreover, while operations are depicted in a particular order, this should not be understood as requiring such an order nor infringing on the scope of the disclosure. Certain of the operations described in the discussion are combinable into a single operation, and certain operations can be separated into several operations. In some embodiments, the operations described in the discussion can be performed in an order different than presented in the discussion. In some embodiments, the operations described in the discussion can be performed concurrently. Also, while several specific implementation details are discussed in the discussion, these should not be interpreted as limiting the scope of the disclosure. Rather, certain features described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable sub-combination.

[0116] Although the subject matter has been described in language specific to structural features and / or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

Claims

1. A signal demodulation circuit suitable for PICC card TYPE B protocol, characterized in that, The NRZ demodulation module comprises a protocol analysis module; The NRZ demodulation module is configured to determine rising edges and falling edges of the received analog-to-digital conversion signal according to preset rising and falling edge thresholds, and generate a SOF estimation signal according to the rising edges and the falling edges of the SOF stage and according to the principle of edge flip, and send the SOF estimation signal to the protocol analysis module; The protocol analysis module is configured to search, after receiving the SOF estimation signal, whether there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal based on a preset SOF length threshold, and feed back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched. The NRZ demodulation module is further configured to generate a data signal according to rising edges and falling edges of a data stage and according to the principle of valid edge flip after receiving the frame header search completion flag, and send the data signal to the protocol analysis module.

2. The signal demodulation circuit suitable for PICC card TYPE B protocol according to claim 1, characterized in that, The SOF length threshold comprises a SOF low-level length threshold and a SOF high-level length threshold; The protocol analysis module is further configured to: enter a waiting state to wait for receiving a SOF estimation signal, and enter a SOF low-level receiving state when a falling edge of the SOF estimation signal is received; in the SOF low-level receiving state, count a low-level length between a current falling edge and an adjacent rising edge in the SOF estimation signal, and enter a SOF high-level receiving state when the low-level length is consistent with the SOF low-level length threshold; in the SOF high-level receiving state, count a high-level length between the adjacent rising edge and a next falling edge in the SOF estimation signal, and determine that there is a SOF signal satisfying the SOF length threshold in the SOF estimation signal and enter a data receiving state when the high-level length is consistent with the SOF high-level length threshold; in the data receiving state, receive the data signal sent by the NRZ demodulation module according to a frame format of a TYPEB protocol, and enter an end state after data receiving is completed; in the end state, receive an EOF signal sent by the NRZ demodulation module according to the frame format, and complete receiving.

3. The signal demodulation circuit suitable for PICC card TYPE B protocol according to claim 2, characterized in that, The protocol analysis module is further configured to: in a case where the low-level length is not consistent with the SOF low-level length threshold, enter the waiting state, and perform level flip on a signal after the adjacent rising edge; in the waiting state, enter the SOF low-level receiving state to count the low-level length when a falling edge of the flipped signal is received.

4. The signal demodulation circuit adapted for PICC card TYPE B protocol according to claim 2 or 3, characterized in that, The protocol analysis module is further configured to: in a case where the high-level length is not consistent with the SOF high-level length threshold, enter the waiting state, and enter the SOF low-level receiving state when a falling edge is received.

5. A signal demodulation method suitable for PICC card TYPE B protocol, characterized in that, The NRZ demodulation module applied to the signal demodulation circuit for the PICC card TYPEB protocol according to any one of claims 1-4, the method comprises: determining rising edges and falling edges of the received analog-to-digital conversion signal according to preset rising and falling edge thresholds; generating a SOF estimation signal according to the rising edges and the falling edges of the SOF stage and according to the principle of edge flip; The SOF estimation signal is sent to the protocol analysis module of the signal demodulation circuit applicable to the PICC card TYPEB protocol, the protocol analysis module searches whether there is a SOF signal meeting the SOF length threshold value in the SOF estimation signal based on the preset SOF length threshold value, and feeds back a frame header search completion flag to the NRZ demodulation module when the SOF signal is searched. After receiving the frame header search completion flag, the data signal is generated according to the rising edge and the falling edge of the data stage and sent to the protocol analysis module according to the principle of encountering a valid edge to flip.

6. A signal demodulation method suitable for PICC card TYPE B protocol, characterized in that, The protocol analysis module applied to the signal demodulation circuit applicable to the PICC card TYPEB protocol according to any one of claims 1-4, the method comprises: The SOF estimation signal sent by the NRZ demodulation module of the signal demodulation circuit applicable to the PICC card TYPEB protocol is received, the SOF estimation signal is generated according to the rising edge and the falling edge of the SOF stage and according to the principle of encountering an edge to flip by the NRZ demodulation module according to the preset rising and falling edge threshold value; Based on the preset SOF length threshold value, whether there is a SOF signal meeting the SOF length threshold value in the SOF estimation signal is searched; In response to searching the SOF signal, a frame header search completion flag is fed back to the NRZ demodulation module, so that the NRZ demodulation module generates a data signal according to the rising edge and the falling edge of the data stage and sends it to the protocol analysis module according to the principle of encountering a valid edge to flip after receiving the frame header search completion flag.

7. The method of claim 6, wherein, The SOF length threshold value comprises a SOF low level length threshold value and a SOF high level length threshold value; The SOF estimation signal is searched based on the preset SOF length threshold value to determine whether there is a SOF signal meeting the SOF length threshold value in the SOF estimation signal, comprising: Enter the waiting state to wait for receiving the SOF estimation signal, and enter the SOF low level receiving state when the falling edge of the SOF estimation signal is received; In the SOF low level receiving state, the low level length between the current falling edge and the adjacent rising edge in the SOF estimation signal is counted, and the SOF high level receiving state is entered when the low level length is consistent with the SOF low level length threshold value; In the SOF high level receiving state, the high level length between the adjacent rising edge and the next falling edge in the SOF estimation signal is counted, and it is determined that there is a SOF signal meeting the SOF length threshold value in the SOF estimation signal when the high level length is consistent with the SOF high level length threshold value.

8. The method of claim 7, wherein, The method further comprises: In the case that the low level length is not consistent with the SOF low level length threshold value, the waiting state is entered, and the signal after the adjacent rising edge is level flipped; In the waiting state, when the falling edge of the flipped signal is received, the SOF low level receiving state is entered to count the low level length.

9. The method of claim 7, wherein, The method further comprises: In the case that the high level length is not less than the SOF high level length threshold, entering the waiting state, and entering the SOF low level receiving state when a falling edge is received.

10. The method according to any one of claims 7 to 9, characterized in that, After the determination that the SOF estimation signal contains a SOF signal satisfying the SOF length threshold, the method further comprises: entering a data receiving state; in the data receiving state, receiving the data signal sent by the NRZ demodulation module according to the frame format of TYPEB protocol, and entering an end state after the data receiving is completed; in the end state, receiving an EOF signal sent by the NRZ demodulation module according to the frame format, and completing the receiving.

11. An electronic device, comprising: The electronic device comprises: a processor; a memory for storing executable instructions of the processor; the processor is configured to read the executable instructions from the memory and execute the executable instructions to implement the signal demodulation method for PICC card TYPEB protocol according to any one of claims 5-10.

12. A computer-readable storage medium, characterized in that, The storage medium stores a computer program, and the computer program is configured to implement the signal demodulation method for PICC card TYPEB protocol according to any one of claims 5-10.

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