A single-electrode dual-photosensitive-area four-quadrant PIN detector and its preparation method

Abstract

The present invention relates to a single-electrode dual-photosensitive-area four-quadrant PIN detector, belonging to the field of semiconductor photoelectric sensor chips. The detector comprises a substrate, a buffer layer, an absorption layer, and a first and a second PIN-type photodiode located on the surface of the absorption layer and distributed in four quadrants. The first PIN-type photodiode in each quadrant is in a fan-shaped ring shape, and the second PIN-type photodiode is in a fan-shaped shape; the fan-shaped first PIN-type photodiode is distributed on the outside of the fan-shaped second PIN-type photodiode. A metal trace is provided in each quadrant interval for connecting the first and second PIN-type photodiodes in the same quadrant, so that the first and second PIN-type photodiodes in a quadrant share a P electrode, and at the same time, each quadrant interval blocks light and enhances the electric field in the central area of ​​the detector. The present invention is compatible with large and small dual-spot working modes, saves satellite payload and power consumption, and has significant advantages in satellite payload applications.

Description

Technical Field

[0001] The present invention belongs to the field of semiconductor photoelectric sensor chips, and relates to the design and manufacture of PIN type photodiode detector chips, and in particular to a single-electrode dual-photosensitive-area four-quadrant PIN detector and a preparation method thereof. Background Art

[0002] The existing four-quadrant PIN photodiode detector chip (abbreviated as PIN four-quadrant) is usually used in scenarios such as photoelectric capture, spot positioning, and signal transmission. According to the different wavelengths of the incident light, semiconductor materials with corresponding bandgap widths are selected to design and prepare the chip. In the same material system, according to the input requirements such as the signal frequency, optical power, and spot size of the incident light, the surface photosensitive area structure and internal epitaxial structure are designed at the chip end to achieve chip responsivity, response frequency and other functions that match the input requirements, such as Figure 1 Typically, in a PIN photodiode (PIN unit), the large photosensitive area type is used to process large spot, low power, and low frequency signals (hereinafter referred to as the large spot mode), while the small photosensitive area type is used to process small spot, high power, and high frequency signals (hereinafter referred to as the small spot mode).

[0003] like Figure 2 As shown, the existing detector is composed of four independent PIN units arranged in an XY pattern to form four quadrants. Each quadrant corresponds to an independent PIN unit, and each PIN unit has a P electrode to extract the electrical signal after photoelectric conversion. The four PIN units share a single N electrode. The area separating the XY quadrants does not block light.

[0004] When the incident light is irradiated to the photosensitive area, as the area of ​​the light spot focused in the photosensitive area changes from large to small, and the light power changes from small to large, the f of the PIN unit in each quadrant -3dB The bandwidth (-3dB cutoff frequency, frequency response half-power point) will deteriorate accordingly, which is manifested as f -3dB Insufficient bandwidth, or at a certain f -3dB Insufficient optical power within the bandwidth. That is, when the incident light changes, the AC saturation optical power degrades.

[0005] Typically, when the incident light spot area varies beyond a certain range, two different types of PIN quadrants need to be used simultaneously to process "large spot / low power / low frequency signal" or "small spot / high power / high frequency signal" respectively, which makes the device structure complicated. In addition, when the incident light power at the center of the PIN quadrant is stronger and the spot is smaller, the electric field in the quadrant spacing area becomes weaker, the drift speed of the photogenerated carriers is slow, the transit time is long, and thus the photoelectric signal bandwidth is reduced. Summary of the Invention

[0006] In view of this, the purpose of the present invention is to provide a single-electrode, dual-photosensitive-area, four-quadrant PIN detector and a preparation method thereof. Under some established external operating constraints (such as the size of the incident light spot, operating frequency, operating voltage, etc.), the same internal epitaxial structure design and PIN unit layout design are adopted, while being compatible with both "large spot" and "small spot" modes, to solve the problems of no strong electric field in the central area of ​​the PIN four-quadrant, slow drift velocity of photogenerated carriers, and long transit time, and ultimately to expand the application range of a certain large-photosensitive-area chip for incident light.

[0007] To achieve the above objectives, the present invention provides, in one aspect, a single-electrode, dual-photosensitive-region, four-quadrant PIN detector comprising a substrate, a buffer layer located on the upper surface of the substrate, an absorption layer located on the upper surface of the buffer layer, a cap layer located on the upper surface of the absorption layer, and an N-electrode located on the lower surface of the substrate. As a further improvement of the present invention, the detector further comprises a first PIN-type photodiode and a second PIN-type photodiode arranged in four quadrants, formed in the cap layer.

[0008] The first PIN photodiode in each quadrant is in a fan-shaped ring shape, and the second PIN photodiode in each quadrant is in a fan-shaped ring shape. The fan-shaped first PIN photodiode is distributed outside the fan-shaped second PIN photodiode, and the area of ​​the first PIN photodiode is larger than that of the second PIN photodiode. A P electrode is provided outside the first PIN photodiode in each quadrant.

[0009] In addition, a metal trace is set in each quadrant interval of the four quadrants, and the metal trace is used to connect the first and second PIN-type photodiodes in the same quadrant, wherein the second PIN-type photodiode is connected to the P-electrode corresponding to the quadrant through the first PIN-type photodiode, thereby realizing that the first and second PIN-type photodiodes in a quadrant share a P-electrode.

[0010] Optionally, an anti-reflection film is provided on the surface of the first and second PIN-type photodiodes in each quadrant of the detector.

[0011] Optionally, a passivation film is provided on the surface of the cap layer except for the first and second PIN-type photodiodes, and the P electrode is provided on the upper surface of the passivation film.

[0012] In another aspect, the present invention provides a method for preparing a single-electrode dual-photosensitive-region four-quadrant PIN detector, the method comprising:

[0013] Obtaining a substrate, and sequentially forming a buffer layer, an absorption layer, and a cap layer on a surface of the substrate;

[0014] A diffusion barrier layer is deposited on the surface of the cap layer using a PECVD process, wherein the diffusion barrier layer is a SiNx or SiO2 passivation film;

[0015] A photoresist is coated on the surface of the diffusion barrier layer, and the photoresist is photoetched to form a first target pattern window; a BOE etching solution is used to etch the diffusion barrier layer according to the first target pattern window formed by the photoetching, to form diffusion holes corresponding to the inner region and the outer region distributed in four quadrants; wherein each quadrant of the inner region is fan-shaped, and each quadrant of the outer region is fan-shaped;

[0016] Diffusion is performed through the diffusion hole to form a first PIN-type photodiode and a second PIN-type photodiode with P-type conductive characteristics in the cap layer, wherein the first PIN-type photodiode is formed in the outer region and the second PIN-type photodiode is formed in the inner region;

[0017] Depositing an anti-reflection film on the surfaces of the first PIN-type photodiode and the second PIN-type photodiode;

[0018] Applying photoresist on the surface of the anti-reflection film, photoetching the photoresist on the outer edge of the first PIN-type photodiode in each quadrant to obtain a second target pattern window, and simultaneously photoetching the two vertices of the fan-shaped second PIN-type photodiode in each quadrant to obtain a third target pattern window; etching the anti-reflection film in the second target pattern window and the third target pattern window region by dry etching to form a P-electrode window;

[0019] Applying photoresist on the surface of the detector currently formed, photolithography is performed on the photoresist outside the first PIN-type photodiode of each quadrant to obtain a fourth target pattern window, forming a P electrode in the fourth target pattern window by evaporating gold, and then removing all the photoresist;

[0020] The other surface of the substrate is thinned by a grinding process, and then an N electrode is formed on the thinned surface by evaporation gold plating;

[0021] After the detector passes the photoelectric characteristics test, the chip is de-chipped using a wafer splitting device.

[0022] Furthermore, metal wiring is formed in the intervals between the quadrants, and the P-electrode windows of the first and second PIN-type photodiodes are connected through the metal wiring. The first and second PIN-type photodiodes are connected to the P-electrode through the P-electrode window.

[0023] The beneficial effects of the present invention are as follows: while the overall photosensitive area remains unchanged, the present invention divides the photodiodes into large and small photodiodes to target light spots of different areas, thereby being compatible with both large and small dual-spot operating modes, replacing the traditional solution of using large-area chips for large light spots and small-area chips for small light spots. In addition, by providing metal traces in the intervals between each quadrant, the present invention simultaneously achieves the goals of sharing a P electrode, blocking light in different quadrant areas, and enhancing the electric field in the central area of ​​the detector, thereby solving the problem of a lack of a strong electric field in the central area of ​​the detector, slow drift velocity of photogenerated carriers, and long transit time. The present invention is compatible with both large and small dual-spot operating modes, has the characteristic of "one core for two uses," and saves manufacturing costs, payload, and power consumption through technological advancements. It has significant advantages, particularly in satellite payload applications where "weight and power consumption" are of great concern.

[0024] Other advantages, objects, and features of the present invention will be described in part in the following description and, in part, will be apparent to those skilled in the art upon examination of the following description or may be learned from practice of the present invention. The objects and other advantages of the present invention may be realized and obtained through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to make the purpose, technical solutions and advantages of the present invention more clear, the present invention will be described in detail below with reference to the accompanying drawings, in which:

[0026] Figure 1 This is a schematic diagram of the existing detector structure layout;

[0027] Figure 2 This is a schematic diagram of the internal structure of an existing detector;

[0028] Figure 3 A schematic diagram comparing the arrangement of PIN units in a detector provided by one embodiment of the present invention with that of an existing detector;

[0029] Figure 4 The light spots of different sizes incident on the photosensitive area of ​​the detector;

[0030] Figure 5 Schematic diagram of the detector's photosensitive area structure after the diffusion hole is opened for corrosion;

[0031] Figure 6 A P electrode window is formed on the PIN unit;

[0032] Figure 7 Schematic diagram of the layout of the detector surface after the P electrode is formed. DETAILED DESCRIPTION

[0033] The following describes the embodiments of the present invention by means of specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and the following embodiments and features in the embodiments can be combined with each other without conflict.

[0034] Among them, the accompanying drawings are only for illustrative purposes and represent only schematic diagrams rather than actual pictures, and should not be understood as limiting the present invention. In order to better illustrate the embodiments of the present invention, some parts of the accompanying drawings may be omitted, enlarged or reduced, and do not represent the dimensions of actual products. For those skilled in the art, it is understandable that some well-known structures and their descriptions may be omitted in the accompanying drawings.

[0035] The same or similar numbers in the drawings of the embodiments of the present invention correspond to the same or similar parts; in the description of the present invention, it should be understood that if there are terms such as "upper", "lower", "left", "right", "front", "back", etc. indicating directions or positional relationships, they are based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operate in a specific direction. Therefore, the terms describing the positional relationship in the drawings are only used for illustrative purposes and cannot be understood as limiting the present invention. For ordinary technicians in this field, the specific meanings of the above terms can be understood according to specific circumstances.

[0036] The purpose of the present invention is to adopt the same internal epitaxial structure design and the same diode layout scheme under certain established external operating constraints (such as the incident light spot size, operating frequency, operating voltage, etc.), and to be compatible with both "large spot" and "small spot" modes, thereby solving the problem of no strong electric field in the central area of ​​the PIN four-quadrant, slow drift velocity of photogenerated carriers, and long transit time, and ultimately achieve the expansion of the application range of a certain large photosensitive area chip to incident light.

[0037] To achieve the above objectives, an embodiment of the present invention provides a single-electrode dual-photosensitive-area four-quadrant PIN detector, which is improved based on the existing detector, such as Figure 3 Specifically, based on the existing detector, this embodiment makes the following improvements:

[0038] ① PIN cell layout: The PIN cells in each quadrant of the existing detector are divided into two, namely, a large PIN cell and a small PIN cell. Independent PN junctions are formed in the large PIN cell (i.e., the first PIN-type photodiode) and the small PIN cell (i.e., the second PIN-type photodiode) through a diffusion process. The specific size of the PIN cell refers to the actual spot size.

[0039] ② In terms of optoelectronic links: After each quadrant is divided into two, the two independent PIN units share a P electrode.

[0040] ③ Spacing area: Set high-precision electrode routing in the XY narrow spacing area of ​​the PIN four quadrants.

[0041] According to the common sense principle of PIN photodiode, the response time t r Including the transit time t T , RC time constant t RC and diffusion time t diff Three parts, the calculation formula is: According to f -3dB The simplified calculation formula for bandwidth is as follows: So to increase f -3dB You need to reduce t r .

[0042] According to the above description, in terms of the functional principle of the detector provided by this embodiment, after the photosensitive area of ​​the PIN unit is divided into two, the total capacitance of the PIN unit is equal to the sum of the PN junction capacitance of the large PIN unit and the PN junction capacitance of the small PIN unit. j =ε0ε r A / d shows that compared with the existing detector, the PN junction capacitance of the small PIN unit is reduced in proportion to the active area A; according to t RC =2.2RC, it can be seen that when the junction capacitance decreases, t RC Then it decreases, and f -3dB The bandwidth is improved. Where ε0 represents the dielectric constant of vacuum, ε r Represents the relative dielectric constant of the InGaAs depletion region material, ε r =13.8, d represents the depletion region thickness; R is the total resistance including the load resistor and the detector's own series resistance; C is the total capacitance of the detector. For a four-quadrant detector, from the equivalent circuit point of view, it is composed of four independent detectors in parallel. The quadrant junction capacitance is equal to the junction capacitance of a single detector, C j .

[0043] like Figure 4 As shown, the detector provided in this embodiment receives a large light spot (such as Figure 4When receiving a small light spot (such as a black coil with a larger radius), the large PIN unit and the small PIN unit output photoelectric signals through the same P electrode, that is, they work at the same time and still have the basic functions of the PIN four quadrants; Figure 4 When the black coil with smaller radius is used, the small PIN unit can perform photoelectric conversion when there is light, while the large PIN unit does not perform photoelectric conversion when there is no light. Therefore, the working channel capacitance of its photoelectric transmission is mainly considered to be the PN junction capacitance of the small PIN unit, and the overall response time of its PIN unit is greatly reduced, so f -3dB Bandwidth improvement.

[0044] The detector provided in this embodiment can realize the P electrode extraction (such as Figure 7 As shown, by extending the P electrode, three objectives are achieved: sharing the P electrode between large and small PIN cells, blocking light in the spacing area, and enhancing the electric field in the center area. Blocking light in the spacing area minimizes incident light from penetrating the surface and entering the absorption layer in the epitaxial layer, generating photogenerated carriers.

[0045] The performance of the detector proposed in this embodiment is compared with that of the existing detector. The results are shown in Table 1 below:

[0046] Table 1

[0047] detector Incident light power Incident light spot position bandwidth Existing detectors 1.0mW Detector Center 200MHz Existing detectors 1.3mW Detector Center 200MHz Existing detectors 1.6mW Detector Center 80MHz Detector of the present invention 5.0mW Detector Center 200MHz

[0048] It can be seen from Table 1 that even at an incident light power of 5 mW, the detector of the present invention can still reach an f of 200 MHz. -3dB bandwidth.

[0049] Another embodiment of the present invention provides a method for preparing a single-electrode dual-photosensitive-region four-quadrant PIN detector, the method being as follows:

[0050] Step 1: Thin film growth of the diffusion barrier layer.

[0051] PECVD is used to deposit and grow SiNx or SiO2 passivation film with a thickness of 0.2 to 0.25 μm.

[0052] Step 2: Photolithography to open the diffusion hole.

[0053] Apply EPG512 photoresist (thickness of about 0.8μm); use a contact exposure machine to expose and develop to obtain the target pattern window; use BOE etching solution to etch the diffusion barrier layer according to the pattern window formed by photolithography to open the diffusion hole. Figure 5 As shown, the white area is the blocking layer, and the purple area is the diffusion hole, through which impurities are injected.

[0054] Step 3: Perform open tube diffusion and dope the diffusion hole area with Zn to form a Zn diffusion region to form P-type conductive characteristics.

[0055] Step 4: Deposit 210nm thick SiNx as an anti-reflection film on the photosensitive surface of the detector, which allows more light to pass through the photosensitive surface.

[0056] Step 5: Preparation of P electrode window.

[0057] Coat a double layer of EPG516 photoresist (thickness of about 2 μm); use a contact exposure machine to expose and develop to obtain the target pattern window; use RIE to dry-etch the anti-reflection film according to the pattern window formed by photolithography, such as Figure 6 As shown, after etching, Figure 6 The P-electrode window in the green part. It should be noted that the P-electrode window of the small PIN unit in the inner circle has a smaller aperture and is distributed at the two vertices of the fan-shaped structure.

[0058] Step 6: Preparation of P metal ring.

[0059] Apply LOR+EPG512 photoresist (thickness of about 1.2μm); use contact exposure machine for exposure, develop to get target pattern window; use evaporated gold plating to make TiPtAu metal layer, use stripping machine to remove the glue, finally get Figure 7 P metal ring shown.

[0060] Step 7: The wafer is thinned to the thickness required for cleavage through a grinding process.

[0061] Step 8: Use evaporation gold plating technology to make a TiPtAu metal layer and prepare the N electrode.

[0062] Step 9: Chip testing, cleavage and sorting.

[0063] Use a probe-type integrated device to test the photoelectric characteristics of the chip, and use a wafer-scraping device to descramble the detector chip.

[0064] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not limiting. Although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention can be modified or replaced by equivalents without departing from the purpose and scope of the technical solutions, which should all be included in the scope of the claims of the present invention.

Claims

1. A single-electrode, dual-photosensitive-region, four-quadrant PIN detector comprising a substrate, a buffer layer located on the upper surface of the substrate, an absorption layer located on the upper surface of the buffer layer, a cap layer located on the upper surface of the absorption layer, and an N-electrode located on the lower surface of the substrate, characterized in that: The device further includes a first PIN-type photodiode and a second PIN-type photodiode formed in the cap layer and distributed in four quadrants, wherein the first PIN-type photodiode in each quadrant is in a fan-shaped ring shape, and the second PIN-type photodiode in each quadrant is in a fan-shaped shape; the first PIN-type photodiode is distributed outside the second PIN-type photodiode, and the area of ​​the first PIN-type photodiode is larger than the area of ​​the second PIN-type photodiode; and a P electrode is provided outside the first PIN-type photodiode in each quadrant; Metal wiring is set in each quadrant interval of the four quadrants, and the metal wiring is used to connect the first PIN type photodiode and the second PIN type photodiode in the same quadrant, wherein the second PIN type photodiode is connected to the P electrode corresponding to the quadrant through the first PIN type photodiode.

2. The four-quadrant PIN detector according to claim 1, characterized in that: An anti-reflection film is provided on the surface of the first PIN-type photodiode and the second PIN-type photodiode in each quadrant of the detector.

3. The four-quadrant PIN detector according to claim 1, characterized in that: A passivation film is provided on the surface of the cap layer in an area other than the first PIN-type photodiode and the second PIN-type photodiode, and the P-electrode is provided on the upper surface of the passivation film.

4. A method for preparing a single-electrode dual-photosensitive-region four-quadrant PIN detector, characterized in that: The method includes: Obtaining a substrate, and sequentially forming a buffer layer, an absorption layer, and a cap layer on a surface of the substrate; A diffusion barrier layer is deposited on the surface of the cap layer using a PECVD process; A photoresist is coated on the surface of the diffusion barrier layer, and the photoresist is photoetched to form a first target pattern window; a BOE etching solution is used to etch the diffusion barrier layer according to the first target pattern window formed by the photoetching, to form diffusion holes corresponding to the inner region and the outer region distributed in four quadrants; wherein each quadrant of the inner region is fan-shaped, and each quadrant of the outer region is fan-shaped; Diffusion is performed through the diffusion hole to form a first PIN-type photodiode and a second PIN-type photodiode with P-type conductive characteristics in the cap layer, wherein the first PIN-type photodiode is formed in the outer region and the second PIN-type photodiode is formed in the inner region; Depositing an anti-reflection film on the surfaces of the first PIN-type photodiode and the second PIN-type photodiode; Applying photoresist on the surface of the anti-reflection film, photoetching the photoresist on the outer edge of the first PIN-type photodiode in each quadrant to obtain a second target pattern window, and simultaneously photoetching the two vertices of the fan-shaped second PIN-type photodiode in each quadrant to obtain a third target pattern window; etching the anti-reflection film in the second target pattern window and the third target pattern window region by dry etching to form a P-electrode window; Applying photoresist on the surface of the detector currently formed, photolithography is performed on the photoresist outside the first PIN-type photodiode of each quadrant to obtain a fourth target pattern window, forming a P electrode in the fourth target pattern window by evaporating gold, and then removing all the photoresist; The other surface of the substrate is thinned by a grinding process, and then an N electrode is formed on the thinned surface by evaporation gold plating; After the detector passes the photoelectric characteristic test, the chip is de-chipped using a chip splitting device; Metal traces are formed in the intervals of each quadrant of the detector, and the P-electrode windows of the first PIN-type photodiode and the second PIN-type photodiode are connected through the metal traces. The first PIN-type photodiode and the second PIN-type photodiode are connected to the P-electrode through the P-electrode windows.

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