Systems and methods for providing dynamic data rates via dynamic header coding

By dividing the PHR into multiple parts and sending it at dynamic data rates, the problem of high power consumption in ultra-wideband communication protocols is solved, and shorter transmission time and lower power consumption are achieved.

CN119731968APending Publication Date: 2025-03-28QORVO US INC
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202380060394.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-04-13
Filing Date
2023-07-31
Publication Date
2025-03-28

AI Technical Summary

Technical Problem

The prior art is difficult to effectively reduce power consumption in mobile communication devices in ultra-wideband communication protocols, especially in terms of reducing the activity time of transceiver elements.

Method used

By dividing the physical layer header (PHR) into sections and sending the first section at a first low speed data rate, then sending the second section and the payload at a second data rate equal to or faster than the first low speed data rate.

Benefits of technology

This method shortens the transmission time of PHR and reduces the total time of data transmission, thereby allowing the device to enter low power mode, reducing power consumption, and improving system efficiency.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN119731968A_ABST
    Figure CN119731968A_ABST
Patent Text Reader

Abstract

Systems and methods for providing dynamic data rates via dynamic header coding are disclosed. In one aspect, a header of a data packet may be divided into a plurality of portions, where a first portion having a data rate encoded therein is transmitted at a first slow data rate, and a remaining portion of the header is transmitted at a higher rate indicated by encoded data from the first portion. By providing the data rate earlier in the packet header and then switching to a higher rate for the remainder of the header, the length of time required to transmit the header can be shortened. Since the time required to transmit the header is less, the data transmission is shorter, allowing the device to enter an inactive state to allow entry into a low power mode.
Need to check novelty before this filing date? Find Prior Art

Description

[0001] Priority claim

[0002] This application claims priority to U.S. Provisional Patent Application No. 63 / 458,979, filed on April 13, 2023, entitled “SYSTEMS AND METHODS FOR PROVIDING DYNAMIC DATA RATES THROUGHDYNAMIC HEADER ENCODING,” the contents of which are incorporated herein by reference in their entirety.

[0003] This application also claims priority to U.S. Provisional Patent Application No. 63 / 403,920, filed on September 6, 2022, entitled “OPTIMIZED PHYSICAL LAYER HEADER FOR DYNAMIC MODULATION RATES,” the contents of which are incorporated herein by reference in their entirety. Technical Field

[0004] The technology of this disclosure generally relates to headers that can be used to signal data rates, and more particularly to headers used in ultra-wideband (UWB) communication protocols, and even more particularly to physical layers used by such protocols. Background Art

[0005] In modern society, computing devices are ubiquitous, and more specifically, mobile communication devices are becoming more and more common. The popularity of these mobile communication devices is driven in part by the many functions currently enabled on such devices. The increase in processing power in such devices means that mobile communication devices have evolved from pure communication tools to complex mobile entertainment centers, thereby enhancing the user experience. With the emergence of a variety of functions that such devices can use, there is increasing pressure to find ways to reduce power consumption. One way to save power is by minimizing the activity in the device so that inactive components or elements can be placed in low power or sleep mode. Finding ways to reduce the amount of time that components such as transceivers are active provides room for innovation. Summary of the invention

[0006] Various aspects disclosed in the detailed description include systems and methods for providing dynamic data rates via dynamic header encoding. Specifically, a header of a data packet can be divided into multiple portions, wherein a first portion having a data rate encoded therein is sent at a first data rate, and the remainder of the header is sent at a second rate indicated by the encoded data from the first portion. In most cases, the second rate can be faster than the first rate. By providing the data rate earlier in the packet header and then switching to a higher rate for the remainder of the header, the length of time required to transmit the header can be shortened. Since less time is required to send the header, the data transmission is shorter, allowing the device to enter an inactive state to allow entry into a low power mode. Even if the second rate is slower than the first rate, the flexibility provided by having the ability to indicate a dynamic data rate can provide additional advantages.

[0007] In this regard, in one aspect, a transceiver is disclosed. The transceiver includes an output configured to be coupled to an antenna, a control circuit coupled to the output, the control circuit being configured to: assemble a packet having a physical layer (PHY) header (PHR), the PHR including a first portion containing data rate information and a second portion having additional information; transmit the first portion of the PHR at a first low-speed data rate; and transmit the second portion of the PHR at a second data rate equal to or faster than the first low-speed data rate and corresponding to the data rate information.

[0008] In another aspect, a method of transmitting a packet is disclosed. The method includes sending a first portion of a PHY PHR at a first slow data rate and sending a second portion of the PHR at a second faster data rate indicated by data in the first portion. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Figure 1A is a stylized diagram of an exemplary wireless environment having two wireless communication devices in wireless communication with each other;

[0010] Figure 1B yes Figure 1A a block diagram of one of the wireless communication devices;

[0011] Figure 2 It is available for Figure 1A A block diagram of a data packet structure for sending and receiving data in a wireless environment;

[0012] Figure 3 It is possible to use it in an ultra-wideband (UWB) wireless environment. Figure 2 A block diagram of a conventional physical layer (PHY) header used in a data packet structure;

[0013] Figure 4is a block diagram of a PHY header according to an exemplary aspect of the present disclosure, wherein a first portion of the PHY header may indicate a data rate (and possibly another data rate) and is transmitted at a first speed, wherein a remainder of the PHY header is transmitted at a rate indicated by the data rate in the first portion of the PHY header;

[0014] Figure 5 is a block diagram of a PHY header according to an alternative aspect of the present disclosure, wherein a second portion of the PHY header is sent at a rate indicated by the first portion and a payload is sent at a third rate indicated by the second portion of the PHY header;

[0015] Fig. 6A It shows that according to Figure 4 A flowchart of an exemplary process for sending a dynamic data rate via a dynamic header in one aspect shown in;

[0016] Figure 6B It shows that according to Figure 5 A flowchart of an exemplary process for sending a dynamic data rate via a dynamic header in one aspect shown in; and

[0017] Figure 7 According to the present disclosure, it may include Figure 4 and 5 Block diagram of a mobile terminal with a dynamic header. DETAILED DESCRIPTION

[0018] The embodiments set forth below represent information necessary to enable those skilled in the art to practice the embodiments and to illustrate the best mode for practicing the embodiments. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of the present disclosure and will appreciate the application of these concepts not specifically set forth herein. It should be understood that these concepts and applications fall within the scope of the present disclosure and the appended claims.

[0019] It should be understood that although the terms first, second, etc. can be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the present disclosure, the first element can be referred to as the second element, and similarly, the second element can be referred to as the first element. As used herein, the term "and / or" includes any and all combinations of one or more items in the associated listed items.

[0020] It should be understood that when an element such as a layer, a region or a substrate is referred to as being "on another element" or "extending onto another element", it may be directly on another element or directly extending onto another element, or there may also be an intermediate element. On the contrary, when an element is referred to as being "directly on another element" or "extending directly onto another element", there is no intermediate element. Similarly, it should be understood that when an element such as a layer, a region or a substrate is referred to as being "above another element" or "extending above another element", it may be directly above another element or directly extending above another element, or there may also be an intermediate element. On the contrary, when an element is referred to as being "directly above another element" or "extending directly above another element", there is no intermediate element. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to another element, or there may be an intermediate element. On the contrary, when an element is referred to as being "directly connected" or "directly coupled" to another element, there is no intermediate element.

[0021] Relative terms such as "below" or "above" or "up" or "lower" or "horizontal" or "vertical" may be used herein to describe the relationship of one element, layer or region to another element, layer or region as illustrated in the figures. It should be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.

[0022] The terms used herein are only used for the purpose of describing specific embodiments and are not intended to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms "a, an" and "said" are intended to include plural forms. It should also be understood that the term "comprising" when used herein specifies the presence of the features, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0023] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present disclosure belongs. It will be further understood that, unless expressly defined herein, the terms used herein should be interpreted as having a meaning consistent with their meaning in the context of this specification and the relevant art, and will not be interpreted in an idealized or overly formal sense.

[0024] Various aspects disclosed in the detailed description include systems and methods for providing dynamic data rates via dynamic header encoding. Specifically, a header of a data packet can be divided into multiple portions, wherein a first portion having a data rate encoded therein is sent at a first data rate, and the remainder of the header is sent at a second rate indicated by the encoded data from the first portion. In most cases, the second rate can be faster than the first rate. By providing the data rate earlier in the packet header and then switching to a higher rate for the remainder of the header, the length of time required to transmit the header can be shortened. Since less time is required to send the header, the data transmission is shorter, allowing the device to enter an inactive state to allow entry into a low power mode. Even if the second rate is slower than the first rate, the flexibility provided by having the ability to indicate a dynamic data rate can provide additional advantages.

[0025] There are many wireless communication environments. Although for illustration purposes, the present disclosure will focus on wireless communication environments defined by IEEE 802.15.4a, IEEE 802.15.4z, and 802.15.4ab operating in so-called ultra-wideband (UWB), aspects of the present disclosure may be used in other wireless communication environments, and the present disclosure is not limited to UWB environments.

[0026] In this regard, Figure 1A is a stylized diagram of an exemplary wireless environment 100 having two wireless communication devices 102(1) and 102(2) that wirelessly communicate with each other via a communication protocol such as IEEE 802.15.4a, IEEE 802.15.4z, or 802.15.4ab. Figure 1B yes Figure 1A 1 is a block diagram of one of the wireless communication devices 102 of FIG. This wireless communication device 102 may include an antenna 110, a transceiver 112, a control circuit 114, and a memory 116. Other elements may be present, and reference may be made below. Figure 7 Additional details regarding transceiver 112 are found at . Likewise, while aspects of the present disclosure make particular allowances for wireless protocols (eg, the various IEEE 802.15.4 standards), aspects of the present disclosure may be used in wire-based environments if needed or desired.

[0027] Figure 2 1 is a block diagram of a data packet structure 200 that may be used to send and receive data in a wireless environment 100 and that is particularly compliant with the 802.15.4z and 802.15.4ab standards. The data packet structure 200 includes a synchronization (SYNC) field 202, a start frame delimiter (SFD) field 204, a physical layer (PHY) header (PHR) 206, and a PHY payload 208.

[0028] Figure 3 4a, wherein a data rate field 300 may be provided in the early bits of the PHR 206, and several other bits 302 are provided to define frame length, ranging packets, header extensions, preamble duration, and other bits. The two bits in the data rate field 300 will indicate the data rate of the payload 208 following the PHR 206. More specifically, in IEEE 802.15.4a, the two bits encode 110 kilobits per second (kb / s), 850 kb / s, 6.8 megabits per second (Mb / s), or 27 Mb / s. Although there was some capability to provide dynamic data rates in this early protocol, the PHR 206 was maintained at a constant data rate, and the dynamic flexibility was limited to the payload 208.

[0029] IEEE 802.15.4z adds additional data rates, including 7.8 Mb / s and 31.2 Mb / s, but departs from the ability to provide dynamic data rate changes indicated in the PHR by removing the data rate field 300 from the PHR 206. That is, in 802.15.4z, a single data rate is pre-negotiated and then used between the transmitter and receiver. The data rate of the PHR is also pre-negotiated and can be the same as the data rate of the payload, or in some cases, can be fifty percent of the data rate of the payload.

[0030] Recently, the task group working on IEEE 802.15.4ab proposed higher data rates of 62.4 Mb / s and 124.8 Mb / s, as well as a slower 1.95 Mb / s data rate. The new data rates can be used statically (i.e., after pre-negotiation); however, there are scenarios where it is beneficial to be able to change the data rate very quickly (e.g., in response to changing channel conditions), and it is concise and fast to do so by signaling the rate in the PHR. To support dynamic data rate changes, a constant rate PHR can indicate the data mode rate. However, the PHR should be transmitted in a more robust manner than the most robust (lower rate) data mode option. The strongest data mode option here is 1.95 Mb / s. However, if advanced coding is used for data, this coding will make the payload extra strong, requiring the PHR to be transmitted at a lower rate (possibly 0.975 Mb / s or slower). At 0.975 Mb / s, a 20-bit PHR is expected to have a duration of twenty (20) microseconds. This time represents a significant overhead when compared to typical preamble and payload lengths, especially when transmitting data at higher data rates. These new data rates create improved opportunities for optimizing the use of dynamic data rates between different parts of the signal. Finding a way to shorten this PHR transmission time to re-enter low-power sleep / standby mode more quickly represents a large power saving opportunity. In addition, shorter packet durations can also reduce the chance of packet interference, reduce the risk of collisions, and / or provide additional benefits.

[0031] Exemplary aspects of the present disclosure contemplate dividing the PHR into at least two parts, wherein the first part provides coded data rate information with relatively fewer bits but at a slower data rate. A subsequent part of the PHR is sent at a second data rate indicated by the first part. In most cases, the second data rate will be higher than the first data rate, thereby shortening the duration of the PHR. Shortening the PHR creates power saving opportunities, reduces interference, and reduces conflicts. Even in the case where the second data rate is the same as the first rate (or may be slower), having the flexibility to dynamically change the data rate also provides more design options and may therefore have other advantages.

[0032] In the first aspect, the PHR is transmitted in two parts, such as Figure 44. As shown in FIG. 4, PHR 400 has a first portion 402 (PHR1) (sometimes referred to as a rate header) that includes three bits 404(1)-404(3) (R2-R0) that carry a coded data rate. A fourth bit 406 is an advanced coding (AC) bit. An exemplary coding may be a low density parity check (LDPC) for a payload 410. The first portion 402 provides an indication of what data rate will be used to transmit a second portion 408 (sometimes referred to as a main header) and a payload 410 (if a payload 410 is present). As further explained below, this indication may be an explicit data rate code or may be encoded in conjunction with another bit (e.g., an AC bit). The second portion 408 may include information such as payload length, ranging and / or sensing information, cyclic redundancy check (CRC) bits, and other information as needed or desired.

[0033] There may be a time pause (also referred to as a guard interval) between the first portion 402 and the second portion 408, so these portions do not need to be immediately adjacent to each other in time. This pause may allow the receiver to reconfigure for any new data rate indicated within the first portion 402. Strictly speaking, this pause may not be necessary, and the precise amount of time is not important to the present disclosure. Note also that the bits of the first portion 402 may be modulated and / or scrambled using a spreading code (or other technique) without departing from the present disclosure.

[0034] Note that if the AC bit (i.e., fourth bit 406) is set and the signal is using advanced coding for payload 410, the strength of second portion 408 with the convolutional code may be a weakness compared to payload 410. Therefore, the presence of the AC bit being set may also signal the modulation of second portion 408 at a lower effective rate (e.g., half the data rate signaled by bits 404(1)-404(3)) by, for example, sending each bit in second portion 408 twice or utilizing a symbol of twice the size compared to the data payload symbol size. This doubling improves the robustness of second portion 408 to match the robustness performance of payload 410, for example, when the payload is LDPC coded.

[0035] Note further that by having the second portion 408 have this lower effective rate, there are actually three data rates (e.g., a first rate corresponding to the first portion 402, a second rate corresponding to the second portion 408, and a third rate corresponding to the payload 410). However, it should be understood that the second rate is dependent on the third rate, so the third rate only needs to be explicitly indicated in the first portion 402. Please also note further that the use of the ordinal terms first, second, and third is not deterministic or necessarily indicates an order, but is used only for convenience in distinguishing between different rates.

[0036] In other aspects, the first portion 402 can be reduced to only three bits, and the AC bit can be in the second portion 408 (or removed entirely). If the AC bit is removed, there is no indication of how strong the payload 410 is. In some embodiments, this lack of knowledge may not matter. However, more likely, the AC bit can be moved to the second portion so that the strength of the payload is known, just not provided in PHR1. Note also that after encoding or mapping (where redundancy is used for better performance), the first portion 402 can be more than four bits, and can be, for example, a twenty-bit codeword mapped to a particular combination of data rate and LDPC encoding.

[0037] and Figure 4 In contrast to the first aspect shown, the second aspect contemplates having multiple independent data rates across different portions of the PHR and the payload. For example, there may be a rate header having a first rate, a main header having a second rate determined from the rate header, and a payload having a third rate determined from the main header (rather than the second rate being dependent on the third rate as described above). Figure 5 An exemplary PHR 500 according to this aspect is provided in . Specifically, PHR 500 includes a first portion 502 having two bits 504(1)-504(2). First portion 502 is sent at a first speed (data rate 1 or DR1), and bits 504(1)-504(2) signal what data rate (DR2) is used to send second portion 506. Second portion 506 may include bits that signal what data rate (DR3) is used for payload 508. This approach reduces the number of bits sent at the slowest rate to only two bits, but limits how many rates can be used for second portion 506 (since there are only two bits, only four rates can be identified), but still allows second portion 506 to be sent at a relatively high data rate. Then, if desired, payload 508 can be sent at a higher data rate if so indicated within second portion 506. While it is contemplated that data rates increase across portions and payloads, the present disclosure is not limited thereto. There may be situations where the second rate is the same as or slower than the first rate, or where the third rate is slower than the second rate. However, it is more likely that the third data rate is the same as the second rate or is twice as fast as the second data rate. Likewise, the encoding scheme may support a slower rate in the second portion 506 or payload 508.

[0038] exist Figure 4 The illustrated aspect considers the case where the rate indicated by the rate header 402 determines the rate used by both the second portion 408 and the payload 410. Figure 5In the approach shown, multiple dynamic adjustments to the data rate are required, which may increase receiver complexity and have countervailing undesirable characteristics, but it is an option and may be a suitable approach for some systems.

[0039] Yet another aspect may be used. This third aspect is different in implementation, but does enable support for dynamic rate PHR and data without incurring the overhead of slow and long PHRs and without requiring out-of-band signaling. In this third aspect, the PHR is not divided into multiple parts. Instead of the parts, the PHR is transmitted as a whole. This aspect relies on sending the entire PHR at a first data rate (usually the highest rate to be supported), but repeating the PHR multiple times according to the robustness required for the target payload data rate. If this payload data rate is low, the PHR can be repeated more times to match the performance, and in the case of high data rates, the PHR can be repeated less times. In an exemplary aspect, the highest second data rate can have the fewest repetitions, and the slowest second data rate can have the most repetitions. The receiver does not know the final payload data rate or the number of incoming repetitions. Therefore, the receiver first starts trying to receive and decode the PHR at the base data rate. If the receiver succeeds (e.g., it gets a good CRC check result), the receiver checks the received PHR rate bit and knows whether there will be more repetitions of the PHR and what the payload data rate will be. Additional repetitions can be ignored or processed. If the first check fails, each repeated PHR adds the repeated symbol to the first symbol received and decodes the sum of the sequence again. This process is repeated until a good CRC is found and it can be determined if there will be more repetitions. If the CRC is wrong in all repetitions, then PHR reception has failed. Thus, if a high data rate is used, the PHR is transmitted once (at the effective data rate), resulting in low overhead. If the data rate is slow, repeated PHRs are sent and the PHR performance improves to match that of the data mode.

[0040] Fig. 6A 6 is a flow chart illustrating an exemplary process 600 for sending a dynamic data rate via a dynamic header in accordance with aspects of the present disclosure. Specifically, the process 600 begins by evaluating a signal-to-noise ratio (SNR) (block 602) or other metric of an environment, including, but not limited to, estimated channel conditions (e.g., degree of multipath), frame error rates in previous packets, estimated speeds of movement between devices, estimated interference levels, and whether the application being used has specific requirements related to error rates. This may be performed by control circuitry (e.g., control circuitry 114) of a wireless communication device. As indicated by the evaluated metric, the control circuitry 114 may further determine an optimal or fastest data rate supported by a given environment (block 604).

[0041] The control circuit 114 may then assemble the PHR having multiple parts (block 606) and send the first part at a first data rate, wherein the first part includes data rate information for subsequent one or more parts (block 608). As explained above, the data rate information may include explicit information of the payload data rate and also include coded information that inferentially indicates the data rate of the second part of the PHR. In some cases, the payload data rate and the data rate of the second part of the PHR are the same. The control circuit 114 may then send the second part at a second data rate, as indicated in the first part (block 610) (explicitly, or inferentially based on the coded information). Finally, the control circuit 114 may send the payload at the second data rate (block 612). In most use cases, the second rate is faster than the first rate, but the present disclosure is not limited to this.

[0042] Note that in the case where the second portion 408 is sent at a data rate that is half the data rate of the payload 410 (e.g., when the AC bit 406 indicates that the encoding is robust, where a slower data rate is appropriate for the second portion 408), there may actually be three data rates, but it should still be understood that the data rates of the second portion 408 and the payload 410 are deterministically indicated by the first portion 402.

[0043] Although Fig. 6A Corresponds to Figure 4 aspects shown, but Figure 6B Provides a diagram corresponding to Figure 5 Flowchart of an exemplary process 650 of the aspect shown. Specifically, process 650 begins by evaluating the signal-to-noise ratio (SNR) (block 652) or other metric of the environment, including but not limited to estimated channel conditions (e.g., degree of multipath), frame error rate in previous packets, estimated speed of movement between devices, estimated interference level, and whether the application being used has specific requirements related to error rate. This can be performed by control circuitry of the wireless communication device (e.g., control circuitry 114). As indicated by the evaluated metric, control circuitry 114 can further determine the best or fastest data rate supported by the given environment (block 654).

[0044] The control circuit 114 may then assemble the PHR having the plurality of portions (block 656) and transmit the first portion at a first data rate, wherein the first portion includes data rate information for subsequent portions (block 658). The control circuit 114 may then transmit the second portion at a second data rate, as indicated in the first portion (block 660). By transmitting the second portion at the second data rate, the control circuit 114 may also transmit the payload data rate in the second portion (block 662). Finally, the control circuit 114 may transmit the payload at the second data rate (block 664). In most use cases, the second rate and the payload data rate are faster than the first rate, but the present disclosure is not limited in this regard.

[0045] It should be understood that the present disclosure contemplates sending a first portion of the PHR at a first possible predetermined data rate, and then sending a second portion of the PHR at a second data rate indicated by the first portion. Although the greatest benefit is provided when the second data rate is higher than the first portion, this is not strictly required. Table 1 summarizes the possible data rate combinations according to the first aspect of the current proposal of IEEE 802.15.4ab, where the AC bit maps to whether LDPC is enabled.

[0046] Enable LDPC PHR2 bit rate (Mb / s) PSDU bit rate (Mb / s) yes 0.975 1.95 no 1.95 1.95 yes 3.9 7.8 no 7.8 7.8 yes 15.6 31.2 no 31.2 31.2 yes 31.2 62.4 no 62.4 62.4 yes 62.4 124.8 no 124.8 124.8

[0047] Table 1

[0048] Furthermore, while particularly contemplated methods are those that place modulation and coding information (sometimes referred to as a modulation and coding scheme), in some aspects of the disclosure, the presence of coding information is optional.

[0049] refer to Figure 7 A more detailed description of the operation of the wireless environment 100 is provided. Specifically, reference Figure 7, the concepts described above can be implemented in various types of wireless devices (generally referred to as user elements 700) such as mobile terminals, smart watches, tablet computers, computers, navigation devices, access points, and similar wireless communication devices supporting wireless communications such as cellular, wireless local area network (WLAN), UWB, Bluetooth, and near field communication. The user element 700 will generally include a control system 702, a baseband processor 704, a transmission circuit system 706, a receiving circuit system 708, an antenna switch circuit system 710, a plurality of antennas 712, and a user interface circuit system 714. In a non-limiting example, as an example, the control system 702 can be a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). In this regard, the control system 702 can include at least a microprocessor, an embedded memory circuit, and a communication bus interface. The receiving circuit system 708 receives radio frequency signals from one or more base stations via the antenna 712 and through the antenna switch circuit system 710. The low noise amplifier and filter of the receiving circuit 708 cooperate to amplify and remove broadband interference from the received signal for processing. Downconversion and digitization circuitry (not shown) then downconverts the filtered, received signal to an intermediate or baseband frequency signal, which is then digitized into one or more digital streams using an analog-to-digital converter (ADC).

[0050] The baseband processor 704 processes the digitized received signal to extract the information or data bits transmitted in the received signal. Such processing typically includes demodulation, decoding, and error correction operations, which will be discussed in more detail below. The baseband processor 704 is typically implemented in one or more digital signal processors (DSPs) and application specific integrated circuits (ASICs).

[0051] For transmission, the baseband processor 704 receives digitized data that may represent voice, data, or control information from the control system 702, and the baseband processor encodes the digitized data for transmission. The encoded data is output to the transmission circuit system 706, where a digital / analog converter (DAC) converts the digital encoded data into an analog signal, and a modulator modulates the analog signal onto a carrier signal at one or more desired transmission frequencies. The power amplifier amplifies the modulated carrier signal to a level suitable for transmission, and delivers the modulated carrier signal to the antenna 712 via the antenna switch circuit system 710 to the antenna 712. Multiple antennas 712 and duplicate transmission circuits 706 and reception circuits 708 can provide spatial diversity. Those skilled in the art will understand the modulation and processing details.

[0052] It should also be noted that the operation steps described in any of the exemplary aspects herein are described in order to provide examples and discussions. The described operations can be performed in a large number of different orders other than the order shown. In addition, the operations described in a single operation step can actually be performed in many different steps. In addition, one or more operation steps discussed in the exemplary aspects can be combined. It should be understood that it will be easy for those skilled in the art to understand that the operation steps shown in the flow chart can undergo a large number of different modifications. Those skilled in the art will also understand that various technologies and techniques can be used to represent information and signals. For example, voltage, current, electromagnetic waves, magnetic fields or magnetic particles, light fields or light particles, or any combination thereof can be used to represent data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description.

[0053] The previous description of the disclosure is provided so that any person skilled in the art can make or use the disclosure. Various modifications to the disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations. Therefore, the disclosure is not intended to be limited to the examples and designs described herein, but should be given the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A transceiver, comprising: an output configured to provide an output signal; a control circuit coupled to the output and configured to: assembling a packet having a physical layer (PHY) header (PHR), the PHR having a first portion and a second portion; transmitting the first portion of the PHR at a first data rate; as well as The second portion of the PHR is sent at a second data rate indicated by the first portion. 2 . The transceiver of claim 1 , wherein the control circuit is configured to assemble the packet having the PHR with the first portion, wherein the first portion includes at least modulation information.

3. The transceiver of claim 1, wherein the control circuit is configured to assemble the packet having the PHR with the first portion, wherein the first portion includes modulation and coding information. The transceiver of claim 3 , wherein the encoding information comprises a high-level encoding specifier. 5 . The transceiver of claim 1 , wherein the control circuit is configured to assemble the packet having the PHR with the first portion, wherein the first portion comprises at most four bits.

6. The transceiver of claim 1, further comprising transmission circuitry configured to operate at ultra-wideband (UWB) frequencies.

7. The transceiver of claim 1, wherein the control circuit is further configured to transmit a payload after the second portion.

8. The transceiver of claim 7, wherein the control circuit is further configured to transmit the payload at the second data rate indicated in the first portion.

9. The transceiver of claim 7, wherein the control circuit is further configured to transmit the payload at a third data rate that is equal to or twice as fast as the second data rate.

10. The transceiver of claim 9, wherein the control circuit is configured to assemble the packet having the PHR with the first portion, wherein the first portion includes modulation and coding information, and wherein the coding information indicates the third data rate.

11. The transceiver of claim 1, wherein the control circuit is configured to determine the second data rate based on an environmental metric.

12. The transceiver of claim 11, wherein the environmental metric is selected from the group consisting of: a signal-to-noise ratio, an estimated channel state, a frame error rate of a previous packet, an estimated moving speed of the transceiver, and an estimated interference level.

13. The transceiver of claim 1, wherein the control circuit is further configured to send additional information in the second portion.

14. The transceiver of claim 13, wherein the additional information includes data rate information indicating a third data rate used by a payload portion of the packet.

15. The transceiver of claim 14, wherein the control circuit is configured to transmit the payload using the third data rate.

16. A method for transmitting a packet, comprising: transmitting a first portion of a physical layer (PHY) header (PHR) at a first data rate; as well as A second portion of the PHR is sent at a second data rate indicated by the modulation information in the first portion.

17. The method of claim 16, further comprising determining the second data rate by evaluating environmental conditions.

18. The method of claim 16, further comprising sending a payload at the second data rate.

19. The method of claim 16, wherein transmitting the first portion comprises transmitting two or three bits indicative of the second data rate.

20. The method of claim 16, wherein transmitting the first portion comprises transmitting advanced coding bits.

21. A method for transmitting a packet, comprising: selecting a data rate for a payload of the packet; A physical layer (PHY) header (PHR) is assembled that is repeated a number of times based on the data rate.

22. The method of claim 21, wherein the PHR is assembled with the number of repetitions being larger for lower data rates and smaller for higher data rates.