Mains power failure detection method, electronic equipment, storage medium and program product

Abstract

The present invention discloses a method for detecting a mains power failure, an electronic device, a storage medium and a program product. The method comprises: in response to a first mains voltage of a target device at a first preset time satisfying a preset voltage threshold range, determining an inverter drive duty cycle according to the first mains voltage and the bus voltage; in response to detecting that the state of the first mains voltage is a target state, based on the inverter drive duty cycle, controlling the second mains voltage at a second preset time to approach the target voltage, so that the target device outputs a reverse waveform; and determining whether the mains voltage at the second preset time is powered off based on the reverse waveform. The present invention inverts the output voltage amplitude of the inverter through the inverter drive duty cycle and outputs its corresponding waveform, and after the positive and negative waveforms are offset, the second mains voltage is controlled to approach the target voltage, so as to suppress the fluctuation of the mains port voltage, accurately identify the true mains voltage, and thus quickly detect whether a mains power failure occurs.

Description

Technical Field

[0001] The present invention relates to the technical field of photovoltaic energy storage integrated machine application, and in particular to a method for detecting a mains power failure, electronic equipment, a storage medium and a program product. Background Art

[0002] By detecting mains power failure, it can be ensured that the photovoltaic energy storage integrated machine can quickly switch to the backup power supply when the mains power is interrupted, ensuring the continuity and reliability of power supply, while preventing equipment damage and islanding effects, and improving the stability and safety of the entire power system.

[0003] At present, the detection methods of mains power drop mainly include frequency detection method and voltage marking method. When the mains power switches back and forth at the zero point, the frequency detection method is prone to false detection; and when the voltage fluctuates near the voltage detection point, the voltage marking method cannot quickly detect the voltage drop. In addition, the detection time of the above detection methods is at least one mains power cycle, which is a long detection cycle. Summary of the invention

[0004] The present invention provides a method for detecting a mains power failure, an electronic device, a storage medium and a program product, so as to solve the problem in the prior art that the timeliness of mains voltage detection is affected due to the inability to quickly detect a mains drop.

[0005] According to one aspect of the present invention, there is provided a method for detecting a mains power failure, comprising:

[0006] In response to a first mains voltage of the target device at a first preset time satisfying a preset voltage threshold range, determining an inverter drive duty cycle according to the first mains voltage and a bus voltage;

[0007] In response to detecting that the state of the first mains voltage is a target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform;

[0008] It is determined whether the second mains voltage is powered off based on the reverse waveform.

[0009] Optionally, in response to detecting that the state of the first mains voltage is a target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform includes:

[0010] When it is detected that the state of the first mains voltage is an abnormal state, sampling the first mains voltage to obtain the phase, frequency and amplitude of the first mains voltage;

[0011] Based on the inverter drive duty cycle, the switching state of the switching element inside the target device is controlled to make the second AC voltage approach the target voltage so that the target device outputs a waveform with the same frequency, the same absolute value of amplitude and opposite phase as the first AC voltage.

[0012] Optionally, before the first mains voltage of the target device at the first preset time satisfies a preset voltage threshold range, the method further includes:

[0013] It is determined whether a first mains voltage of the target device at a first preset time satisfies a preset voltage threshold range.

[0014] Optionally, before, in response to detecting that the state of the first mains voltage is the target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform, the method further includes:

[0015] A second mains voltage at a second preset time is obtained.

[0016] Optionally, after determining whether the second mains voltage is powered off based on the reverse waveform, the method further includes:

[0017] In the absence of mains power failure, exit the reverse wave transmission.

[0018] Optionally, determining the inverter drive duty cycle according to the mains voltage and the bus voltage includes:

[0019] The relationship between the inverter drive duty cycle and the voltage amplitude should satisfy the following formula:

[0020]

[0021] Among them, V amplitude represents the peak value of the AC power voltage output by the target device, and V power supply represents the power supply voltage, that is, the input DC voltage of the target device, that is, the bus voltage.

[0022] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0023] at least one processor; and

[0024] a memory communicatively connected to the at least one processor; wherein,

[0025] The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for detecting a mains power failure described in any embodiment of the present invention.

[0026] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, wherein the computer instructions are used to enable a processor to implement the method for detecting a mains power failure described in any embodiment of the present invention when executed.

[0027] According to another aspect of the present invention, a computer program product is provided. The computer program product comprises a computer program. When the computer program is executed by a processor, the method for detecting a mains power failure according to any embodiment of the present invention is implemented.

[0028] The technical solution provided by the embodiment of the present invention is that in response to the first mains voltage of the target device at the first preset time meeting the preset voltage threshold range, the inverter drive duty cycle is determined according to the first mains voltage and the bus voltage; in response to detecting that the state of the first mains voltage is the target state, based on the inverter drive duty cycle, the second mains voltage at the second preset time is controlled to approach the target voltage, so that the target device outputs a reverse waveform; based on the reverse waveform, it is determined whether the second mains voltage is powered off. The inverter drive duty cycle of the embodiment of the present invention can characterize the magnitude of the output voltage amplitude of the target device, and the corresponding waveform is output by inverting the output voltage amplitude of the target device, and the mains voltage at the second preset time is controlled at the target voltage after the positive and negative waveforms are offset, so as to suppress the fluctuation of the mains port voltage, accurately identify the real mains voltage, and thus quickly detect whether the mains voltage at the second preset time is powered off. The technical solution provided by the embodiment of the present invention solves the problem that the prior art cannot quickly detect the mains drop, which affects the timeliness of the mains voltage detection, and has the beneficial effect of improving the timeliness of the mains voltage detection.

[0029] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present invention, nor are they intended to limit the scope of the present invention. Other features of the present invention will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 It is the voltage fluctuation curve diagram when the mains power drops;

[0032] Figure 2 A flow chart of a method for detecting a mains power failure provided by an embodiment of the present invention;

[0033] Figure 3A voltage fluctuation curve diagram for quickly detecting a mains power failure based on a mains power failure detection method provided by an embodiment of the present invention;

[0034] Figure 4 A flow chart of another method for detecting a mains power failure provided by an embodiment of the present invention;

[0035] Figure 5 A schematic diagram of the structure of a mains power failure detection device provided by an embodiment of the present invention;

[0036] Figure 6 A schematic structural diagram of an electronic device for a method for detecting a mains power failure provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0037] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0038] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0039] In the current following grid-connected system, the mains port is connected to the inverter output port. When the mains power drops, the voltage detected by the mains port will easily fluctuate because the inverter output port still has voltage output at this time, making it difficult to detect the mains voltage. At present, the detection methods for mains power drop mainly include frequency detection method and voltage marking method. Figure 1 For example, Figure 1The voltage fluctuation curve when the mains power drops. When the mains power switches back and forth at the zero point, the frequency detection method is prone to false detection, because the frequency protection is based on the change of the mains power frequency, and the zero point switching may cause errors in frequency detection; and when the voltage fluctuates near the voltage detection point, the voltage marking rule cannot quickly detect the voltage drop within the T2 time of the ±LowVolt preset voltage threshold range. Here, "LowVolt" refers to the preset voltage threshold, and "T2" refers to the time required to detect a voltage drop at the preset voltage threshold. In addition, the detection time of the above detection method is at least one mains power cycle, and the detection cycle is relatively long. Then, the specific reasons for the above situation are:

[0040] 1. Influence of inverter output voltage: In a current-following grid-connected system, the inverter converts DC power into AC power and outputs it to the grid. When the mains power drops, the inverter still outputs voltage, which is superimposed on the mains voltage and may cause the voltage signal detected at the mains port to fluctuate or oscillate.

[0041] 2. Complexity of voltage detection: Since the voltage output by the inverter is superimposed on the mains voltage, the mains port needs to distinguish and identify the true mains voltage, which increases the complexity of voltage detection. When the mains drops, the voltage output by the inverter may interfere with the normal detection of the mains voltage, making it difficult for the detection system to accurately judge the mains status. As a result, the oscillation of the mains port voltage may affect the stability of the entire grid-connected system. If the mains detection is inaccurate, the inverter may not be able to correctly respond to changes in the mains status, thereby affecting the continuity and reliability of the power supply. Therefore, an embodiment of the present invention provides a method for detecting a mains power failure, so as to suppress the fluctuation of the mains port voltage, accurately identify the true mains voltage, and further quickly detect whether the mains voltage has a mains drop phenomenon.

[0042] Figure 2 This is a flow chart of a method for detecting a mains power failure provided by an embodiment of the present invention. This embodiment can be applied to the rapid detection of a mains power failure when the voltage fluctuates at a voltage detection point in a current-following grid-connected system. The detection method can be performed by a mains power failure detection device, which can be implemented in the form of hardware and / or software, and can be configured in any electronic device with a communication function. Figure 2 , the detection method comprises:

[0043] S110 , in response to a first mains voltage of the target device at a first preset time satisfying a preset voltage threshold range, determining an inverter drive duty cycle according to the first mains voltage and a bus voltage.

[0044] in, Figure 3For a voltage fluctuation curve diagram of a mains power failure detection method based on a mains power failure provided by an embodiment of the present invention, see Figure 3 "T1" is the first preset time, that is, the time required to detect that the AC power voltage is within the preset voltage threshold range. The first preset time can be pre-set based on the empirical value obtained from the engineering test. The first AC power voltage is the voltage in a normal state; the first AC power voltage and the bus voltage at time T1 are obtained by the analog to digital converter (ADC) resistance voltage division sampling method. "LowVolt" is the preset voltage threshold, and ±LowVolt constitutes the preset voltage threshold range. After detecting the first AC power voltage at time T1, it is determined whether the first AC power voltage at time T1 meets the preset voltage threshold range. When the detected first AC power voltage at time T1 is within the ±LowVolt preset voltage threshold range, the inverter drive duty cycle is calculated based on the first AC power voltage and the bus voltage.

[0045] Optionally, determining the inverter drive duty cycle according to the mains voltage and the bus voltage includes:

[0046] The relationship between the inverter drive duty cycle and the voltage amplitude should satisfy the following formula:

[0047]

[0048] Among them, V amplitude represents the peak value of the first AC voltage output by the target device, and V power supply represents the power supply voltage, that is, the input DC voltage of the target device, that is, the bus voltage.

[0049] S120, in response to detecting that the state of the first mains voltage is the target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage, so that the target device outputs a reverse waveform.

[0050] Among them, continue to see Figure 2 "T2" is the second preset time, that is, the time required to detect a voltage drop under a preset voltage threshold. The second preset time can be pre-set based on the empirical value obtained from the engineering test. The target state can be an abnormal state. For example, the first mains voltage has an amplitude drop to zero, a frequency disorder, a phase relationship is completely disordered, and other phenomena that do not conform to normal conditions, which can be called an abnormal state. The second mains voltage is the voltage in an abnormal state.

[0051] Specifically, when it is detected that the state of the first mains voltage is abnormal, based on the inverter drive duty cycle, the switch state of the switch element inside the target device is controlled, and the second mains voltage at the second preset time is approached to the target voltage, so that the target device outputs a waveform with the same frequency, the same absolute value of amplitude and opposite phase as the mains voltage. Among them, the inverter drive duty cycle represents the magnitude of the inverter output voltage amplitude. By inverting the inverter output voltage amplitude and outputting its corresponding waveform, the second mains voltage at time T2 is controlled to approach 0V, so as to suppress the fluctuation of the mains port voltage, accurately identify the real mains voltage, and quickly detect whether the mains power failure occurs at time T2. Exemplarily, when the calculated inverter drive duty cycle, that is, the inverter output voltage amplitude, is a positive value, then its inversion is a negative value, and then the waveform corresponding to the negative value is output, so that the positive and negative waveforms cancel each other out, thereby controlling the second mains voltage at time T2 to be close to 0V, so as to suppress the fluctuation of the mains port voltage; on the contrary, when the calculated inverter drive duty cycle, that is, the inverter output voltage amplitude, is a negative value, then its inversion is a positive value, and then the waveform corresponding to the positive value is output, so that the positive and negative waveforms cancel each other out, thereby controlling the second mains voltage at time T2 to be close to 0V, so as to suppress the fluctuation of the mains port voltage.

[0052] S130 , determining whether the second mains voltage is powered off based on the reverse waveform.

[0053] Specifically, the characteristic parameters (amplitude, frequency, phase, etc.) of the reverse waveform are monitored in real time by a detection device (such as a voltage sensor, etc.), and when the second preset time is reached, the reverse waveform parameters monitored at this time are compared and analyzed with the standard parameters of the reverse waveform under normal mains power supply. If it is found that the reverse waveform has phenomena that do not conform to normal conditions, such as the amplitude dropping to zero, the frequency being disordered, and the phase relationship being completely disordered, it is determined that the second mains voltage has a power failure.

[0054] The technical solution provided by the embodiment of the present invention is that in response to the first mains voltage of the target device at the first preset time meeting the preset voltage threshold range, the inverter drive duty cycle is determined according to the first mains voltage and the bus voltage; in response to detecting that the state of the first mains voltage is the target state, based on the inverter drive duty cycle, the second mains voltage at the second preset time is controlled to approach the target voltage, so that the target device outputs a reverse waveform; based on the reverse waveform, it is determined whether the second mains voltage is powered off. The inverter drive duty cycle of the embodiment of the present invention can characterize the magnitude of the output voltage amplitude of the target device, and the output voltage amplitude of the target device is inverted to output its corresponding waveform, and after the positive and negative waveforms are offset, the second mains voltage at the second preset time is controlled to approach the target voltage, so as to suppress the fluctuation of the mains port voltage, accurately identify the real mains voltage, and thus quickly detect whether the second mains voltage at the second preset time is powered off. The technical solution provided by the embodiment of the present invention solves the problem that the prior art cannot quickly detect the mains drop, which affects the timeliness of the mains voltage detection, and has the beneficial effect of improving the timeliness of the mains voltage detection.

[0055] Optionally, in response to detecting that the state of the first mains voltage is a target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform includes:

[0056] When it is detected that the state of the first mains voltage is an abnormal state, the mains voltage is sampled to obtain the phase, frequency and amplitude of the first mains voltage.

[0057] Specifically, the first mains voltage is sampled by a detection device (such as a voltage sensor, etc.) to obtain the phase, frequency and amplitude of the first mains voltage.

[0058] Based on the inverter drive duty cycle, the switching state of the switching element inside the target device is controlled to make the second AC power voltage of the second preset time approach the target voltage so that the target device outputs a waveform with the same frequency, the same absolute value of amplitude and opposite phase as the first AC power voltage.

[0059] Among them, reverse wave generation is a wave generation method that outputs a reverse waveform based on the positive and negative half-wave wave generation characteristics. The "positive and negative half-wave wave generation" characteristics in the inverter system mainly involve the modulation strategy of the inverter, especially in the pulse width modulation (PWM) technology. This feature allows the inverter to generate PWM waveforms in the positive half cycle and the negative half cycle respectively to synthesize the required sinusoidal wave output. The following is a detailed description of the positive and negative half-wave wave generation characteristics of the inverter system:

[0060] 1. Modulation strategy: Inverters usually use pulse width modulation (PWM) technology to control the waveform of the output voltage. In PWM, the positive and negative half-wave characteristics mean that the inverter can generate PWM signals in the positive and negative half-cycles of the AC power respectively. These signals are realized by controlling the switching state of the switching elements (such as transistors) inside the inverter.

[0061] 2. Bipolar modulation: In bipolar modulation, the output voltage of the inverter can change in both positive and negative directions to produce a complete sinusoidal waveform. This modulation method usually uses a bipolar carrier, that is, a sawtooth wave with symmetry between the positive and negative half cycles, which is compared with a sinusoidal reference signal to generate a PWM signal.

[0062] 3. Switching state: In the positive half cycle, some switches of the inverter (such as Q1 and Q4) are turned on, while other switches (such as Q2 and Q3) are turned off to output positive voltage. In the negative half cycle, the switching state is opposite, Q2 and Q3 are turned on, while Q1 and Q4 are turned off to output negative voltage.

[0063] 4. Symmetry: In order to ensure the symmetry of the output waveform and reduce harmonics, the PWM waveform needs to be symmetrical at the zero crossing of the AC. This means that the PWM waveform of the positive half-cycle and the negative half-cycle is symmetrical in time to simulate a pure sine wave.

[0064] 5. Passive and active states: In the positive half cycle, the inverter may be in the active state and output a positive voltage; while in the negative half cycle, the inverter may be in the passive state and output a negative voltage. This state switching is achieved by changing the conduction and shutdown of the switching element.

[0065] 6. Harmonic reduction: By precisely controlling the PWM signal of the positive and negative half waves, the inverter can reduce the harmonic content in the output voltage. This is because the frequency and duty cycle of the PWM signal are adjusted to match the sine waveform, thereby reducing unwanted harmonic components.

[0066] 7. Automatic voltage stabilization function: Some inverter designs have an automatic voltage stabilization function. By adjusting the amplitude of the sinusoidal voltage input to the comparator, the pulse width can be adjusted, thereby adjusting the size of the sinusoidal voltage output by the inverter.

[0067] In summary, the positive and negative half-wave transmission characteristics of the inverter system are an important aspect of PWM technology, which allows the inverter to accurately control the output voltage waveform to match the required sinusoidal waveform, reduce harmonics, and improve power quality.

[0068] Specifically, according to the inverter drive duty cycle and based on the positive and negative half-wave emission characteristics, the switching state of the switching elements inside the target device is controlled, and the AC voltage at time T2 is controlled at 0V, so that the target device outputs a waveform with the same frequency, the same absolute value of amplitude and opposite phase as the AC voltage, thereby suppressing the fluctuation of the AC port voltage, accurately identifying the true AC voltage, and quickly detecting whether a AC power outage occurs within time T2.

[0069] Figure 4 This is a flow chart of another method for detecting a mains power failure provided by an embodiment of the present invention. The embodiment of the present invention further refines the above embodiment on the basis of the above embodiment. Figure 4 , the detection method comprises:

[0070] S210: Determine whether a first AC power voltage of a target device at a first preset time satisfies a preset voltage threshold range.

[0071] S220: In response to a first mains voltage of the target device at a first preset time satisfying a preset voltage threshold range, determine an inverter drive duty cycle according to the first mains voltage and the bus voltage.

[0072] S230: Obtain a second mains voltage at a second preset time.

[0073] S240: In response to detecting that the state of the first mains voltage is the target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform.

[0074] S250, based on the reverse waveform to determine whether the second mains voltage is powered off.

[0075] S260: When there is no mains power failure, exit the reverse wave transmission.

[0076] Specifically, if the reverse wave generation error occurs due to grid harmonics during normal grid connection, the system can decide when to exit the reverse wave generation by monitoring the mains voltage and current. This ensures that the system can adjust in time when grid conditions change to avoid possible damage.

[0077] The technical solution provided by the embodiment of the present invention controls the second AC power voltage at time T2 to be close to 0V according to the characteristic that the inverter system can generate positive and negative half-waves, so as to suppress the fluctuation of the AC power port voltage and accurately identify the real AC power voltage, so as to quickly detect whether the AC power failure occurs at time T2, so that the inverter can correctly respond to the change of the AC power status, and further improve the continuity and reliability of the power supply and the timeliness of the AC power voltage detection.

[0078] Figure 5A schematic diagram of a mains power failure detection device provided by an embodiment of the present invention is shown in FIG. Figure 5 The detection device includes: a first determination module 310, a control module 320 and a second determination module 330.

[0079] The first determination module 310 is used to determine an inverter drive duty cycle according to the first mains voltage and the bus voltage in response to a first mains voltage of the target device at a first preset time satisfying a preset voltage threshold range.

[0080] The control module 320 is used for controlling the second mains voltage to approach the target voltage within a second preset time based on the inverter drive duty cycle in response to detecting that the state of the first mains voltage is the target state, so that the target device outputs a reverse waveform.

[0081] The second determination module 330 is used to determine whether the second mains voltage is powered off based on the reverse waveform.

[0082] The mains power failure detection device provided in the embodiment of the present invention can execute the mains power failure detection method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0083] Figure 6 A schematic diagram of the structure of an electronic device for a method for detecting a mains power failure provided by an embodiment of the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workbenches, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0084] like Figure 6 As shown, the electronic device 10 includes at least one processor 11, and a memory connected to the at least one processor 11, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., wherein the memory stores a computer program that can be executed by at least one processor, and the processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 to the random access memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 can also be stored. The processor 11, the ROM 12, and the RAM 13 are connected to each other through a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0085] A number of components in the electronic device 10 are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.

[0086] The processor 11 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as a method for detecting a mains power failure.

[0087] In some embodiments, a detection of a mains power outage may be implemented as a computer program, which is tangibly contained in a computer-readable storage medium, such as a storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of a mains power outage detection method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform a mains power outage detection method in any other appropriate manner (e.g., by means of firmware).

[0088] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0089] Computer programs for implementing the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer program is executed by the processor, the functions / operations specified in the flow chart and / or block diagram are implemented. The computer program may be executed entirely on the machine, partially on the machine, partially on the machine and partially on a remote machine as a stand-alone software package, or entirely on a remote machine or server.

[0090] In the context of the present invention, a computer-readable storage medium may be a tangible medium that may contain or store a computer program for use by or in combination with an instruction execution system, device or equipment. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. A more specific example of a machine-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.

[0091] To provide interaction with a user, the systems and techniques described herein may be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and a pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices may also be used to provide interaction with the user; for example, the feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form (including acoustic input, voice input, or tactile input).

[0092] The systems and techniques described herein may be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system may be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0093] A computing system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The client and server relationship is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services.

[0094] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0095] The above specific implementations do not constitute a limitation on the protection scope of the present invention. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for detecting a mains power failure, characterized in that: include: In response to a first mains voltage of the target device at a first preset time satisfying a preset voltage threshold range, determining an inverter drive duty cycle according to the first mains voltage and a bus voltage; In response to detecting that the state of the first mains voltage is a target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform; It is determined whether the second mains voltage is powered off based on the reverse waveform.

2. The detection method according to claim 1, characterized in that: In response to detecting that the state of the first mains voltage is a target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform includes: When it is detected that the state of the first mains voltage is an abnormal state, sampling the first mains voltage to obtain the phase, frequency and amplitude of the first mains voltage; Based on the inverter drive duty cycle, the switching state of the switching element inside the target device is controlled to make the second AC voltage approach the target voltage so that the target device outputs a waveform with the same frequency, the same absolute value of amplitude and opposite phase as the first AC voltage.

3. The detection method according to claim 1, characterized in that: Before the first mains voltage of the target device at the first preset time satisfies the preset voltage threshold range, the method further includes: It is determined whether a first mains voltage of the target device at a first preset time satisfies a preset voltage threshold range.

4. The detection method according to claim 1, characterized in that: Before, in response to detecting that the state of the first mains voltage is the target state, based on the inverter drive duty cycle, controlling the second mains voltage for a second preset time to approach the target voltage so that the target device outputs a reverse waveform, the method further includes: A second mains voltage at a second preset time is obtained.

5. The detection method according to claim 1, characterized in that: After determining whether the second mains voltage is powered off based on the reverse waveform, the method further includes: In the absence of mains power failure, exit the reverse wave transmission.

6. The detection method according to claim 1, characterized in that: Determining the inverter drive duty cycle according to the mains voltage and the bus voltage includes: The relationship between the inverter drive duty cycle and the voltage amplitude should satisfy the following formula: Among them, V amplitude represents the peak value of the AC power voltage output by the target device, and V power supply represents the power supply voltage, that is, the input DC voltage of the target device, that is, the bus voltage.

7. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor, and the computer program is executed by the at least one processor so that the at least one processor can execute the method for detecting a mains power failure according to any one of claims 1 to 6.

8. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the method for detecting a mains power failure according to any one of claims 1 to 6 when the processor executes the instructions.

9. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the computer program implements the method for detecting a mains power failure according to any one of claims 1 to 6.

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