Maximum power point tracking circuit and method applied to photoelectric energy collection

By designing a maximum power point tracking circuit including a power characterization module, a power comparator, a sleep module and a power tube drive control module in the photovoltaic power generation system, the problem of large power consumption in the MPPT circuit under low light conditions is solved, and efficient photoelectric energy acquisition and system energy efficiency are achieved.

CN119739251AInactive Publication Date: 2025-04-01XIDIAN UNIV
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Patent Information

Application Number
CN202411772230.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-04
Publication Date
2025-04-01
Estimated Expiration
Not applicable · inactive patent

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Abstract

The invention discloses a maximum power point tracking circuit and method applied to photoelectric energy collection. The maximum power point tracking circuit comprises a power characterization module, a power comparator, a sleep module and a power tube driving control module, the maximum power point tracking circuit can be switched in a sleep mode by utilizing the sleep module, so that the power consumption of a photovoltaic cell under a low-illumination or non-illumination condition is effectively reduced, and the energy efficiency of the maximum power point tracking circuit is remarkably improved. The power characterization module is used for carrying out accurate power detection, and dynamic adjustment is realized by combining the power comparator and the power tube driving control module, so that the maximum power point tracking circuit can quickly respond to environmental changes and efficiently track the maximum power point, the service life of the system is prolonged, and the system adapts to variable illumination environments and is suitable for large-scale popularization and application. And the collection efficiency of photoelectric energy is improved.
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Description

Technical Field

[0001] The present invention belongs to the field of energy collection, and in particular relates to a maximum power point tracking circuit and method for photoelectric energy collection. Background Art

[0002] Since the 1980s, with the development of photovoltaic technology, solar photovoltaic power generation has gradually become a sustainable and clean energy source. Due to the dynamic changes in lighting conditions, the power output of photovoltaic cells also fluctuates. In order to ensure that solar energy can be maximized under different lighting conditions, maximum power point tracking (MPPT) technology came into being. The MPPT circuit can find the optimal operating point of the solar cell under instantaneous lighting conditions to maximize its output power, thereby improving energy utilization.

[0003] There are two main types of MPPT technologies that can be integrated on the market:

[0004] 1. Perturbation and Observation (P&O): Observe the power change trend by continuously adjusting the voltage or current until the power is maximized. This method is simple to operate and easy to implement, but it is prone to oscillation under rapidly changing light conditions, affecting system stability. At the same time, the P&O method will continue to adjust the operation under low light conditions, which consumes a lot of power.

[0005] 2. Constant voltage method: lock the photovoltaic cell voltage at a certain set value, which is suitable for specific photovoltaic modules. This method is simple but not suitable for environments with large changes in light intensity, and it still maintains a high voltage sampling frequency under low light conditions, which is not conducive to energy saving.

[0006] Although the above technologies have achieved maximum power point tracking to varying degrees, these MPPT algorithms usually require frequent calculations, sampling, and adjustments when the light is weak or the dynamic changes are drastic, which will increase the system power consumption and is not conducive to the effective collection of photovoltaic energy. Especially in extremely weak light environments such as at night or on cloudy days, the MPPT circuit remains active, and this continuous power consumption will greatly weaken the energy conversion efficiency of the overall system. Therefore, existing photovoltaic power generation systems often have bottlenecks in power consumption. Especially in cases where the light is unstable or low in intensity, the power consumption of the MPPT circuit itself will occupy more photovoltaic collection energy, causing the overall efficiency of the system to decrease. Summary of the invention

[0007] In order to solve the above problems existing in the prior art, the present invention provides a maximum power point tracking circuit and method for photovoltaic energy collection. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0008] In a first aspect, the present invention provides a maximum power point tracking circuit for photoelectric energy collection, comprising:

[0009] Power characterization module, power comparator, sleep module and power tube drive control module; among them,

[0010] The power characterization module is used to obtain the output voltage V of the photovoltaic cell connected to the maximum power point tracking circuit. PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ;

[0011] The power comparator is used to compare the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and output a control signal V MN ;

[0012] The sleep module is used to control the control signal V corresponding to the consecutive preset moments. MN Detection is performed, when the control signal V corresponding to the preset moment is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter a sleep mode;

[0013] The sleep module is also used to monitor the output voltage V of the photovoltaic cell in real time after the maximum power point tracking circuit enters the sleep mode. PV When the output voltage of the photovoltaic cell V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode;

[0014] The power tube drive control module is used to, according to the control signal V MN The PWM modulation method is used to control the power tube connected to the maximum power point tracking circuit to be turned on or off, so as to achieve maximum power point tracking.

[0015] In one embodiment of the present invention, the power characterization module includes:

[0016] Passive filters, sample-and-hold modules, time multipliers.

[0017] In one embodiment of the present invention, the power characterization module obtains the output voltage V of the photovoltaic cell. PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ,include:

[0018] The passive filter is based on the output voltage V of the photovoltaic cell. PV The output voltage VPV The average value V AVG ;

[0019] The sampling and holding module outputs the voltage V PV Sampling is performed to obtain the output voltage V PV The maximum value V H and minimum value V L ;

[0020] The time multiplier is based on the average value V AVG , maximum value V H and minimum value V L , outputs a voltage signal V related to the current input power of the maximum power point tracking circuit P .

[0021] In one embodiment of the present invention, the sleep module includes:

[0022] A first switch K1, a second switch K1, a capacitor C1, a capacitor C2, a comparator, a switch array, an RS trigger RS, a D trigger D1, a D trigger D2, a D trigger D3, a D trigger D4, a D trigger D5, a D trigger D6, a D trigger D7, a first AND gate AND1, a second AND gate AND2 and a third AND gate AND3; wherein,

[0023] The first end of the first switch K1 is connected to the average value V AVG , the second end is connected to the positive input terminal of the comparator;

[0024] A first end of the second switch K2 is connected to the first end of the first switch K1, and a second end is connected to the negative input end of the comparator;

[0025] The first end of the capacitor C1 is grounded, and the second end is connected to the positive input terminal of the comparator;

[0026] The first end of the capacitor C2 is connected to the negative input terminal of the comparator, and the second end is grounded;

[0027] The positive output terminal of the comparator is connected to the second input terminal of the switch array, and the negative output terminal is connected to the first input terminal of the switch array;

[0028] The first output terminal of the switch array is connected to the S terminal of the RS trigger RS, and the second output terminal is connected to the R terminal of the RS trigger RS;

[0029] The output terminal of the RS flip-flop RS is connected to the clock signal terminal of the D flip-flop D1;

[0030] The D terminal of the D flip-flop D1 is connected to the power supply voltage, the R terminal is connected to the R terminal of the D flip-flop D2, and the Q terminal serves as the output terminal of the sleep module;

[0031] The D terminal of the D flip-flop D2 is connected to the clock signal CLK, and the clock signal terminal is connected to the control signal V MN , the Q terminal is connected to the D terminal of the D flip-flop D3, the R terminal is connected to the R terminal of the D flip-flop D3, and the Q terminal is connected to the third input terminal of the second AND gate AND2;

[0032] The clock signal terminal of the D flip-flop D3 is connected to the clock signal terminal of the D flip-flop D2 and to the second input terminal of the second AND gate AND2, the Q terminal is connected to the D terminal of the D flip-flop D4, and the R terminal is connected to the R terminal of the D flip-flop D4;

[0033] The clock signal terminal of the D flip-flop D4 is connected to the clock signal terminal of the D flip-flop D3, the Q terminal is connected to the D terminal of the D flip-flop D5, the R terminal is connected to the R terminal of the D flip-flop D5, and the Q terminal is connected to the first input terminal of the second AND gate AND2;

[0034] The clock signal terminal of the D flip-flop D5 is connected to the clock signal terminal of the D flip-flop D4, the Q terminal is connected to the D terminal of the D flip-flop D6, and the R terminal is connected to the R terminal of the D flip-flop D6;

[0035] The clock signal terminal of the D flip-flop D6 is connected to the clock signal terminal of the D flip-flop D5 and to the third input terminal of the first AND gate AND1, the Q terminal is connected to the D terminal of the D flip-flop D7, the R terminal is connected to the R terminal of the D flip-flop D7, and the Q terminal is connected to the second input terminal of the first AND gate AND1;

[0036] The clock signal terminal of the D flip-flop D7 is connected to the clock signal terminal of the D flip-flop D6, the Q terminal is connected to the first input terminal of the first AND gate AND1, and the R terminal is connected to the output terminal of the third AND gate AND3;

[0037] The output terminal of the first AND gate AND1 is connected to the first input terminal of the third AND gate AND3;

[0038] An output terminal of the second AND gate AND2 is connected to a second input terminal of the third AND gate AND3.

[0039] In one embodiment of the present invention, a switch array comprises:

[0040] The third switch K3, the fourth switch K4, the fifth switch K5 and the sixth switch K6; wherein,

[0041] A first end of the third switch K3 is connected to a first end of the fourth switch K4, and a second end thereof serves as a first output end of the switch array;

[0042] A first end of the fourth switch K4 serves as a first input end of the switch array, and a second end is connected to a second end of the sixth switch K6;

[0043] The first end of the fifth switch K5 serves as the second input end of the switch array, and the second end is connected to the second end of the third switch K3;

[0044] A first end of the sixth switch K6 is connected to a first end of the fifth switch K5 , and a second end thereof serves as a second output end of the switch array.

[0045] In one embodiment of the present invention, the continuous preset moments include: 6 continuous moments.

[0046] In one embodiment of the present invention, the sleep module responds to the control signal V corresponding to the consecutive preset moments. MN Detection is performed, when the control signal V corresponding to the preset moment is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter the sleep mode, including:

[0047] The sleep module controls the control signal V corresponding to 6 consecutive moments. MN Detection is performed when the control signal V corresponding to 6 consecutive moments MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter the sleep mode, so that the power characterization module and the power comparator are suspended; wherein the preset requirements are the control signal V corresponding to 6 consecutive moments MN It is 1, 0, 1, 0, 1, 0 respectively.

[0048] In one embodiment of the present invention, the sleep module monitors the output voltage V of the photovoltaic cell in real time. PV When the output voltage of the photovoltaic cell V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode, including:

[0049] The sleep module monitors the output voltage V of the photovoltaic cell in real time PV A detection is performed, and if the output voltage of the photovoltaic cell corresponding to the current moment exceeds the preset threshold variation range compared with the output voltage of the photovoltaic cell corresponding to the previous moment, the maximum power point tracking circuit is controlled to exit the sleep mode, so that the power characterization module and the power comparator start working.

[0050] In one embodiment of the present invention, the preset threshold value variation range is ±100 mV of the voltage value corresponding to the maximum power point.

[0051] In a second aspect, the present invention provides a maximum power point tracking method for photovoltaic energy collection, which is applied to the maximum power point tracking circuit as described in the first aspect, and the method comprises:

[0052] Use the power characterization module to obtain the output voltage V of the photovoltaic cell connected to the maximum power point tracking circuit PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ;

[0053] The power comparator is used to compare the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and the control signal V is output. MN ;

[0054] The sleep module is used to control the control signal V corresponding to the continuous preset time MN Detection is performed, when the control signal V corresponding to the preset time is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter a sleep mode;

[0055] After the maximum power point tracking circuit enters the sleep mode, the output voltage V PV When the output voltage of the photovoltaic cell V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode;

[0056] The power tube driving control module is used to drive the control signal V MN The PWM modulation method is used to control the power tube connected to the maximum power point tracking circuit to be turned on or off, so as to achieve maximum power point tracking.

[0057] Beneficial effects of the present invention:

[0058] In the solution provided by the present invention, the sleep module is used to enable the maximum power point tracking circuit to switch in the sleep mode, thereby effectively reducing the power consumption of the photovoltaic cell under low light or no light conditions, and significantly improving the energy efficiency of the maximum power point tracking circuit. The power characterization module is used for accurate power detection, combined with the power comparator and the power tube drive control module to achieve dynamic adjustment, so that the maximum power point tracking circuit can quickly respond to environmental changes and efficiently track the maximum power point, extending the service life of the system, adapting to the changing light environment, and improving the efficiency of photoelectric energy collection. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] Figure 1A schematic diagram of the structure of a maximum power point tracking circuit for photoelectric energy collection provided by an embodiment of the present invention;

[0060] Figure 2 A schematic diagram of the structure of a sleep module in a maximum power point tracking circuit provided by an embodiment of the present invention;

[0061] Figure 3 A schematic diagram of the steps of a maximum power point tracking method for photoelectric energy collection provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0062] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0063] In order to solve the problem of excessive power consumption of the system due to insufficient illumination in light energy collection, an embodiment of the present invention provides a maximum power point tracking circuit and method for photoelectric energy collection.

[0064] Below, firstly, a maximum power point tracking circuit for photoelectric energy collection provided by an embodiment of the present invention is introduced.

[0065] The embodiment of the present invention provides a maximum power point tracking circuit for photoelectric energy collection, such as Figure 1 As shown, it may include:

[0066] Power characterization module, power comparator, sleep module and power tube drive control module; among them,

[0067] The power characterization module is used to obtain the output voltage V of the photovoltaic cell connected to the maximum power point tracking circuit. PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ;

[0068] The power comparator is used to compare the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and output a control signal V MN ;

[0069] The sleep module is used to continuously control the control signal V corresponding to the preset time. MN Detection is performed, when the control signal V corresponding to the preset time is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter a sleep mode;

[0070] The sleep module is also used to monitor the output voltage V of the photovoltaic cell in real time after the maximum power point tracking circuit enters the sleep mode. PVWhen the output voltage of the photovoltaic cell V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode;

[0071] The power tube drive control module is used to control the MN The PWM modulation method is used to control the power tube connected to the maximum power point tracking circuit to be turned on or off to achieve maximum power point tracking.

[0072] It can be understood that the embodiment of the present invention aims to provide a low-power maximum power point tracking (MPPT) circuit to solve the problem of excessive system power consumption due to insufficient light in light energy collection. By adding an intelligent sleep mode, when the maximum power point is detected, the circuit enters a low-power mode to avoid unnecessary power consumption; and when the light changes significantly, it has a fast wake-up MPPT function to achieve dynamic tracking of the maximum power point, thereby improving system energy efficiency, extending the service life of the equipment, and achieving efficient and stable photoelectric energy collection.

[0073] For ease of understanding, each module of the maximum power point tracking circuit provided by the embodiment of the present invention is introduced in detail below.

[0074] Power Characterization Module

[0075] Power characterization modules can include:

[0076] Passive filters, sample-and-hold modules, time multipliers.

[0077] The power characterization module can be used to obtain the output voltage V of the photovoltaic cell PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P .

[0078] The working process of each submodule in the power characterization module may specifically include:

[0079] The passive filter is based on the output voltage V of the photovoltaic cell. PV Get the output voltage V PV The average value V AVG ;

[0080] The output voltage V of the photovoltaic cell is measured by the sampling and holding module PV Sampling is performed to obtain the output voltage V PV The maximum value V H and minimum value V L ;

[0081] The time multiplier is based on the average value V AVG , maximum value V H and minimum value V L , output voltage signal V P .

[0082] It can be understood that the embodiment of the present invention obtains the output voltage V of the photovoltaic cell through the sampling and holding module. PV The maximum value V H and minimum value V L , and combined with the passive filter to obtain the average value V AVG , the three signals are input into the time multiplier to output a voltage signal V related to the current input power P , this signal can represent the current power output of the photovoltaic cell.

[0083] Specifically, for the time multiplier, the time multiplier obtains the average value V sampled within a period AVG , maximum value V H and minimum value V L The time multiplier has a slow ramp voltage that increases V AVG Compared with the ramp voltage, a pulse T1 is obtained for a period of time, and V H and V L The difference is compared with the ramp voltage to obtain T2. ​​After the voltage is converted into time, the pulse width of T1 is quantized into a digital code to control the size of the unit current. T2 controls the time when the current flows. At this time, the charging voltage of the capacitor is related to the power, thereby realizing the voltage signal V P Reflects the current power output of photovoltaic cells.

[0084] Power Comparator

[0085] The power comparator compares the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and outputs a control signal V MN .

[0086] Specifically, the power comparator compares the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and outputs a control signal V MN A digital signal of "0" or "1" is provided to the sleep module to detect the maximum power point. If the voltage signal corresponding to the current moment is greater than the voltage signal corresponding to the previous moment, the output control signal V MN is "0"; if the voltage signal corresponding to the previous moment is less than the voltage signal corresponding to the previous moment, the output control signal V MN is "1".

[0087] Sleep module

[0088] Sleep module, such as Figure 2 As shown, this may include:

[0089] A first switch K1, a second switch K1, a capacitor C1, a capacitor C2, a comparator, a switch array, an RS trigger RS, a D trigger D1, a D trigger D2, a D trigger D3, a D trigger D4, a D trigger D5, a D trigger D6, a D trigger D7, a first AND gate AND1, a second AND gate AND2 and a third AND gate AND3; wherein,

[0090] The first end of the first switch K1 is connected to the average value V AVG , the second end is connected to the positive input terminal of the comparator;

[0091] A first end of the second switch K2 is connected to the first end of the first switch K1, and a second end of the second switch K2 is connected to the negative input end of the comparator;

[0092] A first terminal of the capacitor C1 is grounded, and a second terminal is connected to a positive input terminal of the comparator;

[0093] A first terminal of the capacitor C2 is connected to the negative input terminal of the comparator, and a second terminal thereof is grounded;

[0094] The positive output terminal of the comparator is connected to the second input terminal of the switch array, and the negative output terminal is connected to the first input terminal of the switch array;

[0095] The first output terminal of the switch array is connected to the S terminal of the RS flip-flop RS, and the second output terminal is connected to the R terminal of the RS flip-flop RS;

[0096] The output terminal of the RS flip-flop RS is connected to the clock signal terminal of the D flip-flop D1;

[0097] The D terminal of the D flip-flop D1 is connected to the power supply voltage, the R terminal is connected to the R terminal of the D flip-flop D2, and the Q terminal serves as the output terminal of the sleep module;

[0098] The D terminal of D flip-flop D2 is connected to the clock signal CLK, and the clock signal terminal is connected to the control signal V MN , the Q terminal is connected to the D terminal of the D flip-flop D3, the R terminal is connected to the R terminal of the D flip-flop D3, and the Q terminal is connected to the third input terminal of the second AND gate AND2;

[0099] The clock signal terminal of the D flip-flop D3 is connected to the clock signal terminal of the D flip-flop D2 and to the second input terminal of the second AND gate AND2, the Q terminal is connected to the D terminal of the D flip-flop D4, and the R terminal is connected to the R terminal of the D flip-flop D4;

[0100] The clock signal terminal of the D flip-flop D4 is connected to the clock signal terminal of the D flip-flop D3, the Q terminal is connected to the D terminal of the D flip-flop D5, the R terminal is connected to the R terminal of the D flip-flop D5, and the Q terminal is connected to the first input terminal of the second AND gate AND2;

[0101] The clock signal terminal of the D flip-flop D5 is connected to the clock signal terminal of the D flip-flop D4, the Q terminal is connected to the D terminal of the D flip-flop D6, and the R terminal is connected to the R terminal of the D flip-flop D6;

[0102] The clock signal terminal of the D flip-flop D6 is connected to the clock signal terminal of the D flip-flop D5 and to the third input terminal of the first AND gate AND1, the Q terminal is connected to the D terminal of the D flip-flop D7, the R terminal is connected to the R terminal of the D flip-flop D7, and the Q terminal is connected to the second input terminal of the first AND gate AND1;

[0103] The clock signal terminal of the D flip-flop D7 is connected to the clock signal terminal of the D flip-flop D6, the Q terminal is connected to the first input terminal of the first AND gate AND1, and the R terminal is connected to the output terminal of the third AND gate AND3;

[0104] An output terminal of the first AND gate AND1 is connected to a first input terminal of a third AND gate AND3;

[0105] An output terminal of the second AND gate AND2 is connected to a second input terminal of the third AND gate AND3.

[0106] Among them, for the switch array, it can include:

[0107] The third switch, the fourth switch, the fifth switch and the sixth switch; wherein,

[0108] A first end of the third switch is connected to a first end of the fourth switch, and a second end serves as a first output end of the switch array;

[0109] A first end of the fourth switch serves as a first input end of the switch array, and a second end is connected to a second end of the sixth switch;

[0110] A first end of the fifth switch serves as a second input end of the switch array, and a second end of the fifth switch is connected to a second end of the third switch;

[0111] A first end of the sixth switch is connected to the first end of the fifth switch, and a second end of the sixth switch serves as a second output end of the switch array.

[0112] Specifically, the opening or closing of the first switch K1, the third switch K3 and the sixth switch K6 is controlled by the clock signal Φ2; the opening or closing of the second switch K2, the fourth switch K4 and the fifth switch K5 is controlled by the clock signal Φ1, and the clock signals Φ1 and Φ2 are two-phase non-overlapping clock signals.

[0113] The continuous preset moments may be set according to the specific needs of the user. In the embodiment of the present invention, the continuous preset moments may include: 6 consecutive moments.

[0114] Specifically, the sleep module responds to the control signal V corresponding to the consecutive preset moments.MN Detection is performed, when the control signal V corresponding to the preset time is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter the sleep mode, which may include:

[0115] The sleep module controls the control signal V corresponding to 6 consecutive moments. MN Detection is performed when the control signal V corresponding to 6 consecutive moments MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter the sleep mode, so that the power characterization module and the power comparator are suspended; wherein the preset requirements are the control signal V corresponding to 6 consecutive moments MN It is 1, 0, 1, 0, 1, 0 respectively.

[0116] It can be understood that when the system approaches the maximum power point and tends to be stable, the digital signal V MN It will change alternately in the pattern of "1010", that is, it will alternately display "increase, decrease, increase, decrease". At this time, if the sleep module detects continuous "101010", the sleep module will determine that the system has entered and stabilized at the maximum power point, control the maximum power point tracking circuit to enter the sleep mode, and suspend the power characterization module and the power comparator.

[0117] After the maximum power point tracking circuit enters the sleep mode, the sleep module monitors the output voltage V PV When the output voltage of the photovoltaic cell V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode. The preset threshold variation range is the voltage value corresponding to the maximum power point ±100mV. It can be understood that when the output voltage V PV Less than the voltage corresponding to the maximum power point -100mV or the output voltage V of the photovoltaic cell PV When the voltage value corresponding to the maximum power point is greater than +100mV, the sleep module detects the output voltage V of the photovoltaic cell. PV If the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode.

[0118] The sleep module monitors the output voltage V of the photovoltaic cell in real time PV When the output voltage of the photovoltaic cell V PV When a change occurs that exceeds the preset threshold range, the comparator in the sleep module will flip, the system will automatically exit sleep mode, and restart power detection to ensure continuous tracking of the maximum power point.

[0119] Power tube drive control module

[0120] The power tube drive control module is based on the control signal VMN The PWM modulation method is used to control the power tube connected to the maximum power point tracking circuit to be turned on or off to achieve maximum power point tracking.

[0121] Specifically, the power tube drive control module receives the control signal V MN , when the control signal V MN When the control signal V MN When it is 1, the power tube drive control module outputs signals N_drive and P_drive to increase the switching time of the power tubes ND1 and PD1, so that the impedance of the circuit is in a dynamically adjusted state, so that the photovoltaic cell is always in the best output state and reaches the maximum power point.

[0122] It can be understood that the embodiment of the present invention uses a power characterization module and a power comparator to detect the output power of the photovoltaic cell, and approaches the maximum power point according to the change trend of the output power. When approaching the maximum power point, the system fine-tunes the switching time through pulse width modulation (PWM) technology, so that the switching time of the power tube fluctuates near the maximum power point, ensuring the accuracy of the power point locking. When the system detects that the change trend of the output power presents the periodic characteristics of "increase-decrease-increase-decrease-increase-decrease", it indicates that the maximum power point has been approached or reached, and the system enters the intelligent sleep mode. The design of the sleep mode automatically suspends the power monitoring and adjustment operation after the power point is locked, and the MPPT circuit maintains a low power consumption state, reducing frequent voltage and current sampling, while retaining the monitoring function of the external environment, ensuring that the system maintains stable operation at extremely low power consumption. When the input voltage of the photovoltaic cell exceeds the preset threshold due to a significant change in light intensity, the system will automatically exit the sleep mode, restart the power monitoring and switch time adjustment, and resume tracking of the maximum power point.

[0123] In a second aspect, corresponding to the above circuit embodiment, an embodiment of the present invention further provides a maximum power point tracking method for photoelectric energy collection, which is applied to the above circuit embodiment, such as Figure 3 As shown, the method may include:

[0124] S1, use the power characterization module to obtain the output voltage V of the photovoltaic cell connected to the maximum power point tracking circuit PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ;

[0125] S2, using the power comparator to compare the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and output a control signal V MN ;

[0126] S3, using the sleep module to continuously control the control signal V corresponding to the preset time MN Detection is performed, when the control signal V corresponding to the preset moment is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter a sleep mode;

[0127] S4, after the maximum power point tracking circuit enters the sleep mode, the output voltage V of the photovoltaic cell is monitored in real time by using the sleep module. PV When the output voltage of the photovoltaic cell V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode;

[0128] S5, using the power tube to drive the control module according to the control signal V MN The PWM modulation method is used to control the power tube connected to the maximum power point tracking circuit to be turned on or off to achieve maximum power point tracking.

[0129] It can be understood that for the specific working principle of step S1, please refer to the detailed introduction of the power characterization module in the circuit embodiment, for the specific working principle of step S2, please refer to the detailed introduction of the power comparator in the circuit embodiment, for the specific working principles of steps S3 and S4, please refer to the detailed introduction of the sleep module in the circuit embodiment, and for the specific working principle of step S5, please refer to the detailed introduction of the power tube drive control module in the circuit embodiment. I will not elaborate on this again.

[0130] The embodiment of the present invention utilizes a sleep module to enable the maximum power point tracking circuit to switch in the sleep mode, thereby effectively reducing the power consumption of the photovoltaic cell under low light or no light conditions, and significantly improving the energy efficiency of the maximum power point tracking circuit. The power characterization module is used for accurate power detection, and the power comparator and the power tube drive control module are combined to achieve dynamic adjustment, so that the maximum power point tracking circuit can quickly respond to environmental changes and efficiently track the maximum power point, extending the service life of the system, adapting to the changing light environment, and improving the efficiency of photoelectric energy collection.

[0131] It should be noted that in the description of the present invention, it should be understood that the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0132] Each embodiment in this specification is described in a related manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the method embodiment, since it is basically similar to the circuit embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the circuit embodiment.

[0133] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A maximum power point tracking circuit for photoelectric energy collection, characterized in that: include: Power characterization module, power comparator, sleep module and power tube drive control module; among them, The power characterization module is used to obtain the output voltage V of the photovoltaic cell connected to the maximum power point tracking circuit. PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ; The power comparator is used to compare the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and output a control signal V MN ; The sleep module is used to control the control signal V corresponding to the consecutive preset moments. MN Detection is performed, when the control signal V corresponding to the preset time is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter a sleep mode; The sleep module is also used to monitor the output voltage V of the photovoltaic cell in real time after the maximum power point tracking circuit enters the sleep mode. PV When the output voltage of the photovoltaic cell V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode; The power tube drive control module is used to, according to the control signal V MN The PWM modulation method is used to control the power tube connected to the maximum power point tracking circuit to be turned on or off, so as to achieve maximum power point tracking.

2. A maximum power point tracking circuit for photoelectric energy collection according to claim 1, characterized in that: The power characterization module comprises: Passive filters, sample-and-hold modules, time multipliers.

3. A maximum power point tracking circuit for photoelectric energy collection according to claim 2, characterized in that: The power characterization module obtains the output voltage V of the photovoltaic cell PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ,include: The passive filter is based on the output voltage V of the photovoltaic cell. PV The output voltage V PV The average value V AVG ; The sampling and holding module is used to control the output voltage V of the photovoltaic cell. PV Sampling is performed to obtain the output voltage V PV The maximum value V H and minimum value V L ; The time multiplier is based on the average value V AVG , maximum value V H and minimum value V L , outputs a voltage signal V related to the current input power of the maximum power point tracking circuit P .

4. The maximum power point tracking circuit for photoelectric energy collection according to claim 1, characterized in that: The sleep module comprises: A first switch K1, a second switch K1, a capacitor C1, a capacitor C2, a comparator, a switch array, an RS trigger RS, a D trigger D1, a D trigger D2, a D trigger D3, a D trigger D4, a D trigger D5, a D trigger D6, a D trigger D7, a first AND gate AND1, a second AND gate AND2 and a third AND gate AND3; wherein, The first end of the first switch K1 is connected to the average value V AVG , the second end is connected to the positive input terminal of the comparator; A first end of the second switch K2 is connected to the first end of the first switch K1, and a second end is connected to the negative input end of the comparator; The first end of the capacitor C1 is grounded, and the second end is connected to the positive input terminal of the comparator; The first end of the capacitor C2 is connected to the negative input terminal of the comparator, and the second end is grounded; The positive output terminal of the comparator is connected to the second input terminal of the switch array, and the negative output terminal is connected to the first input terminal of the switch array; The first output terminal of the switch array is connected to the S terminal of the RS trigger RS, and the second output terminal is connected to the R terminal of the RS trigger RS; The output terminal of the RS flip-flop RS is connected to the clock signal terminal of the D flip-flop D1; The D terminal of the D flip-flop D1 is connected to the power supply voltage, the R terminal is connected to the R terminal of the D flip-flop D2, and the Q terminal serves as the output terminal of the sleep module; The D terminal of the D flip-flop D2 is connected to the clock signal CLK, and the clock signal terminal is connected to the control signal V MN , the Q terminal is connected to the D terminal of the D flip-flop D3, the R terminal is connected to the R terminal of the D flip-flop D3, and the Q terminal is connected to the third input terminal of the second AND gate AND2; The clock signal terminal of the D flip-flop D3 is connected to the clock signal terminal of the D flip-flop D2 and to the second input terminal of the second AND gate AND2, the Q terminal is connected to the D terminal of the D flip-flop D4, and the R terminal is connected to the R terminal of the D flip-flop D4; The clock signal terminal of the D flip-flop D4 is connected to the clock signal terminal of the D flip-flop D3, the Q terminal is connected to the D terminal of the D flip-flop D5, the R terminal is connected to the R terminal of the D flip-flop D5, and the Q terminal is connected to the first input terminal of the second AND gate AND2; The clock signal terminal of the D flip-flop D5 is connected to the clock signal terminal of the D flip-flop D4, the Q terminal is connected to the D terminal of the D flip-flop D6, and the R terminal is connected to the R terminal of the D flip-flop D6; The clock signal terminal of the D flip-flop D6 is connected to the clock signal terminal of the D flip-flop D5 and to the third input terminal of the first AND gate AND1, the Q terminal is connected to the D terminal of the D flip-flop D7, the R terminal is connected to the R terminal of the D flip-flop D7, and the Q terminal is connected to the second input terminal of the first AND gate AND1; The clock signal terminal of the D flip-flop D7 is connected to the clock signal terminal of the D flip-flop D6, the Q terminal is connected to the first input terminal of the first AND gate AND1, and the R terminal is connected to the output terminal of the third AND gate AND3; The output terminal of the first AND gate AND1 is connected to the first input terminal of the third AND gate AND3; An output terminal of the second AND gate AND2 is connected to a second input terminal of the third AND gate AND3.

5. A maximum power point tracking circuit for photoelectric energy collection according to claim 4, characterized in that: The switch array comprises: The third switch K3, the fourth switch K4, the fifth switch K5 and the sixth switch K6; wherein, A first end of the third switch K3 is connected to a first end of the fourth switch K4, and a second end thereof serves as a first output end of the switch array; A first end of the fourth switch K4 serves as a first input end of the switch array, and a second end is connected to a second end of the sixth switch K6; The first end of the fifth switch K5 serves as the second input end of the switch array, and the second end is connected to the second end of the third switch K3; A first end of the sixth switch K6 is connected to a first end of the fifth switch K5 , and a second end thereof serves as a second output end of the switch array.

6. The maximum power point tracking circuit for photoelectric energy collection according to claim 1, characterized in that: The continuous preset moments include: 6 consecutive moments.

7. A maximum power point tracking circuit for photoelectric energy collection according to claim 6, characterized in that: The sleep module responds to the control signal V corresponding to the consecutive preset time MN Detection is performed, when the control signal V corresponding to the preset time is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter the sleep mode, including: The sleep module controls the control signal V corresponding to 6 consecutive moments. MN Detection is performed when the control signal V corresponding to 6 consecutive moments MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter the sleep mode, so that the power characterization module and the power comparator are suspended; wherein the preset requirements are the control signal V corresponding to 6 consecutive moments MN It is 1, 0, 1, 0, 1, 0 respectively.

8. The maximum power point tracking circuit for photoelectric energy collection according to claim 1, characterized in that: The sleep module monitors the output voltage V of the photovoltaic cell in real time PV When the output voltage V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode, including: The sleep module monitors the output voltage V of the photovoltaic cell in real time PV A detection is performed, and if the output voltage of the photovoltaic cell corresponding to the current moment exceeds the preset threshold variation range compared with the output voltage of the photovoltaic cell corresponding to the previous moment, the maximum power point tracking circuit is controlled to exit the sleep mode, so that the power characterization module and the power comparator start working.

9. The maximum power point tracking circuit for photoelectric energy collection according to claim 1, characterized in that: The preset threshold value variation range is the voltage value corresponding to the maximum power point ±100mV.

10. A maximum power point tracking method for photoelectric energy collection, characterized in that: Applied to the maximum power point tracking circuit as claimed in any one of claims 1 to 9, the method comprising: Use the power characterization module to obtain the output voltage V of the photovoltaic cell connected to the maximum power point tracking circuit PV The corresponding average value V AVG , maximum value V H and minimum value V L , thereby outputting a voltage signal V related to the current input power P ; The power comparator is used to compare the voltage signal corresponding to the current moment with the voltage signal corresponding to the previous moment, and the control signal V is output. MN ; The sleep module is used to control the control signal V corresponding to the continuous preset time MN Detection is performed, when the control signal V corresponding to the preset time is MN When the preset requirements are met, the maximum power point tracking circuit is controlled to enter a sleep mode; After the maximum power point tracking circuit enters the sleep mode, the output voltage V PV When the output voltage V PV When the preset threshold variation range is not met, the maximum power point tracking circuit is controlled to exit the sleep mode; The power tube driving control module is used to drive the control signal V MN The PWM modulation method is used to control the power tube connected to the maximum power point tracking circuit to be turned on or off, so as to achieve maximum power point tracking.

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