Receiving pin capacitance acquisition method, delay calculation method, and computer equipment

Abstract

The present application relates to a method for obtaining receiving pin capacitance, including obtaining the input waveform of the second circuit unit according to the input waveform of the first circuit unit, the capacitance on the line, and the initial receiving pin capacitance and load capacitance of the second circuit unit; obtaining the input time corresponding to the input waveform segment of the input waveform of the second circuit unit to determine the receiving pin capacitance corresponding to the second circuit unit at different input times. The present application also provides a delay calculation method, a computer device and a storage medium. The receiving pin capacitance acquisition method, delay calculation method, computer device and storage medium of the present application can improve the accuracy and efficiency of receiving pin capacitance acquisition, thereby improving the calculation accuracy and efficiency of delay.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a method for obtaining a receiving pin capacitance, a delay calculation method, and a computer device. Background Art

[0002] In the whole process of chip design, timing analysis plays a vital role. In order to perform timing analysis, composite current source (CCS) model, effective current source (ECSM) model and non-linear delay model (NLDM) are usually used to perform timing analysis calculations. Among them, the CCS model and ECSM model specify different receiving pin capacitances for different parts of the input waveform (i.e. different input waveform segments), which can more accurately describe the actual situation of the receiving pin capacitance.

[0003] However, the efficiency of the existing receiving pin capacitance acquisition method for the CCS model is not high, resulting in different efficiency of delay calculation. Therefore, it is necessary to propose a receiving pin capacitance acquisition method to improve the acquisition efficiency of the receiving pin capacitance, thereby improving the calculation accuracy and efficiency of the delay. Summary of the invention

[0004] In response to the above technical problems, the present application provides a method for obtaining receiving pin capacitance, a delay calculation method, a computer device and a storage medium, which can improve the accuracy and efficiency of obtaining receiving pin capacitance, thereby improving the accuracy and efficiency of delay calculation.

[0005] In order to solve the above technical problems, the present application provides a method for obtaining receiving pin capacitance, which includes the following steps: obtaining the input waveform of the second circuit unit according to the input waveform and online capacitance of the first circuit unit, and the initial receiving pin capacitance and load capacitance of the second circuit unit; obtaining the input time corresponding to the input waveform segment of the input waveform of the second circuit unit; and determining the receiving pin capacitance corresponding to the input time of the second circuit unit.

[0006] In one embodiment, the method further includes the following steps: updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to the input time to obtain the updated input waveform of the second circuit unit; updating the receiving pin capacitance according to the updated input waveform of the second circuit unit.

[0007] In one embodiment, the step of updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to the input time to obtain the updated input waveform of the second circuit unit includes: judging whether a preset condition is met according to the receiving pin capacitance; when the preset condition is not met, updating the input waveform of the second circuit unit according to the receiving pin capacitance to obtain the updated input waveform of the second circuit unit.

[0008] In one embodiment, after the step of updating the receiving pin capacitance according to the updated input waveform of the second circuit unit, the method further includes: returning to the step of determining whether a preset condition is satisfied according to the receiving pin capacitance.

[0009] In one implementation, the method further includes: when the preset condition is met, outputting the current receiving pin capacitance.

[0010] In one embodiment, the step of determining whether a preset condition is met based on the receiving pin capacitance includes: obtaining an output waveform corresponding to the first circuit unit based on the receiving pin capacitance corresponding to the input time; and determining whether the preset condition is met based on the output waveform corresponding to the first circuit unit.

[0011] In one embodiment, the step of determining whether a preset condition is satisfied based on an output waveform corresponding to the first circuit unit includes: obtaining a delay of the first circuit unit based on an output waveform corresponding to the first circuit unit and an input waveform of the first circuit unit; when the delay converges, determining that the preset condition is satisfied; and when the delay does not converge, determining that the preset condition is not satisfied.

[0012] In one embodiment, the step of updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to the input time to obtain the updated input waveform of the second circuit unit includes: obtaining the output waveform segments of the first circuit unit corresponding to different receiving pin capacitances according to the receiving pin capacitance corresponding to the input time; splicing the output waveform segments of the first circuit unit to obtain the output waveform of the first circuit unit; obtaining the updated input waveform segments of the second circuit unit according to the output waveform of the first circuit unit, wherein the updated input waveform segments of the second circuit unit correspond to the receiving pin capacitance corresponding to the input time; splicing the updated input waveform segments of the second circuit unit to obtain the updated input waveform of the second circuit unit.

[0013] The present application also provides a delay calculation method, which includes: according to the method described above, obtaining the receiving pin capacitance of the second circuit unit; according to the receiving pin capacitance of the second circuit unit, obtaining the output waveform of the first circuit unit; according to the output waveform corresponding to the first circuit unit and the input waveform of the first circuit unit, obtaining the delay of the first circuit unit; when the delay converges, outputting the delay of the first circuit unit.

[0014] In one embodiment, the delay calculation method also includes: when the delay does not converge, updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to the input time; after updating the receiving pin capacitance according to the updated input waveform of the second circuit unit, entering the step of obtaining the output waveform of the first circuit unit according to the receiving pin capacitance of the second circuit unit.

[0015] The present application also provides a computer device, including a storage medium and a controller, wherein a computer program is stored on the storage medium, and when the computer program is executed by the controller, the steps of the method described above are implemented.

[0016] The present application also provides a storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method described above are implemented.

[0017] The present application provides a method for obtaining receiving pin capacitance, a method for calculating delay, a computer device and a storage medium. After obtaining the input waveform of the second circuit unit based on the input waveform and online capacitance of the first circuit unit, and the initial receiving pin capacitance and load capacitance of the second circuit unit, the input time corresponding to the input waveform segment of the input waveform of the second circuit unit is obtained to determine the receiving pin capacitance corresponding to the second circuit unit at different input times. Therefore, the present application can improve the accuracy and efficiency of obtaining the receiving pin capacitance, thereby improving the accuracy and efficiency of delay calculation. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a flowchart of a method for obtaining receiving pin capacitance according to an embodiment.

[0019] Figure 2 is a schematic structural diagram of an integrated circuit according to an embodiment.

[0020] Figure 3 4 is a schematic diagram showing input time corresponding to an input waveform segment of an input waveform of a second circuit unit according to an embodiment.

[0021] Figure 4 is a flow chart of a method for obtaining receiving pin capacitance according to yet another embodiment.

[0022] Figure 5 is a schematic diagram of waveform splicing according to an embodiment.

[0023] Figure 6 It is a flowchart of a delay calculation method according to an embodiment. DETAILED DESCRIPTION

[0024] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly understood.

[0025] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by those skilled in the art of the present invention. The terms used herein in the specification of the present invention are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items. In the present invention, "each" includes one and more than two quantities.

[0026] Figure 1 FIG. 1 is a flow chart of a method for obtaining a receiving pin capacitance according to an embodiment. In this embodiment, the method for obtaining a receiving pin capacitance includes the following steps:

[0027] Step S10: acquiring an input waveform of the second circuit unit according to the input waveform and the line capacitance of the first circuit unit, and the initial receiving pin capacitance and the load capacitance of the second circuit unit;

[0028] Step S11: obtaining the input time corresponding to the input waveform segment of the input waveform of the second circuit unit;

[0029] Step S12: determining the receiving pin capacitance corresponding to the second circuit unit at different input times.

[0030] The input waveform can be divided into N input waveform segments. The input waveform segment is a part of the input waveform. The N input waveform segments of the input waveform are sequentially spliced ​​end to end to obtain the input waveform. Specifically, N is an integer greater than 1, and the value of N can be obtained by querying the library file, or can be a value preset by the system or the user.

[0031] The present application provides a method for obtaining receiving pin capacitance. After obtaining the input waveform of the second circuit unit based on the input waveform and online capacitance of the first circuit unit, and the initial receiving pin capacitance and load capacitance of the second circuit unit, the input time corresponding to the input waveform segment of the input waveform of the second circuit unit is obtained to determine the receiving pin capacitance corresponding to the second circuit unit at different input times. Therefore, the present application can improve the accuracy and efficiency of obtaining the receiving pin capacitance, thereby improving the accuracy and efficiency of delay calculation.

[0032] In one embodiment, the first circuit unit and / or the second circuit unit may be, but not limited to, a standard unit. Optionally, the standard unit includes an inverter, an AND gate, etc., and each standard unit corresponds to a plurality of circuits of different sizes and different driving capabilities. Specifically, the output end of the first circuit unit is connected to the input end of the second circuit unit through a resistor-capacitor circuit (also known as an RC circuit). Before step S10, the method includes: based on a preset circuit model, determining an equivalent circuit of a resistor-capacitor circuit connected to the output end of the first circuit unit, wherein the preset circuit model may be, but not limited to, a π model (Pi-model). Specifically, in one embodiment, the first circuit unit may be equivalent to a driving voltage source. The resistor-capacitor circuit may be equivalent to an equivalent circuit including a first capacitor, a second capacitor and a resistor, wherein the first capacitor is connected in parallel with the second capacitor, and the resistor is connected in series between the first capacitor and the second capacitor. Specifically, in one embodiment, the equivalent circuit of the resistor-capacitor circuit at the output end of the first circuit unit may be further equivalent to a circuit including an online capacitor.

[0033] In one embodiment, the input waveform of the first circuit unit and / or the input waveform of the second circuit unit is an input voltage waveform, and / or the output waveform of the first circuit unit is an output voltage waveform. In other embodiments, the input waveform of the first circuit unit and / or the input waveform of the second circuit unit, and / or the output waveform of the first circuit unit may also be a current waveform, etc., and the present application is not limited thereto.

[0034] In one embodiment, if Figure 1 The receiving pin capacitance acquisition method shown can be applied to, but is not limited to, Figure 2 The integrated circuit shown. Figure 2 As shown, the output capacitor of the first circuit unit B1 includes an online capacitor C net and the receiving pin capacitance C of the second circuit unit B2 pin_i (i=1,2,3...N) The output end of the second circuit unit B2 is connected to the load capacitor C load Where N is the total receiving pin capacitance C pin_iThe number of, that is, the number of each receiving pin capacitor corresponding to the input waveform segment of the input waveform of the second circuit unit B2. Specifically, the value of N can be obtained by querying the library file, for example, by querying the timing library lib. Among them, there are many library files, and the library files include the timing library lib, etc. Specifically, the value of N can be determined according to the N value recorded in the receiving capacitor table in the timing library lib.

[0035] In one embodiment, the input waveform S1 of the first circuit unit B1 can be obtained by querying the timing constraint file, and the online capacitance C can be obtained by querying the standard parasitic extraction format (SPEF) file. net , and the load capacitance C load In other implementations, the input waveform S1 of the first circuit unit B1 and the line capacitance C net , and the load capacitance C load At least one of the above, but this application is not limited to this.

[0036] In one embodiment, the initial receiving pin capacitance C of the second circuit unit B2 is pin_ori It may be an empirical value set by the user, may be obtained by querying a non-linear delay model (NLDM) library, or may be an empirical value set by the user.

[0037] In one embodiment, step S10: according to the input waveform S1 of the first circuit unit B1, the line capacitance C net , and the initial receiving pin capacitance C of the second circuit unit pin_ori , load capacitance C load , obtain the input waveform S of the second circuit unit B2 3_ori The method may include: using a static timing analysis or a dynamic timing analysis method, according to the input waveform S1 of the first circuit unit B1, the online capacitance C net , and the initial receiving pin capacitance C of the second circuit unit B2 pin_ori , load capacitance C load , obtain the input waveform S of the second circuit unit B2 3_ori .

[0038] In one embodiment, step S11: obtaining the input waveform S of the second circuit unit B2 3_ori The input waveform segment corresponding to the input time includes: determining the input waveform S of the second circuit unit B2 through the library file. 3_ori According to the input waveform S of the second circuit unit B2 3_ori , obtain the input waveform S of the second circuit unit B23_ori For details, please refer to Figure 3 , Figure 3 is an input waveform segment P of the input waveform of the second circuit unit B2 according to an embodiment. i The corresponding input time T i Specifically, the input waveform of the second circuit unit B2 is S 3_ori When the input waveform of the second circuit unit B2 is obtained as S 3_ori The input waveform segment P i (i=1,2,3……N), corresponding input time T i (i=1,2,3……N). Among them, the input waveform S of the second circuit unit B2 is 3_ori The input waveform segment P i The input waveform S of the second circuit unit B2 can be determined according to the input waveform segment preset in the timing library lib. 3_ori The input waveform segment P i The corresponding input time T i It can be determined according to the input time preset in the timing library lib. Specifically, the input waveform S of the second circuit unit B2 3_ori The input waveform segment P i The spacing between them can be equal or unequal. Specifically, for example, the value of N can be 2, and the input waveform of the second circuit unit B2 is S 3_ori The input waveform segment P i (i=1,2,3……N) corresponding input time T i (i=1, 2, 3...N) can be: The input waveform of the second circuit unit B2 is obtained as S 3_ori The input waveform S of the second circuit unit B2 corresponds to the input time T1 and T2. 3_ori The portion P2 may be, but is not limited to, the waveform portion corresponding to 50% VDD to VDD, or may be other values. The portion P2 of the input waveform of the second circuit unit B2 is determined by a preset value in the timing library lib. Among them, VDD is the input voltage of the first circuit unit B1, that is, the voltage value of the input voltage waveform S1 of the first circuit unit B1 at the start time.

[0039] In one embodiment, step S12: determining the second circuit unit B2 at different input times T i The corresponding receiving pin capacitance C pin_i The method comprises: determining, according to a receiving pin capacitance lookup table of the second circuit unit B2, the second circuit unit B2 at different input times T i The corresponding receiving pin capacitance C pin_iThe receiving pin capacitance lookup table of the second circuit unit B2 stores the input waveform S of the second circuit unit B2. 3_ori At different input times T i The corresponding receiving pin capacitance C pin_i In other implementations, the second circuit unit B2 at different input times T may also be calculated by an interpolation algorithm or the like. i The corresponding receiving pin capacitance C pin_i .

[0040] Figure 4 FIG. 1 is a flow chart of a method for obtaining a receiving pin capacitance according to another embodiment. Figure 4 The method shown can be applied to Figure 2 Please also refer to the integrated circuit shown Figure 2 , Figure 3 as well as Figure 4 The receiving pin capacitance acquisition method of this embodiment includes the following steps:

[0041] Step S20: According to the input waveform S1 of the first circuit unit B1 and the line capacitance C net , and the initial receiving pin capacitance C of the second circuit unit B2 pin_ori , load capacitance C load , obtain the input waveform S of the second circuit unit B2 3_ori ;

[0042] Step S21: Obtain the input waveform S of the second circuit unit B2 3_ori The input waveform segment P i (i=1,2,3……N) corresponding input time T i ;

[0043] Step S22: Determine the second circuit unit B2 at different input times T i The corresponding receiving pin capacitance C pin_i ;

[0044] Step S23: According to different input times T i The corresponding receiving pin capacitance C pin_i , update the input waveform S of the second circuit unit B2 3_ori , to obtain the updated input waveform S3 of the second circuit unit B2;

[0045] Step S24: Update the receiving pin capacitance C according to the input waveform S3 updated by the second circuit unit B2 pin_i .

[0046] In one embodiment, step S23: according to different input times T i The corresponding receiving pin capacitance Cpin_i , update the input waveform S of the second circuit unit 3_ori , to obtain the updated input waveform S3 of the second circuit unit, including:

[0047] Step S231: According to the receiving pin capacitance C pin_i , determine whether the preset conditions are met;

[0048] If the preset condition is not met, go to step S232: according to the receiving pin capacitance C pin_i , update the input waveform S of the second circuit unit B2 3_ori , and obtain the updated input waveform S3 of the second circuit unit B2.

[0049] In one embodiment, after step S231: judging whether a preset condition is satisfied according to the receiving pin capacitance, the method further comprises: when the preset condition is satisfied, entering step S25: outputting the current receiving pin capacitance.

[0050] In one embodiment, step S23: according to different input times T i The corresponding receiving pin capacitance C pin_i , update the input waveform S of the second circuit unit B2 3_ori The implementation steps of obtaining the updated input waveform S3 of the second circuit unit B2 can refer to step S20, that is, according to the input waveform S1 of the first circuit unit B1, the line capacitance C net , and the current receiving pin capacitance C of the second circuit unit B2 pin_i , and load capacitance C load , obtain the updated input waveform S3 of the second circuit unit B2.

[0051] In one embodiment, step S24: updating the receiving pin capacitance C according to the input waveform S3 updated by the second circuit unit B2 pin_i The steps may be but are not limited to the implementation steps of referring to steps S21 and S22, that is, the input waveform segment P of the input waveform S3 after the second circuit unit B2 is updated may be obtained. j (j=1,2,3……N) corresponding input time T j After that, it is determined that the second circuit unit B2 has different input times T j The corresponding updated receiving pin capacitance value. Among them, the input waveform segment P of the updated input waveform of the second circuit unit B2 j The input waveform segment P of the input waveform of the second circuit unit B2 can be determined according to the input waveform segment preset in the timing library lib. jThe corresponding input time Tj can be determined according to the input time preset in the timing library lib. Specifically, the input waveform segment P of the input waveform of the second circuit unit B2 j The spacing can be equal or unequal.

[0052] The preset conditions include user preset conditions and / or system preset conditions. In one embodiment, the preset conditions include conditions that the output waveform S2 of the first circuit unit B1 needs to satisfy based on the receiving pin capacitance and / or conditions that the delay with the first circuit unit B1 needs to satisfy. Specifically, the preset conditions for each iteration calculation may be the same or different. In one embodiment, step S231: based on the receiving pin capacitance C pin_i The step of determining whether the preset condition is met may include, but is not limited to: i The corresponding receiving pin capacitance C pin_i , obtain the output waveform S2 corresponding to the first circuit unit; and determine whether the preset condition is met according to the output waveform S2 corresponding to the first circuit unit B1. Specifically, in one embodiment, the step of determining whether the preset condition is met according to the output waveform S2 corresponding to the first circuit unit B1 includes: obtaining the delay of the first circuit unit B1 according to the output waveform S2 corresponding to the first circuit unit B1 and the input waveform S1 of the first circuit unit B1; when the delay converges, determining that the preset condition is met; and when the delay does not converge, determining that the preset condition is not met.

[0053] Specifically, in one embodiment, the output waveform of the first circuit unit B1 is an output voltage waveform. In one embodiment, the difference between the time intervals of the input waveform S1 of the first circuit unit B1 and the 50% VDD points of the output waveform S2 is the delay of the first circuit unit B1. If the difference between the delay currently obtained and the delay obtained last time is less than a preset value, it can be considered that the delay has converged, wherein the preset value can be a system preset value or an empirical value preset by the user, etc. VDD is the input voltage of the first circuit unit B1, that is, the voltage value of the input voltage waveform S1 of the first circuit unit B1 at the start time.

[0054] In one embodiment, step S23: according to different input times T i The corresponding receiving pin capacitance C pin_i , update the input waveform S of the second circuit unit 3_ori , to obtain the updated input waveform S3 of the second circuit unit B2, comprising: according to the different input times T i The corresponding receiving pin capacitance C pin_i , the first circuit unit B1 and different receiving pin capacitances C pin_iThe output waveform segments of the first circuit unit B1 are spliced ​​to obtain the output waveform S2 of the first circuit unit B1; the input waveform segments of the second circuit unit B2 are obtained according to the output waveform S2 of the first circuit unit B1, wherein different input waveform segments of the second circuit unit B2 are related to different input times T i The corresponding receiving pin capacitance C pin_i Correspondingly, the input waveform segment of the second circuit unit B2 is spliced ​​to obtain the updated input waveform of the second circuit unit.

[0055] The output waveform can be divided into N output waveform segments. The output waveform segment is a part of the output waveform. The N output waveform segments of the output waveform are sequentially spliced ​​end to end to obtain the output waveform. Specifically, N is an integer greater than 1, and the value of N can be obtained by querying the library file, or can be a value preset by the system or the user.

[0056] Specifically, Figure 5 FIG. 1 is a schematic diagram of waveform splicing according to an embodiment. Specifically, Figure 5 As shown, according to the receiving pin capacitance C corresponding to the input time T1 pin_1 , get the first circuit unit B1 and the receiving pin capacitance C pin_1 The corresponding output waveform segment S 2_1 , according to the receiving pin capacitance C corresponding to the input time T2 pin_2 , get the first circuit unit B1 and the receiving pin capacitance C pin_2 The corresponding output waveform segment S 2_2 , according to the receiving pin capacitance C corresponding to the input time T3 pin_3 , get the first circuit unit B1 and the receiving pin capacitance C pin_3 The corresponding output waveform segment S 2_3 , and so on, according to the input time T N The corresponding receiving pin capacitance C pin_N , get the first circuit unit B1 and the receiving pin capacitance C pin_N The corresponding output waveform segment S 2_N , the output waveform segment S of the first circuit unit B1 2_1 , S 2_2 , ... S 2_N The output waveform S2 of the first circuit unit B1 is obtained by splicing. The output waveform S2 of the first circuit unit B1 is propagated backward to obtain different receiving pin capacitances C pin_1 ,C pin_2 , C pin_3 ……C pin_N The updated input waveform segment S of the corresponding second circuit unit B1 3_1 , S 3_2 , ... S3_N Then the updated input waveform segment S of the second circuit unit B2 is 3_1 , S 3_2 , ... S 3_N The splicing process is performed to obtain the updated input waveform S3 of the second circuit unit B2.

[0057] This embodiment provides a method for obtaining receiving pin capacitance. After obtaining the input waveform of the second circuit unit according to the input waveform and online capacitance of the first circuit unit, and the initial receiving pin capacitance and load capacitance of the second circuit unit, the input waveform of the second circuit unit is obtained, and then the input time corresponding to the input waveform segment of the input waveform of the second circuit unit is obtained to determine the receiving pin capacitance corresponding to the second circuit unit at different input times. Therefore, this embodiment can improve the accuracy and efficiency of obtaining the receiving pin capacitance, thereby improving the accuracy and efficiency of delay calculation. In addition, when the preset conditions are not met, the continuous iterative calculation of this embodiment can further improve the accuracy of the obtained receiving pin capacitance, thereby improving the accuracy of delay calculation.

[0058] Figure 6 FIG. 1 is a flow chart of a delay calculation method according to an embodiment. Figure 6 , the delay calculation method of this embodiment includes:

[0059] Step S30: obtaining the receiving pin capacitance of the second circuit unit;

[0060] Step S31: acquiring the output waveform of the first circuit unit according to the receiving pin capacitance of the second circuit unit;

[0061] Step S32: acquiring the delay of the first circuit unit according to the output waveform corresponding to the first circuit unit and the input waveform of the first circuit unit;

[0062] Step S33: determine whether the delay is converged;

[0063] When the delay converges, the process goes to step S34: outputting the delay of the first circuit unit;

[0064] In one embodiment, the delay calculation method further includes:

[0065] When the delay does not converge, the process proceeds to step S35: updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to different input times;

[0066] Step 36: update the receiving pin capacitance according to the updated input waveform of the second circuit unit, and return to step S31: obtain the output waveform of the first circuit unit according to the receiving pin capacitance of the second circuit unit.

[0067] The implementation process of the above steps can be found in Figures 1 to 5 And the corresponding description will not be repeated here.

[0068] The delay calculation method provided in the present application obtains the input waveform of the second circuit unit based on the input waveform and online capacitance of the first circuit unit, and the initial receiving pin capacitance and load capacitance of the second circuit unit, and then obtains the input time corresponding to the input waveform segment of the input waveform of the second circuit unit to determine the receiving pin capacitance corresponding to the second circuit unit at different input times. Therefore, the present application can determine multiple receiving pin capacitances for the input waveform segment of the input waveform, and the efficiency of calculating the receiving pin capacitance is high, thereby improving the calculation accuracy and efficiency of the delay.

[0069] The present application also provides a computer device, including a storage medium and a controller, wherein a computer program is stored on the storage medium, and when the computer program is executed by the controller, the steps of the above method are implemented.

[0070] The present application also provides a storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the method described above are implemented.

[0071] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A method for obtaining receiving pin capacitance, characterized in that: The method comprises the following steps: Acquire an input waveform of the second circuit unit according to an input waveform and an on-line capacitance of the first circuit unit, and an initial receiving pin capacitance and a load capacitance of the second circuit unit; Acquire an input time corresponding to an input waveform segment of an input waveform of the second circuit unit; Determine a receiving pin capacitance corresponding to the second circuit unit at the input time.

2. The method according to claim 1, characterized in that The method further comprises the following steps: updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to the input time to obtain an updated input waveform of the second circuit unit; The receiving pin capacitance is updated according to the updated input waveform of the second circuit unit.

3. The method according to claim 2, characterized in that The step of updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to the input time to obtain the updated input waveform of the second circuit unit comprises: Determining whether a preset condition is met according to the receiving pin capacitance; When the preset condition is not met, the input waveform of the second circuit unit is updated according to the receiving pin capacitance to obtain an updated input waveform of the second circuit unit.

4. The method according to claim 3, characterized in that The step of judging whether a preset condition is met according to the receiving pin capacitance comprises: acquiring an output waveform corresponding to the first circuit unit according to the receiving pin capacitance corresponding to the input time; Whether a preset condition is met is determined according to the output waveform corresponding to the first circuit unit.

5. The method according to claim 4, characterized in that The step of judging whether a preset condition is met according to the output waveform corresponding to the first circuit unit comprises: Acquire a delay of the first circuit unit according to an output waveform corresponding to the first circuit unit and an input waveform of the first circuit unit; When the delay converges, determining that the preset condition is satisfied; When the delay does not converge, it is determined that the preset condition is not satisfied.

6. The method according to any one of claims 2 to 5, characterized in that: The step of updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to the input time to obtain the updated input waveform of the second circuit unit includes: According to the receiving pin capacitance corresponding to the input time, obtaining the output waveform segments corresponding to the first circuit unit and different receiving pin capacitances; splicing the output waveform segments of the first circuit unit to obtain the output waveform of the first circuit unit; According to the output waveform of the first circuit unit, an updated input waveform segment of the second circuit unit is obtained, wherein the updated input waveform segment of the second circuit unit corresponds to the receiving pin capacitance corresponding to different input times; The updated input waveform segments of the second circuit unit are spliced ​​to obtain an updated input waveform of the second circuit unit.

7. A delay calculation method, characterized in that: The delay calculation method comprises: According to the method according to any one of claims 1 to 6, obtaining the receiving pin capacitance of the second circuit unit; acquiring an output waveform of the first circuit unit according to a receiving pin capacitance of the second circuit unit; Acquire a delay of the first circuit unit according to an output waveform corresponding to the first circuit unit and an input waveform of the first circuit unit; When the delay converges, the delay of the first circuit unit is output.

8. The delay calculation method according to claim 7, characterized in that: The delay calculation method also includes: When the delay does not converge, updating the input waveform of the second circuit unit according to the receiving pin capacitance corresponding to different input times; After updating the receiving pin capacitance according to the updated input waveform of the second circuit unit, the step of acquiring the output waveform of the first circuit unit according to the receiving pin capacitance of the second circuit unit is entered.

9. A computer device, comprising a storage medium and a controller, characterized in that: The storage medium stores a computer program, which, when executed by the controller, implements the steps of the method according to any one of claims 1 to 8.

10. A storage medium, characterized in that: The storage medium stores a computer program, which implements the steps of the method according to any one of claims 1 to 8 when executed by a processor.

Images