Four-port resonant converter topology and soft switching optimization design method

Abstract

The invention discloses a resonance type four-port DC-DC converter topology based on a multi-winding isolation transformer and a soft switching optimization design method thereof. The converter is characterized by comprising three three-level half-bridge modules, a two-level full-bridge module, four groups of resonant inductors and resonant capacitors, an external auxiliary inductor and a high-frequency four-winding transformer, the soft switching optimization design method comprises the following steps: establishing a mathematical model of time domain analysis based on the proposed converter topology; based on a time domain analysis model, analyzing an influence mechanism of auxiliary inductance and resonant cavity parameters on each port soft switch; the invention further provides a parameter design method based on soft switching optimization. The multi-port converter topology provided by the invention integrates direct-current ports of different voltage levels, power decoupling and power bidirectional flow between any ports can be realized, and the soft switching optimization design method provided by the invention can realize zero-voltage switching of four ports without complex modulation algorithms and control strategies.

Description

Technical Field

[0001] The invention relates to the technical field of multi-port DC / DC converters, and in particular to a topology improvement of a four-port DC / DC converter based on a multi-winding transformer and a corresponding soft switch optimization design method. Background Art

[0002] In recent years, distributed energy sources such as photovoltaics, energy storage, fuel cells, and DC loads have developed rapidly. In particular, in the integrated photovoltaic and energy storage system, it is necessary to connect to distributed photovoltaics, energy storage, and loads. Photovoltaic power generation units, energy storage units, and DC loads need to be connected through independent converters. The large number of converters and complex system structure require more conversion links, which reduces efficiency and increases volume. In order to improve the power density of the converter and the system efficiency, multi-port DC / DC that can easily connect to a variety of different energy sources and loads has received extensive attention and research.

[0003] Multi-port DC / DC converters are divided into: non-isolated, partially isolated, and fully isolated. Non-isolated and partially isolated converters are small in size and have a small voltage gain, making them suitable for low-power applications. The fully isolated converters have all ports isolated from each other by transformers and can be flexibly configured in terms of transformation ratio, which has attracted wide attention in high-power applications. In addition, in order to further adapt to the access of various different energy sources, the topology of each DC / DC port needs to be designed separately.

[0004] In order to improve the efficiency of DC / DC converters based on multi-winding transformers, researchers have proposed to use multiple phase shifting methods in modulation to optimize efficiency. When there are many ports, the analysis and control process is more complicated. Resonant converters have the advantages of low electromagnetic interference, soft switching, and high efficiency, and are widely studied. When the series resonant type works in an open loop, voltage following within a wide load range can be achieved without sensor sampling, but the voltage cannot be flexibly adjusted. The LLC type can achieve flexible closed-loop voltage regulation, but the frequency regulation between ports in a multi-winding transformer is complex. In addition, some studies have proposed adding auxiliary inductance to each port to achieve zero voltage opening of each port, but there is a lack of detailed soft switching optimization design methods.

[0005] The key problem of DC / DC converters based on multi-winding transformers is the mutual coupling of power between ports. The power transmission between ports is controllable and not affected by the power transmission of other ports. Most literatures use the control upper loop to add a decoupling matrix to achieve decoupling, but the decoupling effect varies with the change of the operating point and affects the transient performance of the converter. In addition, some studies have proposed the use of hardware decoupling to optimize the leakage inductance of the transformer so that the leakage inductance of a specific port is close to 0, thereby achieving power decoupling of the remaining ports, which puts forward high requirements for the leakage inductance design of the transformer. There are also literatures that propose to construct a series resonant circuit in a certain port of the transformer so that its resonant impedance is close to 0 at the resonant frequency, thereby achieving power decoupling of other ports, but power decoupling is only achieved between specific ports. Summary of the invention

[0006] In view of this, the present invention proposes an isolated four-port resonant DC / DC converter topology structure, which satisfies the bidirectional power flow and realizes the power decoupling between ports; based on the proposed topology, a time domain analysis is performed to establish a time domain model, and then a soft switch optimization design method is proposed. In order to achieve the above purpose, the technical solution adopted by the present invention is: A four-port resonant converter topology, comprising: a four-winding high-frequency transformer, a two-level full-bridge circuit or a three-level half-bridge circuit corresponding to the four ports, and a series resonant circuit corresponding to the four ports; The four-winding high-frequency transformer comprises four winding ports, and the windings of the four ports are defined as N1, N2, N3, and N4 respectively; The four ports of the converter topology are port 1, port 2, port 3, and port 4; The port 1, the port 3 and the port 4 adopt a three-level half-bridge circuit, which is composed of two bridge arms connected in series, each bridge arm is composed of two switch devices connected in series, the four switch devices are composed of MOSFET and anti-parallel diodes, the midpoints of the two bridge arms are connected in series through two clamping diodes, the anode of the clamping diode is connected to the midpoint of the lower bridge arm, the cathode of the clamping diode is connected to the midpoint of the upper bridge arm, the connection point of the two clamping diodes is called the midpoint of the half bridge, the port filter capacitor is composed of two capacitors connected in series, the midpoint of the capacitors connected in series is connected to the midpoint of the half bridge, and the other point of the capacitor is connected to the positive and negative ends of the port bus respectively; The port 2 adopts a two-level full-bridge circuit, which is composed of two bridge arms in parallel. Each bridge arm is composed of two switching devices in series. The switching devices adopt a two-tube parallel connection method. The 8 switching devices are composed of MOSFETs and anti-parallel diodes. The port filter capacitor is connected in parallel at both ends of the bridge arm, and an auxiliary inductor is connected in parallel between the midpoints of the two bridge arms.

[0007] On the basis of the above scheme, the series resonant circuit of the three-level half-bridge port is composed of a resonant inductor and a resonant capacitor, and the resonant inductor is composed of an external inductor and a leakage inductance of the transformer port; one end of the resonant inductor is connected to the midpoint of the bridge arm, and the other end is connected to the same-name end of the transformer; one end of the resonant capacitor is connected to the midpoint of the half bridge, and the other end is connected to the opposite-name end of the transformer port; The series resonant circuits of the two-level full-bridge ports are composed of resonant inductors and resonant capacitors, and the resonant inductors are composed of external inductors and transformer port leakage inductances; one end of the resonant inductor is connected to the midpoint of the left bridge arm, and the other end is connected to the same-name end of the transformer; one end of the resonant capacitor is connected to the midpoint of the right bridge arm, and the other end is connected to the opposite-name end of the transformer port.

[0008] Further, the port 1 is a three-level half-bridge circuit, the port 3 is a three-level half-bridge circuit, the port 4 is a three-level half-bridge circuit, and the port 2 is a two-level full-bridge circuit; The series resonant circuits corresponding to the four ports are connected through a four-winding transformer.

[0009] In the full-bridge topology of port 2, considering the case of large transmission power, the device adopts two tubes in parallel to increase the current capacity while optimizing the conduction loss; It should be pointed out that an auxiliary inductor is connected in parallel between the midpoints of the bridge arms of port 2 to assist in achieving zero voltage switching of the primary and secondary ports in the power flow direction.

[0010] Secondly, by adopting the fundamental-wave synchronized pulse width modulation method combined with the series resonant circuit of four ports, power decoupling can be achieved between the four ports of the converter, so as to achieve decoupling of power transmission between any ports under different power flow modes.

[0011] In a second aspect, an electronic device is provided, comprising the four-port resonant converter topology described in the above scheme.

[0012] In the third aspect, in order to improve the efficiency of the converter, the present invention proposes a soft switch optimization design method based on a time domain analysis model; based on the proposed four-port resonant DC / DC converter topology, the time domain analysis method is used to derive the expression of each working mode of the converter and perform numerical solution to lay the foundation for the subsequent soft switch optimization design; the soft switch optimization design method includes: analyzing the influencing factors of zero voltage opening of each port, resonant impedance optimization design and auxiliary inductance optimization design; including the following steps: Based on the time domain analysis method, the isolated four-port resonant DC / DC converter is modeled in the time domain; Based on the time domain analysis model, the influence mechanism of resonant impedance on the soft switching of each port is analyzed and its parameters are designed; Based on the time domain analysis model, the influence mechanism of auxiliary inductance on the soft switching of each port is analyzed and its parameters are designed.

[0013] Specifically, the time domain modeling of the isolated four-port resonant DC / DC converter based on the time domain analysis method includes the following specific steps: Port 3 and port 4 of the four-port converter are equivalent to one port for analysis, and the four-port converter is further equivalent to a three-port converter for analysis; The three-port converter is equivalent to two two-port converters for time domain analysis; Solve the time domain expressions and numerical solutions for port 1 and port 2, and the time domain expressions and numerical solutions for port 3.

[0014] Specifically, the influence mechanism of the resonant impedance on the soft switch of each port is analyzed based on the time domain analysis model and its parameters are designed, and the specific steps include: Based on the time domain analysis model, the conditions for achieving zero voltage switching of ports 1 and 2 are analyzed, and then the factors affecting the soft switching of ports 1 and 2 by resonant impedance are analyzed. The initial conditions of input power and output voltage are calculated to obtain the minimum value of the total impedance equivalent to port 2. Z rmin and the minimum resonant impedance of port 1 Z r1min , the minimum resonant impedance of port 1 is equivalent to that of port 2 Z r12min ,Will Z rmin and Z r12min Compare and select the larger parameter as the minimum value of total impedance Z rmin ; Based on the time domain analysis model, the influence of the change of resonant impedance on the current stress and voltage stress of the resonant capacitor is quantitatively analyzed, and then the upper limit of the resonant impedance equivalent to port 2 is obtained according to the voltage stress of the resonant capacitor. Z rmax ; Based on the calculated total impedance range Z rmin < Z r < Z rmax , substituted into the current stress expression of the resonant capacitor, the range of current stress is obtained; In order to reduce the current stress as much as possible, it is determined whether the difference in current stress is less than the current threshold, and if the condition is met, the final resonant impedance range is output.

[0015] Specifically, the influence mechanism of the auxiliary inductor on the soft switching of each port is analyzed based on the time domain analysis model and its parameters are designed, and the specific steps include: Based on the time domain analysis model, the conditions for achieving zero voltage switching of ports 3, 4 and 2 are analyzed, and then the influencing factors of auxiliary inductance on the soft switching of ports 3, 4 and 2 are analyzed; In view of the soft switching effect of port 3 and port 4, the upper limit of auxiliary inductance required to meet the charging and discharging conditions of the switching device junction capacitance during the dead time is calculated. L amax1 , when the current through the switch device of port 3 is less than 0 at the time of opening, calculate the upper limit of the auxiliary inductance required L amax2 ; According to the two calculated upper limits of the auxiliary inductance, the intersection of the two ranges is taken as the upper limit of the auxiliary inductance. L amax .

[0016] In a fourth aspect, based on the above method, a soft switch optimization design device is proposed, comprising: The first module is used to perform time domain modeling of an isolated four-port resonant DC / DC converter based on a time domain analysis method; The second module is used to analyze the influence mechanism of resonant impedance on the soft switch of each port based on the time domain analysis model and design its parameters; The third module is used to analyze the influence mechanism of the auxiliary inductor on the soft switching of each port based on the time domain analysis model and design its parameters.

[0017] The soft switch optimization design method can analyze the influencing factors of zero voltage switching of each port based on the time domain analysis model, analyze the influence mechanism of resonant impedance and auxiliary inductance on the zero voltage switching of each port, and finally optimize the design of resonant impedance and auxiliary inductance based on the goal of achieving zero voltage switching of all switching devices of the four ports.

[0018] Beneficial effects of the present invention: 1. The combination of three-level half-bridge circuit and two-level full-bridge circuit topology can flexibly match input sources and loads of different voltage levels; 2. The four-port symmetrical series resonant circuit can realize power decoupling between any ports in different power transmission directions without the need for decoupling control on the control loop; 3. Based on the time domain analysis method, the proposed converter topology is accurately modeled and analyzed to provide a theoretical basis for the subsequent soft switching optimization design method; 4. In the soft switching optimization design method, the zero voltage opening of multiple ports is optimized by introducing auxiliary inductance at a single port and optimizing the hardware parameter design, thereby avoiding the loss caused by multiple auxiliary inductors themselves; the soft switching performance is optimized from the hardware parameter design level, without the need for complex modulation strategies, thus reducing the burden on the controller. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The present invention has the following accompanying drawings: Figure 1 It is the topology diagram of isolated four-port resonant DC / DC converter; Figure 2 (a)-(b) is a schematic diagram of the equivalent circuit of a four-port converter; Figure 3 It is a typical working mode diagram of four ports; Figure 4 (a)-(b) is a topological diagram of a separated two-port converter; Figure 5 is the equivalent diagram of a two-port transformer; Figure 6 (a)-(b) are two working mode diagrams of two two-port converters; Figure 7 It is a flow chart of the design method of resonant impedance; Figure 8 This is the impact analysis diagram of the resonant current at port 2; Fig. 9 It is the relationship diagram between the resonant impedance and the voltage stress and current stress of the resonant capacitor; Fig.10 This is the relationship between the auxiliary inductance and the secondary resonant current at different powers. DETAILED DESCRIPTION

[0020] In order to make the objects, advantages and features of the present invention more obvious, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0021] See also Figure 1 In an embodiment of the present invention, an isolated four-port DC / DC resonant converter topology is proposed, comprising: a four-winding high-frequency transformer, a three-level half-bridge port 1, a three-level half-bridge port 3, a three-level half-bridge port 4, a two-level full-bridge port 2 and a series resonant circuit corresponding to the four ports; The four-winding high-frequency transformer comprises four winding ports, and the windings of the four ports are defined as N1, N2, N3, and N4 respectively; The four ports of the converter topology are port 1, port 2, port 3, and port 4; The three-level half-bridge port in the port topology is composed of two bridge arms connected in series, each bridge arm is composed of two switch devices connected in series, the four switch devices are composed of MOSFET and anti-parallel diodes, the midpoints of the two bridge arms are connected in series through two clamping diodes, the anode of the lower clamping diode is connected to the midpoint of the lower bridge arm, the cathode of the upper clamping diode is connected to the midpoint of the upper bridge arm, the connection point of the two clamping diodes is called the midpoint of the half bridge, the port filter capacitor is composed of two capacitors connected in series, the midpoint of the capacitors connected in series is connected to the midpoint of the half bridge, and the other point of the capacitor is connected to the positive and negative ends of the port bus respectively; The two-level full-bridge port in the port topology is composed of two bridge arms in parallel, each bridge arm is composed of two switch devices connected in series, the switch devices are connected in parallel, and the eight switch devices are composed of MOSFET and anti-parallel diodes. The port filter capacitor is connected in parallel at both ends of the bridge arm, and an auxiliary inductor is connected in parallel between the midpoints of the two bridge arms. L a ; The two-level full-bridge circuit of port 2 includes a port filter capacitor C ob , Switching device Q 13 -Q 16 , auxiliary inductor L a ; Filter capacitor C ob The positive electrode and Q 13 and Q 15 The drain is connected to the filter capacitor C ob The negative electrode and Q 14 and Q 16 The source of the auxiliary inductor L a One end is connected to the midpoint of the left bridge arm, point E, and the other end is connected to the midpoint of the right bridge arm, point F; The three-level half-bridge circuit of port 1 includes a port filter capacitor C oa1 and C oa2 , Switching devices Q9-Q 12 , clamping diodes D5 and D6; filter capacitor C oa1 The positive electrode is connected to the drain of Q9, and the filter capacitor C oa1 The negative pole is connected to the midpoint D of the half bridge, and the filter capacitor C oa2 The positive electrode is connected to the midpoint D of the half bridge, and the filter capacitor C oa2 The negative electrode and Q 12 The anode of the clamping diode D5 is connected to the midpoint D of the half bridge, and the cathode of the clamping diode D5 is connected to Q 10 The drain is connected to the clamp diode D6 anode and Q 12 The drain is connected, and the cathode of the clamping diode D6 is connected to the midpoint D of the half bridge; The three-level half-bridge circuit of port 3 includes a port filter capacitor C dc1 and C dc2 , switching devices Q1-Q4, clamping diodes D1 and D2; filter capacitor C dc1 The positive electrode is connected to the drain of Q1, and the filter capacitor C dc1 The negative pole is connected to the midpoint B of the half bridge, and the filter capacitor C dc2 The positive electrode is connected to the midpoint B of the half bridge, and the filter capacitor C dc2 The negative electrode of is connected to the source of Q4; the anode of the clamping diode D1 is connected to the midpoint B of the half bridge, the cathode of the clamping diode D1 is connected to the drain of Q2, the anode of the clamping diode D2 is connected to the drain of Q4, and the cathode of the clamping diode D2 is connected to the midpoint B of the half bridge; The three-level half-bridge circuit of port 4 includes a port filter capacitor C dc3 and C dc4 , switching devices Q5-Q8, clamping diodes D3 and D4; filter capacitor C dc3 The positive electrode is connected to the drain of Q5, and the filter capacitor C dc3 The negative pole is connected to the midpoint H of the half bridge, and the filter capacitor C dc4 The positive electrode is connected to the midpoint H of the half bridge, and the filter capacitor C dc4 The negative electrode of is connected to the source of Q8; the anode of the clamping diode D3 is connected to the midpoint H of the half bridge, the cathode of the clamping diode D3 is connected to the drain of Q6, the anode of the clamping diode D4 is connected to the drain of Q8, and the cathode of the clamping diode D4 is connected to the midpoint H of the half bridge.

[0022] The series resonant circuit of port 1 consists of a resonant inductor L r1 and resonant capacitor C r1 The resonant inductor is composed of an external inductor and a leakage inductor at the transformer port; one end of the resonant inductor is connected to the midpoint C of the bridge arm, and the other end is connected to the same-name end of the transformer; one end of the resonant capacitor is connected to the midpoint D of the half bridge, and the other end is connected to the opposite-name end of the transformer port; The series resonant circuit of port 3 consists of a resonant inductor L r3 and resonant capacitor C r3 The resonant inductor is composed of an external inductor and a leakage inductor of the transformer port; one end of the resonant inductor is connected to the midpoint A of the bridge arm, and the other end is connected to the same-name end of the transformer; one end of the resonant capacitor is connected to the midpoint B of the half bridge, and the other end is connected to the opposite-name end of the transformer port; The series resonant circuit of port 4 consists of a resonant inductor L r4 and resonant capacitor C r4 The resonant inductor is composed of an external inductor and a leakage inductor of the transformer port; one end of the resonant inductor is connected to the midpoint G of the bridge arm, and the other end is connected to the same-name end of the transformer; one end of the resonant capacitor is connected to the midpoint H of the half bridge, and the other end is connected to the opposite-name end of the transformer port; The series resonant circuit of port 2 consists of a resonant inductor L r2 and resonant capacitor C r2 The resonant inductor is composed of an external inductor and a leakage inductor at the transformer port; one end of the resonant inductor is connected to the midpoint E of the left bridge arm, and the other end is connected to the same-name end of the transformer; one end of the resonant capacitor is connected to the midpoint F of the right bridge arm, and the other end is connected to the opposite-name end of the transformer port; In order to conduct further decoupling analysis, it is necessary to make an equivalent to the isolated four-port DC / DC resonant converter topology, and the switch device driving signals of the two ports are consistent, that is, u AB and u GH The square wave signal is consistent. For the excitation source of the transformer, the two ports can be regarded as one port. The three-port equivalent circuit can be further simplified to obtain the equivalent circuit of star connection. The simplified equivalent circuit is shown in Figure 2. and The equivalent resonant inductance and resonant capacitance of port 1 to port 3 are: and Port 2 is equivalent to the equivalent resonant inductance and resonant capacitance of port 3. and The resonant inductor and capacitor of port 3, are the equivalent impedances of port 1, port 2, and port 3, respectively, are the equivalent resonant currents of port 1, port 2 and port 3 respectively; ; As shown in Figure 2 (b), the superposition theorem can be used to obtain : ; are the equivalent midpoint voltages of port 1, port 2, and port 3, respectively. The resonant impedance of each resonant port is considered to be consistent during design, that is, and The expression is as follows: ; ; According to the formula It can be seen that and Not only depends on , and received and For example, when the midpoint voltage of port 1 is The resonant current of port 2 will be affected by the change, so the power of port 2 is affected by port 1. To eliminate the power coupling between port 1 and port 2, , at this time the resonant current at port 2 is only affected by and When the switching frequency is equal to the resonant frequency of port 3, the power decoupling between port 1 and port 2 can be achieved. Based on this principle, the resonant frequencies of the four ports are set equal to the switching frequency, and the power decoupling between any ports can be achieved under different power flow directions. To describe the working mode commutation process, Figure 3 As shown, taking the forward power transmission condition as an example, that is, port 3 and port 4 transmit power to port 1 and port 2, port 3 and port 4 are defined as the primary side, port 1 and port 2 are defined as the secondary side, and the modal switching process is analyzed; 1) Mode 1 ( t 0- t 2): t Before time 0, the primary side Q1, Q2, Q5, and Q6 are turned on, and the secondary side ： Q9, Q 10 , Q 14 , Q 16 The primary bridge arm midpoint voltage V AB =0.5 V 3 , the secondary bridge arm midpoint voltage V EF = 0, V CD = 0.5 V oa ; t 0 time, Q 14 Shutdown, the resonant current of port 2 i s >0,Q 13 The junction capacitance starts to 14 The junction capacitance is charged. The bridge arm midpoint voltage V EF Gradually rise to V ob After the junction capacitance is discharged, the current flows through Q 13 The anti-parallel diode (Q 13 D) and Q 16 ;exist t 1 moment, Q 13 Achieve ZVS activation. t 1- t Hold Q for 2 seconds 13 and Q 16 Conductivity; t 2 moments, Q 16 Shut down to 0, zero current shutdown, and this stage ends; 2) Mode 2 ( t 2 -t 4 ): t 2- t 4: Current of secondary port 2 is Less than 0, Q 14 The junction capacitance to Q 13 The junction capacitance is charged, and after charging is completed, the current flows through Q 14 The anti-parallel diode Q 14 D, t 3 moments, Q 14 Achieve ZVS activation; t 2- t 4: The currents of primary port 3 and port 4 flow through Q1, Q2, Q5, and Q6 respectively; t 2- t 4: Secondary port 1 current flows through Q9, Q 10 ; t At 4 o'clock, Q1, Q2, Q5, Q6 are turned off with small current; Q9, Q 10 Achieve ZCS shutdown, and this stage ends; 3) Mode 3 ( t 4 -t 6 ): t 4- t 5: The junction capacitance of Q3 and Q4 charges the junction capacitance of Q1 and Q2, and the junction capacitance of Q7 and Q8 charges the junction capacitance of Q5 and Q6. V AB From 0.5 *V 3 Change to -0.5 V 3 ; V GH From 0.5 V 4 Change to -0.5 V 4 ;Q 11 , Q 12 The junction capacitance of Q9 and Q 10 The junction capacitance is charged, V CD From 0.5 V oa Change to -0.5 V oa ; At this time, the primary port current i L3 is greater than 0, the primary current flows through Q3D and Q4D, which is t At 5 seconds, Q3 and Q4 are turned on and ready for ZVS; the secondary port 1 current i L1Less than 0, current flows through Q 11 D and Q 12 D; for t 5 Moment Q 11 , Q 12 Prepare for ZVS opening; secondary port 2 current i s Less than 0, current flows through Q 14 and Q 16 ; t 5 time, Q3, Q4, Q7, Q8 ZVS open, Q 11 , Q 12 ZVS is activated; t 5- t 6: Primary side Q3, Q4, Q7, Q8 are turned on, secondary side port 1: Q 11 , Q 12 ; Secondary port 2: Q 14 and Q 16 Conductivity; t 6 Moments, Q 16 Shut down, the stage ends; t 6 After the moment, it enters the second half cycle, and the working waveform is consistent with the first half cycle, which will not be repeated here; The soft switch optimization design method based on the proposed topology proposed in the embodiment of the present invention includes: performing time domain modeling on the isolated four-port resonant DC / DC converter based on the time domain analysis method; analyzing the influence mechanism of the resonant impedance on the soft switch of each port based on the time domain analysis model and designing its parameters; analyzing the influence mechanism of the auxiliary inductance on the soft switch of each port based on the time domain analysis model and designing its parameters; First, the converter is modeled and analyzed in the time domain. Since the ports of the four-port DC / DC converter are decoupled, the topology can be equivalent to two two-port converters when the power is transmitted forward, and the high-voltage side transmits power to the two low-voltage side ports respectively. The time domain solution is based on the two-port analysis under typical working conditions, as shown in Figure 4. The transformer and passive network of the two-port converter can be equivalent to the low-voltage side, as shown in Figure 4. Figure 5 As shown; the equivalent resonant inductance and resonant capacitance can be expressed as follows: ; Z r is the equivalent resonant impedance, Indicates the number of winding turns, represents the equivalent input voltage, Output voltage of port 2; For the first two-port converter in Figure 4 (a), continue the time domain analysis and solve: Write according to different modes; 1) Interval 1( t0- t 2): ; 2) Interval 2( t 2- t 4): ; 3) Interval 3( t 4- t 6): ; In the formula, t 0 is the starting time, t 2=(0.5-D) T s / 2, t 4=(0.5+D) T s / 2, D is the duty cycle of the secondary port 2; the simultaneous equations can be used to obtain the relationship between gain and duty cycle. This expression shows that the gain relationship is only related to the duty cycle of the secondary port 2. The voltage regulation can be achieved by adjusting the duty cycle, and the power transmission has nothing to do with the duty cycle of the port. ; According to the equivalent transformer resonant network, the input current I in With resonant current i L2 The integral relationship of is: ; ; Since the current flowing through the switch tube on the secondary side is always 0 at time t4, the resonant current is equal to the auxiliary inductor current at time t2. ; Solving the time domain equations simultaneously can solve the resonant current and resonant capacitor voltage values ​​at each moment: ; ; ; Similarly, the time domain analysis is performed on the second converter. The topology diagram and modal waveform diagram are shown in Figure 4(b) and Figure 6(b) respectively. First, the transformer port voltage at port 1 is solved, which can be expressed as: , divided into three different modes of expression as follows: ; is the resonant impedance of port 2, L r2 andC r2 They are resonant inductor and resonant capacitor respectively; Z r1 is the resonant impedance of port 1 The resonant inductance is t 0 The voltage at this moment is equal to ; The expressions of resonant current and resonant capacitor voltage can be solved as follows: Mode I ( t 0– t 2): ; Mode II ( t 2– t 4): ; Mode III ( t 4– t 6): ; In the formula, i L1 ( t 0), i L1 ( t 2) and i L1 ( t 4) is the resonant current at different times, v Cr1 ( t 0), v Cr1 ( t 2) and v Cr1 ( t 4) The resonant capacitor voltage at different times, V E1 , V E2 and V E3 The expression is as follows: ; According to the relationship between the output current and the resonant capacitor voltage, the output current can be derived as I oa and V Cr1 ( t 0) P oa Rated power of port 1 Due to the symmetry of the circuit, i L1(t0) is equal to 0, and the exact numerical solution in the time domain is as follows: ; ; Secondly, based on the time domain analysis model, the influence mechanism of resonant impedance on the soft switching of each port is analyzed and its parameters are designed; according to the numerical expression of the time domain analysis results, the resonant current expression and the influence of resonant impedance on it are analyzed.

[0023] First, observe the resonant current flowing through the switching device at port 2. i s The expression of , analyzing the influence of resonant impedance on it, formula (23) shows that only i s ( t 6 )and Z r related; therefore, in ( t 4 - t 6 ) time, Z r Will affect the resonant current i s , thus affecting the bridge arm lower tube Q 14 exist t 5 Similarly, according to formula (24), the zero voltage turn-on of all switches at port 1 receives the resonant impedance Z r1 The impact of ; ; According to formula (24), from P ob , Z r , L a , V ob Four dimensions analyze the impact mechanism of port 2 achieving ZVS, such as Figure 8 As shown; it can be seen that the power of port 2 P ob and Z r right t 4 - t 6 The slope over time has a greater impact. L a and V obThe slope is less affected. Since the influence of power and output voltage on soft switching can be limited by input parameters, only the resonant impedance is designed here to optimize the zero voltage turn-on performance of port 2. In addition, in order to achieve zero voltage turn-on, the realization conditions of the port still need to be analyzed. When the lower tube of port 2 realizes ZVS, the following equation must be satisfied. Similarly, the soft switching conditions of port 1 are as follows: ; ; In the formula C oss is the parasitic capacitance of the switching device, T d is the dead time of the switching device, V ds is the voltage across the switch device; combining equations (24)-(26) can be solved to obtain the expression of the minimum impedance lower limit as shown in (27): ; Z r1min is the minimum impedance of port 1, Z rmin is the minimum value of the total impedance equivalent to port 2; then Z r1min Equivalent to port 2, we get Z r12min ,Compare Z r12min and Z rmin , select the maximum value of the two as the minimum value of the total impedance; ; In order to further determine the upper limit of the resonant impedance, the voltage stress and current stress of the resonant capacitor are introduced as constraints to select a suitable impedance range. At this time, the total resonant impedance is still calculated according to the resonant impedance equivalent to port 2, and the current stress and voltage stress on the resonant capacitor equivalent to port 2 are calculated. According to the working mode of the converter, when the resonant current passes through 0, the resonant capacitor voltage is the maximum. The stress of the capacitor voltage can be obtained from formula (11) as follows: ; Similarly, by combining equations (13)-(15), the effective value of the resonant current at port 2 can be calculated and plotted as Fig. 9 The curve shown in the figure shows the relationship between the resonant impedance and the voltage stress and current stress of the resonant capacitor. Increasing Zr will lead to higher voltage stress and lower current stress, and the current stress changes less with impedance. The maximum value of the resonant impedance Z rmax Depends on the resonant capacitor voltage stress V Crrms_max; ; According to the maximum and minimum values ​​of the resonant impedance calculated above, they are substituted into the expression of the effective value of the resonant current, the maximum difference of the current stress is confirmed, and it is judged whether the difference is less than the threshold. If the condition is met, it is considered that the impedance range is appropriate. If not, the input parameters are readjusted and recalculated. The entire resonant impedance design process is as follows: Figure 7 As shown; Finally, based on the time domain analysis model, the influence mechanism of the auxiliary inductance on the soft switching of each port is analyzed and its parameters are designed; since the auxiliary inductance is connected in parallel at the midpoint of the bridge arm of port 2, according to the power transmission direction, when the power is transmitted from the primary side to the secondary side, the influence of the auxiliary inductance on the soft switching of ports 3, 4 and 2 is mainly analyzed; the conditions for achieving zero voltage switching of ports 3 and 2 are analyzed, and the conditions for port 3 are: t 0 - t 1 The absolute value of the average value of the resonant current is greater than the discharge current required by the junction capacitance within the interval. I L3 ( t 0- t 1)| > I charge1 ; The conditions for port 2 are: t 4 - t 5 The absolute value of the average value of the resonant current is greater than the discharge current required by the junction capacitance within the interval. I s ( t 4- t 5)| > I charge2 ; For the resonant current at port 2, Figure 8 It has been analyzed that the auxiliary inductance has little effect on it. In addition, Fig. 9 The auxiliary inductor is shown in Figure 2 for the resonant current of port 2 at different power levels at the turn-on time. i s ( t 5 ), the auxiliary inductance has little effect on the current when it is greater than 10μH; however, the auxiliary inductance has a small effect on the soft switching of port 2. t 4 The resonant current i s Clamping to 0 lays the foundation for the subsequent zero voltage turn-on, and at the same time realizes the zero current turn-off of the upper tube of the bridge arm; The resonant currents of port 3 and port 4 are equal. Here we only analyze the zero voltage turn-on realization mechanism of port 3. The principle of port 4 is the same. The resonant current of port 3 can be obtained by the superposition theorem, as shown in formula (31); t 0 and t 1 The current value at this moment is as shown in formula (32)-(33); the judgment condition 1 (34) can be calculated. By calculating the judgment condition 1, the maximum value of the auxiliary inductance can be obtained. L amax1 Expression (35); at the same time, when the judgment condition 2 is met, i L3 ( t 1)<0, the maximum value of auxiliary inductance can be obtained L amax2 The expression (36) of ; According to the maximum value of the two, the intersection of the two ranges is taken as the final calculated auxiliary inductance range, as shown in formula (37); ; ; ; ; (35); (36); ; After the above analysis and design, the four ports of the converter can all achieve zero voltage switching, without the need for complex modulation and control strategies, and only the optimization design of soft switching is performed from the hardware design; It should be noted that any process or method description in the embodiments may be understood as representing a module, fragment or portion of a code including one or more executable instructions for implementing steps of a specific logical function or process, and that the scope of the preferred embodiments of the present invention includes alternative implementations in which the functions may not be performed in the order shown or discussed, including performing the functions in a substantially simultaneous manner or in the reverse order according to the functions involved, which should be understood by those skilled in the art to which the embodiments of the present invention belong.

[0024] It should be noted that the logic and / or steps in the embodiments, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any computer-readable medium for use by an instruction execution system, device or equipment (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or equipment and execute instructions), or in combination with these instruction execution systems, devices or equipment. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or equipment, or in combination with these instruction execution systems, devices or equipment. More specific examples of computer-readable media (non-exhaustive list) include the following: an electrical connection with one or more wirings (electronic device), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways if necessary, and then stored in a computer memory.

[0025] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0026] A person skilled in the art may understand that all or part of the steps of implementing the above-mentioned embodiment method may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one of the steps of the method embodiment or a combination thereof.

[0027] In addition, each functional module in the embodiment of the present invention may be integrated into a processing module, or each module may exist physically separately, or two or more modules may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0028] The storage medium mentioned above can be a read-only memory, a magnetic disk or an optical disk, etc.

[0029] The above embodiments describe the technical solutions of the present invention in detail. Obviously, the present invention is not limited to the described embodiments. Based on the embodiments of the present invention, people familiar with the technical field can also make various changes accordingly, but any changes that are equivalent or similar to the present invention belong to the scope of protection of the present invention.

[0030] The contents not described in detail in this specification belong to the prior art known to professional and technical personnel in this field.

Claims

1. A four-port resonant converter topology, characterized in that: include: A four-winding high-frequency transformer, a two-level full-bridge circuit or a three-level half-bridge circuit corresponding to the four ports, and a series resonant circuit corresponding to the four ports; The four-winding high-frequency transformer comprises four winding ports, and the winding definitions of the four ports are respectively N1, N2, N3, and N4; the four ports of the converter topology are respectively port 1, port 2, port 3, and port 4; The port 1, the port 3 and the port 4 adopt a three-level half-bridge circuit, which is composed of two bridge arms connected in series, each bridge arm is composed of two switch devices connected in series, the four switch devices are composed of MOSFET and anti-parallel diodes, the midpoints of the two bridge arms are connected in series through two clamping diodes, the anode of the clamping diode is connected to the midpoint of the lower bridge arm, the cathode of the clamping diode is connected to the midpoint of the upper bridge arm, the connection point of the two clamping diodes is called the midpoint of the half bridge, the port filter capacitor is composed of two capacitors connected in series, the midpoint of the capacitors connected in series is connected to the midpoint of the half bridge, and the other point of the capacitor is connected to the positive and negative ends of the port bus respectively; The port 2 adopts a two-level full-bridge circuit, which is composed of two bridge arms in parallel. Each bridge arm is composed of two switching devices in series. The switching devices adopt a two-tube parallel connection method. The 8 switching devices are composed of MOSFETs and anti-parallel diodes. The port filter capacitor is connected in parallel at both ends of the bridge arm, and an auxiliary inductor is connected in parallel between the midpoints of the two bridge arms.

2. The four-port resonant converter topology according to claim 1, characterized in that: The series resonant circuits of the three-level half-bridge ports are composed of resonant inductors and resonant capacitors, and the resonant inductors are composed of external inductors and transformer port leakage inductors; One end of the resonant inductor is connected to the midpoint of the bridge arm, and the other end is connected to the same-name end of the transformer. One end of the resonant capacitor is connected to the midpoint of the half bridge, and the other end is connected to the opposite-name end of the transformer port. The series resonant circuits of the two-level full-bridge ports are composed of resonant inductors and resonant capacitors, and the resonant inductors are composed of external inductors and transformer port leakage inductors; One end of the resonant inductor is connected to the midpoint of the left bridge arm, and the other end is connected to the same-name terminal of the transformer. One end of the resonant capacitor is connected to the midpoint of the right bridge arm, and the other end is connected to the opposite-name terminal of the transformer port.

3. The four-port resonant converter topology according to claim 1, characterized in that: The port 1 is a three-level half-bridge circuit, the port 3 is a three-level half-bridge circuit, the port 4 is a three-level half-bridge circuit, and the port 2 is a two-level full-bridge circuit; The series resonant circuits corresponding to the four ports are connected through a four-winding transformer.

4. The four-port resonant converter topology according to claim 1, characterized in that: It adopts pulse width modulation method with fundamental wave synchronization.

5. An electronic device, characterized in that: The invention comprises the four-port resonant converter topology described in any of claims 1 to 4.

6. A method for soft switching optimization design of converter topology, based on the four-port resonant converter topology described in any of claims 1-4, characterized in that: The steps include: Based on the time domain analysis method, the isolated four-port resonant DC / DC converter is modeled in the time domain; Based on the time domain analysis model, the influence mechanism of resonant impedance on the soft switching of each port is analyzed and its parameters are designed; Based on the time domain analysis model, the influence mechanism of auxiliary inductance on the soft switching of each port is analyzed and its parameters are designed.

7. The soft switch optimization design method according to claim 6, characterized in that: The time domain modeling of the isolated four-port resonant DC / DC converter based on the time domain analysis method specifically includes the following steps: Port 3 and port 4 of the four-port converter are equivalent to one port for analysis, and the four-port converter is further equivalent to a three-port converter for analysis; When the conditions for power decoupling between ports are met, the three-port converter is equivalent to two two-port converters for time domain analysis; Solve the time domain expressions and numerical solutions for port 1 and port 2, and the time domain expressions and numerical solutions for port 3.

8. The soft switch optimization design method according to claim 6, characterized in that: The method of analyzing the influence mechanism of the resonant impedance on the soft switch of each port based on the time domain analysis model and designing its parameters specifically includes: Based on the time domain analysis model, the conditions for achieving zero voltage switching of ports 1 and 2 are analyzed, and then the factors affecting the soft switching of ports 1 and 2 by resonant impedance are analyzed. The initial conditions of input power and output voltage are calculated to obtain the minimum value of the total impedance equivalent to port 2. Z rmin and the minimum resonant impedance of port 1 Z r1min , the minimum resonant impedance of port 1 is equivalent to that of port 2 Z r12min ,Will Z rmin and Z r12min Compare and select the larger parameter as the minimum value of total impedance Z rmin ; Based on the time domain analysis model, the influence of the change of resonant impedance on the current stress and voltage stress of the resonant capacitor is quantitatively analyzed, and then the upper limit of the resonant impedance equivalent to port 2 is obtained according to the voltage stress of the resonant capacitor. Z rmax ; Based on the calculated total impedance range Z rmin < Z r < Z rmax , substituted into the current stress expression of the resonant capacitor, the range of current stress is obtained; In order to reduce the current stress, it is determined whether the difference in current stress is less than the current threshold, and if the condition is met, the final resonant impedance range is output.

9. The soft switch optimization design method according to claim 6, characterized in that: The method of analyzing the influence mechanism of the auxiliary inductor on the soft switching of each port based on the time domain analysis model and designing its parameters specifically includes: Based on the time domain analysis model, the conditions for achieving zero voltage switching of ports 3, 4 and 2 are analyzed, and then the influencing factors of auxiliary inductance on the soft switching of ports 3, 4 and 2 are analyzed; In view of the soft switching effect of port 3 and port 4, the upper limit of auxiliary inductance required to meet the charging and discharging conditions of the junction capacitance of the switching device during the dead time is calculated. L amax1 , when the current through the switch device of port 3 is less than 0 at the time of opening, calculate the upper limit of the auxiliary inductance required L amax2 ; According to the two calculated upper limits of the auxiliary inductance, the intersection of the two ranges is taken as the upper limit of the auxiliary inductance. L amax .

10. A soft switch optimization design device, characterized in that: include: The first module is used to perform time domain modeling of an isolated four-port resonant DC / DC converter based on a time domain analysis method; The second module is used to analyze the influence mechanism of resonant impedance on the soft switch of each port based on the time domain analysis model and design its parameters; The third module is used to analyze the influence mechanism of the auxiliary inductor on the soft switching of each port based on the time domain analysis model and design its parameters.

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