Double-layer silicon-based accelerometer and manufacturing method thereof

Abstract

The present invention provides a double-layer silicon-based accelerometer and a manufacturing method thereof. The manufacturing method of the double-layer silicon-based accelerometer comprises: a first step and a second step, wherein the first step comprises: forming a silicon dioxide bonding layer on the surface of a fixed support layer of a first substrate; patterning the silicon dioxide bonding layer; etching the pattern formed by the silicon dioxide bonding layer to form a bonding anchor point, and the second step comprises: based on the bonding anchor point, bonding the silicon dioxide bonding layer of the first substrate to the functional layer of the second substrate to form a double-layer structure; thinning the functional layer; patterning and etching the thinned functional layer to obtain a double-layer silicon-based accelerometer structure; surface treating the double-layer silicon-based accelerometer structure to form an electrode layer on the surface of the double-layer silicon-based accelerometer structure, wherein the first substrate and the second substrate are silicon wafers, and the fixed support layer and the functional layer are silicon layers.

Description

Technical Field

[0001] The present invention relates to the field of sensors, and more particularly to a double-layer silicon-based accelerometer and a manufacturing method thereof. Background Art

[0002] Silicon accelerometers are sensors that use MEMS processing technology to convert input acceleration into proportional output (usually electrical parameters). The basic structure of a capacitive MEMS accelerometer is a capacitor composed of a mass block and a fixed electrode. When the mass block is displaced by acceleration, the plate area or spacing of the capacitor will change, thereby measuring the acceleration by measuring the capacitance. Capacitive MEMS accelerometers have been widely used in instrument measurement, wireless communications, energy and environment, biomedicine, military defense, aerospace, automotive electronics, consumer electronics and other fields.

[0003] Based on different application scenarios and requirements, silicon accelerometers have different structures and process flows, but most of them have problems such as poor full-temperature performance and complex processing flows, which seriously affect the product performance and processing cycle of silicon accelerometers. Summary of the invention

[0004] In order to solve the above problems, the present invention provides a double-layer silicon-based accelerometer and a manufacturing method thereof.

[0005] According to one aspect of the present invention, a method for manufacturing a double-layer silicon-based accelerometer is provided, comprising a first step and a second step, wherein the first step comprises: forming a silicon dioxide bonding layer on the surface of a fixed support layer of a first substrate; patterning the silicon dioxide bonding layer; etching the pattern formed by the silicon dioxide bonding layer to form a bonding anchor point, and the second step comprises: based on the bonding anchor point, bonding the silicon dioxide bonding layer of the first substrate to the functional layer of the second substrate to form a double-layer structure; thinning the functional layer; patterning and etching the thinned functional layer to obtain a double-layer silicon-based accelerometer structure; surface treating the double-layer silicon-based accelerometer structure, and forming an electrode layer on the surface of the double-layer silicon-based accelerometer structure, wherein the first substrate and the second substrate are silicon wafers, and the fixed support layer and the functional layer are silicon layers.

[0006] Furthermore, a silicon dioxide bonding layer is formed on the surface of the anchor layer through thermal oxidation or PECVD process.

[0007] Furthermore, the pattern formed by the silicon dioxide bonding layer is etched by dry etching or wet etching process.

[0008] Furthermore, the surface treatment includes sputtering or evaporation.

[0009] Furthermore, an electrode layer is formed on the surface of the double-layer silicon-based accelerometer structure by completely covering or partially covering.

[0010] According to another aspect of the present invention, a method for manufacturing a double-layer silicon-based accelerometer is provided, comprising a first step and a second step, wherein the first step comprises: forming a silicon dioxide bonding layer on the surface of a fixed support layer of a first substrate; patterning the silicon dioxide bonding layer; etching the pattern formed by the silicon dioxide bonding layer to form a bonding anchor point, and the second step comprises: patterning and etching the functional layer of the second substrate to form a silicon-based accelerometer structure; based on the bonding anchor point, silicon-silicon bonding the silicon dioxide bonding layer of the first substrate and the silicon-based accelerometer structure of the second substrate to form a double-layer structure; removing the base layer silicon and the silicon dioxide buried oxide layer contained in the second substrate to form a double-layer silicon-based accelerometer structure; surface treating the double-layer silicon-based accelerometer structure to form an electrode layer on the surface of the double-layer silicon-based accelerometer structure, wherein the first substrate is a silicon wafer, the second substrate is an SOI wafer, and the fixed support layer and the functional layer are silicon layers.

[0011] Furthermore, a silicon dioxide bonding layer is formed on the surface of the anchor layer through thermal oxidation or PECVD process.

[0012] Furthermore, the pattern formed by the silicon dioxide bonding layer is etched by dry etching or wet etching process.

[0013] Furthermore, the surface treatment includes sputtering or evaporation.

[0014] According to another aspect of the present invention, there is provided a double-layer silicon-based accelerometer manufactured according to the above method for manufacturing the double-layer silicon-based accelerometer.

[0015] According to the present invention, by forming a fixed support layer with a cavity anchor point, a silicon dioxide bonding layer, a low-resistance silicon functional layer with comb teeth, and an electrode layer for electrical connection, the process flow is simplified, the cost is reduced, and the production cycle is shortened while ensuring the performance of the silicon accelerometer. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a schematic diagram showing the structure of a double-layer silicon-based accelerometer according to an embodiment of the present invention.

[0017] Figure 2 is a flow chart showing a method for manufacturing a double-layer silicon-based accelerometer according to an embodiment of the present invention.

[0018] Figure 3 is a flow chart showing a method for manufacturing a double-layer silicon-based accelerometer according to another embodiment of the present invention. DETAILED DESCRIPTION

[0019] Embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0020] Figure 1 is a schematic diagram showing the structure of a double-layer silicon-based accelerometer according to an embodiment of the present invention.

[0021] Reference Figure 1 The structure of the double-layer silicon-based accelerometer includes a fixed support layer 1, a silicon dioxide bonding layer 3, a bonding anchor point 4, a functional layer 5, an accelerometer structure 6, and an electrode layer 7.

[0022] Optionally, the double-layer silicon-based accelerometer may further include scribe lines and alignment marks 2 , but the scribe lines and alignment marks 2 are only used for alignment purposes and may be omitted.

[0023] Figure 2 is a flow chart showing a method for manufacturing a double-layer silicon-based accelerometer according to an embodiment of the present invention.

[0024] Reference Figure 2 Combined with Figure 1 , the manufacturing method of the double-layer silicon-based accelerometer comprises steps (a)-(h).

[0025] In the embodiment, step (a) represents making scribe lines and alignment marks 2 on the back side of the anchor layer 1 of the first substrate. It should be noted that step (a) is for the purpose of alignment.

[0026] In an embodiment, the first substrate may be a silicon wafer, and the fixed support layer 1 may be a silicon layer. Preferably, the first substrate may be a double-patterned low-resistance silicon wafer.

[0027] In an embodiment, step (b) may include preparing a silicon dioxide bonding layer 3 on the surface of the anchor layer 1, wherein the silicon dioxide bonding layer 3 may be prepared by using a process such as thermal oxidation or PECVD, and the present invention is not particularly limited thereto.

[0028] Thermal oxidation is a process that forms a thin film of silicon oxide on the surface of a silicon substrate. When the silicon wafer is heated, silicon reacts with oxygen or water vapor to form a silicon dioxide film.

[0029] PECVD is a process for forming a silicon oxide film on the surface of a silicon substrate. By using precursors such as silane and silicon dioxide gas, under the action of plasma, the silicon and oxygen in the precursor gas react chemically on the surface of the substrate to form a silicon dioxide film.

[0030] In an embodiment, step (c) may include patterning the silicon dioxide bonding layer 3 , wherein the patterning may include processes such as exposure and development.

[0031] Exposure is a process of exposing a photoresist (photosensitive material) to a light source. At this stage, the photoresist is coated on the surface of the silicon wafer, and then a specific pattern is transferred to the photoresist through a mask. The main steps of exposure include: coating: evenly coating the photoresist on the surface of the silicon wafer; alignment: using a mask to align the surface of the photoresist to ensure that the pattern can be transferred correctly; irradiation: irradiating the photoresist with ultraviolet light or other suitable light sources.

[0032] Development is the chemical treatment of the exposed photoresist to remove the unexposed or exposed parts to form the final pattern. The development process includes: immersion or spraying: immersing the silicon wafer in the developer, or spraying the developer on the surface of the silicon wafer; removing the photoresist: the developer will selectively remove the photoresist, usually removing the unexposed area (for positive photoresist) or the exposed area (for negative photoresist); cleaning and drying: after development, the residual developer and photoresist need to be removed through cleaning and drying steps.

[0033] In an embodiment, step (d) may include preparing bonding anchor points 4 according to the pattern of the silicon dioxide bonding layer 3 , wherein the bonding anchor points 4 may be prepared by dry etching or wet etching.

[0034] Dry etching is a process that uses gas phase reactions to remove materials, which usually includes the following steps: gas introduction: introducing specific gases (such as hydrogen fluoride, chloride, etc.) into the etching chamber; plasma generation: exciting the gas through radio frequency (RF) or microwaves to generate plasma. The active particles in the plasma can react with the material to be etched; reaction and removal: the particles in the plasma react with the surface of the material to form volatile by-products, which are then extracted to achieve material removal.

[0035] Wet etching is a process that uses liquid chemical solutions to remove materials, which usually includes the following steps: Solution selection: Select a suitable etching solution (such as hydrofluoric acid, sulfuric acid, sodium hydroxide, etc.) according to the type of material that needs to be removed; Soak or spray: Immerse the silicon wafer in the etching solution, or spray the etching solution on the surface of the material in a spray manner; Reaction: The etching solution reacts chemically with the surface of the material to form soluble by-products, and the material is removed; Rinse and dry: After etching is completed, use deionized water to rinse the silicon wafer to remove residual etching solution, and finally dry it.

[0036] Since the silicon dioxide bonding layer 3 is patterned and then etched, the formed bonding anchor point 4 can be a cavity anchor point.

[0037] In an embodiment, step (e) may include performing silicon-silicon bonding of the functional layer 5 of the second substrate and the silicon dioxide bonding layer 3 of the first substrate based on the bonding anchor points 4 , thereby forming a double-layer structure.

[0038] In the embodiment, the second substrate may be a silicon wafer, and the functional layer 5 may be a silicon layer. Preferably, the second substrate may be a double-patterned low-resistance silicon wafer.

[0039] In an embodiment, step (f) may include thinning and grinding the functional layer 5 included in the double-layer structure to obtain a predetermined thickness, wherein the thinning and grinding may be achieved by a CMP process.

[0040] CMP is a process used to flatten the surface of a wafer. It mainly includes: applying a polishing slurry containing chemicals and abrasives to the surface of the wafer; applying pressure to the wafer through a polishing disk, and rotating the wafer at the same time to make the polishing slurry fully contact with the wafer surface. The abrasive will physically grind the wafer surface, while the chemical components help remove the material; after polishing, the wafer needs to be cleaned to remove the residual polishing slurry and the waste generated.

[0041] In an embodiment, step (g) may include patterning and etching the thinned functional layer 5 , so as to obtain a double-layer silicon-based accelerometer structure.

[0042] The patterning and etching processes are described above with reference to steps (c) and (d), and step (g) will not be described in detail herein.

[0043] In particular, in step (g), a deep silicon etching process may be used.

[0044] Deep silicon etching usually uses dry etching technology, among which reactive ion etching or deep reactive ion etching is the most commonly used.

[0045] In an embodiment, step (h) may include performing surface treatment on the double-layer silicon-based accelerometer structure to obtain the electrode layer 7 , wherein the surface treatment includes a sputtering or evaporation process (metal coating).

[0046] Although Figure 1 and Figure 2 It is shown that the electrode layer 7 partially covers the surface of the double-layer silicon-based accelerometer structure, but the present invention is not limited to this. The electrode layer 7 can also completely cover the surface of the double-layer silicon-based accelerometer structure. The complete coverage or partial coverage can be adjusted as needed.

[0047] In particular, when the electrode layer 7 needs to partially cover the surface of the double-layer silicon-based accelerometer structure, this can be achieved by patterning a hard mask.

[0048] Through the above reference Figure 2The process described in steps (a)-(h) forms a fixed support layer 1 with a cavity anchor 4, a silicon dioxide bonding layer 3, a low-resistance silicon functional layer 5 with comb teeth, and an electrode layer 7 for electrical connection. On the basis of ensuring the performance of the silicon accelerometer, the process flow is simplified, the cost is reduced, and the production cycle is shortened.

[0049] Figure 3 is a flow chart showing a method for manufacturing a double-layer silicon-based accelerometer according to another embodiment of the present invention.

[0050] Reference Figure 3 Combined with Figure 1 , the manufacturing method of the double-layer silicon-based accelerometer comprises steps (a)-(j).

[0051] In the embodiment, step (a) represents making scribe lines and alignment marks 2 on the back side of the anchor layer 1 of the first substrate. It should be noted that step (a) is for the purpose of alignment.

[0052] In an embodiment, the first substrate may be a silicon wafer, and the fixed support layer 1 may be a silicon layer. Preferably, the first substrate may be a double-patterned low-resistance silicon wafer.

[0053] In an embodiment, step (b) may include preparing a silicon dioxide bonding layer 3 on the surface of the anchor layer 1, wherein the silicon dioxide bonding layer 3 may be prepared by using a process such as thermal oxidation or PECVD, and the present invention is not particularly limited thereto.

[0054] In an embodiment, step (c) may include patterning the silicon dioxide bonding layer 3 , wherein the patterning may include processes such as exposure and development.

[0055] In an embodiment, step (d) may include preparing bonding anchor points 4 according to the pattern of the silicon dioxide bonding layer 3 , wherein the bonding anchor points 4 may be prepared by dry etching or wet etching.

[0056] Since the silicon dioxide bonding layer 3 is patterned and then etched, the formed bonding anchor point 4 can be a cavity anchor point.

[0057] Although Figure 3 Step (e) is shown in FIG. 1 and represents making the alignment mark 11 on the second substrate 8 , but according to the present invention, step (a) or (e) may be omitted.

[0058] According to the present invention, the second substrate 8 may be an SOI wafer (also known as “silicon on insulator”) wafer.

[0059] According to the present invention, when the second substrate 8 is an SOI wafer, the second substrate 8 comprises a three-layer structure, from bottom to surface, respectively comprising a bottom base layer silicon 9, a middle silicon dioxide buried oxide layer 10 and a surface silicon layer (functional layer) 5. The following description assumes that the second substrate 8 is an SOI wafer.

[0060] In an embodiment, step (f) may include fabricating the accelerometer structure 6 on the SOI wafer 8 .

[0061] The silicon-based accelerometer structure 6 can be formed by patterning and etching the functional layer 5 of the SOI wafer 8 .

[0062] In an embodiment, step (g) may include performing silicon-silicon bonding on the accelerometer structure 6 obtained in step (f) and the silicon dioxide bonding layer 3 formed in step (d) to form a double-layer structure.

[0063] In an embodiment, step (h) may include removing the base layer silicon 9 included in the SOI wafer 8 , wherein the removal may be performed by a grinding or polishing or deep silicon etching process.

[0064] In particular, polishing may include a CMP process.

[0065] In an embodiment, step (i) may include removing the silicon dioxide buried oxide layer 10 included in the SOI wafer 8, thereby obtaining a double-layer silicon-based accelerometer structure, wherein the removal of the silicon dioxide buried oxide layer 10 may be accomplished by wet etching or VHF process.

[0066] In an embodiment, step (j) may include performing surface treatment on the double-layer silicon-based accelerometer structure to obtain the electrode layer 7 , wherein the surface treatment includes a sputtering or evaporation process (metal coating).

[0067] Although Figure 1 and Figure 3 It is shown that the electrode layer 7 partially covers the surface of the double-layer silicon-based accelerometer structure, but the present invention is not limited to this. The electrode layer 7 can also completely cover the surface of the double-layer silicon-based accelerometer structure. The complete coverage or partial coverage can be adjusted as needed.

[0068] In particular, when the electrode layer 7 needs to partially cover the surface of the double-layer silicon-based accelerometer structure, this can be achieved by patterning a hard mask.

[0069] In particular, Figure 3 Although step (f) is shown to be performed after steps (a) to (e), the present invention is not limited thereto, and step (f) may also be performed first, that is, the accelerometer structure 6 is prepared on the second substrate 8 in advance.

[0070] Through the above reference Figure 3The process described in steps (a)-(j) in the embodiment of the present invention forms a fixed support layer 1 with a cavity anchor point 4, a silicon dioxide bonding layer 3, a low-resistance silicon functional layer 5 with comb teeth, and an electrode layer 7 for electrical connection. On the basis of ensuring the performance of the silicon accelerometer, the process flow is simplified, the cost is reduced, and the production cycle is shortened.

[0071] Therefore, according to the present invention, a double-layer accelerometer is manufactured by silicon-silicon bonding and metal plating, and the accelerometer function is realized by gold wire bonding, bonding, and packaging into a tube shell. This method has a simple process flow, a small size of the accelerometer, a shortened production cycle, and a concise solution.

[0072] This specification includes many details of specific embodiments, but it should be understood that these details do not limit any inventive concepts or what is claimed in the specification, but rather describe features of some exemplary embodiments.

[0073] Features described in the specification in the context of each exemplary embodiment may be implemented as a combination in one or more single exemplary embodiments. Conversely, various features described in the specification in the context of a single exemplary embodiment may be implemented as multiple exemplary embodiments individually or in appropriate sub-combinations.

[0074] Furthermore, features may be operated in a particular combination and may initially be described as claimed in the combination, but in certain cases one or more features may be excluded from the claimed combination and the claimed combination may be changed into a sub-combination or a modification of the sub-combination.

[0075] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that the operations be performed in a particular order or sequentially to achieve desirable results, nor should it be understood as requiring that all operations be performed.

[0076] While the inventive concept has been described in conjunction with what are presently considered to be practical exemplary embodiments, it should be understood that the inventive concept is not limited to such exemplary embodiments. Rather, the inventive concept is intended to cover various modifications and equivalent arrangements within the spirit and scope of the appended claims.

Claims

1. A method for manufacturing a double-layer silicon-based accelerometer, characterized in that: It includes a first step and a second step, wherein: The first step includes: forming a silicon dioxide bonding layer on the surface of the fixed support layer of the first substrate; Patterning the silicon dioxide bonding layer; The pattern formed by the silicon dioxide bonding layer is etched to form a bonding anchor point, The second step comprises: Based on the bonding anchor points, the silicon dioxide bonding layer of the first substrate is bonded to the functional layer silicon-silicon of the second substrate to form a double-layer structure; Thinning the functional layer; Patterning and etching the thinned functional layer to obtain a double-layer silicon-based accelerometer structure; The double-layer silicon-based accelerometer structure is subjected to surface treatment to form an electrode layer on the surface of the double-layer silicon-based accelerometer structure. Wherein, the first substrate and the second substrate are silicon wafers, and the fixed support layer and the functional layer are silicon layers.

2. The method for manufacturing a double-layer silicon-based accelerometer according to claim 1, characterized in that: The silicon dioxide bonding layer is formed on the surface of the anchor layer by thermal oxidation or PECVD process.

3. The method for manufacturing a double-layer silicon-based accelerometer according to claim 1, characterized in that: The pattern formed by the silicon dioxide bonding layer is etched by dry etching or wet etching process.

4. The method for manufacturing a double-layer silicon-based accelerometer according to claim 1, characterized in that: The surface treatment includes sputtering or evaporation.

5. The method for manufacturing a double-layer silicon-based accelerometer according to claim 4, characterized in that: An electrode layer is formed on the surface of the double-layer silicon-based accelerometer structure by completely covering or partially covering.

6. A method for manufacturing a double-layer silicon-based accelerometer, characterized in that: It includes a first step and a second step, wherein: The first step includes: forming a silicon dioxide bonding layer on the surface of the fixed support layer of the first substrate; Patterning the silicon dioxide bonding layer; The pattern formed by the silicon dioxide bonding layer is etched to form a bonding anchor point, The second step comprises: Patterning and etching the functional layer of the second substrate to form a silicon-based accelerometer structure; Based on the bonding anchor point, the silicon dioxide bonding layer of the first substrate is silicon-bonded to the silicon-based accelerometer structure of the second substrate to form a double-layer structure; removing the base layer silicon and the silicon dioxide buried oxide layer contained in the second substrate to form a double-layer silicon-based accelerometer structure; The double-layer silicon-based accelerometer structure is subjected to surface treatment to form an electrode layer on the surface of the double-layer silicon-based accelerometer structure. The first substrate is a silicon wafer, the second substrate is an SOI wafer, and the fixed support layer and the functional layer are silicon layers.

7. The method for manufacturing a double-layer silicon-based accelerometer according to claim 6, characterized in that: The silicon dioxide bonding layer is formed on the surface of the anchor layer by thermal oxidation or PECVD process.

8. The method for manufacturing a double-layer silicon-based accelerometer according to claim 6, characterized in that: The pattern formed by the silicon dioxide bonding layer is etched by dry etching or wet etching process.

9. The method for manufacturing a double-layer silicon-based accelerometer according to claim 6, characterized in that: The surface treatment includes sputtering or evaporation.

10. A double-layer silicon-based accelerometer, characterized in that: The double-layer silicon-based accelerometer is manufactured according to the method for manufacturing a double-layer silicon-based accelerometer according to any one of claims 1 to 9.

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