Failure diagnosis method of semiconductor device

Abstract

The invention discloses a failure diagnosis method for a semiconductor device, and the method comprises the steps: obtaining an initial drain-source current parameter of a to-be-diagnosed semiconductor device, and determining the abnormal condition of an oxide layer of the semiconductor device according to the initial drain-source current parameter; after the semiconductor device with the abnormal condition stands for a preset duration, obtaining a current drain-source current parameter of the semiconductor device, and determining a movable charge parameter of an oxide layer of the semiconductor device according to the initial drain-source current parameter and the current drain-source current parameter; acquiring drain-source current of the semiconductor device, and determining trap charge parameters of a gate-oxide structure of the semiconductor device according to the drain-source current; and diagnosing the failure reason of the semiconductor device according to the movable charge parameter and the trapped charge parameter. According to the embodiment of the invention, the change trend of the drain-source current of the device under different conditions can be observed by means of common static test equipment, and the failure reason of the device is checked and determined.

Description

Technical Field

[0001] The present application belongs to the technical field of semiconductor device detection, and in particular, relates to a failure diagnosis method for semiconductor devices. Background Art

[0002] As the application field of semiconductor devices continues to expand, their reliability has received more and more attention. Among them, leakage is one of the important indicators of reliability evaluation, and it is necessary to further analyze it and carry out failure analysis to improve subsequent products.

[0003] Related technologies use thermal imaging equipment or micro-light microscopes to locate defects, and use focused ion beams to obtain structural defects of devices to assist in fault analysis. However, when the leakage level is smaller than the application range of the above equipment, the cause of failure of semiconductor devices cannot be accurately diagnosed. Summary of the invention

[0004] An embodiment of the present application provides a failure diagnosis method for a semiconductor device, which can observe the drain-source current of the semiconductor device under different conditions with the help of ordinary static test equipment, so as to determine the cause of failure according to the change trend of the drain-source current of the semiconductor device.

[0005] The present application provides a method for diagnosing a semiconductor device failure, including: Obtaining initial drain-source current parameters of the semiconductor device to be diagnosed, and determining the abnormality of the oxide layer of the semiconductor device according to the initial drain-source current parameters; After the semiconductor device with abnormal condition is left to stand for a preset period of time, a current drain-source current parameter of the semiconductor device is obtained, and a movable charge parameter of an oxide layer of the semiconductor device is determined according to the initial drain-source current parameter and the current drain-source current parameter; Obtaining a drain-source current of a semiconductor device, and determining a trap charge parameter of a gate oxide structure of the semiconductor device according to the drain-source current; Diagnose the failure cause of semiconductor devices based on the movable charge parameters and trapped charge parameters.

[0006] In some optional embodiments, obtaining a drain-source current of a semiconductor device, and determining a trap charge parameter of a gate oxide structure of the semiconductor device according to the drain-source current includes: Providing a first voltage to the drain of the semiconductor device, providing a second voltage to the gate of the semiconductor device, and obtaining a first test current of the semiconductor device; Providing a first voltage to the drain of the semiconductor device and a third voltage to the gate of the semiconductor device to obtain a second test current of the semiconductor device, wherein the second voltage and the third voltage are both negative voltages, and the third voltage is greater than the second voltage; The first test current is compared with the second test current to determine whether there are trapped charges in the gate oxide structure of the semiconductor device.

[0007] In some optional embodiments, comparing the first test current with the second test current to determine whether there are trapped charges in the gate oxide structure of the semiconductor device includes: When the first test current is greater than the second test current, determining that trapped charges exist in the gate oxide structure of the semiconductor device; When the first test current is equal to the second test current, it is determined that no trapped charges exist in the gate oxide structure of the semiconductor device.

[0008] In some optional embodiments, the first voltage is obtained by multiplying the rated drain-source voltage by a first preset value, and the third voltage is not higher than the rated gate-source voltage by a second preset value.

[0009] In some optional embodiments, the failure diagnosis method further includes: Before obtaining the first test current, a first voltage is provided to the drain of the semiconductor device, and a zero voltage is provided to the gate of the semiconductor device to obtain a third test current of the semiconductor device.

[0010] In some optional embodiments, the failure diagnosis method further includes: After obtaining the second test current, a first voltage is provided to the drain of the semiconductor device, a zero voltage is provided to the gate of the semiconductor device, a fourth test current of the semiconductor device is obtained, and whether interface state trap charges exist in the semiconductor device is determined based on the third test current and the fourth test current.

[0011] In some optional embodiments, after the semiconductor device with abnormal condition is left to stand for a preset period of time, a current drain-source current parameter of the semiconductor device is obtained, and the movable charge parameter of the oxide layer of the semiconductor device is determined according to the initial drain-source current parameter and the current drain-source current parameter, including: The semiconductor device with abnormal condition is left to stand for a preset time, and the semiconductor device is allowed to return to the original temperature condition; The current drain-source current parameter of the semiconductor device is measured, and when the current drain-source current parameter is equal to the initial drain-source current parameter, it is determined that there is no movable charge in the oxide layer of the semiconductor device.

[0012] In some optional embodiments, leaving the semiconductor device with abnormal condition to stand for a preset time and waiting for the semiconductor device to recover to the original temperature condition includes: placing the semiconductor device under a first temperature condition for a first preset time, wherein the first temperature condition is at least 150° C. and the first preset time is at least 1 hour; and / or, The semiconductor device is left at room temperature for a second preset time period, wherein the second preset time period is at least 72 hours.

[0013] In some optional embodiments, obtaining initial drain-source current parameters of the semiconductor device to be diagnosed, and determining the abnormal condition of the oxide layer of the semiconductor device according to the initial drain-source current parameters includes: Obtaining initial drain-source current parameters and preset verification values ​​of the semiconductor device to be diagnosed; The initial drain-source current parameter is compared with a preset verification value. When the initial drain-source current parameter is less than the preset verification value, it is determined that the failure of the semiconductor device occurs in the oxide layer.

[0014] In some optional embodiments, the preset verification value is on the order of hundreds of microamperes.

[0015] The failure diagnosis method of the embodiment of the present application is easy to implement and can be operated by simply measuring the drain-source current of the semiconductor device through ordinary static test equipment. The method first determines whether the leakage position is in the oxide layer by the magnitude of the drain-source current. After determining that the leakage position is in the oxide layer, a qualitative analysis is performed on the movable charge and trapped charge in the oxide layer, and finally the failure cause of the semiconductor device is determined, which is helpful for the subsequent fault analysis and process improvement work. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present application. Moreover, the same reference numerals are used throughout the drawings to represent the same components. In the drawings: Figure 1 A schematic flow chart of a failure diagnosis method for a semiconductor device according to some embodiments of the present application; Figure 2 This is one of the sub-flow diagrams of the failure diagnosis method of a semiconductor device according to some embodiments of the present application; Figure 3 This is a second sub-flow diagram of a failure diagnosis method for a semiconductor device according to some embodiments of the present application; Figure 4 This is a third sub-flow diagram of a failure diagnosis method for a semiconductor device according to some embodiments of the present application; Figure 5 This is a fourth sub-flow diagram of a failure diagnosis method for a semiconductor device according to some embodiments of the present application. DETAILED DESCRIPTION

[0017] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0019] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0020] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0021] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0022] Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) is a power device commonly used to achieve circuit switching or amplification. It is used in various electronic systems, including medical equipment, avionics and other fields, and its reliability has received widespread attention.

[0023] Drain-source current is one of the important indicators in reliability testing. Generally, it refers to the drain-source current under zero gate voltage, which refers to the tiny current that still exists when the MOSFET is turned off. Excessive drain-source current will reduce the reliability of the device, shorten its life, and even cause abnormality in the circuit. Therefore, it is necessary to conduct fault analysis based on the leakage cause in order to improve the process and increase the product yield.

[0024] In the related art, leakage diagnosis of the device is performed by measuring the IV curve between the drain-source electrodes of the device and using a leakage locating device. However, this diagnostic method is only applicable to the case where the leakage level is large. When the leakage level is small, the leakage locating device cannot observe obvious hot spots, making it difficult to determine the failure location and cause of the device. Alternatively, after observing the hot spots with the leakage locating device, the focused ion beam device cannot dissect and observe hard damage, making it difficult to know the failure location and determine the failure cause.

[0025] In order to solve the problems of the prior art, an embodiment of the present application provides a failure diagnosis method for a semiconductor device. The failure diagnosis method only uses ordinary static testing equipment to measure the drain-source current of the device under different conditions, thereby gradually locking the leakage position of the device according to the changing trend of the drain-source current to achieve failure diagnosis.

[0026] See also Figure 1 , the embodiment of the present application provides a failure diagnosis method for a semiconductor device, comprising: S100, obtaining initial drain-source current parameters of the semiconductor device to be diagnosed, and determining the abnormality of the oxide layer of the semiconductor device according to the initial drain-source current parameters; S200, after the semiconductor device with abnormal condition is left to stand for a preset period of time, a current drain-source current parameter of the semiconductor device is obtained, and a movable charge parameter of an oxide layer of the semiconductor device is determined according to the initial drain-source current parameter and the current drain-source current parameter; S300, obtaining a drain-source current of the semiconductor device, and determining a trap charge parameter of a gate oxide structure of the semiconductor device according to the drain-source current; S400 , diagnose failure causes of the semiconductor device according to movable charge parameters and trapped charge parameters.

[0027] For ease of understanding, the following description uses a vertical N-channel MOSFET (Vertical Double-DiffusedMOSFET, VDMOS) as an example.

[0028] The initial drain-source current parameter generally refers to the current value obtained by statically testing the device when the gate voltage of the device is zero; the current drain-source current parameter refers to the current value obtained by statically testing the device again when the gate voltage is zero after the device has been left stationary for a preset period of time.

[0029] In step S300, the drain-source current refers to the current flowing from the drain to the source of the semiconductor device under different gate voltages, wherein the gate voltage is a negative voltage, so the N-MOS will not turn on.

[0030] It can be understood that in the finished semiconductor device, the chip generally includes an active area and a non-active area. In step S100 and step S200, the oxide layer includes both the gate oxide structure of the chip active area and the thick oxide structure of the non-active area. It should be noted that the thickness of the thick oxide structure of the non-active area is greater than the thickness of the gate oxide structure of the active area, or the thickness of the thick oxide structure of the non-active area is consistent with the thickness of the gate oxide structure of the active area. Other special cases are not discussed in this application for the time being.

[0031] Therefore, the diagnostic method provided in the embodiment of the present application can be implemented through existing ordinary static testing equipment. It only needs to obtain the drain-source current parameters of the device under specific circumstances and compare them, and then lock the leakage position of the semiconductor device through the change trend of the drain-source current, and finally realize failure diagnosis and determine the cause of failure, which will help to carry out subsequent fault analysis and process improvement, and help improve the yield and electrical performance of the product.

[0032] It should be noted that, although fixed oxide layer charges inevitably exist between the gate oxide structure in the active area and the thick oxide structure in the non-active area, the causes and control methods of such charges are relatively clear at present, so this application will not discuss this for the time being.

[0033] According to some embodiments of this application, see Figure 2 Step S100, obtaining the initial drain-source current parameter of the semiconductor device to be diagnosed, and determining the abnormality of the oxide layer of the semiconductor device according to the initial drain-source current parameter includes: S110, obtaining an initial drain-source current parameter and a preset verification value of the semiconductor device to be diagnosed; S120 , comparing the initial drain-source current parameter with a preset verification value, and when the initial drain-source current parameter is less than the preset verification value, determining that the failure of the semiconductor device occurs in the oxide layer.

[0034] Optionally, in step S120, the preset verification value is greater than or equal to 25 microamperes.

[0035] Further optionally, in step S120, the preset verification value is in the order of hundreds of microamperes. Exemplarily, the preset verification value is one of 180 μA, 160 μA, 150 μA, 140 μA, 120 μA, and 100 μA.

[0036] Optionally, in step S100, the voltage provided to the semiconductor device is not higher than the rated drain-source voltage, so as to reduce new damage to the semiconductor device during the test process.

[0037] Therefore, the failure diagnosis method first obtains the drain-source current value of the semiconductor device to be diagnosed, and distinguishes whether the defect of the semiconductor device is caused by a large leakage caused by a macroscopic structural defect or a small leakage caused by a microscopic charge through the magnitude or size of the drain-source current value. When the initial drain-source current parameter is small enough and lower than the preset verification value, it is considered that the failure of the semiconductor device is caused by the charge in the oxide layer.

[0038] Specifically, the charges that may exist in the oxide layer include oxide layer trapped charges, movable charges, and interface state trapped charges. Among them, the oxide layer trapped charges and movable charges are distributed in both the gate oxide structure in the active area and the thick oxide structure in the inactive area, and the interface state trapped charges are mainly distributed in the gate oxide structure in the active area.

[0039] According to some embodiments of this application, see Figure 3 Step S200, after the semiconductor device with abnormal condition is left to stand for a preset period of time, the current drain-source current parameter of the semiconductor device is obtained, and the movable charge parameter of the oxide layer of the semiconductor device is determined according to the initial drain-source current parameter and the current drain-source current parameter, including: S210, leaving the semiconductor device with abnormal condition still for a preset time, waiting for the semiconductor device to return to the original temperature condition; S220, measuring a current drain-source current parameter of the semiconductor device, and determining that no movable charge exists in the oxide layer of the semiconductor device when the current drain-source current parameter is equal to the initial drain-source current parameter.

[0040] It is understandable that in step S220, equal to includes completely equal to and substantially equal to. Exemplarily, in one embodiment, if the deviation range of the current drain-source current parameter relative to the initial drain-source current parameter is less than or equal to 5%, the current drain-source current parameter is considered to be equal to the initial drain-source current parameter.

[0041] Optionally, step S210 includes: S211, leaving the semiconductor device at a first temperature condition for a first preset time, wherein the first temperature condition is at least 150° C., and the first preset time is at least 1 hour.

[0042] It is understandable that the device for providing the first temperature condition to the semiconductor device can directly use existing heating equipment on the market, or a heating chamber can be added on the basis of the static test equipment, and this application does not limit this.

[0043] Therefore, the high temperature redistributes the movable charges and oxide layer trapped charges in the semiconductor device so that these charges are away from the Si and SiO2 interface. If the current drain-source current parameter after executing step S211 is equal to the initial drain-source current parameter, it is determined that there are no movable charges and oxide layer trapped charges in the semiconductor device.

[0044] Optionally, step S210 includes: S212, leaving the semiconductor device at room temperature for a second preset time period, wherein the second preset time period is at least 72 hours and the room temperature is 25°C.

[0045] It can be understood that in step S210, the time for waiting for the semiconductor device to recover to the original temperature condition is 0. In other words, the semiconductor device can be directly tested to obtain the current drain-source current parameter after being left still for the second preset time.

[0046] Thus, while waiting for the movable charges in the semiconductor device to be redistributed, if the current drain-source current parameter after executing step S212 is equal to the initial drain-source current parameter, it is determined that there is no movable charge in the semiconductor device.

[0047] It is understandable that the movable charges inside the oxide layer are free charges, which are easy to move, thereby reducing the aggregation at the interface of Si and SiO2, achieving the improvement of drain-source current. Among them, high temperature will accelerate the redistribution of free movable charges and oxide layer trap charges, which can achieve the improvement of drain-source current more quickly.

[0048] According to some embodiments of the present application, step S211 and step S212 may be executed together, or only one of them may be executed.

[0049] Therefore, after determining that the failure of the semiconductor device is caused by the charge in the oxide layer, the present application checks the possible charge types in the oxide layer one by one, provides good conditions for the redistribution of movable charge and oxide layer trap charge, and judges whether the leakage of the device has improved by comparing the initial drain-source current parameters with the current drain-source current parameters, thereby determining whether there are movable charges and oxide layer trap charges in the oxide layer, providing a good basis for subsequent fault analysis work.

[0050] According to some embodiments of this application, see Figure 4 Step S300, obtaining the drain-source current of the semiconductor device, and determining the trap charge parameter of the gate oxide structure of the semiconductor device according to the drain-source current includes: S320, providing a first voltage to the drain of the semiconductor device, providing a second voltage to the gate of the semiconductor device, and obtaining a first test current of the semiconductor device; S340, providing a first voltage to the drain of the semiconductor device, providing a third voltage to the gate of the semiconductor device, and obtaining a second test current of the semiconductor device, wherein the second voltage and the third voltage are both negative voltages, and the third voltage is greater than the second voltage; S360 , comparing the first test current with the second test current to determine whether there are trapped charges in the gate oxide structure of the semiconductor device.

[0051] Specifically, step S300 can be used to determine whether there are oxide layer trapped charges and interface state trapped charges in the gate oxide structure. When step S200 is executed before step S300, step S300 is only used to determine whether there are interface state trapped charges in the gate oxide structure, thereby more accurately determining the cause of failure of the semiconductor device.

[0052] It can be understood that the third voltage being greater than the second voltage means that, when the second voltage and the third voltage are both negative voltages, the absolute value of the third voltage is greater than the absolute value of the second voltage.

[0053] Optionally, the first voltage is obtained by multiplying the rated drain-source voltage by a first preset value, and the first preset value is less than 1 to reduce the introduction of defects that may be caused by excessive drain-source voltage during the test process. Exemplarily, the first preset value is one of 0.9, 0.85, 0.8, 0.75, 0.7, and 0.6.

[0054] Optionally, the absolute value of the third voltage is not higher than the rated gate-source voltage multiplied by a second preset value, and the second preset value is less than or equal to 1. Exemplarily, the second preset value is one of 1, 0.95, 0.9, 0.85, 0.8, 0.75, 0.7, 0.65, and 0.6.

[0055] Taking N-channel VDMOS as an example, if there are abnormally many trapped charges in the oxide layer, since most of these trapped charges are positive, the negative voltage provided by the gate can shield these positive charges, thereby alleviating the abnormal opening of the semiconductor channel and the shrinkage of the depletion layer, and reducing the drain-source current.

[0056] Specifically, step S360 includes: S361, when the first test current is greater than the second test current, determining that trapped charges exist in the gate oxide structure of the semiconductor device; S362: When the first test current is equal to the second test current, determine that there is no trapped charge in the gate oxide structure of the semiconductor device.

[0057] Therefore, by providing at least two different negative voltages to the gate of the semiconductor device and measuring whether the drain-source current is relieved as the negative voltage increases, it is verified whether there are trapped charges in the oxide layer, so as to facilitate subsequent traceability analysis and process improvement of the trapped charges.

[0058] It can be understood that in step S362, equal to includes completely equal to and substantially equal to. Exemplarily, in one embodiment, if the deviation range of the second test current relative to the first test current is less than or equal to 5%, the second test current is considered to be equal to the first test current.

[0059] It should be noted that the present application does not restrict the execution order between step S200 and step S300. That is, the present test can first determine whether there is movable charge in the oxide layer, or it can first determine whether there is trapped charge in the oxide layer. In fact, the drain-source current caused by the movable charge will also show a decreasing trend in response to the increase of the negative gate voltage. Therefore, the present application combines the two steps S200 and S300 to determine the cause of the defect of the oxide layer of the semiconductor device.

[0060] Optionally, see Figure 5 Step S300 also includes: S330, providing a first voltage to the drain of the semiconductor device, providing a fourth voltage to the gate of the semiconductor device, and obtaining a fifth test current of the semiconductor device, wherein the fourth voltage is a negative voltage between the second voltage and the third voltage.

[0061] It is understandable that, in order to further improve the test accuracy and obtain the relative change relationship between the gate negative voltage and the drain-source current, step S330 may also include two or more sub-steps to adjust the step amplitude.

[0062] Therefore, the fifth test current can be used as a supplement and compared with the first test current and the second test current to more clearly observe whether the drain-source current of the semiconductor device changes with the change of the gate negative voltage.

[0063] According to some embodiments of this application, see Figure 5 , step S300 further includes: S310 , providing a first voltage to the drain of the semiconductor device, providing a zero voltage to the gate of the semiconductor device, and obtaining a third test current of the semiconductor device.

[0064] Optionally, in some embodiments, step S300 is performed before step S200, and the third test current may take an initial drain-source current parameter.

[0065] Optionally, in some embodiments, step S300 is performed after step S200, and the third test current may be a current drain-source current parameter.

[0066] Optionally, step S300 further includes: S350 , providing a first voltage to the drain of the semiconductor device, providing a zero voltage to the gate of the semiconductor device, and obtaining a fourth test current of the semiconductor device.

[0067] Therefore, the third test current can be used as a supplement to compare with at least one of the first test current and the second test current to determine whether the drain-source current of the device decreases with the increase of negative gate voltage, and then determine whether there is trapped charge in the oxide layer.

[0068] According to some embodiments of this application, see Figure 5 , step S300 further includes: S370 , determining whether there are interface state trapped charges in the semiconductor device according to the third test current and the fourth test current.

[0069] Specifically, when the third test current is equal to the fourth test current and the second test current is less than the first test current, it is determined that the semiconductor device has interface state trapped charges. It can be understood that the equals referred to herein include completely equals and substantially equals. Exemplarily, in one embodiment, the deviation range of the fourth test current relative to the third test current is less than or equal to 5%, that is, the third test current is deemed to be equal to the fourth test current.

[0070] Therefore, by comparing whether the drain-source saturation current of the device changes before and after the negative gate voltage test, combined with the trend of relative change of the drain-source current following the negative gate voltage, it is further clarified whether the failure location of the semiconductor device is the gate oxide structure in the active area or the thick oxygen structure in the non-active area, and a more accurate failure cause is obtained.

[0071] To further illustrate the present application, specific tests are listed below for illustration. The tests were carried out with a rated drain-source voltage of 100V and a rated gate-source voltage of 20V. Please refer to Table 1 for the test results.

[0072]

[0073] Table 1

[0074] It is easy to conclude from observing Table 1 that the drain-source current gradually decreases with the increase of the negative gate voltage, and the drain-source current of the first test is basically consistent with the drain-source current after the negative gate voltage is removed. Therefore, it can be determined that the cause of failure of the semiconductor device at least includes the existence of interface state trap charges in the gate oxide structure of the active area.

[0075] According to some embodiments of the present application, in step S400, the movable charge parameter includes 0 and 1 to respectively indicate whether there is movable charge in the oxide layer of the device, or the movable charge parameter includes a value calculated by the change in drain-source current and other parameters.

[0076] According to some embodiments of the present application, in step S400, the trapped charge parameter includes 0 and 1 to respectively indicate whether there is trapped charge in the oxide layer of the device, or the trapped charge parameter includes a value calculated by the change in drain-source current and other parameters.

[0077] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application, and they should all be included in the scope of the claims and specification of the present application. In particular, as long as there is no structural conflict, the various technical features mentioned in the various embodiments can be combined in any way. The present application is not limited to the specific embodiments disclosed herein, but includes all technical solutions that fall within the scope of the claims.

Claims

1. A method for diagnosing failure of a semiconductor device, characterized in that: include: Acquiring initial drain-source current parameters of the semiconductor device to be diagnosed, and determining the abnormality of the oxide layer of the semiconductor device according to the initial drain-source current parameters; After the semiconductor device with abnormal condition is left to stand for a preset period of time, a current drain-source current parameter of the semiconductor device is obtained, and a movable charge parameter of an oxide layer of the semiconductor device is determined according to the initial drain-source current parameter and the current drain-source current parameter; Obtaining a drain-source current of a semiconductor device, and determining a trap charge parameter of a gate oxide structure of the semiconductor device according to the drain-source current; The failure cause of the semiconductor device is diagnosed according to the movable charge parameter and the trapped charge parameter.

2. The failure diagnosis method of a semiconductor device according to claim 1, characterized in that: The step of obtaining the drain-source current of the semiconductor device and determining the trap charge parameter of the gate oxide structure of the semiconductor device according to the drain-source current comprises: Providing a first voltage to the drain of the semiconductor device, providing a second voltage to the gate of the semiconductor device, and obtaining a first test current of the semiconductor device; Providing a first voltage to the drain of the semiconductor device and a third voltage to the gate of the semiconductor device to obtain a second test current of the semiconductor device, wherein the second voltage and the third voltage are both negative voltages, and the third voltage is greater than the second voltage; The first test current is compared with the second test current to determine whether there are trapped charges in the gate oxide structure of the semiconductor device.

3. The failure diagnosis method of a semiconductor device according to claim 2, characterized in that: The comparing the first test current with the second test current to determine whether there is trapped charge in the gate oxide structure of the semiconductor device comprises: When the first test current is greater than the second test current, determining that trapped charges exist in the gate oxide structure of the semiconductor device; When the first test current is equal to the second test current, it is determined that no trapped charges exist in the gate oxide structure of the semiconductor device.

4. The failure diagnosis method of a semiconductor device according to claim 2, characterized in that: The first voltage is obtained by multiplying the rated drain-source voltage by a first preset value, and the third voltage is not higher than the rated gate-source voltage by a second preset value.

5. The failure diagnosis method of a semiconductor device according to claim 2, characterized in that: Also includes: Before obtaining the first test current, a first voltage is provided to the drain of the semiconductor device, and a zero voltage is provided to the gate of the semiconductor device to obtain a third test current of the semiconductor device.

6. The failure diagnosis method of a semiconductor device according to claim 5, characterized in that: Also includes: After obtaining the second test current, a first voltage is provided to the drain of the semiconductor device, a zero voltage is provided to the gate of the semiconductor device, a fourth test current of the semiconductor device is obtained, and whether interface state trap charges exist in the semiconductor device is determined based on the third test current and the fourth test current.

7. The failure diagnosis method of a semiconductor device according to claim 1, characterized in that: After the semiconductor device with abnormal condition is left to stand for a preset period of time, the current drain-source current parameter of the semiconductor device is obtained, and the movable charge parameter of the oxide layer of the semiconductor device is determined according to the initial drain-source current parameter and the current drain-source current parameter, including: The semiconductor device with abnormal condition is left to stand for a preset time, and the semiconductor device is allowed to return to the original temperature condition; The current drain-source current parameter of the semiconductor device is measured, and when the current drain-source current parameter is equal to the initial drain-source current parameter, it is determined that there is no movable charge in the oxide layer of the semiconductor device.

8. The failure diagnosis method of a semiconductor device according to claim 7, characterized in that: The step of leaving the semiconductor device with abnormal condition to stand for a preset period of time and waiting for the semiconductor device to recover to the original temperature condition comprises: placing the semiconductor device under a first temperature condition for a first preset time, wherein the first temperature condition is at least 150° C. and the first preset time is at least 1 hour; and / or, The semiconductor device is left at room temperature for a second preset time period, wherein the second preset time period is at least 72 hours.

9. The failure diagnosis method of a semiconductor device according to claim 1, characterized in that: The step of obtaining initial drain-source current parameters of the semiconductor device to be diagnosed and determining the abnormality of the oxide layer of the semiconductor device according to the initial drain-source current parameters comprises: Obtaining initial drain-source current parameters and preset verification values ​​of the semiconductor device to be diagnosed; The initial drain-source current parameter is compared with a preset verification value. When the initial drain-source current parameter is less than the preset verification value, it is determined that the failure of the semiconductor device occurs in the oxide layer.

10. The failure diagnosis method of a semiconductor device according to claim 9, characterized in that: The preset verification value is in the hundreds of microamperes level.

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