Photoetching mask multi-target robust optimization method and system, computer equipment and medium

By using lithography simulation models and multi-objective optimization methods in lithography technology, multiple loss functions are constructed and iteratively optimized, the problem of insufficient mask robustness in the existing technology is solved, and efficient mask optimization is achieved under a variety of process parameters, which improves the yield of chip production.

CN119758673AActive Publication Date: 2025-04-04GUANGZHOU HKUST FOK YING TUNG RES INST +1

Patent Information

Application Number
CN202411713006.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-26
Publication Date
2025-04-04
Estimated Expiration
2044-11-26

AI Technical Summary

Technical Problem

When existing back lithography technology deals with disturbances of multiple process parameters, it is difficult to achieve efficient multi-objective optimization, resulting in insufficient robustness of the mask and affecting the yield of chip production.

Method used

By determining the wafer pattern of the initial mask under multiple process parameters based on the lithography simulation model, multiple loss functions are constructed, and multiple iterative optimizations are carried out until all the loss functions converge and reach equalization, and the optimized mask is obtained.

Benefits of technology

It realizes the mask plate with stable quality under different process parameters, improves the robustness of the mask and improves the yield of chip production.

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Abstract

The embodiment of the invention relates to the technical field of photoetching, and provides a photoetching mask multi-target robust optimization method and system, computer equipment and a medium, and the method comprises the following steps: determining wafer patterns respectively obtained by an initial mask under N process parameters based on a photoetching simulation model, N being an integer greater than 1; on the basis of the deviation between the wafer pattern and a target pattern obtained by the various technological parameters, N loss functions are constructed, and each loss function corresponds to one technological parameter; and performing multiple rounds of iterative optimization on the initial mask until all the loss functions are converged and balanced, thereby obtaining an optimized mask. The optimized mask plate obtained according to the scheme of the embodiment of the invention has good adaptability and relatively high robustness to different process parameters.
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Description

Technical Field

[0001] Embodiments of the present application relate to lithography technology, and in particular to a multi-objective robust optimization method for a lithography mask, a multi-objective robust optimization system for a lithography mask, a computer device, and a computer-readable storage medium. Background Art

[0002] Chip manufacturing mainly includes wafer preparation, deposition, lithography, etching and other links. Among them, the lithography process directly determines the minimum size of the graphics that can be manufactured, represents the advanced level of manufacturing process technology, and the lithography process is the most critical link. A lithography system consists of a light source, a mask, a projection system, a photoresist and a wafer. During the lithography process, the light source penetrates the mask and passes through the projection system to the wafer. When the light intensity exceeds a certain threshold, the chemical properties of the photosensitive photoresist material will change, and finally a circuit pattern will be formed on the wafer. With the current reduction of node technology, when the light source passes through the mask, optical proximity effects such as optical diffraction become very significant, causing obvious distortion of the photoresist and subsequent optical imaging on the wafer, reducing the production yield of the chip. The current technology to alleviate this effect is optical proximity correction (OPC), which compensates for this distortion by modifying the mask pattern in advance to obtain the correct pattern.

[0003] As one of the mainstream methods of OPC, inverse lithography technology performs pixel-level mask optimization. The mask optimized by this technology can obtain a high-precision wafer pattern after passing through the lithography model. This method first rasterizes the mask pattern and optimizes the mask by flipping each discretized pixel. Usually, a gradient descent-based method can be used to update the mask until the upper limit of the number of iterations is reached or the ideal evaluation accuracy is achieved. The evaluation accuracy generally takes the edge placement error (Edge Placement Error, EPE) and the process window (Process Window, PW). However, in the existing inverse lithography technology, most of them only consider the optimization of specific process parameters, and the robustness of the mask still needs to be solved. Summary of the invention

[0004] The embodiments of the present application provide a multi-objective robust optimization method for a lithography mask, a multi-objective robust optimization system for a lithography mask, a computer device, and a computer-readable storage medium, aiming to obtain a mask plate with stable quality under different process parameters and improve the robustness of the mask.

[0005] In a first aspect, an embodiment of the present application provides a multi-objective robust optimization method for a lithography mask, the method comprising the following steps: Determine wafer patterns obtained by the initial mask under N process parameters respectively based on the lithography simulation model, where N is an integer greater than 1; Based on the deviation between the wafer pattern and the target pattern obtained by various process parameters, construct N loss functions, each loss function corresponding to one process parameter; The initial mask is optimized through multiple rounds of iterations until all the loss functions converge and reach equilibrium, thereby obtaining an optimized mask.

[0006] In the scheme of the embodiment of the present application, the wafer pattern obtained by the initial mask under different process parameters is first determined by the lithography simulation model, and then the loss function corresponding to each process parameter is constructed based on the deviation between the wafer pattern obtained by different process parameters and the target pattern, and the initial mask is optimized by multiple rounds of iterative optimization until all loss functions converge and reach equilibrium, and then the optimized mask is obtained. The optimized mask obtained according to the scheme of the embodiment of the present application has good adaptability and high robustness to different process parameters.

[0007] In a possible implementation, each round of iterative optimization includes: Obtaining gradient vectors corresponding to the N loss functions respectively; Determine a gradient conflict pair from the N gradient vectors, and perform conflict mitigation on each of the gradient conflict pairs; After performing conflict mitigation on all the gradient conflict pairs, obtaining updated gradient vectors corresponding to the gradient vectors; Determine a first gradient fusion vector based on the N updated gradient vectors; The parameters in the initial mask are updated based on the first gradient fusion vector.

[0008] In a possible implementation manner, determining a gradient conflict pair from the N gradient vectors includes: Randomly selecting some gradient vectors from the N gradient vectors to construct a gradient vector set; The gradient conflicting pairs are determined from the set of gradient vectors.

[0009] In a possible implementation, determining the gradient conflict pair includes: If the angle between the two gradient vectors is greater than 90°, the two gradient vectors are determined to be the gradient conflict pair.

[0010] In a possible implementation manner, the step of performing conflict mitigation on each gradient conflict pair includes: Recording two gradient vectors in the gradient conflict pair as a first gradient vector and a second gradient vector respectively; Calculating a first projection of the first gradient vector in an orthogonal direction of the second gradient vector, and obtaining an updated gradient vector corresponding to the first gradient vector according to the first projection; A second projection of the second gradient vector in an orthogonal direction of the first gradient vector is calculated, and an updated gradient vector corresponding to the second gradient vector is obtained according to the second projection.

[0011] In a possible implementation manner, determining a first gradient fusion vector based on the N updated gradients includes: Adding the N updated gradient vectors to obtain a second gradient fusion vector; performing a normalization operation on the second gradient fusion vector to obtain a third gradient fusion vector; Determine the gradient fusion vector amplitude according to the vector with the largest gradient amplitude among the N updated gradient vectors; The first gradient fusion vector is determined according to the third gradient fusion vector and the gradient fusion vector amplitude.

[0012] In a possible implementation, determining wafer patterns obtained by the initial mask under N process parameters respectively based on the lithography simulation model includes: For each of the process parameters, performing a dot product weighted operation on the K photolithography kernels corresponding to the process parameter and the initial mask to obtain a photolithography intensity map; The lithography intensity map is processed based on the lithography simulation model to obtain the wafer pattern corresponding to the process parameters.

[0013] In a second aspect, an embodiment of the present application provides a multi-objective robust optimization system for a lithography mask, comprising: A determination module, used to determine wafer patterns obtained by the initial mask under N process parameters respectively based on the lithography simulation model, where N is an integer greater than 1; A construction module, configured to construct N loss functions based on deviations between the wafer pattern and the target pattern obtained by various process parameters, each loss function corresponding to one of the process parameters; The iterative optimization module is used to perform multiple rounds of iterative optimization on the initial mask until all the loss functions converge and reach equilibrium, thereby obtaining an optimized mask.

[0014] In a third aspect, an embodiment of the present application provides a computer device, including: Memory, used to store programs; A processor is used to execute the program stored in the memory. When the processor executes the program stored in the memory, the processor is used to execute the method described in the first aspect above.

[0015] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein the computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to execute the method described in the first aspect above.

[0016] The solutions provided in the second to fourth aspects are used to implement or cooperate with the method provided in the first aspect, and thus can achieve the same or corresponding beneficial effects as the first aspect, and will not be described in detail here.

[0017] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of a process flow of a multi-objective robust optimization method for a lithography mask provided in an embodiment of the present application; Figure 2 A schematic diagram of an iterative optimization process provided in an embodiment of the present application; Figure 3 A schematic diagram of a process for determining a first gradient fusion vector provided in an embodiment of the present application; Figure 4 A schematic diagram of the structure of a multi-objective robust optimization system for lithography masks provided in an embodiment of the present application; Figure 5 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical methods and advantages of this application more clear, the following is a further detailed description of this application in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain this application and are not used to limit this application.

[0020] It should be noted that the meaning of "multiple" (or multiple) involved in the description of the embodiments of the present application is more than two, "greater than", "less than", "exceed", etc. are understood as not including the number itself, and "above", "below", "within", etc. are understood as including the number itself. If there is a description of "first", "second", etc., it is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0021] In the embodiments of the present application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent the situation where A exists alone, A and B exist at the same time, and B exists alone. Among them, A and B can be singular or plural. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. "At least one of the following" and similar expressions refer to any combination of these items, including any combination of singular or plural items. For example, at least one of a, b and c can mean: a exists alone, b exists alone, c exists alone, a and b exist at the same time, a and c exist at the same time, b and c exist at the same time, or a, b and c exist at the same time, wherein a, b, c can be single or multiple.

[0022] The terms "substantially", "about" and similar terms used in the embodiments of the present application are used as approximate terms rather than as terms of degree, and are intended to take into account the inherent deviations of measurements or calculations known to those of ordinary skill in the art. In addition, the use of "may" when describing the embodiments of the present application refers to "possible one or more embodiments". The terms "use", "using", and "used" used in the embodiments of the present application may be considered to be synonymous with the terms "utilize", "utilizing", and "utilized", respectively. In addition, the term "exemplary" is intended to refer to an example or illustration.

[0023] Chip manufacturing mainly includes wafer preparation, deposition, lithography, etching and other links. Among them, the lithography process directly determines the minimum size of the graphics that can be manufactured, represents the advanced level of manufacturing process technology, and the lithography process is the most critical link. A lithography system consists of a light source, a mask, a projection system, a photoresist and a wafer. During the lithography process, the light source penetrates the mask and passes through the projection system to the wafer. When the light intensity exceeds a certain threshold, the chemical properties of the photosensitive photoresist material will change, and finally a circuit pattern will be formed on the wafer. With the current reduction of node technology, when the light source passes through the mask, optical proximity effects such as optical diffraction become very significant, causing obvious distortion of the photoresist and subsequent optical imaging on the wafer, reducing the production yield of the chip. The current technology to alleviate this effect is optical proximity correction (OPC), which compensates for this distortion by modifying the mask pattern in advance to obtain the correct pattern.

[0024] As one of the mainstream methods of OPC, inverse lithography technology performs pixel-level mask optimization. The mask optimized by this technology can obtain a high-precision wafer pattern after passing through the lithography model. This method first rasterizes the mask pattern and optimizes the mask by flipping each discretized pixel. Usually, a gradient descent-based method can be used to update the mask until the upper limit of the number of iterations is reached or the ideal evaluation accuracy is achieved. The evaluation accuracy generally takes the edge placement error (EPE) and the process window (PW).

[0025] Among them, a related technology proposes an inverse lithography considering the process window. First, the wafer pattern results under different exposure doses and defocus conditions are calculated according to the lithography simulation model. Then, the wafer pattern and target pattern obtained under conventional process parameters are used to calculate the edge placement error analytical formula, and the gradient back propagation formula is derived from it for mask iterative optimization. Secondly, the process variation band (PVB) is calculated using the wafer pattern and target pattern obtained under two extreme process parameters. Finally, the optimization target is obtained by linearly weighting the edge placement error and process variation band, and the gradient descent algorithm is used for iterative optimization to obtain the optimized mask. However, this related technology only considers the optimization conditions under conventional ideal and two extreme process parameters, and cannot be equivalent to the optimization of the important indicator of process window. At the same time, since the two loss values ​​are simply linearly weighted and become an overall optimization target when calculating the subsequent objective function, this approach will affect the final convergence effect. Finally, the mask obtained by this method cannot achieve a better process window performance.

[0026] Another related technology proposes a two-stage robust inverse lithography optimization technology. First, it is assumed that the defocus process disturbance presents the characteristics of normal distribution, and the difference between the wafer pattern and the target pattern under various defocus process disturbances is expected by using a statistical method, thereby obtaining the final optimization objective function. At the same time, in order to reduce the computational cost of the calculation process, according to the lithography simulation model, a smaller number of optical kernel functions are used for simulation calculation in the first stage, and a roughly optimized mask is obtained by the gradient descent algorithm. In the second stage, all the optical kernel functions in the lithography simulation model are retained for simulation calculation, and the mask obtained in the first stage is optimized again. In this stage, only a small number of iterations are needed to obtain a better mask pattern. However, when designing the objective function, this related technology uses the normal distribution as the weighted weight of the difference between the wafer pattern and the target pattern under different process parameters. This heuristic weight design may affect the optimization effect, easily fall into the local optimal solution, and is not conducive to obtaining a better process window performance under multiple process parameter disturbances.

[0027] There is another related technology that proposes robust inverse lithography optimized by energy function. First, a lithography simulation model under out-of-focus process parameters is designed, and the wafer pattern with process disturbance can be obtained according to the model. Then, the difference between the wafer pattern and the target pattern under different process parameters is summed up using Gaussian weights to obtain the optimized target form, and the energy function is designed for optimization, and finally the mask is updated according to the iterative method. However, this related technology only considers the inverse lithography optimization under out-of-focus process parameter disturbance, and cannot fully reflect the optimization of the process window. At the same time, its update method is too complicated, the calculation amount is large, and there are many hyperparameters, which is not conducive to the actual algorithm deployment and implementation.

[0028] Based on the defects and deficiencies in the related art, the embodiments of the present application propose a multi-objective robust optimization method for a lithography mask, a multi-objective robust optimization system for a lithography mask, a computer device and a computer-readable storage medium, aiming to obtain a mask plate with stable quality under different process parameters and improve the robustness of the mask.

[0029] The multi-objective robust optimization method for lithography masks provided in the embodiments of the present application can be applied to a terminal, a server, or software running in a terminal or a server. In some embodiments, the terminal can be a smart phone, a tablet computer, a laptop computer, a desktop computer, etc.; the server can be configured as an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, content delivery networks (CDNs), and big data and artificial intelligence platforms; the software can be an application that implements the multi-objective robust optimization method for lithography masks, etc., but is not limited to the above forms.

[0030] Embodiments of the present application can be used in numerous general or special computer system environments or configurations. For example: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, distributed computing environments including any of the above systems or devices, etc. The present application can be described in the general context of computer executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in distributed computing environments, in which tasks are performed by remote processing devices connected through a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media including storage devices.

[0031] It should be noted that in each specific implementation of the present application, when it comes to the need to perform relevant processing based on the attribute information or attribute information set of an object (such as a user, etc.) and other data related to the characteristics of the object, the permission or consent of the corresponding object will be obtained first, and the collection, use and processing of these data will comply with relevant laws and standards. In addition, when the embodiment of the present application needs to obtain the attribute information of an object, a separate permission or separate consent of the corresponding object will be obtained through a pop-up window or by jumping to a confirmation page. After clearly obtaining the separate permission or separate consent of the corresponding object, the relevant data of the object necessary for the normal operation of the embodiment of the present application will be obtained.

[0032] See also Figure 1 , Figure 1 A schematic flow chart of a multi-objective robust optimization method for a lithography mask provided in an embodiment of the present application, the method includes but is not limited to the following steps: Step S110: determining wafer patterns obtained by the initial mask under N process parameters respectively based on the lithography simulation model, where N is an integer greater than 1.

[0033] In the embodiment of the present application, N different process parameters are predefined, for example, 6 or 10 process parameters are predefined as needed; an initial mask is made based on a target pattern (i.e., a target chip pattern), and the initial mask is the mask to be optimized; for each process parameter, a wafer pattern formed by the initial mask under the process parameter is obtained through a photolithography simulation model. Through the above process, the embodiment of the present application can obtain N wafer patterns corresponding to the above N process parameters.

[0034] For example, process parameter 1, process parameter 2, ..., process parameter N are predefined; for the N process parameters, corresponding lithography simulation models are respectively constructed, that is, lithography simulation model 1 corresponding to process parameter 1, lithography simulation model 2 corresponding to process parameter 2, ..., lithography simulation model N corresponding to process parameter N are constructed; an initial mask is produced based on the target pattern design; the initial mask is simulated using the above-mentioned lithography simulation models corresponding to different process parameters (lithography simulation models 1 to N), so as to obtain wafer patterns corresponding to different process parameters, that is, wafer pattern 1 corresponding to process parameter 1, wafer pattern 2 corresponding to process parameter 2, ..., wafer pattern N corresponding to process parameter N.

[0035] Exemplarily, the above process parameters may include optical parameters, photoresist parameters, and the like.

[0036] Step S120: constructing N loss functions based on the deviation between the wafer pattern obtained by various process parameters and the target pattern, each loss function corresponding to a process parameter.

[0037] In an embodiment of the present application, after obtaining N wafer patterns corresponding to different process parameters, the deviations between these N wafer patterns and the target pattern are calculated respectively, and corresponding loss functions are constructed based on the deviations, that is, loss function 1 corresponding to process parameter 1, loss function 2 corresponding to process parameter 2, and so on, and loss function N corresponding to process parameter N are constructed.

[0038] Exemplarily, the loss function may be mean square error (MSE), mean absolute error (MAE), cross entropy loss, binary cross entropy loss, binary cross entropy loss with logarithm, Kullback-Leibler divergence, negative log-likelihood loss or hinge loss, etc. The embodiments of the present application do not limit the specific type of loss function.

[0039] Step S130: performing multiple rounds of iterative optimization on the initial mask until all loss functions converge and reach equilibrium, thereby obtaining an optimized mask.

[0040] In the embodiment of the present application, after obtaining N loss functions corresponding to different process parameters, the initial mask is optimized for multiple rounds of iterations with the optimization goal of all the N loss functions converging and reaching equilibrium.

[0041] It should be understood that in the process of iterative optimization, the parameters of the mask will be continuously adjusted through optimization algorithms (such as gradient descent) so that the value of the loss function gradually decreases until it reaches a minimum point or is close to a minimum point. This point indicates that the deviation between the wafer pattern obtained by the current mask and the target pattern is minimized.

[0042] It should also be understood that after each round of iterative optimization, the values ​​of the above N loss functions will be recalculated, and it will be determined whether the current loss functions have converged and reached equilibrium. If so, the current mask will be used as the final optimized mask. If not, the next round of iterative optimization will continue, including continuing to adjust the mask parameters through optimization algorithms (such as gradient descent) based on the current values ​​of each loss function.

[0043] It should be noted that in the embodiment of the present application, the iteration end condition requires that each loss function reaches a balance, that is, the values ​​of each loss function cannot differ too much, so as to ensure that the mask finally optimized can meet the requirements of each optimization target.

[0044] It can be seen that the embodiment of the present application determines the wafer pattern obtained by the initial mask under different process parameters through a lithography simulation model, and then constructs a loss function corresponding to each process parameter based on the deviation between the wafer patterns obtained with different process parameters and the target pattern. The initial mask is optimized for multiple rounds of iterations until all loss functions converge and reach equilibrium, and the optimized mask is obtained. Since the effects of various process parameter disturbances are taken into account during the optimization process, the obtained optimized mask can obtain good adaptability and high robustness to different process parameters.

[0045] Exemplarily, the embodiment of the present application introduces a multi-objective optimization theory to obtain a mask with good robustness, wherein the optimized mask and its acquisition process can be expressed by the following calculation formula (1): (Formula 1) in, and Represents the initial binary mask Lithography intensity map and wafer lithography pattern obtained by lithography simulation model under different process parameters. It is n The first cores, It is The weight of each kernel in the coherent system. Represents the photoresist model. When the photoresist is exposed, the light intensity Areas above a certain threshold form wafer patterns By minimizing these N wafer lithography patterns simultaneously With target mask The deviation between them is used to finally obtain the optimized mask, namely: , the above formula can take into account N kinds of process disturbances, thereby obtaining an optical mask with good robustness.

[0046] For example, in a specific implementation, optical kernel functions with different simulation parameters can be spliced ​​in high dimensions, and the efficient computing power of multiple GPUs can be utilized to deploy them on them to achieve parallel lithography forward simulation and reverse propagation under various process conditions. This acceleration method improves the scalability of the design framework of the embodiment of the present application.

[0047] Exemplarily, determining wafer patterns obtained by the initial mask under N process parameters based on the lithography simulation model includes but is not limited to the following steps: Step S310: for each process parameter, performing a dot product weighted operation on the K photolithography kernels corresponding to the process parameter and the initial mask to obtain a photolithography intensity map; Step S320: Processing the lithography intensity map based on the lithography simulation model to obtain a wafer pattern corresponding to the process parameters.

[0048] That is, in this embodiment, the lithography simulation first determines the lithography intensity map, and then uses the photoresist model to generate the corresponding wafer pattern based on the lithography intensity map.

[0049] It should be noted that the above-mentioned lithography simulation model that can obtain the lithography intensity map and the wafer lithography pattern can also be replaced by other differentiable models, and the embodiments of the present application are not limited to this.

[0050] See also Figure 2 , Figure 2 A schematic diagram of an iterative optimization process provided in an embodiment of the present application. In some embodiments of the present application, each round of iterative optimization includes but is not limited to the following steps: Step S510: Obtain the gradient vectors corresponding to the N loss functions respectively.

[0051] In the embodiment of the present application, the gradient descent algorithm is used to iteratively optimize the mask. During the iterative optimization process, the loss function is calculated based on the wafer pattern obtained by the current mask. The loss function measures the deviation between the wafer pattern obtained by the current mask and the target pattern. If the current loss function does not converge, the gradient vector is calculated based on the loss function to update the mask parameters according to the gradient vector and the preset learning rate (step size). The rule for parameter update is to follow the opposite direction of the gradient vector to minimize the loss function.

[0052] It should be understood that since there are N loss functions in the embodiment of the present application, it is necessary to calculate the corresponding gradient vector for each loss function. In specific implementation, the chain rule can be used to calculate the gradient vector of the loss function relative to each parameter, which is not limited in the embodiment of the present application.

[0053] Step S520: determining gradient conflict pairs from the N gradient vectors, and performing conflict relief on each gradient conflict pair.

[0054] It should be understood that there are N loss functions in the embodiment of the present application, that is, there are N optimization targets, but there may be conflicts between the gradient vectors corresponding to the N loss functions, that is, the direction deviations between some gradient vectors are large, which will affect the optimization efficiency and optimization effect of the mask. Therefore, it is necessary to determine the gradient conflict pairs existing in the N gradient vectors, and then mitigate the conflicts of the gradient conflict pairs.

[0055] Exemplarily, a gradient conflict pair refers to a situation where the direction deviation between two gradient vectors is too large, that is, the angle between the two gradient vectors is too large.

[0056] Exemplarily, determining a gradient conflict pair includes, but is not limited to: if the angle between two gradient vectors is greater than 90°, then determining that the two gradient vectors are a gradient conflict pair.

[0057] That is to say, if there are two gradient vectors whose included angle is greater than 90° among the N gradient vectors, then these two gradient vectors can be considered to form a gradient conflict pair. For example, the included angle between gradient vector 1 and gradient vector 2 is 120°, so gradient vector 1 and gradient vector 2 can be considered to be a conflicting gradient pair.

[0058] As a possible implementation method, conflict mitigation can be performed on the gradient conflict pairs. The conflict degree of the gradient conflict pairs can be used to dynamically adjust the optimization direction of the conflicting gradients according to the conflict degree, so that all objectives can be comprehensively considered to obtain the final optimization direction. This method can automatically balance different objectives and theoretically guarantee the convergence of the average loss.

[0059] As another possible implementation, conflict mitigation can be performed on the gradient conflict pairs by projecting the gradient vector of each target onto an orthogonal plane to the other first gradient fusion vectors to eliminate the conflict between the gradients. Specifically, if the gradients generated by two targets conflict with each other, the gradients are trimmed by projecting the conflicting gradients to ensure that the gradient of each target is zero in the direction that conflicts with the gradient of the other target, so that each target only updates parameters in the direction that does not conflict with the other targets.

[0060] In addition, the gradient conflict problem can also be alleviated by gradient clipping. Specifically, a gradient boundary is set in advance. When a gradient vector exceeds the gradient boundary, the gradient vector is forced to be a vector consistent with the direction of the boundary.

[0061] Step S530: After all gradient conflict pairs are conflict-mitigated, updated gradient vectors corresponding to the respective gradient vectors are obtained.

[0062] Step S540: determining a first gradient fusion vector based on the N updated gradient vectors.

[0063] After alleviating the gradient conflict, the final first gradient fusion vector is obtained by comprehensively considering the N gradient vectors, thereby balancing the update direction of each target.

[0064] Step S550: updating the parameters in the initial mask based on the first gradient fusion vector.

[0065] Specifically, the mask parameters are updated according to the first gradient fusion vector and the preset learning rate (step size), and the parameter update rule is to update along the reverse direction of the gradient to minimize the loss function.

[0066] It should be noted that during the optimization process, the learning rate can be adaptively adjusted. For example, in multiple rounds of iterative optimization, the learning rate can be gradually reduced according to a certain decay rate to improve the training efficiency and mask performance.

[0067] As a possible implementation, determining a gradient conflict pair from N gradient vectors includes but is not limited to the following steps: Step S710: randomly selecting some gradient vectors from the N gradient vectors to construct a gradient vector set; Step S720: Determine gradient conflict pairs from the gradient vector set.

[0068] It should be understood that due to the large number of optimization targets, the possibility of conflict between the gradients of various targets increases, which will become the main computational bottleneck of the parameter update process. In order to improve the overall optimization efficiency, a multi-target sampling strategy can be introduced, that is, random sampling of the gradients of some targets in each iteration process to achieve acceleration, which can greatly improve the efficiency of optimization.

[0069] In a specific example, for the nth gradient vector , consider sampling R from other target gradients for conflict mitigation. The specific mathematical expression is: ,in Represents a random uniform sampling of R samples from the set S, where the set S is the gradient vector The gradient vector is a collection of other gradient vectors other than The sampled R gradient vectors form a gradient vector set, and the gradient conflict pairs are determined from the gradient vector set. In this example, in each round of iteration, only part of the gradients are sampled for conflict relief to achieve iteration acceleration, and after multiple rounds of iteration, the gradients of multiple targets are gradually balanced and the gradient conflicts are gradually relieved, thereby improving the efficiency of optimization.

[0070] As a possible implementation method, conflict mitigation is performed on each gradient conflict pair, including but not limited to the following steps: Step S910: Record the two gradient vectors in the gradient conflict pair as a first gradient vector and a second gradient vector respectively; Step S920: calculating a first projection of the first gradient vector in an orthogonal direction of the second gradient vector, and obtaining an updated gradient vector corresponding to the first gradient vector according to the first projection; Step S930: Calculate a second projection of the second gradient vector in a direction orthogonal to the first gradient vector, and obtain an updated gradient vector corresponding to the second gradient vector according to the second projection.

[0071] See also Figure 3 , Figure 3 A schematic diagram of a process for determining a first gradient fusion vector provided in an embodiment of the present application. Figure 3 There are two gradient vectors and ,when and The angle between <0 (i.e. >90°), and are called "conflicting gradient pairs", such as Figure 3 As shown in (1) in . To alleviate the gradient conflict between the two, the gradient vector Projection to the gradient vector The purpose is to eliminate conflicts while preserving as much as possible along the gradient vector The update step size and direction of the original gradient direction can be realized in this way. Update the gradient vector ,like Figure 3 As shown in (2) in the figure, a similar operation is used to convert the gradient vector Projection to the gradient vector In the orthogonal direction, the gradient vector is realized Update the gradient vector ,like Figure 3 As shown in (3) in .

[0072] For example, a gradient vector Projection to another gradient vector In the orthogonal direction of , can be calculated by the following formula: (Formula 2) It should be understood that by projecting one gradient vector in a gradient conflict pair onto an orthogonal direction of another gradient vector, it is possible to eliminate the conflict while preserving the update step size and direction along the original gradient direction as much as possible.

[0073] It should be noted that Figure 3 The number of gradient vectors is only for reference and may be more or less in actual application scenarios. Figure 3 There are more gradient vectors, and one gradient vector may have gradient conflicts with multiple other gradient vectors. For example, At the same time , If a gradient conflict occurs, we can First with Perform gradient relief and get the updated , determine the updated and Is there still a conflict? If so, let the updated and Perform gradient mitigation.

[0074] As a possible implementation, determining the first gradient fusion vector based on the N updated gradients includes but is not limited to the following steps: Step S1101: Add N updated gradient vectors to obtain a second gradient fusion vector.

[0075] Specifically, it can be calculated by the following formula: (Formula 3) Among them, the updated vector represents the updated gradient vector n, Represents the second gradient fusion vector.

[0076] Step S1102: performing a normalization operation on the second gradient fusion vector to obtain a third gradient fusion vector.

[0077] Specifically, it can be calculated by the following formula: (Formula 4) in, Represents the third gradient fusion vector.

[0078] It should be understood that performing a normalization operation on the second gradient fusion vector is to calculate the unit vector of the second gradient fusion vector, and then record the unit vector as the third gradient fusion vector.

[0079] Step S1103: Determine the gradient fusion vector amplitude according to the vector with the largest gradient amplitude among the N updated gradient vectors.

[0080] Specifically, it can be calculated by the following formula: (Formula 5) in, represents the gradient in the tth iteration The amplitude of Represents the gradient fusion vector magnitude in the t-th iteration.

[0081] It should be understood that the embodiment of the present application proposes a design of gradient amplitude balance to alleviate the problem of large gradient amplitude dominating the update process. Since in the implementation of the present application, the mask optimization is based on the iterative update of the gradient descent algorithm, determining the appropriate gradient size or step size is crucial to the convergence speed and final performance of the algorithm. A larger gradient size can accelerate convergence, and reducing the gradient size in subsequent iterations can fine-tune the results and find the Pareto optimal point. Based on the above ideas, the implementation of the present application proposes that the balanced gradient amplitude of the tth iteration is the maximum value of multiple gradient amplitudes.

[0082] Step S1104: Determine a first gradient fusion vector according to the third gradient fusion vector and the gradient fusion vector amplitude.

[0083] It should be understood that by adding N updated gradient vectors, a second gradient fusion vector can be obtained, which determines the direction of the final first gradient fusion vector; then the second gradient fusion vector is normalized to obtain a unit vector in the direction of the second gradient fusion vector (i.e., a third gradient fusion vector); then, the balanced gradient amplitude of the t-th iteration is set to the maximum value of multiple gradient amplitudes to obtain the gradient fusion vector amplitude; finally, the third gradient fusion vector is multiplied by the gradient fusion vector amplitude to determine the final first gradient fusion vector. The above process can achieve the balance of multi-objective gradients, thereby improving the optimization efficiency and the performance of the mask after optimization.

[0084] like Figure 3 As shown in (4), the updated gradient vector and Add together to get the gradient vector ; Then confirm and The maximum amplitude value in The amplitude value of is the maximum value; finally, Determine the final gradient fusion vector in the direction of , The amplitude value is equal to The amplitude value of Figure 3 As shown in (5) in .

[0085] It should be understood that with the continuous reduction of chip technology nodes, lithography accuracy faces great challenges. Optical mask optimization technology is of great significance in ensuring the fidelity of wafer patterns, improving chip performance, and reducing production costs. It is a key link in achieving high-precision chip manufacturing. In the actual lithography process, the disturbance of process parameters will seriously affect the imaging quality of the final wafer pattern and reduce the chip production yield. The embodiment of this application introduces multi-objective optimization theory and combines the basic principles of lithography models. In the mask optimization process, the effects of various process parameter disturbances are considered, thereby improving the quality and robustness of masks of different complexities. At the same time, starting from the two aspects of deployment using multiple GPUs and efficient algorithm design, the embodiment of this application explores fast gradient update calculation methods and efficient mask correction.

[0086] The method of the embodiment of the present application is described above, and the system of the embodiment of the present application is provided below.

[0087] See also Figure 4 , Figure 4 A schematic diagram of the structure of a multi-objective robust optimization system for a lithography mask provided in an embodiment of the present application. The multi-objective robust optimization system for a lithography mask has the function of implementing the multi-objective robust optimization method for a lithography mask provided in any of the above embodiments. The function can be implemented by hardware or by executing corresponding software by hardware. The hardware or software includes one or more modules corresponding to the above functions.

[0088] In a possible implementation, the photolithography mask multi-objective robust optimization system includes: A determination module, used to determine wafer patterns obtained by the initial mask under N process parameters respectively based on the lithography simulation model, where N is an integer greater than 1; A construction module is used to construct N loss functions based on deviations between wafer patterns obtained by various process parameters and target patterns, each loss function corresponding to one process parameter; The iterative optimization module is used to perform multiple rounds of iterative optimization on the initial mask until all loss functions converge and reach equilibrium, thereby obtaining an optimized mask.

[0089] It should be noted that the information interaction, execution process, etc. between the above-mentioned modules / units are based on the same concept as the method embodiment of the present application. Their specific functions and technical effects can be found in the method embodiment part and will not be repeated here.

[0090] See also Figure 5 The embodiment of the present application further provides a computer device 300. The computer device 300 may be a server or a terminal. The internal structure of the computer device 300 includes but is not limited to: A memory 310, used for storing programs; The processor 320 is used to execute the program stored in the memory 310. When the processor 320 executes the program stored in the memory 310, the processor 320 is used to execute the multi-objective robust optimization method for lithography masks in any of the previous embodiments.

[0091] The processor 320 and the memory 310 may be connected via a bus or other means.

[0092] The memory 310 is a non-transitory computer-readable storage medium that can be used to store non-transitory software programs and non-transitory computer executable programs, such as the multi-objective robust optimization method for lithography masks described in any embodiment of the present application. The processor 320 implements the multi-objective robust optimization method for lithography masks in any of the previous embodiments by running the non-transitory software programs and instructions stored in the memory 310.

[0093] The memory 310 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store and execute the above-mentioned multi-objective robust optimization method for lithography masks. In addition, the memory 310 may include a high-speed random access memory, and may also include a non-transitory memory, such as at least one disk storage device, a flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory 310 may optionally include a memory remotely arranged relative to the processor 320, and these remote memories may be connected to the processor 320 via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0094] The non-transitory software programs and instructions required to implement the above-mentioned multi-objective robust optimization method for lithography masks are stored in the memory 310. When executed by one or more processors 320, the multi-objective robust optimization method for lithography masks provided in any embodiment of the present application is executed.

[0095] An embodiment of the present application also provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to execute the above-mentioned multi-objective robust optimization method for lithography masks.

[0096] In one embodiment, the storage medium stores computer executable instructions, which are executed by one or more control processors, for example, by one or more processors 320 in the above-mentioned computer device 300, so that the above-mentioned one or more processors 320 can execute the multi-objective robust optimization method of the lithography mask provided in any embodiment of the present application.

[0097] The above described embodiments are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0098] It will be appreciated by those skilled in the art that all or some of the steps and systems in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or transient medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically include computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

[0099] In addition, an embodiment of the present application further provides a computer program product, including a computer program, which, when executed by a processor, implements the multi-objective robust optimization method for lithography masks as in any of the previous embodiments.

[0100] It should be noted that in the above embodiments, the description of each embodiment has its own emphasis, and for the parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0101] Finally, it should be noted that the embodiments described above are only specific implementation methods of the present application, which are used to illustrate the technical solution of the present application rather than to limit it. The protection scope of the present application is not limited thereto. Although the present application has been described in detail with reference to the aforementioned embodiments, ordinary technicians in this field should understand that any technician familiar with this technical field can still modify the technical solution recorded in the aforementioned embodiments within the technical scope disclosed in the present application, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solution deviate from the spirit and scope of the technical solution of the embodiments of the present application, and should all be covered by the protection scope of the present application.

Claims

1. A multi-objective robust optimization method for lithography masks, characterized in that: The method comprises the following steps: Determine wafer patterns obtained by the initial mask under N process parameters respectively based on the lithography simulation model, where N is an integer greater than 1; Based on the deviation between the wafer pattern and the target pattern obtained by various process parameters, construct N loss functions, each loss function corresponding to one process parameter; The initial mask is optimized through multiple rounds of iterations until all the loss functions converge and reach equilibrium, thereby obtaining an optimized mask.

2. The method according to claim 1, characterized in that: Each round of iterative optimization includes: Obtaining gradient vectors corresponding to the N loss functions respectively; Determine a gradient conflict pair from the N gradient vectors, and perform conflict mitigation on each of the gradient conflict pairs; After performing conflict mitigation on all the gradient conflict pairs, obtaining updated gradient vectors corresponding to the gradient vectors; Determine a first gradient fusion vector based on the N updated gradient vectors; The parameters in the initial mask are updated based on the first gradient fusion vector.

3. The method according to claim 2, characterized in that The step of determining a gradient conflict pair from the N gradient vectors comprises: Randomly selecting some gradient vectors from the N gradient vectors to construct a gradient vector set; The gradient conflicting pairs are determined from the set of gradient vectors.

4. The method according to claim 2 or 3, characterized in that: The determining of the gradient conflict pair comprises: If the angle between the two gradient vectors is greater than 90°, the two gradient vectors are determined to be the gradient conflict pair.

5. The method according to claim 4, characterized in that The step of performing conflict mitigation on each of the gradient conflict pairs includes: Recording two gradient vectors in the gradient conflict pair as a first gradient vector and a second gradient vector respectively; Calculating a first projection of the first gradient vector in an orthogonal direction of the second gradient vector, and obtaining an updated gradient vector corresponding to the first gradient vector according to the first projection; A second projection of the second gradient vector in an orthogonal direction of the first gradient vector is calculated, and an updated gradient vector corresponding to the second gradient vector is obtained according to the second projection.

6. The method according to claim 2, characterized in that The determining a first gradient fusion vector based on the N updated gradients includes: Adding the N updated gradient vectors to obtain a second gradient fusion vector; performing a normalization operation on the second gradient fusion vector to obtain a third gradient fusion vector; Determine the gradient fusion vector amplitude according to the vector with the largest gradient amplitude among the N updated gradient vectors; The first gradient fusion vector is determined according to the third gradient fusion vector and the gradient fusion vector amplitude.

7. The method according to claim 1, characterized in that The method of determining wafer patterns respectively obtained by using an initial mask under N process parameters based on a lithography simulation model includes: For each of the process parameters, performing a dot product weighted operation on the K photolithography kernels corresponding to the process parameter and the initial mask to obtain a photolithography intensity map; The lithography intensity map is processed based on the lithography simulation model to obtain the wafer pattern corresponding to the process parameters.

8. A multi-objective robust optimization system for lithography masks, characterized in that: include: A determination module, used to determine wafer patterns obtained by the initial mask under N process parameters respectively based on the lithography simulation model, where N is an integer greater than 1; A construction module, configured to construct N loss functions based on deviations between the wafer pattern and the target pattern obtained by various process parameters, each loss function corresponding to one of the process parameters; The iterative optimization module is used to perform multiple rounds of iterative optimization on the initial mask until all the loss functions converge and reach equilibrium, thereby obtaining an optimized mask.

9. A computer device, characterized in that: include: Memory, used to store programs; A processor, configured to execute the program stored in the memory. When the processor executes the program stored in the memory, the processor is configured to execute: a method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that: Computer executable instructions are stored, and the computer executable instructions are used to execute: the method according to any one of claims 1 to 7.

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