A voltage generating circuit with adjustable temperature coefficient

Abstract

The present application discloses a voltage generating circuit with an adjustable temperature coefficient, comprising: a first transistor, a second transistor, a first adjustable resistor and a second adjustable resistor, wherein the first adjustable resistor is connected in series with the first transistor, and one end of the first adjustable resistor is connected to the drain and the gate of the first transistor; the first transistor and the second transistor are connected in series, and the source of the first transistor is connected to the drain, the gate and one end of the second adjustable resistor of the second transistor; the second transistor and the second adjustable resistor are connected in parallel, and the source of the second transistor is grounded; the other end of the second adjustable resistor is grounded.

Description

Technical Field

[0001] The present application relates to the technical field of voltage generating circuits, and in particular to a voltage generating circuit with an adjustable temperature coefficient. Background Art

[0002] In the system-on-chip (SoC), since LDO can maintain good output voltage stability while providing a large output current swing, each circuit submodule (such as low noise amplifier, analog-to-digital converter, etc.) needs to be powered by its own LDO. The LDO output voltage is essentially a copy of the input reference voltage, so the input reference voltage generation circuit plays an important role in the LDO. The existing voltage generation circuit based on the triode NPN generates a high voltage, and the temperature characteristics of the generated voltage are not adjustable. Summary of the invention

[0003] In view of the technical problems existing in the above-mentioned prior art, the present disclosure provides a voltage generating circuit with adjustable temperature coefficient.

[0004] According to one aspect of the present application, a voltage generating circuit with an adjustable temperature coefficient is provided, comprising a first transistor, a second transistor, a first adjustable resistor and a second adjustable resistor, wherein

[0005] A first adjustable resistor is connected in series with the first transistor, and one end of the first adjustable resistor is connected to the drain and the gate of the first transistor;

[0006] The first transistor and the second transistor are connected in series, and the source of the first transistor is connected to the drain, the gate and one end of the second adjustable resistor of the second transistor;

[0007] The second transistor and the second adjustable resistor are connected in parallel, and the source of the second transistor is grounded;

[0008] The other end of the second adjustable resistor is grounded.

[0009] Optionally, the first transistor and / or the second transistor is a MOS transistor.

[0010] Optionally, the positive temperature coefficient current generated by other circuits flows into one end of the first adjustable resistor, and outputs a reference voltage from the same end of the first adjustable resistor.

[0011] Optionally, the voltage generating circuit further includes: a low voltage dropout regulator, and the reference voltage is copied to the output voltage through the low voltage dropout regulator.

[0012] Optionally, the reference voltage is expressed as:

[0013] Vref=Iptat·R1+Vgs1+Vgs2

[0014] Wherein, Vref is a reference voltage, Iptat is a positive temperature coefficient current, R1 is a first adjustable resistor, and Vgs1 and Vgs2 are the source-source voltage differences of the first transistor and the second transistor, respectively.

[0015] Optionally, the source-source voltage differences Vgs1 and Vgs2 of the first transistor and the second transistor are voltage differences generated by a positive temperature coefficient current Iptat flowing through the first transistor and the second transistor.

[0016] Optionally, the magnitude of the gate-source voltage difference Vgs2 of the second transistor is affected by the resistance value of the second adjustable resistor.

[0017] Optionally, the resistance values ​​of the first adjustable resistor and the second adjustable resistor are controlled by digital signals generated by a system on chip (SOC).

[0018] Therefore, the present application adopts a first transistor and a second transistor with a lower threshold voltage to replace the NPN transistor to generate a lower output voltage. The first adjustable resistor R1 and the first transistor M1 are connected in series, and the second adjustable resistor R2 and the second transistor M2 are connected in parallel. By adjusting the first adjustable resistor R1 and the second adjustable resistor R2, the output reference voltage Vref with different temperature coefficients can be achieved.

[0019] Based on the detailed description of the specific embodiments of the present application in combination with the accompanying drawings below, those skilled in the art will become more aware of the above and other objects, advantages and features of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Hereinafter, some specific embodiments of the present application will be described in detail in an exemplary and non-limiting manner with reference to the accompanying drawings. The same reference numerals in the accompanying drawings indicate the same or similar components or parts. It should be understood by those skilled in the art that these drawings are not necessarily drawn to scale. In the accompanying drawings:

[0021] Figure 1 is a schematic diagram of a voltage generating circuit with adjustable temperature coefficient according to an embodiment of the present application;

[0022] Figure 2 is a schematic diagram of an alternative solution of a voltage generating circuit with adjustable temperature coefficient according to an embodiment of the present application;

[0023] Figure 3 It is a simulation diagram of the temperature characteristic of the reference voltage Vref under different first adjustable resistor R1 / second adjustable resistor R2 combinations according to the embodiment of the present application. DETAILED DESCRIPTION

[0024] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other. The present disclosure will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0025] In order to enable those skilled in the art to better understand the scheme of the present disclosure, the technical scheme in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in the field without creative work should fall within the scope of protection of the present disclosure.

[0026] It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so as to describe the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0027] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0028] Figure 1 is a schematic diagram of a voltage generating circuit with adjustable temperature coefficient according to an embodiment of the present application. Figure 1 As shown, the voltage generating circuit with adjustable temperature coefficient includes a first transistor, a second transistor, a first adjustable resistor and a second adjustable resistor, wherein

[0029] A first adjustable resistor is connected in series with the first transistor, and one end of the first adjustable resistor is connected to the drain and the gate of the first transistor;

[0030] The first transistor and the second transistor are connected in series, and the source of the first transistor is connected to the drain, the gate and one end of the second adjustable resistor of the second transistor;

[0031] The second transistor and the second adjustable resistor are connected in parallel, and the source of the second transistor is grounded;

[0032] The other end of the second adjustable resistor is grounded;

[0033] Specifically, refer to Figure 1 As shown, a MOS transistor with a lower threshold voltage is used to replace the NPN transistor to generate a lower output voltage. The circuit adopts a first adjustable resistor R1 and a first transistor M1 connected in series, and a second adjustable resistor R2 and a second transistor M2 connected in parallel. By adjusting the first adjustable resistor R1 and the second adjustable resistor R2, an output reference voltage Vref with different temperature coefficients can be achieved.

[0034] Optionally, the first transistor and / or the second transistor is a MOS transistor.

[0035] Specifically, refer to Figure 1 and Figure 2 As shown, the first transistor M1 and the second transistor M2 may be NMOS transistors or PMOS transistors.

[0036] Optionally, the positive temperature coefficient current generated by other circuits flows into one end of the first adjustable resistor, and outputs a reference voltage from the same end of the first adjustable resistor.

[0037] Optionally, the voltage generating circuit further includes: a low voltage dropout regulator, and the reference voltage is copied to the output voltage through the low voltage dropout regulator.

[0038] Specifically, refer to Figure 1 As shown, the positive temperature coefficient current Iptat generated by other circuits is connected in series with the first adjustable resistor R1, connected to the drain and the gate of the first transistor M1, the source of the first transistor M1 is connected to the drain and the gate of the second transistor M2 and the second adjustable resistor R2, the source of the second transistor M2 and the other end of the second adjustable resistor R2 are grounded, and a reference voltage Vref is generated. The reference voltage can be copied to the output voltage Vldo through the low dropout regulator LDO.

[0039] Optionally, the reference voltage is expressed as:

[0040] Vref=Iptat·R1+Vgs1+Vgs2

[0041] Wherein, Vref is a reference voltage, Iptat is a positive temperature coefficient current, R1 is a first adjustable resistor, and Vgs1 and Vgs2 are the source-source voltage differences of the first transistor and the second transistor, respectively.

[0042] Optionally, the source-source voltage differences Vgs1 and Vgs2 of the first transistor and the second transistor are voltage differences generated by a positive temperature coefficient current Iptat flowing through the first transistor and the second transistor.

[0043] Optionally, the magnitude of the gate-source voltage difference Vgs2 of the second transistor is affected by the resistance value of the second adjustable resistor.

[0044] Specifically, the source voltage difference Vgs1 and Vgs2 of the first transistor and the second transistor have negative temperature characteristics. The positive temperature coefficient current Iptat and the source voltage difference Vgs1 of the first transistor present a positive temperature coefficient characteristic, the positive temperature coefficient current Iptat and the source voltage difference Vgs2 of the second transistor present a negative temperature coefficient characteristic, and the voltage magnitude of the source voltage difference Vgs2 of the second transistor is also affected by the parallel second adjustable resistor R2. By adjusting the resistance magnitudes of the first adjustable resistor R1 and the second adjustable resistor R2 in the formula, a reference voltage Vref with different temperature characteristics can be achieved.

[0045] Optionally, the resistance values ​​of the first adjustable resistor and the second adjustable resistor are controlled by digital signals generated by a system-on-chip (SOC). A method that is easy to implement digital control in the SoC is used to achieve voltages with different temperature coefficients.

[0046] In addition, reference Figure 3 As shown, the temperature characteristic simulation diagram of the reference voltage Vref under different combinations of the first adjustable resistor R1 / the second adjustable resistor R2. When R1=R2=24K, Vref is symmetrically distributed around the middle temperature of 40 degrees; when R1=36K, R2=12K, Vref presents a positive temperature characteristic with a peak at around 100 degrees; and when R1=20K, R2=36K, Vref presents a negative temperature characteristic with a peak at around -20 degrees. In the system-on-chip SoC, digital signals are easily generated, and different circuit modules can obtain voltages with different temperature characteristics by controlling resistors through digital signals according to their own needs.

[0047] Therefore, the present application generates a lower output voltage through an ordinary field effect MOS transistor, and realizes reference voltage output with different temperature characteristics by digitally controlling the resistance values ​​of the first adjustable resistor and the second adjustable resistor. It can be applied to any system chip of a low dropout regulator LDO circuit or other circuit that requires a voltage generation circuit.

[0048] Unless otherwise specifically stated, the relative arrangement of the parts and steps described in these embodiments, numerical expressions and numerical values ​​do not limit the scope of the present disclosure. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the drawings are not drawn according to the actual proportional relationship. The technology, methods and equipment known to ordinary technicians in the relevant field may not be discussed in detail, but in appropriate cases, the technology, methods and equipment should be regarded as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar numbers and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further discussed in subsequent drawings.

[0049] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.

[0050] In the description of the present disclosure, it is necessary to understand that the orientation or positional relationship indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present disclosure and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the scope of protection of the present disclosure; the directional words "inside and outside" refer to the inside and outside relative to the outline of each component itself.

[0051] The above is only a preferred specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A voltage generating circuit with adjustable temperature coefficient, characterized in that: include: a first transistor, a second transistor, a first adjustable resistor and a second adjustable resistor, wherein The first adjustable resistor is connected in series with the first transistor, and one end of the first adjustable resistor is connected to the drain and the gate of the first transistor; The first transistor and the second transistor are connected in series, and the source of the first transistor is connected to the drain, the gate and one end of the second adjustable resistor of the second transistor; The second transistor and the second adjustable resistor are connected in parallel, and the source of the second transistor is grounded; The other end of the second adjustable resistor is grounded.

2. The voltage generating circuit according to claim 1, characterized in that: The first transistor and / or the second transistor is a MOS transistor.

3. The voltage generating circuit according to claim 1, characterized in that: The positive temperature coefficient current generated by other circuits flows into one end of the first adjustable resistor, and outputs a reference voltage from the same end of the first adjustable resistor.

4. The voltage generating circuit according to claim 3, characterized in that: Also includes: A low voltage dropout regulator, wherein the reference voltage is copied to an output voltage through the low voltage dropout regulator.

5. The voltage generating circuit according to claim 3, characterized in that: The reference voltage is expressed as: Vref=Iptat·R1+Vgs1+Vgs2 Wherein, Vref is a reference voltage, Iptat is a positive temperature coefficient current, R1 is a first adjustable resistor, and Vgs1 and Vgs2 are the source-source voltage differences of the first transistor and the second transistor, respectively.

6. The voltage generating circuit according to claim 5, characterized in that: The gate-source voltage differences Vgs1 and Vgs2 between the first transistor and the second transistor are voltage differences generated by the positive temperature coefficient current Iptat flowing through the first transistor and the second transistor.

7. The voltage generating circuit according to claim 5, characterized in that: The magnitude of the gate-source voltage difference Vgs2 of the second transistor is affected by the resistance value of the second adjustable resistor.

8. The voltage generating circuit according to claim 1, characterized in that: The resistance values ​​of the first adjustable resistor and the second adjustable resistor are controlled by digital signals generated by a system-on-chip (SOC).

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