Capacitance sensing unit and system

Abstract

The invention discloses a capacitance sensing unit and system. The capacitance sensing unit comprises a GM module, an integral storage module, a quantization circuit module and a counting module. A first input end of the GM module is used for receiving a sensing signal representing a system to be tested, a second input end of the GM module is connected with a reference voltage, a first output end of the GM module is connected with the first input end to generate a first current, and a second output end of the GM module outputs a second current having an adjustable proportion with the first current; the adjustable proportion is used for amplifying or reducing the signal; the integral storage module is connected with the second output end and is used for performing integral storage on the current output by the GM module; the quantization circuit module is connected with the integral storage module; and the counting module is connected with the quantization circuit module and is used for counting the output of the quantization circuit module. According to the invention, high-signal-to-noise-ratio capacitance detection can be realized under the condition of severe noise interference.

Description

Technical Field

[0001] The present invention relates to the field of sensor technology, and in particular to a capacitive sensing unit and system. Background Art

[0002] With the development of technology, touch sensors have become an important way of human-computer interaction due to their simple, direct and user-friendly features. In electronic products such as mobile phones, tablets, wearable devices, computers, display screens, etc., capacitive touch has become the mainstream touch technology due to its advantages in durability, multi-touch, and lightness.

[0003] In capacitive touch, touch sensing plays a key role in the touch experience, and its performance directly affects the sensitivity, accuracy and anti-interference ability of touch. The touch sensing system faces a variety of noise interference during operation, mainly including LCD display noise, charger noise, power grid noise, light interference, RF interference, etc. These noises have different frequency and amplitude characteristics.

[0004] There are two main ways to improve the signal-to-noise ratio in the prior art: one is to add a filter to filter out or attenuate the noise, and the other is to operate the touch sensing system in a non-noise frequency range to avoid or reduce the impact of noise. However, these solutions have obvious shortcomings: since noise interference is often much larger than the signal amplitude in actual applications, in order to measure and filter out the noise interference, either the signal needs to be reduced and then tested, or a very large measurement range is required. Both methods will significantly increase the system cost and it is difficult to ensure the accuracy of detection.

[0005] In addition, existing capacitance detection circuits often use a fixed rate quantization method when performing signal quantization, which results in a longer quantization time when processing larger signals, reducing the detection efficiency of the system. In particular, in the presence of large noise interference, it is difficult for the detection system to quickly and accurately complete signal quantization, affecting touch performance.

[0006] Therefore, it is urgent to provide a capacitance sensing unit and system to solve the above problems. Summary of the invention

[0007] The object of the present invention is to provide a capacitance sensing unit and system, which can realize capacitance detection with a high signal-to-noise ratio under the condition of severe noise interference.

[0008] In order to solve the above technical problems, the present invention provides a capacitance sensing unit, including a GM module, an integral storage module, a quantization circuit module and a counting module; The first input terminal of the GM module is used to receive a sensing signal representing the system to be tested, the second input terminal of the GM module is connected to a reference voltage, the first output terminal of the GM module is connected to the first input terminal to generate a first current, and the second output terminal of the GM module outputs a second current having an adjustable ratio with the first current, and the adjustable ratio is used to amplify or reduce the signal; The integral storage module is connected to the second output terminal and is used to integrate and store the current output by the GM module; The quantization circuit module is connected to the integral storage module, and is used to quantify the charge on the integral storage module and control the voltage on the integral storage module to be stable within a set range; The counting module is connected to the quantization circuit module and is used to count the output of the quantization circuit module to obtain a count value representing the capacitance value of the system to be measured.

[0009] Further, the integral storage module includes a switch circuit and an integral capacitor; The switch circuit is connected to the second output terminal and is used to convert the second current into a unidirectional current under the control of a clock signal; the integration capacitor is connected to the switch circuit and is used to integrate the unidirectional current.

[0010] Further, the quantization circuit module includes a plurality of comparison voltages and a plurality of current sources; The multiple comparison voltages include a target voltage, and the multiple current sources are used to charge and discharge the integration storage module according to the magnitude relationship between the voltage on the integration storage module and the multiple comparison voltages, so that the voltage on the integration storage module is stabilized near the target voltage.

[0011] Furthermore, the quantization circuit module also includes a plurality of voltage comparators and a current source control circuit; The first input ends of the multiple voltage comparators are connected to the integral storage module, and the second input ends of the multiple voltage comparators are respectively connected to the multiple comparison voltages, so as to compare the magnitude relationship between the voltage on the integral storage module and the multiple comparison voltages; the current source control circuit is used to control the number of current sources turned on according to the difference between the voltage on the integral storage module and the target voltage.

[0012] Further, the multiple current sources include a discharge current source and a charge current source; The discharging current source is used to discharge the integral storage module, and the charging current source is used to charge the integral storage module.

[0013] Furthermore, when the voltage on the integral storage module is higher than the target voltage, the discharge current source performs discharge; and when the voltage on the integral storage module is lower than the target voltage, the charge current source performs charge.

[0014] In addition, the present invention also proposes a capacitance sensing system, including the capacitance sensing unit as described above, and also including a system to be tested and a data processing module; the system to be tested is connected to the GM module; the data processing module is used to perform data analysis and processing on the count value output by the counting module.

[0015] Furthermore, the data analysis process includes at least one of data storage, data filtering and data extraction.

[0016] Further, the system to be tested includes a mutual capacitance system; the mutual capacitance system includes a transmitting electrode TX, a receiving electrode RX, a transmitting capacitor Ctx, a mutual capacitor Cm and a receiving capacitor Crx; The two ends of the mutual capacitor Cm are respectively connected to the transmitting electrode TX and the receiving electrode RX; the end of the receiving electrode RX away from the mutual capacitor Cm is connected to the GM module; one end of the transmitting capacitor Ctx is connected to the transmitting electrode TX, and the other end is grounded; one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

[0017] Furthermore, the system to be tested includes a self-capacitance system; the self-capacitance system includes a receiving electrode RX and a receiving capacitor Crx; the receiving electrode RX is connected to the first input end of the GM module, one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

[0018] Through the above technical solution, the present invention has the following beneficial effects: The sensing signal of the system to be tested is converted into current through the GM module, and the second output end of the GM module outputs a second current proportional to the first current, which is integrated and stored in combination with the integral storage module. The charge on the integral storage module is quantized through the quantization circuit module, and the voltage on the integral storage module is controlled to be stable within a set range. Finally, the counting value representing the capacitance value of the system to be tested is obtained through the counting module, thereby realizing stable and reliable capacitance detection.

[0019] Since the GM module can amplify the signal by A times, the signal quantity and signal-to-noise ratio are significantly improved; the quantization circuit module uses multiple current sources to control the charging and discharging of the integral storage module (that is, the current control method of Kn×Iunit is adopted), which expands the quantization range without increasing the area of ​​the integral capacitor, which not only ensures the small area advantage of the chip, but also reduces the system cost; the current is converted into a unidirectional current for integration through a switching circuit, and the number of current sources turned on is controlled according to the difference between the voltage on the integral storage module and the target voltage, thereby achieving a faster quantization speed; at the same time, the system supports two detection methods, mutual capacitance and self-capacitance, and has a wide range of applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 A schematic diagram of the overall structure of a capacitance sensing system according to an embodiment of the present invention; Figure 2 A timing diagram of voltage and current on a main node of mutual capacitance detection in a capacitance sensing system according to an embodiment of the present invention; Figure 3 A schematic diagram of the structure of a capacitance sensing system in another embodiment of the present invention; Figure 4 A timing diagram of voltage and current on a main node of a capacitance sensing system for self-capacitance detection in another embodiment of the present invention; Figure 5 It is a structural schematic diagram of a quantization circuit module in a capacitance sensing system in one embodiment of the present invention; Figure 6 FIG. 1 is a schematic diagram of the voltage on the integral capacitor in a capacitance sensing system according to an embodiment of the present invention. DETAILED DESCRIPTION

[0021] A capacitive sensing unit and system of the present invention will be described in more detail below in conjunction with the accompanying drawings, wherein preferred embodiments of the present invention are shown, and it should be understood that those skilled in the art may modify the present invention described herein while still achieving the beneficial effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art, and not as a limitation of the present invention.

[0022] The present invention is described in more detail in the following paragraphs by way of example with reference to the accompanying drawings. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the accompanying drawings are in very simplified form and are not in exact proportions, and are only used to facilitate and clearly assist in illustrating the purpose of the embodiments of the present invention.

[0023] like Figure 1 and Figure 3As shown, an embodiment of the present invention proposes a capacitance sensing unit, including: a GM module, an integral storage module, a quantization circuit module (Quantization Circuit) and a counting module (Counter).

[0024] Specifically, the first input end of the GM module is used to receive a sensing signal Vrx representing the system to be measured, the second input end of the GM module is connected to a reference voltage Vcm, the first output end of the GM module is connected to the first input end to generate a first current Iout, and the second output end of the GM module outputs a second current A×Iout having an adjustable ratio with the first current, and the adjustable ratio is used to amplify or reduce the signal. Among them, A is an adjustable amplitude modulation coefficient, and this ratio can be set according to actual conditions, and can be amplified or reduced, so that the signal (i.e., the sensing signal Vrx; in the mutual capacitance mode, the sensing signal Vrx is the sensing signal on the receiving electrode RX; in the self-capacitance mode, the sensing signal Vrx is the sensing signal on the receiving electrode RX) can be scaled. The integral storage module is connected to the second output terminal, and is used to integrate and store the current output by the GM module; the quantization circuit module is connected to the integral storage module, and is used to quantify the charge on the integral storage module, and control the voltage Vint on the integral storage module to be stable within a set range; the counting module is connected to the quantization circuit module, and is used to count the output of the quantization circuit module to obtain a count value representing the capacitance value of the system to be measured.

[0025] In one embodiment, the GM module includes a transconductance operational amplifier. The first input terminal is an operational amplifier inverting input terminal, connected to the system to be measured; the second input terminal is an operational amplifier non-inverting input terminal, coupled to a reference voltage Vcm; the first output terminal is connected to the first input terminal to generate a first current Iout; the second output terminal generates a second current A×Iout, that is, the second current A×Iout at the second output terminal is a copy of the first current Iout at the first input terminal, and the current size can be scaled A times. Wherein, A is an adjustable amplitude modulation coefficient, and by adjusting A, the signal can be amplified to improve the signal-to-noise ratio, but signal amplification will increase the cost of the circuit, such as chip area, working time, etc.

[0026] In addition, the signals to which the first input terminal and the second input terminal of the GM module are specifically connected may vary according to different working modes. For example, in the self-capacitance mode, the first input terminal is connected to the receiving electrode RX for receiving voltage changes on the receiving electrode RX. For another example, in the mutual capacitance mode, the first input terminal is connected to the receiving electrode RX for receiving voltage changes coupled from the transmitting electrode TX to the receiving electrode RX. Regardless of the working mode, the first current Iout generated is related to the capacitance in the system to be measured and the swing of the applied excitation signal. For example, in the mutual capacitance mode, the charge Cm×ΔVtx generated by the mutual capacitance Cm and the swing ΔVtx of the transmitting electrode excitation signal is provided by the first current Iout.

[0027] In one embodiment, the integration storage module includes a switch circuit CH and an integration capacitor C1. Specifically, the switch circuit CH is connected to the second output terminal, and is used to convert the second current A×Iout into a unidirectional current under the control of the clock signal CK; the integration capacitor C1 is connected to the switch circuit CH, and is used to integrate the unidirectional current.

[0028] In this embodiment, the switch circuit CH is connected to the second output terminal of the GM module, and is coupled to the integration capacitor C1 and the quantization circuit module. The main purpose of the switch circuit CH is to demodulate the forward and reverse currents generated by the GM module under the control of the clock signal CK, convert them into currents in the same direction, and then send them to the integration capacitor C1 for integration. The integration capacitor C1 is used to integrate the current demodulated by the switch circuit CH. The size of the integration capacitor C1 determines the size of the integrable signal, but it should be noted that the capacitor consumes a large area in the chip.

[0029] In one embodiment, the quantization circuit module includes multiple comparison voltages and multiple current sources. Specifically, the multiple comparison voltages include a target voltage, and the multiple current sources are used to charge and discharge the integration storage module according to the magnitude relationship between the voltage Vint on the integration storage module and the multiple comparison voltages, so that the voltage Vint on the integration storage module is stabilized near the target voltage.

[0030] Furthermore, the quantization circuit module also includes a plurality of voltage comparators (i.e. Figure 5Specifically, the first input terminals of the plurality of voltage comparators are connected to the integral storage module, and the second input terminals of the plurality of voltage comparators are respectively connected to the plurality of comparison voltages, for comparing the magnitude relationship between the voltage Vint on the integral storage module and the plurality of comparison voltages; the current source control circuit is used to control the number of current sources turned on according to the difference between the voltage Vint on the integral storage module and the target voltage.

[0031] In this embodiment, the multiple current sources include a discharge current source and a charge current source. Specifically, the discharge current source is used to discharge the integral storage module, and the charge current source is used to charge the integral storage module.

[0032] Preferably, when the voltage Vint on the integral storage module is higher than the target voltage, the discharge current source performs discharge; and when the voltage Vint on the integral storage module is lower than the target voltage, the charge current source performs charge.

[0033] Preferably, the current magnitudes of the multiple current sources satisfy In=Kn×Iunit, where Kn is a positive integer and Iunit is a reference current; the current magnitude ratio of adjacent gears in the discharging current source is a first set threshold value (for example, 2), and the current magnitude ratio of adjacent gears in the charging current source is a second set threshold value (for example, 2).

[0034] In this embodiment, Figure 2 The voltage and current waveforms of the main nodes when working in the mutual capacitance mode in this embodiment. It can be seen from the figure that when the transmitting electrode TX inputs the excitation signal VTX, a corresponding voltage change Vrx will be generated on the receiving electrode RX. The GM module converts the voltage change into a first current Iout and a second current A×Iout. After demodulation by the switching circuit CH, the voltage Vint on the integrating capacitor C1 will change accordingly. The quantization circuit module controls the charge and discharge current so that Vint is finally stabilized near the target voltage Vref3.

[0035] In this embodiment, Figure 4It is a voltage and current waveform diagram of the main nodes when working in the self-capacitance mode in another embodiment. As can be seen from the figure, the figure shows the voltage and current changes on each main node in the self-capacitance mode, including the change of the reference voltage Vcm, the voltage signal Vrx generated on the receiving electrode RX, the current Iout generated by the GM module and the amplified current A×Iout, and the voltage Vint change on the integral capacitor C1. The figure shows that when the reference voltage Vcm jumps high and low, due to the existence of the self-capacitance Crx from the receiving electrode to the ground, a charge change is generated on the receiving electrode RX, and is converted into a current output through the GM module, and finally the voltage Vint on the integral capacitor is stabilized near the target voltage Vref3 through the control of the quantization circuit module.

[0036] Figure 6 This is a schematic diagram of the control of the voltage Vint on the integral capacitor C1 by the quantization circuit module in this embodiment. The solid line in the figure shows the change process of Vint when there is multi-level charge and discharge control: when Vint is in different voltage ranges, by controlling different numbers of current sources to turn on, Vint changes with different slopes and finally stabilizes quickly near the target voltage Vref3. The dotted line in the figure shows the change process of Vint when only a single speed charge and discharge is used, which requires a longer quantization time.

[0037] In a specific example, if Figure 5 and Figure 6 As shown, while the integrating capacitor C1 is integrating the current, the quantization circuit module is also synchronously quantizing and removing or replenishing the quantized charge from the integrating capacitor C1 to prevent the voltage on the integrating capacitor C1 from being too high or too low.

[0038] Specifically, when the voltage Vint on the integration capacitor C1 is higher or lower than a certain comparison voltage, the quantization circuit module charges or discharges the integration capacitor C1 at a corresponding speed. The further Vint deviates from the target voltage, the faster the charging or discharging speed, and eventually Vint is stabilized near the target comparison voltage.

[0039] For example, the comparison voltages Vref1>Vref2>Vref3>Vref4>Vref5 are set, where Vref3 is the target voltage, and the number and size of the comparison voltages can be set according to actual needs. When Vint>Vref1, turn on the currents I1, I2, and I3 to discharge the integral capacitor C1; when Vref1>Vint>Vref2, turn on the currents I2 and I3 to discharge the integral capacitor C1; when Vref2>Vint>Vref3, turn on the current I3 to discharge the integral capacitor C1; when Vref3>Vint>Vref4, turn on the current I4 to charge the integral capacitor C1; when Vref4>Vint>Vref5, turn on the currents I4 and I5 to charge the integral capacitor C1; when Vref5>Vint, turn on the currents I4, I5, and I6 to charge the integral capacitor C1. Among them, the current size of each current source satisfies In=Kn×Iunit (Kn is a positive integer), the currents I1, I2, I3 are opposite to the currents I4, I5, I6, preferably I3=I4=Iunit. The minimum charge and discharge time unit is tclk, and the minimum charge and discharge charge is preferably Iunit×tclk, so that Vint is finally stabilized near Vref3, and the deviation is Iunit×tclk / C1. Among them, Figure 1 and Figure 3 The CLK shown is the system clock signal, and tclk is the period of the CLK clock signal, that is, the minimum charging and discharging time unit.

[0040] Continue to refer Figure 6 As shown, when Vint is in different voltage intervals, it will change with different slopes, that is, the quantized circuit charges and discharges at different speeds. The more Vint deviates from the target voltage Vref3, the faster the charging and discharging speed is, and finally stabilizes near Vref3. By controlling the direction and magnitude of the current in the quantization circuit, not only the quantization speed and accuracy, the charging and discharging speed are controlled, and the voltage on the integral capacitor C1 is prevented from being too high or too low, but also the area required for the integral capacitor C1 is reduced, the quantizable range is increased, and the quantization speed is improved.

[0041] In summary, this embodiment controls the quantization speed and accuracy, the charging and discharging speed by controlling the current direction and size in the quantization circuit module, prevents the voltage on the integral capacitor C1 from being too high or too low, reduces the area of ​​the integral capacitor C1, increases the quantizable range, and improves the quantization speed.

[0042] In addition, continue to refer to Figure 1 and Figure 3 As shown, this embodiment further provides a capacitance sensing system, including the capacitance sensing unit as described above, and also including a system to be tested and a data processing module (Digital Processor).

[0043] Specifically, the system to be tested is connected to the GM module; the data processing module is used to perform data analysis and processing on the counting value output by the counting module.

[0044] In this embodiment, the data analysis process includes at least one of data storage, data filtering and data extraction.

[0045] In a specific example, the system to be tested includes a mutual capacitance system; the mutual capacitance system includes a transmitting electrode TX, a receiving electrode RX, a transmitting capacitor Ctx, a mutual capacitor Cm and a receiving capacitor Crx; Specifically, the two ends of the mutual capacitance Cm are respectively connected to the transmitting electrode TX and the receiving electrode RX; the end of the receiving electrode RX away from the mutual capacitance Cm is connected to the GM module; one end of the transmitting capacitor Ctx is connected to the transmitting electrode TX, and the other end is grounded; one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

[0046] In another specific example, the system to be tested includes a self-capacitance system; the self-capacitance system includes a receiving electrode RX and a receiving capacitor Crx.

[0047] Specifically, the receiving electrode RX is connected to the first input end of the GM module, one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

[0048] In this embodiment, continue to refer to Figure 2 as well as Figure 4-Figure 6 As shown in the figure, in the self-capacitance mode, the op amp inverting input terminal is directly connected to the receiving electrode RX. When the reference voltage Vcm changes from high to low, the self-capacitance from the receiving electrode to the ground (i.e., the receiving capacitance Crx of the self-capacitance system) generates a charge change Crx×ΔVcm. The GM module converts the charge change into a current output.

[0049] In mutual capacitance mode, mutual capacitance Cm is formed between the transmitting electrode TX and the receiving electrode RX due to the presence of a medium. When the TX inputs an excitation signal with an amplitude of VTX, a charge change Cm×VTX is generated at the RX end due to the presence of mutual capacitance Cm. The GM module also converts the charge change into current output. External touch will change the mutual capacitance value Cm.

[0050] Therefore, in the self-capacitance mode, the generated current is related to the change ΔVcm of the receiving capacitance Crx and the reference voltage Vcm; in the mutual capacitance mode, the generated current is related to the mutual capacitance Cm and the transmitting electrode excitation signal VTX. Under the control of the clock signal CK, the switch circuit CH demodulates the forward and reverse currents generated by the GM module into the same direction current and sends it to the integration capacitor C1 for integration. The quantization circuit module quantizes the charge on the integration capacitor C1.

[0051] For example, five reference voltages Vref1>Vref2>Vref3>Vref4>Vref5 are set, and Vref3 is the target voltage. When the voltage Vint on the integral capacitor C1 is in different intervals, different combinations of current sources will be turned on: Vint>Vref1: turn on I1, I2, and I3 to discharge; Vref1>Vint>Vref2: turn on I2 and I3 to discharge; Vref2>Vint>Vref3: turn on I3 to discharge; Vref3>Vint>Vref4: start I4 charging; Vref4>Vint>Vref5: start charging I4 and I5; Vref5>Vint: Turn on I4, I5, and I6 for charging.

[0052] The current source size satisfies In=Kn×Iunit, preferably I3=I4=Iunit. The minimum charge and discharge time is tclk, and the minimum charge and discharge charge is Iunit×tclk. Through multi-level current control, Vint is quickly stabilized near Vref3, and the deviation is Iunit×tclk / C1. Finally, the counting module counts and accumulates the output of the quantization circuit to obtain a count value related to the capacitance value to be measured.

[0053] It can be seen that this embodiment improves the signal-to-noise ratio through the A-fold amplification of the GM module, expands the quantization range and speeds up the quantization speed through multi-level quantization current control, and reduces the area requirement of the integral capacitor C1, which has a good cost advantage. In addition, this embodiment can work effectively in both self-capacitance and mutual capacitance modes, achieving high-sensitivity and high-precision touch sensing.

[0054] In summary, the capacitive sensing unit and system proposed in the present invention have the following advantages: The sensing signal of the system to be tested is converted into current through the GM module, and the second output end of the GM module outputs a second current proportional to the first current, which is integrated and stored in combination with the integral storage module. The charge on the integral storage module is quantized through the quantization circuit module, and the voltage on the integral storage module is controlled to be stable within a set range. Finally, the counting value representing the capacitance value of the system to be tested is obtained through the counting module, thereby realizing stable and reliable capacitance detection.

[0055] Since the GM module can amplify the signal by A times, the signal quantity and signal-to-noise ratio are significantly improved; the quantization circuit module uses multiple current sources to control the charging and discharging of the integral storage module (that is, the current control method of Kn×Iunit is adopted), which expands the quantization range without increasing the area of ​​the integral capacitor, which not only ensures the small area advantage of the chip, but also reduces the system cost; the current is converted into a unidirectional current for integration through a switching circuit, and the number of current sources turned on is controlled according to the difference between the voltage on the integral storage module and the target voltage, thereby achieving a faster quantization speed; at the same time, the system supports two detection methods, mutual capacitance and self-capacitance, and has a wide range of applications.

[0056] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A capacitive sensing unit, characterized in that: It includes GM module, integral storage module, quantization circuit module and counting module; The first input terminal of the GM module is used to receive a sensing signal representing the system to be tested, the second input terminal of the GM module is connected to a reference voltage, the first output terminal of the GM module is connected to the first input terminal to generate a first current, and the second output terminal of the GM module outputs a second current having an adjustable ratio with the first current, and the adjustable ratio is used to amplify or reduce the signal; The integral storage module is connected to the second output terminal and is used to integrate and store the current output by the GM module; The quantization circuit module is connected to the integral storage module, and is used to quantify the charge on the integral storage module and control the voltage on the integral storage module to be stable within a set range; The counting module is connected to the quantization circuit module and is used to count the output of the quantization circuit module to obtain a count value representing the capacitance value of the system to be measured.

2. The capacitive sensing unit according to claim 1, wherein: The integral storage module includes a switch circuit and an integral capacitor; The switch circuit is connected to the second output terminal and is used to convert the second current into a unidirectional current under the control of a clock signal; the integration capacitor is connected to the switch circuit and is used to integrate the unidirectional current.

3. The capacitive sensing unit according to claim 1, wherein: The quantization circuit module includes a plurality of comparison voltages and a plurality of current sources; The multiple comparison voltages include a target voltage, and the multiple current sources are used to charge and discharge the integration storage module according to the magnitude relationship between the voltage on the integration storage module and the multiple comparison voltages, so that the voltage on the integration storage module is stabilized near the target voltage.

4. The capacitive sensing unit according to claim 3, wherein: The quantization circuit module also includes a plurality of voltage comparators and a current source control circuit; The first input ends of the multiple voltage comparators are connected to the integral storage module, and the second input ends of the multiple voltage comparators are respectively connected to the multiple comparison voltages, so as to compare the magnitude relationship between the voltage on the integral storage module and the multiple comparison voltages; the current source control circuit is used to control the number of current sources turned on according to the difference between the voltage on the integral storage module and the target voltage.

5. The capacitive sensing unit according to claim 3, wherein: The multiple current sources include a discharge current source and a charge current source; The discharging current source is used to discharge the integral storage module, and the charging current source is used to charge the integral storage module.

6. The capacitive sensing unit according to claim 5, wherein: When the voltage on the integral storage module is higher than the target voltage, the discharging current source performs discharging; when the voltage on the integral storage module is lower than the target voltage, the charging current source performs charging.

7. A capacitance sensing system, comprising the capacitance sensing unit according to any one of claims 1 to 6, characterized in that: It also includes a system to be tested and a data processing module; the system to be tested is connected to the GM module; the data processing module is used to perform data analysis and processing on the counting value output by the counting module.

8. The capacitance sensing system according to claim 7, wherein: The data analysis process includes at least one of data storage, data filtering and data extraction.

9. The capacitance sensing system according to claim 7, wherein: The system to be tested includes a mutual capacitance system; the mutual capacitance system includes a transmitting electrode TX, a receiving electrode RX, a transmitting capacitor Ctx, a mutual capacitor Cm and a receiving capacitor Crx; Two ends of the mutual capacitor Cm are respectively connected to the transmitting electrode TX and the receiving electrode RX; one end of the receiving electrode RX away from the mutual capacitor Cm is connected to the GM module; One end of the transmitting capacitor Ctx is connected to the transmitting electrode TX, and the other end is grounded; one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

10. The capacitance sensing system according to claim 7, wherein: The system to be tested includes a self-capacitance system; the self-capacitance system includes a receiving electrode RX and a receiving capacitor Crx; the receiving electrode RX is connected to the first input end of the GM module, one end of the receiving capacitor Crx is connected to the receiving electrode RX, and the other end is grounded.

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