Method and apparatus for improving the ability of a solid state drive to handle read disturb in NAND flash memory

Abstract

The application provides a method and device for improving the NAND flash read interference processing capability of a solid state disk, comprising: reading a data block and counting the read times; if the read times are greater than a pre-set read times threshold, putting the data block into a first queue and marking the state of the page storing valid data in the data block as a data recycling state; the first queue is a queue for pre-data recycling; verifying the page storing valid data in the data block in the first queue in sequence to obtain a verification result; if the verification result represents that there is a page for data refreshing, putting the information of the page for data refreshing into a second queue for data recycling; the second queue is a queue for directly recycling data; after the data recycling is completed, updating the read times of the data block and recording the updated times. The method can prevent the over-recycling of data in the whole data block under the influence of read interference, reduce the data recycling amount, and improve the performance and service life of the solid state disk.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of data storage, in particular to a method and device for improving the NAND flash read interference processing capability of a solid state disk. BACKGROUND

[0002] As the number of stacked layers of NAND flash increases and the number of pages in a single data block increases, the data block's resistance to read interference decreases. In the case where the read interference threshold remains unchanged, the read frequency threshold allocated to each page decreases, further exacerbating the data over-recovery problem caused by read interference. Over-recovery leads to waste of storage resources, and frequent triggering of background data can greatly affect the performance of the solid state disk. SUMMARY

[0003] Therefore, the present application aims to provide a method and device for improving the NAND flash read interference processing capability of a solid state disk, preventing over-recovery of data in the entire data block under the influence of read interference, reducing the amount of data recovery, and improving the performance and service life of the solid state disk.

[0004] In a first aspect, the present application provides a method and device for improving the NAND flash read interference processing capability of a solid state disk. The method includes reading a data block and counting the number of reads. If the number of reads is greater than a pre-set read threshold, the data block is placed in a first queue and the state of the page storing valid data in the data block is marked as a data recovery state. The first queue is a queue for pre-data recovery. The pages storing valid data in the data block in the first queue are verified in turn to obtain a verification result. If the verification result indicates that there are pages for data refresh, the information of the pages for data refresh is placed in a second queue for data recovery. The second queue is a queue for direct data recovery. After data recovery is completed, the number of reads of the data block is updated and the updated number is recorded.

[0005] In a preferred embodiment of the present application, before placing the data block in the first queue, the method further includes determining whether the updated number is greater than a pre-set updated number threshold. If the updated number is greater than or equal to the pre-set updated number threshold, the data block is placed in the second queue. If the updated number is less than the pre-set updated number threshold, the data block is placed in the first queue.

[0006] In the preferred embodiment of the present application, the above-mentioned verification of the pages storing valid data in the data block in the first queue in sequence obtains a verification result, including: performing a first read operation of a default read voltage on the current page in the data block, obtaining a decoding state of the first read operation and recording the number of bit 1 in the original data as Cnt X; if the decoding state is decoding unsuccessful, performing a retry read of the first read operation of the default read voltage based on a pre-set retry option to obtain a retry read result; if the retry read result indicates that the read operation of the default read voltage is decoding unsuccessful in the retry read process, the verification result indicates that there is a page for data refresh.

[0007] In the preferred embodiment of the present application, after the retry read of the first read operation of the default read voltage based on the pre-set retry option obtains the retry read result, the method further includes: if the retry read result indicates that the read operation of the default read voltage is decoding successful in the retry read process, pre-setting a corresponding threshold interval (rl0, rl0-ΔVt); after the relative position of the read voltage r10 is shifted to the left from the default position by a corresponding offset value, performing a second read operation of the default read voltage and recording the number of bit 1 in the original data as Cnt Y; determining a read number compensation value of the current page based on the number of bit 1 corresponding to the first read operation, the number of bit 1 corresponding to the second read operation and a pre-set read number compensation reference table; determining a target read number compensation value based on the read number compensation value of the current page and the read number compensation value in the last verification.

[0008] In the preferred embodiment of the present application, the above-mentioned determination of the read number compensation value of the current page based on the number of bit 1 corresponding to the first read operation, the number of bit 1 corresponding to the second read operation and the pre-set read number compensation reference table includes: performing difference processing on the number of bit 1 corresponding to the first read operation and the number of bit 1 corresponding to the second read operation to obtain a difference value; determining an absolute value based on the difference value; determining the read number compensation value of the current page based on the absolute value and the read number compensation reference table.

[0009] In the preferred embodiment of the present application, the above-mentioned determination of the target read number compensation value based on the read number compensation value of the current page and the read number compensation value in the last verification includes: comparing the read number compensation value of the current page and the read number compensation value in the last verification; taking the read number compensation value with smaller value as the target read number compensation value.

[0010] In the preferred embodiment of the present application, the above-mentioned updating of the read number of the data block includes: updating the read number of the data block based on the target read number compensation value.

[0011] In a second aspect, the embodiments of the present application also provide a device for improving the NAND flash read interference processing capability of a solid state disk, comprising: a data block reading module, configured to read data blocks and count the reading times; a data block placing module, configured to place the data blocks into a first queue and mark the state of the pages storing valid data in the data blocks as a data recycling state to be recycled if the reading times are greater than a pre-set reading time threshold; the first queue is a queue for pre-data recycling; a verification module, configured to verify the pages storing valid data in the data blocks in the first queue in sequence to obtain verification results; a data recycling module, configured to place the information of the pages to be refreshed into a second queue for data recycling if the verification results represent that there are pages to be refreshed; the second queue is a queue for direct data recycling; and a reading time updating module, configured to update the reading times of the data blocks after the data recycling is completed.

[0012] In a third aspect, the embodiments of the present application also provide an electronic device, comprising a processor and a memory, the memory stores computer executable instructions capable of being executed by the processor, and the processor executes the computer executable instructions to implement the method for improving the NAND flash read interference processing capability of a solid state disk in the first aspect.

[0013] In a fourth aspect, the embodiments of the present application also provide a computer readable storage medium, the computer readable storage medium stores computer executable instructions, and the computer executable instructions, when called and executed by a processor, cause the processor to implement the method for improving the NAND flash read interference processing capability of a solid state disk in the first aspect.

[0014] The embodiments of the present application have the following beneficial effects:

[0015] The embodiments of the present application provide a method and a device for improving the NAND flash read interference processing capability of a solid state disk, by reading data blocks and counting the reading times, placing the data blocks into a first queue and marking the state of the pages storing valid data in the data blocks as a data recycling state to be recycled if the reading times are greater than a pre-set reading time threshold, the first queue is a queue for pre-data recycling, verifying the pages storing valid data in the data blocks in the first queue in sequence to obtain verification results, placing the information of the pages to be refreshed into a second queue for data recycling if the verification results represent that there are pages to be refreshed, the second queue is a queue for direct data recycling, and updating the reading times of the data blocks and recording the updated times after the data recycling is completed. In this way, the data in the entire data block is prevented from being excessively recycled under the influence of read interference, the data recycling amount is reduced, and the performance and service life of the solid state disk are improved.

[0016] Other features and advantages of the present disclosure will be set forth in the descriptions that follow, and in part will be apparent from the description, or can be learned by practice of the present disclosure as hereinafter more fully described, or can be learned by practice of the present disclosure.

[0017] In order to make the above objectives, features and advantages of the present disclosure more obvious and comprehensible, the following preferred embodiments are specifically described below, and the accompanying drawings are referred to for a detailed description. BRIEF DESCRIPTION OF DRAWINGS

[0018] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings needed to be used in the specific embodiments or the prior art description. Obviously, the drawings described below are some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained without creative labor on the basis of these drawings.

[0019] Figure 1 A flowchart of a method for improving the NAND flash read interference processing capability of a solid state disk according to an embodiment of the present application is provided.

[0020] Figure 2 A flowchart of another method for improving the NAND flash read interference processing capability of a solid state disk according to an embodiment of the present application is provided.

[0021] Figure 3 A structural schematic diagram of a device for improving the NAND flash read interference processing capability of a solid state disk according to an embodiment of the present application is provided.

[0022] Figure 4 A structural schematic diagram of an electronic device according to an embodiment of the present application is provided. DETAILED DESCRIPTION

[0023] In order to make the objectives, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the present application will be described clearly and completely below with reference to the drawings. Obviously, the described embodiments are some of the embodiments of the present application, but not all the embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the protection scope of the present application.

[0024] Most of the existing solutions on the market are as follows:

[0025] In order to solve the data security problem caused by read disturb effect in NAND flash in solid state disk, the firmware in the existing solid state disk handles the read disturb strategy, which usually first takes Block or divides Block into several limited areas as the unit of recording read times, to record the number of times that the pages in the unit area are read. When the read times of the unit reach a certain threshold, the firmware will recycle all the pages in the area that reaches the read disturb times threshold and refresh the valid data to other storage locations. Taking Block or dividing Block into several limited areas as the unit of recording read times is limited by the storage space in the solid state disk, and it is not possible to allocate enough space to record the read times of all Single pages in the entire solid state disk. The large recording unit leads to the inability to distinguish whether the target read location is dominated by Single page level or Block level read during a large number of read operations, and the read threshold can only take the smaller one of the two read disturb thresholds as the basis. Since the Single page level read disturb threshold is smaller than the Block level read disturb threshold, the actual Single page level read disturb threshold is taken as the basis. When the target unit read times reach the threshold, all the valid data in the pages in the entire unit will be recycled, which leads to over-recycling. Usually, in some cases, one or a few pages in the entire recording unit consume the read times of the entire unit.

[0026] Furthermore, usually, in order to ensure the reliability of all products produced, the read disturb threshold provided by the NAND flash chip supplier also reserves enough safety space. When the actual Block read times reach the threshold, the data in the Block itself can ensure enough reliability, which also leads to over-recycling. In addition, as the number of stacked layers of NAND flash increases and the number of pages in a single Block increases, the Block's resistance to read disturb becomes worse. In the case of keeping the read disturb threshold unchanged, the read times threshold allocated to each page becomes less and less, further exacerbating the data over-recycling problem caused by read disturb. Over-recycling will lead to waste of storage resources, and frequent triggering of background data recycling will also greatly affect the performance of the solid state disk.

[0027] Based on this, the method and device for improving the NAND flash read disturbance processing capability of a solid state disk provided by the embodiment of the present application can read a data block and count the read times, if the read times are greater than a pre-set read times threshold, the data block is put into a first queue and the state of the page storing valid data in the data block is marked as a data recycling state, the pages storing valid data in the data block in the first queue are verified in sequence to obtain a verification result, if the verification result represents that there is a page for data refreshing, the information of the page for data refreshing is put into a second queue for data recycling, after the data recycling is completed, the read times of the data block are updated and the updated times are recorded. In this way, the data in the whole data block is prevented from being excessively recycled under the influence of read disturbance, the data recycling amount is reduced, and the performance and service life of the solid state disk are improved.

[0028] For the convenience of understanding, the following is the explanation of the terms involved in the scheme:

[0029] Read disturbance: the phenomenon that after multiple read operations are performed on the pages in a NAND Flash Block, the data in the pages that are not directly accessed may also be affected. Specifically, after a large number of read commands are executed, the charges in some adjacent or non-adjacent but not directly read cells may change slightly, which may cause the data bits that are not directly read to become unstable or even error. This phenomenon is particularly prone to occur in multi-bit storage (TLC / QLC) type NAND Flash, because the interval between the storage states is small.

[0030] GC (Garbage Collection, garbage collection): this is an important process used in SSD to manage and optimize the use of storage space. In SSD, it specifically refers to the process of cleaning up data blocks that are no longer needed and refreshing data that is poor in reliability. As users continuously write, delete and modify files to the SSD, many small pieces of data are left behind, which occupy physical storage locations but are no longer useful. If this situation is allowed to develop, eventually it will cause a lot of storage fragmentation problem, affecting the overall performance and life of the SSD. In addition, due to the inherent characteristics of the storage medium, the data stored in the NAND Flash will become less reliable under the influence of read disturbance, temperature change, retention, medium wear and tear, etc. Therefore, it is necessary to perform garbage collection operation to organize these invalid and poor reliability data.

[0031] Verify (verification): the process of reading and checking data to confirm whether the data meets the expected requirements. This is an important step to ensure data integrity and correctness.

[0032] Single page level read disturb: refers to the phenomenon that when a page is read frequently, it may cause interference or disturbance to other adjacent pages that have not been read in NAND flash. Usually, NAND Flash chip suppliers provide a safe read number for a single page in order to ensure the reliability of NAND Flash, which is the single page level read disturb threshold.

[0033] Block level read disturb: refers to the phenomenon that when a certain storage block is read a large number of times, it may cause disturbance to all storage units in the entire storage block, thereby causing errors in the data in these units that are not directly accessed. Usually, NAND Flash chip suppliers provide a safe read number for a block level in order to ensure the reliability of NAND Flash, which is the Block level read disturb threshold. The total number of Block level read disturbs is usually larger than the number of single page level reads.

[0034] RBER (Raw Bit Error Rate): refers to the raw bit error rate, which represents the error rate when the data is read from the flash memory and has not been subjected to any error correction code (ECC) correction processing compared with the stored data.

[0035] NAND Flash threshold voltage distribution: in NAND Flash, information is stored by changing the amount of charge in the storage cell. These changes are reflected as different levels of threshold voltage. According to the different voltage levels that the storage cell can represent, NAND Flash can be divided into SLC, MLC, TLC, and QLC types. A layer of page in NAND Flash contains a large number of storage cells. If the threshold voltage of all storage cells is collected, it will show a threshold voltage distribution. The ideal threshold voltage distribution should have clear boundaries between each state, so that the stored data can be accurately identified when read. If the voltage interval between adjacent states is too close or overlaps, it may cause read errors.

[0036] Read level: NAND Flash read level refers to the voltage threshold used to determine the data state in the storage cell in NAND flash. TLC requires seven read levels to determine the eight threshold voltage states stored, which are represented by rl0, rl1, rl2, rl3, rl4, rl5, and rl6 in this application. rl0 specifically refers to one adjacent to the erase state.

[0037] Retry option: refers to in the process of NAND flash read operation, when the number of errors exceeds the decoding capability of the controller, the read operation can be continued by changing the default position of the read level, in order to decode the data successfully. Generally, NAND Flash suppliers will provide multiple sets of values that change the default read level position to deal with read interference, data retention time and other problems of NAND Flash. These values constitute the Retry option.

[0038] In order to facilitate the understanding of the embodiment, first, a method for improving the NAND flash read interference processing capability of a solid state disk disclosed in the embodiment of the application is introduced in detail.

[0039] Embodiment 1

[0040] The embodiment of the application provides a method for improving the NAND flash read interference processing capability of a solid state disk, Figure 1 A flowchart of the method for improving the NAND flash read interference processing capability of a solid state disk provided by the embodiment of the application. As shown in the figure, the method for improving the NAND flash read interference processing capability of a solid state disk can include the following steps: Figure 1

[0041] Step S101, reading a data block and counting the number of read times.

[0042] Step S102, if the number of read times is greater than a pre-set read time threshold, the data block is put into a first queue and the state of the page storing valid data in the data block is marked as a data recycling state.

[0043] Among them, the first queue is a queue for pre-data recycling.

[0044] Among them, when the number of read times is recorded in units of partitions in the data block, then the corresponding partition of the data block is put into the first queue and the state of the page storing valid data in the corresponding partition of the data block is marked as a data recycling state.

[0045] Further, before putting the data block into the first queue, the method further includes: determining whether the number of updates is greater than a pre-set update time threshold; if the number of updates is greater than or equal to the pre-set update time threshold, the data block is put into a second queue; if the number of updates is less than the pre-set update time threshold, the data block is put into the first queue.

[0046] Step S103, verifying the page storing valid data in the data block in the first queue in sequence to obtain a verification result.

[0047] ​The target read frequency compensation value can be determined through the verification process to update the read frequency, and it can be determined which pages in the data block need to be directly recycled, and the read frequency of the remaining pages can be compensated, and the pages can continue to be used.

[0048] In step S104, if the verification result indicates that there is a page to be refreshed, the information of the page to be refreshed is put into the second queue for data recycling.

[0049] The second queue is a queue for direct data recycling.

[0050] The page to be refreshed is a page that needs to be directly recycled, and the page is not successfully decoded in the verification process.

[0051] In step S105, after the data recycling is completed, the read frequency of the data block is updated and the updated frequency is recorded.

[0052] The read frequency of the data block is updated, specifically, the read frequency of the data block is updated based on the target read frequency compensation value, and the target read frequency compensation value is obtained in the process of sequentially verifying the pages storing valid data in the data block in the first queue.

[0053] The method for improving the NAND flash read interference processing capability of the solid state disk provided by the embodiment of the application can read the data block and count the read frequency, if the read frequency is greater than the pre-set read frequency threshold, the data block is put into the first queue and the state of the page storing valid data in the data block is marked as a data recycling state, the pages storing valid data in the data block in the first queue are sequentially verified to obtain a verification result, if the verification result indicates that there is a page to be refreshed, the information of the page to be refreshed is put into the second queue for data recycling, and after the data recycling is completed, the read frequency of the data block is updated and the updated frequency is recorded. In this way, the data in the entire data block is prevented from being excessively recycled under the influence of read interference, the data recycling amount is reduced, and the performance and service life of the solid state disk are improved.

[0054] Embodiment 2

[0055] The embodiment of the application also provides another method for improving the NAND flash read interference processing capability of the solid state disk; the method is implemented on the basis of the above-mentioned embodiment method; the method mainly describes the specific implementation of sequentially verifying the pages storing valid data in the data block in the first queue to obtain a verification result.

[0056] Figure 2 The flowchart of another method for improving the NAND flash read interference processing capability of the solid state disk provided by the embodiment of the application is as follows: Figure 2As shown, the pages in the pair of first queues storing valid data in the data block are verified in turn to obtain verification results, which can include the following steps:

[0057] In step S201, a first read operation of a default read voltage is performed on the current page in the data block, the decoding state of the first read operation is obtained, and the number of bit 1 in the original data is recorded as Cnt X.

[0058] The decoding state includes decoding success and decoding failure.

[0059] In step S202, if the decoding state is decoding failure, a retry read of the first read operation of the default read voltage is performed based on a pre-set retry option to obtain a retry read result.

[0060] The retry option can be represented as retry option 1-N. These retry options are customized and can be obtained through medium analysis research, and can not be limited by the original factory retry option provided by the NAND Flash supplier. The retry option 1-N can ensure that the data stored in the page is safe and can continue to be used under the influence of read interference and data retention time and other factors.

[0061] The retry read is a traversal read in the retry option 1-N.

[0062] In step S203, if the retry read result indicates that the read operation of the default read voltage is decoding success in the retry read process, a corresponding threshold interval (rl0, rl0-ΔVt) is pre-set.

[0063] During the retry read of the traversal retry option 1-N, once the decoded data in the page can be decoded successfully, the read operation of the following retry option will not be performed.

[0064] In step S204, after the relative position of the read voltage r10 is shifted to the left from the default position by a corresponding offset value, a second read operation of the default read voltage is performed, and the number of bit 1 in the original data is recorded as Cnt Y.

[0065] The number of bit 1 or 0 in the threshold interval (rl0, rl0-ΔVt) can be counted to determine the degree of read interference.

[0066] Except for the read voltage r10, the remaining read levels are kept at the default initial position, and then the read operation is performed.

[0067] In step S205, the read frequency compensation value of the current page is determined based on the number of bit 1 corresponding to the first read operation, the number of bit 1 corresponding to the second read operation, and the pre-set read frequency compensation table.

[0068] Specifically, determining the read frequency compensation value of the current page based on the number of bit 1 corresponding to the first read operation, the number of bit 1 corresponding to the second read operation, and the pre-set read frequency compensation table can include: performing difference processing on the number of bit 1 corresponding to the first read operation and the number of bit 1 corresponding to the second read operation to obtain a difference value; determining an absolute value based on the difference value; and determining the read frequency compensation value of the current page based on the absolute value and the read frequency compensation table.

[0069] In the table 1, the read frequency compensation table.

[0070] Table 1:

[0071]

[0072] In step S206, the target read frequency compensation value is determined based on the read frequency compensation value of the current page and the read frequency compensation value when the verification is performed last time.

[0073] Specifically, determining the target read frequency compensation value based on the read frequency compensation value of the current page and the read frequency compensation value when the verification is performed last time can include: comparing the read frequency compensation value of the current page and the read frequency compensation value when the verification is performed last time; and taking the read frequency compensation value with smaller value as the target read frequency compensation value.

[0074] In the table 1, the read frequency compensation table.

[0075] In step S207, if the retry read result indicates that the read operation of the default read voltage is not successfully decoded in the retry read process, the verification result indicates that there is a page for data refresh.

[0076] In the table 1, the read frequency compensation table.

[0077] The embodiment of the present application can, without changing the read frequency recording unit, perform a verify operation on all valid pages contained in the recording unit exceeding the read frequency threshold, the verify operation mainly aiming at the state of erase (level 0) most seriously disturbed by reading in a page, and the verify operation representing the degree of rightward movement of the erase state disturbed by reading by counting the number of bit 1 or 0 in the set threshold interval, so as to determine whether the page needs to be directly recycled or can be used for a certain number of read frequency compensation, avoiding direct data recycling of all valid pages in the recording unit when the recording unit reaches the read frequency threshold, and prolonging the number of times the recording unit can be read.

[0078] Embodiment 3

[0079] Corresponding to the above method embodiment, the embodiment of the present application provides a device for improving the NAND flash read disturbance processing capability of a solid state disk, Figure 4 The structure diagram of the device for improving the NAND flash read disturbance processing capability of a solid state disk provided by the embodiment of the present application is shown in Figure 4 The device for improving the NAND flash read disturbance processing capability of a solid state disk can include:

[0080] The data block reading module 301 is configured to read the data block and count the read frequency.

[0081] The data block putting module 302 is configured to, if the read frequency is greater than a pre-set read frequency threshold, put the data block into a first queue and mark the state of the page storing valid data in the data block as a data recycling state; the first queue is a queue for pre-data recycling.

[0082] The verification module 303 is configured to sequentially verify the page storing valid data in the data block in the first queue to obtain a verification result.

[0083] The data recycling module 304 is configured to, if the verification result represents that there is a page for data refreshing, put the information of the page into a second queue for data recycling; the second queue is a queue for directly recycling data.

[0084] The read frequency updating module 305 is configured to, after the data recycling is completed, update the read frequency of the data block.

[0085] The device for improving the NAND flash read interference processing capability of a solid state disk provided by the embodiment of the present application can read a data block and count the read times, if the read times are greater than a pre-set read times threshold, the data block is put into a first queue and the state of the page storing valid data in the data block is marked as a data recycling state, the pages storing valid data in the data block in the first queue are verified in sequence to obtain a verification result, if the verification result represents that there is a page for data refreshing, the information of the page for data refreshing is put into a second queue for data recycling, and after the data recycling is completed, the read times of the data block are updated and the updated times are recorded. In this way, the data in the whole data block is prevented from being excessively recycled under the influence of read interference, the data recycling amount is reduced, and the performance and service life of the solid state disk are improved.

[0086] In some embodiments, the data block putting module is further configured to determine whether the updated times are greater than a pre-set updated times threshold, if the updated times are greater than or equal to the pre-set updated times threshold, put the data block into the second queue, and if the updated times are less than the pre-set updated times threshold, put the data block into the first queue.

[0087] In some embodiments, the verification module is further configured to perform a first read operation of a default read voltage on the current page in the data block, obtain a decoding state of the first read operation and record the number of bit 1 in the original data as Cnt X, if the decoding state is decoding unsuccessful, perform a retry read on the first read operation of the default read voltage based on a pre-set retry option to obtain a retry read result, if the retry read result represents that the read operation of the default read voltage is decoding unsuccessful in the retry read process, the verification result represents that there is a page for data refreshing.

[0088] In some embodiments, the verification module is further configured to, if the retry read result represents that the read operation of the default read voltage is decoding successful in the retry read process, pre-set a corresponding threshold interval (rl0, rl0-ΔVt), perform a second read operation of the default read voltage after the relative position of the read voltage r10 is shifted to the left by a corresponding offset value from a default position, record the number of bit 1 in the original data as Cnt Y, determine a read times compensation value of the current page based on the number of bit 1 corresponding to the first read operation, the number of bit 1 corresponding to the second read operation and a pre-set read times compensation table, and determine a target read times compensation value based on the read times compensation value of the current page and the read times compensation value in the last verification.

[0089] In some embodiments, the verification module is further configured to perform difference processing on the number of bit 1 corresponding to the first read operation and the number of bit 1 corresponding to the second read operation to obtain a difference value, determine an absolute value based on the difference value, and determine the read times compensation value of the current page based on the absolute value and the read times compensation table.

[0090] In some embodiments, the verification module is further configured to compare the read frequency compensation value of the current page with the read frequency compensation value at the last verification; and take the read frequency compensation value with the smaller value as the target read frequency compensation value.

[0091] In some embodiments, the read frequency updating module is further configured to update the read frequency of the data block based on the target read frequency compensation value.

[0092] The device provided by the embodiments of the present application has the same implementation principle and technical effects as the foregoing method embodiments. For brevity, the part not mentioned in the device embodiment part can be referred to the corresponding content in the foregoing method embodiments.

[0093] Embodiment 4

[0094] The embodiments of the present application further provide an electronic device for running the method for improving the NAND flash read interference capability of a solid state disk. Figure 4 As shown in the structural schematic diagram of an electronic device, the electronic device comprises a memory 400 and a processor 401, wherein the memory 400 is configured to store one or more computer instructions, and the one or more computer instructions are executed by the processor 401 to implement the method for improving the NAND flash read interference capability of a solid state disk.

[0095] Further, Figure 4 As shown in the structural schematic diagram of an electronic device, the electronic device further comprises a bus 402 and a communication interface 403, and the processor 401, the communication interface 403 and the memory 400 are connected through the bus 402.

[0096] The memory 400 can contain a high-speed random access memory (RAM) and can also include a non-volatile memory, for example, at least one disk memory. The communication between the system network element and at least one other network element is realized through at least one communication interface 403 (which can be wired or wireless), and the Internet, a wide area network, a local area network, a metropolitan area network, etc. can be used. The bus 402 can be an ISA bus, a PCI bus or an EISA bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For the convenience of representation, Figure 4 In the foregoing description, only one bidirectional arrow is used to represent the bus, but it does not mean that there is only one bus or only one type of bus.

[0097] The processor 401 can be an integrated circuit chip having a signal processing capability. In the implementation process, each step of the above method can be completed by the integrated logic circuit of hardware in the processor 401 or the instruction in the form of software. The processor 401 described above can be a general processor, including a central processing unit (CPU), a network processor (NP), etc.; can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components. Each method, step and logic block diagram disclosed in the embodiment of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the embodiment of the present application can be directly embodied as a hardware code processor for execution, or a combination of hardware and software modules in the code processor for execution. The software module can be located in a random access memory, a flash memory, a read only memory, a programmable read only memory or an electrically erasable programmable memory, a register, etc. The storage medium in the art. The storage medium is located in the memory 400, and the processor 401 reads the information in the memory 400, and combines the hardware to complete the steps of the method of the above embodiment.

[0098] The embodiment of the present application also provides a computer readable storage medium, the computer readable storage medium stores computer executable instructions, when the processor calls and executes the computer executable instructions, the computer executable instructions promote the processor to realize the method for improving the NAND flash read interference capability of the solid state disk processing, and the specific implementation can be referred to the method embodiment, and here is not repeated.

[0099] The computer program product for improving the NAND flash read interference capability of the solid state disk processing provided by the embodiment of the present application includes a computer readable storage medium storing non-volatile program codes executable by the processor, and the instructions included in the program codes can be used to execute the method described in the foregoing method embodiment, and the specific implementation can be referred to the method embodiment, and here is not repeated.

[0100] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiment, and here is not repeated.

[0101] In several embodiments provided by the present application, it should be understood that the disclosed system, device and method can be implemented in other manners. The described device embodiments are merely schematic, and for example, the division of the units is only a logical function division, and there can be another division manner in actual implementation; for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, or the among different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electric, mechanical or other forms.

[0102] The units described as separated components can or can not be physically separated, and the components displayed as units can or can not be physical units, i.e., can be located in one place, or can be distributed on a plurality of network units. In actual implementation, some or all of the units can be selected according to the actual needs to achieve the purposes of the embodiments of the present application.

[0103] In addition, each function unit in the various embodiments of the present application can be integrated in one processing unit, or each unit can exist physically as a separate unit, or two or more units can be integrated in one unit.

[0104] If the functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a non-volatile computer readable storage medium executable by a processor. Based on this understanding, the technical solutions of the present application essentially or the part that contributes to the prior art, or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0105] Finally, it should be noted that the above-described embodiments are merely specific embodiments of the present application, which are used to illustrate the technical solutions of the present application, but not to limit the present application, and the protection scope of the present application is not limited thereto. Although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still make modifications or easily think of changes to the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to some technical features therein, within the technical range disclosed by the present application. The modifications, changes or replacements do not make the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for improving the ability of a solid-state drive (SSD) to handle NAND flash memory read interference, characterized in that, The method includes: Read the data blocks and count the number of reads; If the number of reads exceeds a preset read count threshold, the data block is placed in the first queue and the page containing valid data in the data block is marked as pending data reclamation; the first queue is a queue for data reclamation. The pages containing valid data in the data blocks of the first queue are verified sequentially to obtain the verification results; If the verification result indicates that a page has been refreshed, the information of the page that has been refreshed is placed in the second queue for data recycling; the second queue is a queue for direct data recycling. After the data recycling is completed, the number of reads of the data block is updated and the number of updates is recorded; The step of sequentially verifying the pages containing valid data in the data blocks of the first queue to obtain verification results includes: Perform a first read operation on the current page of the data block using the default read voltage, obtain the decoding status of the first read operation, and record the number of bit 1s in the original data as Cnt X; If the decoding status is unsuccessful, the first read operation of the default read voltage is retried based on the pre-set retry option to obtain the retry read result; If the retry read result indicates that the read operation of the default read voltage failed to decode during the retry read process, then the verification result indicates that there is a page that needs to be refreshed. If the retry read result indicates that the read operation of the default read voltage was successfully decoded during the retry read process, then the corresponding threshold range (rl0, rl0-ΔVt) is preset. After shifting the relative position of the read voltage r10 to the left by the corresponding offset value from the default position, perform the second read operation of the default read voltage and record the number of bit 1s in the original data as Cnt Y; The read count compensation value of the current page is determined based on the number of bit 1s corresponding to the first read operation, the number of bit 1s corresponding to the second read operation, and a pre-set read count compensation lookup table; The target read count compensation value is determined based on the read count compensation value of the current page and the read count compensation value during the last verification. The update of the data block read count includes: The number of reads of the data block is updated based on the target read count compensation value.

2. The method according to claim 1, characterized in that, Before placing the data block into the first queue, the method further includes: Determine whether the number of updates exceeds a preset update count threshold; If the number of updates is greater than or equal to a preset update number threshold, the data block is placed in the second queue; If the number of updates is less than a preset update threshold, the data block is placed in the first queue.

3. The method according to claim 1, characterized in that, The step of determining the read count compensation value for the current page based on the number of bit 1s corresponding to the first read operation, the number of bit 1s corresponding to the second read operation, and a pre-set read count compensation lookup table includes: The difference is obtained by subtracting the number of bit 1s corresponding to the first read operation and the number of bit 1s corresponding to the second read operation. The absolute value is determined based on the difference. The read count compensation value for the current page is determined based on the absolute value and the read count compensation lookup table.

4. The method according to claim 3, characterized in that, The step of determining the target read count compensation value based on the read count compensation value of the current page and the read count compensation value during the last verification includes: Compare the current page's read count compensation value with the read count compensation value from the last verification. The smaller of the current page's read count compensation value and the read count compensation value from the previous verification is used as the target read count compensation value.

5. An apparatus for improving the ability of a solid-state drive to handle NAND flash memory read interference, characterized in that, The apparatus for implementing the method for improving the NAND flash memory read interference handling capability of a solid-state drive as described in any one of claims 1 to 4, the apparatus comprising: The data block reading module is used to read data blocks and count the number of reads. The data block placement module is used to place the data block into a first queue and mark the state of the page containing valid data in the data block as pending data reclamation if the number of reads exceeds a preset read count threshold; the first queue is a queue for data reclamation. The verification module is used to verify the pages containing valid data in the data blocks of the first queue in turn, and obtain the verification results. The data recycling module is used to place the information of the page into a second queue for data recycling if the verification result indicates that a page needs to be refreshed; the second queue is a queue for direct data recycling. The read count update module is used to update the read count of the data block after the data recycling is completed.

6. An electronic device, characterized in that, The device includes a processor and a memory, the memory storing computer-executable instructions that can be executed by the processor, the processor executing the computer-executable instructions to implement the method for improving the ability of a solid-state drive to handle NAND flash memory read interference as described in any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when invoked and executed by a processor, cause the processor to implement the method for improving the ability of a solid-state drive to handle NAND flash memory read interference as described in any one of claims 1 to 4.

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