Simulation method, device and equipment of SBFET
By activating the tunneling model and adjusting the carrier mass parameters, the problem of small SBFET simulation current is solved, and the simulation transfer characteristic curve is matched with the actual measured curve, which improves the accuracy of the simulation current.
Patent Information
- Application Number
- CN202411836435.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2025-04-04
AI Technical Summary
In the prior art, when simulating the current transfer characteristics of SBFETs, the simulation current is small and cannot effectively match the actual test transfer characteristic curve.
By obtaining the measured transfer characteristic curve of the SBFET, combining the TCAD simulation model, the tunneling model is activated, and the mass parameters of the target carrier are adjusted to improve the accuracy of the simulation current.
The high similarity between the simulation transfer characteristic curve and the actual measured curve is achieved, the simulation current of the SBFET is improved, and the problem of small current is solved.
Smart Images
Figure CN119761281A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of Schottky barrier diodes, and in particular to a simulation method, device and equipment of a SBFET. Background Art
[0002] As one of the important power devices, transistors need to have the characteristics of small on-resistance, fast switching speed and high blocking voltage; therefore, Schottky barrier field-effect transistors (SBFET) have great application potential in the field of power electronics. At present, the main research on the simulation design and process production of SBFET includes the following aspects: 1. Using TCAD simulation software to simulate the field plate terminal of SBFET, study the influence of field plate length and oxide layer thickness on the breakdown voltage of diode, and extract the electric field distribution of the device for analysis results; 2. Study key processes, including Schottky contact, ohmic contact, etching and lithography.
[0003] Since the middle area of the SBFET structure is the SOI area, two Schottky metal contact areas are defined on both sides of the SOI, namely the source and the drain, and the BOX area of SiO2 material is below the SOI; the SOI area is a doped area with a P-type light doping concentration of 1e15cm-3; and the TCAD simulation software is a simulation software specifically for simulating transistors with a heavily doped SOI area. Therefore, when using the TCAD simulation software to simulate the transfer characteristics of the Schottky barrier field effect transistor, when the drain is connected to a 0.1V voltage source, the gate scans the voltage from negative to positive, and can only detect Figure 3 The transfer characteristic curve shown has very low current values on both sides, which is quite different from the transfer characteristic curve obtained by actual test; thus, it is seriously impossible to use the existing TCAD simulation software to perform simulation analysis on SBFET.
[0004] Therefore, there is an urgent need for a simulation method that can improve the simulated current on both sides of the source and drain of the SBFET structure during simulation, reduce the difference between the transfer characteristic curve obtained from actual tests, and solve the problem of small simulated current when simulating the transfer characteristic curve of the current regulation ability of the SBFET in the prior art. Summary of the invention
[0005] The purpose of the present invention is to provide a simulation method, device and equipment for SBFET. By combining the measured transfer characteristic curve of SBFET with a TCAD simulation model, the tunneling model in the TCAD simulation model is activated, and the mass parameters of the target carriers in the model are adjusted. Then, the transfer characteristics of the SBFET gate voltage and drain current are simulated, and a simulated transfer characteristic curve with a high degree of similarity to the measured transfer characteristic curve is obtained; the problem of small current in the simulated transfer characteristic curve of the SBFET gate voltage and drain current in the prior art is solved.
[0006] In order to achieve the above object, the present invention provides the following technical solutions:
[0007] In a first aspect, the present invention provides a simulation method of a SBFET, which may include:
[0008] Obtain the measured transfer characteristic curve of SBFET gate voltage and drain current;
[0009] Preprocessing the TCAD simulation model to obtain a target TCAD simulation model;
[0010] Based on the target TCAD simulation model and the measured transfer characteristic curve, adjusting the mass parameter of the target carrier when simulating the transfer characteristics of gate voltage and drain current using the target TCAD simulation model to obtain the target mass parameter of the target carrier; the target carrier includes electron carriers and hole carriers;
[0011] Based on the target mass parameter of the target carrier, the target TCAD simulation model is used to simulate the transfer characteristic curve of the gate voltage and the drain current of the SBFET to obtain a simulated transfer characteristic curve.
[0012] Preferably, the preprocessing of the TCAD simulation model to obtain the target TCAD simulation model may include:
[0013] Parameter setting is performed on target parameters in the non-local grid area to obtain a target non-local grid area; the target parameters include tunneling distance, integral relative accuracy and integral accuracy; the non-local grid area is the area corresponding to the source and drain of the SBFET in the TCAD simulation model;
[0014] Based on the target non-local grid area, activating the tunneling model in the TCAD simulation model to obtain an intermediate TCAD simulation model;
[0015] The target model material and target model parameters in the intermediate TCAD simulation model are set to obtain the target TCAD simulation model.
[0016] Preferably, setting the target model material and target model parameters in the intermediate TCAD simulation model to obtain the target TCAD simulation model may include:
[0017] Setting the target model material in the intermediate TCAD simulation model to silicon, silicon dioxide and metal;
[0018] The target model parameters in the intermediate TCAD simulation model are set as fitting parameters and mass parameters of target carriers to obtain the target TCAD simulation model.
[0019] Preferably, the tunneling distance is 0.00001, the integral relative accuracy is 5, and the integral accuracy is 0.001.
[0020] Preferably, adjusting the mass parameter of the target carrier when performing transfer characteristic simulation using the target TCAD simulation model to obtain the target mass parameter based on the target TCAD simulation model and the measured transfer characteristic curve may include:
[0021] obtaining a first quality parameter;
[0022] Based on the first quality parameter, using the target TCAD simulation model to perform transfer characteristic curve simulation to obtain a first simulated transfer characteristic curve;
[0023] Comparing the first simulation transfer characteristic curve with the measured transfer characteristic curve to obtain a first comparison result;
[0024] If the first comparison result indicates that the similarity between the first simulation transfer characteristic curve and the measured transfer characteristic curve is greater than or equal to a preset threshold, determining the first quality parameter as the target quality parameter;
[0025] If the first comparison result indicates that the similarity between the first simulation transfer characteristic curve and the measured transfer characteristic curve is less than a preset threshold, the first quality parameter is adjusted according to a preset data adjustment method; based on the adjusted quality parameter, the transfer characteristic curve is simulated using the target TCAD simulation model until a simulation transfer characteristic curve that meets the convergence conditions is obtained, and the quality parameter corresponding to the simulation transfer characteristic curve that meets the convergence conditions is determined as the target quality parameter.
[0026] Preferably, the target mass parameter of the electron carrier is 0.005 eV; the target mass parameter of the hole carrier is 0.005 eV.
[0027] Preferably, adjusting the first quality parameter according to a preset data adjustment method may include:
[0028] gradually reducing the first quality parameter by 50%;
[0029] Alternatively, the first quality parameter is adjusted in a manner of reducing by 90% in the first adjustment and by 50% in the Nth adjustment; wherein N is greater than or equal to 2.
[0030] Preferably, the size of the SBFET in the target TCAD simulation model is equal to the size of the SBFET in the actual measurement process.
[0031] In a second aspect, the present invention provides a simulation device of a SBFET, which may include:
[0032] A measured transfer characteristic curve acquisition module, wherein the measured transfer characteristic curve acquisition module is used to acquire a measured transfer characteristic curve of the SBFET gate voltage and drain current;
[0033] A model preprocessing module, wherein the model preprocessing module is used to preprocess the TCAD simulation model to obtain a target TCAD simulation model;
[0034] A quality parameter adjustment module, the quality parameter adjustment module is used to adjust the quality parameters of the target carriers when the transfer characteristics of the gate voltage and the drain current are simulated using the target TCAD simulation model based on the target TCAD simulation model and the measured transfer characteristic curve, so as to obtain the target quality parameters of the target carriers; the target carriers include electron carriers and hole carriers;
[0035] A simulation transfer characteristic curve determination module is used to simulate the transfer characteristic curve of gate voltage and drain current of the SBFET based on the target mass parameter of the target carrier using the target TCAD simulation model to obtain a simulation transfer characteristic curve.
[0036] In a third aspect, the present invention provides a simulation device for SBFET, which may include a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the simulation method for SBFET described in the first aspect when executing the computer program.
[0037] Compared with the prior art, the present invention provides a simulation method for SBFET, which obtains the measured transfer characteristic curve of the gate voltage and drain current of the SBFET; further preprocesses the TCAD simulation model to obtain a target TCAD simulation model; based on the target TCAD simulation model and the measured transfer characteristic curve, adjusts the mass parameters of the target carriers when using the target TCAD simulation model to simulate the transfer characteristics of the gate voltage and the drain current, and obtains the target mass parameters of the target carriers; the target carriers include electron carriers and hole carriers; finally, based on the target mass parameters of the target carriers, the transfer characteristic curve of the gate voltage and the drain current of the SBFET is simulated using the target TCAD simulation model to obtain a simulated transfer characteristic curve. Based on this, the target TCAD simulation model is obtained by activating the tunneling model in the TCAD simulation model, and based on the measured transfer characteristic curve of the SBFET gate voltage and drain current, the mass parameters of the target carriers in the TCAD simulation model after activating the tunneling model are adjusted to obtain the target quality parameters, and the target carriers in the target TCAD simulation model are set to the target quality parameters, so that a simulated transfer characteristic curve consistent with the measured transfer characteristic curve can be simulated, which improves the current in the simulated transfer characteristic curve of the SBFET gate voltage and drain current, and solves the problem of small current in the simulated transfer characteristic curve of the SBFET gate voltage and drain current in the prior art. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:
[0039] Figure 1a A top view of a Schottky barrier field effect transistor (SBFET) in the prior art;
[0040] Figure 1b is a cross-sectional view of a Schottky barrier field effect transistor (SBFET) in the prior art;
[0041] Figure 2a It is a schematic diagram of the SBFET simulation structure in the prior art;
[0042] Figure 2b A schematic diagram of a reverse-connected Schottky diode of a SBFET in the prior art;
[0043] Figure 2c It is a schematic diagram of the conduction band when the SBFET is reversely connected to the Schottky diode and biased with Vd=0V and Vd>0V in the prior art;
[0044] Figure 2dA schematic diagram of the valence band when the SBFET is reversely connected to the Schottky diode and biased with Vd=0V and Vd>0V in the prior art;
[0045] Figure 3 It is a schematic diagram of a simulated transfer characteristic curve of a SBFET gate voltage and a drain current in the prior art;
[0046] Figure 4 It is a schematic diagram of the measured transfer characteristic curve of the gate voltage and drain current of the SBFET in the prior art;
[0047] Figure 5 A main flow chart of a simulation method of SBFET provided by the present invention;
[0048] Figure 6 A schematic diagram of an activation tunneling model method of a simulation method of a SBFET provided by the present invention;
[0049] Figure 7 A schematic diagram of adjusting the mass parameters of target carriers during simulation of a simulation method of SBFET provided by the present invention;
[0050] Figure 8 A schematic diagram of a first simulation effect of a simulation method of a SBFET provided by the present invention;
[0051] Fig. 9 A schematic diagram of a second simulation effect of a simulation method for SBFET provided by the present invention;
[0052] Fig.10 A schematic diagram of the structure of a simulation device of SBFET provided by the present invention;
[0053] Fig.11 A schematic diagram of the structure of a SBFET simulation device provided by the present invention.
[0054] Reference numerals: 1 - source, 2 - drain, 3 - silicon island, 4 - substrate, 5 - oxide layer, 6 - gate, 7 - low-doped layer. DETAILED DESCRIPTION
[0055] In order to facilitate the clear description of the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, the words "first", "second" and the like are used to distinguish the same items or similar items with substantially the same functions and effects. For example, the first threshold and the second threshold are only used to distinguish different thresholds, and do not limit their order of precedence. Those skilled in the art can understand that the words "first", "second" and the like do not limit the quantity and execution order, and the words "first", "second" and the like do not necessarily limit them to be different.
[0056] It should be noted that, in the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.
[0057] In the present invention, "at least one" means one or more, and "plurality" means two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the associated objects in the previous time are in an "or" relationship. "At least one of the following items" or similar expressions refers to any combination of these items, including any combination of single items or plural items. For example, at least one of a, b or c can mean: a, b, c, the combination of a and b, the combination of a and c, the combination of b and c, or the combination of a, b and c, where a, b, c can be single or multiple.
[0058] First, some English abbreviations involved in the present invention are explained as follows:
[0059]
[0060] In the prior art, when metal and semiconductor are in contact, it is often believed that a Schottky junction will be formed. The TCAD simulation model can be used to simulate the Schottky barrier field effect transistor to obtain its internal structure, and then a simulation test can be performed, which helps to improve the design optimization of the Schottky barrier field effect transistor; however, when the TCAD simulation model is used to simulate the gate voltage and drain current of the Schottky barrier field effect transistor, the current represented in the obtained transfer characteristic curve is small, which is inconsistent with the measured transfer characteristic curve of the gate voltage and drain current. Please refer to Figures 1a to 4 ; Figure 1a A top view of a Schottky barrier field effect transistor (SBFET) in the prior art; Figure 1b is a cross-sectional view of a Schottky barrier field effect transistor (SBFET) in the prior art; Figure 2a It is a schematic diagram of the SBFET simulation structure in the prior art; Figure 2b A schematic diagram of a reverse-connected Schottky diode of a SBFET in the prior art; Figure 2c It is a schematic diagram of the conduction band when the SBFET is reversely connected to the Schottky diode and biased with Vd=0V and Vd>0V in the prior art; Figure 2d A schematic diagram of the valence band when the SBFET is reversely connected to the Schottky diode and biased with Vd=0V and Vd>0V in the prior art; Figure 3 It is a schematic diagram of a simulated transfer characteristic curve of a SBFET gate voltage and a drain current in the prior art; Figure 4 Schematic diagram of the measured transfer characteristic curve of the gate voltage and drain current of SBFET in the prior art. It should be noted that: Figure 1b The graph shown is Figure 1a Cross-sectional view at the dotted line.
[0061] Specifically, Figure 1a and Figure 1b When the SBFET structure (Schottky barrier field effect transistor structure in the prior art) shown in FIG. is simulated, the following can be obtained: Figure 2a The simulation structure shown in Figure 1a The black dotted area on the white background on the left is the drain 2, the black dotted area on the white background on the right is the source 1, and the black square area in the middle is the silicon island 3; Figure 1b The black stripe region at the bottom is the gate 6 , the upper surface of the gate 6 is deposited with the substrate 4 , and the upper surface of the substrate 4 is deposited with the oxide layer 5 . Figure 2a The middle area shown is the low-doped layer 7, i.e. the low-doped silicon SOI area, with a P-type light doping concentration of 1e15cm-3; two Schottky metal contact areas are defined on both sides of the SOI, namely the source and drain; and the BOX area of SiO2 material is below the SOI. When the drain is connected to a 0.1V voltage source, the gate scans the voltage from negative to positive, and only the simulation can detect Figure 3 The simulated transfer characteristic curve shown in the figure shows that the current values on both sides are very low, which is consistent with the actual test results. Figure 4 The transfer characteristic curves shown in Figure 1 are quite different. After analysis, the reason why the simulated current is small is that the Schottky junction formed by the source and drain is equivalent to two reverse series Schottky diodes, such as Figure 2b As shown in the figure, when a positive voltage is applied to the two reverse-connected Schottky diodes on the left, V d =V d1 +V d2 ;like Figure 2c and Figure 2d As shown, for the diode on the left, the external voltage is in a forward bias state, and both carrier currents can flow smoothly. However, for the diode on the right, the external voltage is in a reverse bias state, and it is difficult for carriers to flow. This leads to the problem of small current in the simulated transfer characteristic curve of the SBFET gate voltage and drain current.
[0062] In view of this, the present invention provides a simulation method, device and equipment for SBFET, which activates the tunneling model in the TCAD simulation model, and adjusts the mass parameters of the target carriers in the TCAD simulation model after the tunneling model is activated according to the measured transfer characteristic curve of the SBFET gate voltage and drain current, so as to obtain a simulated transfer characteristic curve that is consistent with the measured transfer characteristic curve, thereby improving the current in the simulated transfer characteristic curve of the SBFET gate voltage and drain current, and solving the problem of small current in the simulated transfer characteristic curve of the SBFET gate voltage and drain current.
[0063] Next, the technical solution of the present invention is described in detail with reference to the accompanying drawings:
[0064] See also Figure 5 , Figure 5 This is a main flow chart of a SBFET simulation method provided by the present invention. The execution subject is a server or terminal device equipped with the technical solution disclosed in the embodiment of the present invention, such as a simulation service platform or a handheld simulation device, etc.
[0065] exist Figure 5 The methods may include:
[0066] Step 510: Obtain the measured transfer characteristic curve of the SBFET gate voltage and drain current.
[0067] Step 520: Preprocess the TCAD simulation model to obtain a target TCAD simulation model.
[0068] In step 520, since the TCAD simulation model in the prior art is mainly used to simulate the SOI region with a heavy doping concentration; and the SOI region with a light doping concentration between the source and the drain of the SBFET, the Schottky junction formed by the source and the drain is equivalent to two reverse-connected Schottky diodes in series. If the current flows through the two reverse-connected diodes, there must be a region with a large potential barrier; therefore, the TCAD simulation model in the prior art is not suitable for simulating the transfer characteristic curve of the gate voltage and drain current of the SBFET with a light doping concentration; based on this, it is necessary to pre-process the TCAD simulation model in the prior art, set the activation data corresponding to the SBFET simulation grid unit, activate the tunneling function in the simulation model, so that the carriers "cross" the potential barrier when flowing through the two reverse-connected Schottky diodes, thereby simulating the transfer characteristics between the source and the drain of the SBFET with a lightly doped SOI region.
[0069] Step 530: Based on the target TCAD simulation model and the measured transfer characteristic curve, adjust the mass parameters of the target carriers when simulating the transfer characteristics of gate voltage and drain current using the target TCAD simulation model to obtain the target mass parameters of the target carriers; the target carriers include electron carriers and hole carriers; wherein the target mass parameters of the target carriers represent setting the effective masses of the last two carriers (electron carriers and hole carriers) in the Parameter file in the target TCAD simulation model as the target mass parameters, and then simulating the transfer characteristic curve of the SBFET to obtain a simulated transfer characteristic curve that is consistent with the measured transfer characteristic curve.
[0070] Step 540: Based on the target mass parameter of the target carrier, use the target TCAD simulation model to simulate the transfer characteristic curve of the gate voltage and the drain current of the SBFET to obtain a simulated transfer characteristic curve.
[0071] In step 530 and step 540, a TCAD simulation model (target TCAD simulation model) with tunneling function is obtained based on step 520, and a simulated transfer characteristic curve is obtained by adjusting the mass parameters of the target carrier during simulation. The simulated transfer characteristic curve is compared with the measured transfer characteristic curve. If the simulated transfer characteristic curve is consistent with the measured transfer characteristic curve, the target mass parameter of the target carrier is obtained; based on the target mass parameter of the target carrier, the transfer characteristic curve of the SBFET is simulated using the target TCAD simulation model, and a simulated transfer characteristic curve that is consistent with the measured transfer characteristic curve can be obtained; thereby solving the problem of small current in the simulated transfer characteristic curve of the SBFET gate voltage and drain current in the prior art.
[0072] It should be noted that obtaining the measured transfer characteristic curve of the SBFET gate voltage and drain current in the present invention also means that the test data corresponding to the generated measured transfer characteristic curve is obtained at the same time; when comparing the measured transfer characteristic curve with the simulated transfer characteristic curve, the measured data and the simulated data can also be compared at the same time, which is not specifically limited in the present invention.
[0073] Based on this, the present invention provides a simulation method of SBFET, which obtains the measured transfer characteristic curve of the gate voltage and drain current of the SBFET; preprocesses the TCAD simulation model to obtain a target TCAD simulation model; further based on the target TCAD simulation model and the measured transfer characteristic curve, adjusts the mass parameters of the target carriers when using the target TCAD simulation model to simulate the transfer characteristics of the gate voltage and the drain current, and obtains the target mass parameters of the target carriers; the target carriers include electron carriers and hole carriers; finally, based on the target mass parameters of the target carriers, the transfer characteristic curve of the gate voltage and the drain current of the SBFET is simulated using the target TCAD simulation model to obtain a simulated transfer characteristic curve. Since the target TCAD simulation model is a simulation model with the tunneling function activated, and the target mass parameters of the target carriers corresponding to the simulated transfer characteristic curve that is consistent with the measured transfer characteristic curve are determined; therefore, the effective mass of the electron carriers and hole carriers of mt in the Parameter file of the target TCAD simulation model is set as the target mass parameter, and then the transfer characteristics between the SBFET gate voltage and the drain current are simulated, the problem of small current on both sides during simulation can be avoided, and a simulated transfer characteristic curve that is consistent with the measured transfer characteristic curve can be obtained; this is conducive to promoting the design and optimization of SBFET.
[0074] It should be noted that, in order to solve the problems described in the background technology, the simulation method of a SBFET provided by the present invention focuses on the reason why the simulation current is small, that is, the Schottky junction formed by the source and the drain is equivalent to two reverse-connected Schottky diodes in series, and when the current flows through the two reverse-connected diodes, there must be a region where a large potential barrier exists. Because of the existence of the potential barrier, the current is relatively low, so we can use a model that introduces Schottky barrier tunneling to achieve current simulation, so that the carriers "cross" the potential barrier when flowing through the two reverse-connected Schottky diodes. The simulation method of a SBFET provided by the present invention proposes a method for simulating the transfer characteristics of a Schottky barrier field effect transistor. The key point is to activate the Schottky barrier tunneling model in the TCAD simulation model, and optimize the mass parameters of the target carriers in the Schottky barrier tunneling model; thereby simulating a simulated transfer characteristic curve that is consistent with the measured transfer characteristic curve.
[0075] In step 520, preferably, preprocessing the TCAD simulation model to obtain a target TCAD simulation model may include:
[0076] Firstly, the target parameters in the non-local grid area are set to obtain the target non-local grid area; the target parameters include tunneling distance, relative integral accuracy and integral accuracy; the non-local grid area is the area corresponding to the source and drain of the SBFET in the TCAD simulation model; based on the target non-local grid area, the tunneling model in the TCAD simulation model is activated to obtain the intermediate TCAD simulation model.
[0077] Further, the target model material and target model parameters in the intermediate TCAD simulation model are set to obtain the target TCAD simulation model. The target model material may include silicon, silicon dioxide, and metal; the target model parameters may include fitting parameters and mass parameters of target carriers, and the fitting parameters may include: g, A; the mass parameter m of the target carrier t .
[0078] Specifically, the tunneling model must first define the source and drain as non-local mesh areas in the mathematical calculation module (math) in the Sdevice module in the TCAD simulation model; then set the target parameters in the non-local mesh area to obtain the target non-local mesh area; the tunneling distance that needs to be set in the Nonlocal mesh definition in the mathematical calculation module, the larger the length value, the larger the tunneling current; therefore, it is necessary to set the tunneling distance that conforms to the non-local mesh area of the SBFET source and drain to activate the tunneling model. In addition, in the mathematical calculation module, Digits represents the relative accuracy of integration, and Energy Resolution represents the accuracy of integration. Preferably, the tunneling distance is 0.00001, the relative accuracy of integration is 5, and the accuracy of integration is 0.001.
[0079] As an example, to activate the tunneling model, an intermediate TCAD simulation model is obtained; see Figure 6 , Figure 6 A schematic diagram of an activation tunneling model method of a SBFET simulation method provided by the present invention.
[0080] exist Figure 6 In the distribution, the non-local grid area of the source and the non-local grid area of the drain are defined; wherein the tunneling distance length in the non-local grid area of the source is preferably set to le-5 (1×10 -5 ), the integral relative precision Digits is preferably set to 5, and the integral precision Energy Resolution is preferably set to 0.001; the drain is set according to this method, that is, the tunneling distance length in the non-local grid area of the drain is preferably set to le-5 (1×10 -5), the integral relative precision Digits is preferably set to 5, and the integral precision Energy Resolution is preferably set to 0.001. Based on this, the tunneling model can be activated to obtain the intermediate TCAD simulation model.
[0081] Further, setting the target model material and target model parameters in the intermediate TCAD simulation model to obtain the target TCAD simulation model can include: setting the target model material in the intermediate TCAD simulation model to silicon, silicon dioxide and metal; setting the target model parameters in the intermediate TCAD simulation model to fitting parameters and mass parameters of the target carrier to obtain the target TCAD simulation model.
[0082] Specifically, the target model material and target model parameters in the intermediate TCAD simulation model can be set. For example, in the Parameter file (.par), the target model materials required for simulation are set to silicon, silicon dioxide, and metal respectively; and the necessary parameters of the model when barrier tunneling occurs are declared. The fitting parameters may include: g, A; the mass parameter m of the target carrier t , m t can include electron carriers m e and hole carrier m h .
[0083] As an example, see Figure 7 , Figure 7 A schematic diagram of adjusting the mass parameters of target carriers during simulation of a simulation method of SBFET provided by the present invention. Figure 7 In the Parameter file (.par), the fitting parameters of the source and the mass parameters of the target carrier are preferably set to "g = 1.0, 1.0mt = @m_e@, @m_h A = 1.0, 1.0", and the fitting parameters of the drain and the mass parameters of the target carrier are preferably set to "g = 1.0, 1.0mt = @m_e@, @m_hA = 1.0, 1.0". Based on this, the target TCAD simulation model is obtained, which has good regulation ability for positive and negative gate voltages; thus, m can be adjusted multiple times based on the target TCAD simulation model. t After determining the mass parameters of the carriers in the target region, the transfer characteristics of the SBFET gate voltage and the drain current are simulated respectively to obtain multiple simulated transfer characteristic curves, and the multiple simulated transfer characteristic curves are compared with the measured transfer characteristic curve to obtain a target simulated transfer characteristic curve that is consistent with the measured transfer characteristic curve, and the mass parameter of the carrier corresponding to the target simulated transfer characteristic curve is determined as the target mass parameter of the target carrier.
[0084] In step 530, preferably, based on the target TCAD simulation model and the measured transfer characteristic curve, the mass parameter of the target carrier when the transfer characteristic simulation is performed using the target TCAD simulation model is adjusted to obtain the target quality parameter; this may include: obtaining a first quality parameter; based on the first quality parameter, using the target TCAD simulation model to simulate the transfer characteristic curve to obtain a first simulated transfer characteristic curve; comparing the first simulated transfer characteristic curve with the measured transfer characteristic curve to obtain a first comparison result.
[0085] If the first comparison result indicates that the similarity between the first simulation transfer characteristic curve and the measured transfer characteristic curve is greater than or equal to a preset threshold, the first quality parameter is determined as the target quality parameter.
[0086] If the first comparison result indicates that the similarity between the first simulation transfer characteristic curve and the measured transfer characteristic curve is less than a preset threshold, the first quality parameter is adjusted according to the preset data adjustment method; based on the adjusted quality parameter, the transfer characteristic curve is simulated using the target TCAD simulation model until a simulation transfer characteristic curve that meets the convergence conditions is obtained, and the quality parameter corresponding to the simulation transfer characteristic curve that meets the convergence conditions is determined as the target quality parameter.
[0087] It should be noted that the mass parameter of the target carrier represents the mass parameter of the target carrier of the gate and drain of the SBFET, and the gate and drain of the SBFET are adjusted uniformly during adjustment.
[0088] In the early stage of adjusting parameters, it is necessary to adjust the effective mass of a certain carrier tunneling over a large range. Through preliminary debugging, it is found that the smaller the effective mass of a certain carrier, the larger the current of the corresponding type.
[0089] Preferably, adjusting the first quality parameter according to a preset data adjustment method may include: reducing the first quality parameter successively by 50%; or adjusting the first quality parameter by reducing it by 90% in the first adjustment and by 50% in the Nth adjustment; wherein N is greater than or equal to 2.
[0090] Preferably, the size of the SBFET in the target TCAD simulation model is equal to the size of the SBFET in the actual measurement process; based on this, simulating according to the SBFET of equal proportional size can obtain better simulation results, and the simulation data has more reference value.
[0091] Preferably, the target mass parameter of electron carriers is 0.005 eV; the target mass parameter of hole carriers is 0.005 eV.
[0092] As an example, see Figures 8 to 9 , Figure 8A schematic diagram of a first simulation effect of a simulation method of a SBFET provided by the present invention; Fig. 9 A schematic diagram of a second simulation effect of a simulation method for SBFET provided by the present invention.
[0093] exist Figure 8 In the figure, the horizontal axis is the gate voltage in volts and the vertical axis is the drain current in A / cm -2 Specifically, the mass parameters of the target carriers of the gate and drain can be set to the first mass parameter, which can be determined based on historical simulation test data combined with the experience of the designer. For example, the first mass parameters of the target carriers, the electron carriers and the hole carriers, are first set to 0.2 eV respectively; the first mass parameters of the electron carriers are first adjusted according to a preset ratio, such as adjusting the electron carriers m of the source and drain to 0.2 eV. e are adjusted to 0.02eV, 0.01eV or 0.005eV respectively; based on this, the target TCAD simulation model is used to simulate the voltage and current transfer characteristics of the gate and drain of the SBFET, and the following is obtained: Figure 8 The simulation curve shown; represents the electron carrier m at the gate and drain of the SBFET e is 0.2eV, and the hole carrier m h is 0.2eV; curve represents the electron carrier m at the gate and drain of the SBFET e is 0.02eV, and the hole carrier m h is 0.2eV; curve represents the electron carrier m at the gate and drain of the SBFET e is 0.01eV, hole carrier m h is 0.2eV; curve represents the electron carrier m at the gate and drain of the SBFET e is 0.005eV, and the hole carrier m h is 0.2eV. Figure 8 It can be obtained that by reducing the electron carrier m in electron tunneling e The effective mass of can effectively increase the electron current on the right side of the simulation transfer characteristic curve; Figure 8 and Figure 4 The comparison of can be obtained: where the electron carrier m e When it is set to 0.005 eV, the curve on the right side of the simulated transfer characteristic curve is consistent with the measured transfer characteristic curve.
[0094] Similarly, in Fig. 9 The simulation curve shown in the figure has the gate voltage on the horizontal axis in volts and the drain current on the vertical axis in A / cm -2The curve represents the electron carrier m at the gate and drain of the SBFET e is 0.005eV, and the hole carrier m h is 0.2eV; curve represents the electron carrier m at the gate and drain of the SBFET e is 0.005eV, and the hole carrier m h is 0.02eV; curve represents the electron carrier m at the gate and drain of the SBFET e is 0.005eV, and the hole carrier m h is 0.01eV; curve represents the electron carrier m at the gate and drain of the SBFET e is 0.005eV, and the hole carrier m h is 0.005eV. Fig. 9 It can be obtained that by reducing the hole carrier m in electron tunneling h The effective mass of can effectively increase the electron current on the left side of the simulation transfer characteristic curve; Fig. 9 and Figure 4 By comparison, we can get: when the electron carrier m h When the value is set to 0.005 eV, the curve on the left side of the simulated transfer characteristic curve is consistent with the measured transfer characteristic curve. Furthermore, it can be obtained that: e and hole carrier m h Both are set to 0.005eV, and the obtained simulated transfer characteristic curve is completely consistent with the measured transfer characteristic curve; based on this, the target mass parameter of electron carriers is set to 0.005eV; the target mass parameter of hole carriers is set to 0.005eV, and the target TCAD simulation model is used to perform simulated transfer characteristic tests on the SBFET gate voltage and drain current, and a simulated transfer characteristic curve consistent with the measured simulated transfer characteristic curve is obtained; the problem of small current in the simulated transfer characteristic curve of SBFET gate voltage and drain current in the prior art is solved.
[0095] In a second aspect, the present invention provides a simulation device for SBFET, see Fig.10 , Fig.10 A schematic structural diagram of a SBFET simulation device provided by the present invention.
[0096] exist Fig.10 In the embodiment, the simulation device may include:
[0097] The measured transfer characteristic curve acquisition module 1010 is used to acquire the measured transfer characteristic curve of the SBFET gate voltage and drain current.
[0098] The model preprocessing module 1020 is used to preprocess the TCAD simulation model to obtain a target TCAD simulation model.
[0099] The quality parameter adjustment module 1030 is used to adjust the quality parameters of the target carriers when the transfer characteristics of the gate voltage and the drain current are simulated using the target TCAD simulation model based on the target TCAD simulation model and the measured transfer characteristic curve, so as to obtain the target quality parameters of the target carriers; the target carriers include electron carriers and hole carriers.
[0100] The simulated transfer characteristic curve determination module 1040 is used to simulate the transfer characteristic curve of gate voltage and drain current of the SBFET based on the target mass parameter of the target carrier using the target TCAD simulation model to obtain a simulated transfer characteristic curve.
[0101] Based on this, the present invention provides a simulation device of SBFET, which obtains the measured transfer characteristic curve of the gate voltage and the drain current of the SBFET through the measured transfer characteristic curve acquisition module 1010; further uses the model preprocessing module 1020 to preprocess the TCAD simulation model to obtain the target TCAD simulation model; then uses the quality parameter adjustment module 1030 to adjust the quality parameters of the target carriers when using the target TCAD simulation model to simulate the transfer characteristics of the gate voltage and the drain current based on the target TCAD simulation model and the measured transfer characteristic curve, and obtains the target quality parameters of the target carriers; the target carriers include electron carriers and hole carriers; finally, uses the simulation transfer characteristic curve determination module 1040 to simulate the transfer characteristic curve of the gate voltage and the drain current of the SBFET based on the target quality parameters of the target carriers and uses the target TCAD simulation model to obtain the simulated transfer characteristic curve; the obtained simulated transfer characteristic curve is consistent with the measured transfer characteristic curve, which solves the problem of small current in the simulated transfer characteristic curve of the gate voltage and the drain current of the SBFET in the prior art.
[0102] In a third aspect, the present invention provides a simulation device for SBFET, see Fig.11 , Fig.11 A schematic diagram of the structure of a SBFET simulation device provided by the present invention.
[0103] exist Fig.11 In the embodiment, the device 1100 includes a memory 1120, a processor, and a computer program stored in the memory 1120 and executable on the processor. When the processor executes the computer program, the simulation method of the SBFET described in any one of the first aspects is implemented.
[0104] Specifically, in Fig.11In the figure, device 1100 is a hardware structure of a simulation device of SBFET provided by the present invention. The device 1100 may include a memory 1120, a first processor 1110, a second processor 1150, and a computer program stored in the memory 1120 and executable on the first processor 1110 and / or the second processor 1150. When the first processor 1110 and / or the second processor 1150 executes the computer program, the simulation method of SBFET described in the first aspect is implemented.
[0105] Optionally, the device 1100 may include a communication interface 1130. There may be one or more communication interfaces 1130. The communication interface 1130 may use any transceiver or other device for communicating with other devices or communication networks.
[0106] Optionally, the device 1100 may further include a communication line 1140. The communication line 1140 may include a path to transmit information between the above components.
[0107] It should be noted that the memory may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may exist independently and be connected to the processor through a communication line. The memory may also be integrated with the processor.
[0108] Optionally, the computer-executable instructions in the embodiment of the present invention may also be referred to as application program codes, which is not specifically limited in the embodiment of the present invention.
[0109] In a specific implementation, as an example, Fig.11 As shown, the first processor 1110 and the second processor 1150 may include one or more CPUs, such as Fig.11 CPU0 and CPU1 in.
[0110] Although the present invention is described herein in conjunction with various embodiments, in the process of implementing the claimed invention, those skilled in the art may understand and implement other variations of the disclosed embodiments by viewing the drawings, the disclosure, and the appended claims. In the claims, the word "comprising" does not exclude other components or steps, and "one" or "an" does not exclude multiple situations. A single processor or other unit may implement several functions listed in the claims. Certain measures are recorded in different dependent claims, but this does not mean that these measures cannot be combined to produce good results.
[0111] Although the present invention has been described in conjunction with specific features and embodiments thereof, it is apparent that various modifications and combinations may be made thereto without departing from the spirit and scope of the present invention. Accordingly, this specification and the accompanying drawings are merely exemplary illustrations of the present invention as defined by the appended claims and are deemed to cover any and all modifications, variations, combinations or equivalents within the scope of the present invention. Obviously, those skilled in the art may make various modifications and variations to the present invention without departing from the spirit and scope of the present invention. Thus, the present invention is intended to include such modifications and variations if they fall within the scope of the claims of the present invention and their equivalents.
Claims
1. A simulation method of SBFET, characterized in that: include: Obtain the measured transfer characteristic curve of SBFET gate voltage and drain current; Preprocessing the TCAD simulation model to obtain a target TCAD simulation model; Based on the target TCAD simulation model and the measured transfer characteristic curve, adjusting the mass parameter of the target carrier when simulating the transfer characteristics of gate voltage and drain current using the target TCAD simulation model to obtain the target mass parameter of the target carrier; the target carrier includes electron carriers and hole carriers; Based on the target mass parameter of the target carrier, the target TCAD simulation model is used to simulate the transfer characteristic curve of the gate voltage and the drain current of the SBFET to obtain a simulated transfer characteristic curve.
2. The method according to claim 1, characterized in that The preprocessing of the TCAD simulation model to obtain the target TCAD simulation model includes: Parameter setting is performed on target parameters in the non-local grid area to obtain a target non-local grid area; the target parameters include tunneling distance, integral relative accuracy and integral accuracy; the non-local grid area is the area corresponding to the source and drain of the SBFET in the TCAD simulation model; Based on the target non-local grid area, activating the tunneling model in the TCAD simulation model to obtain an intermediate TCAD simulation model; The target model material and target model parameters in the intermediate TCAD simulation model are set to obtain the target TCAD simulation model.
3. The method according to claim 2, characterized in that The step of setting the target model material and the target model parameters in the intermediate TCAD simulation model to obtain the target TCAD simulation model includes: Setting the target model material in the intermediate TCAD simulation model to silicon, silicon dioxide and metal; The target model parameters in the intermediate TCAD simulation model are set as fitting parameters and mass parameters of target carriers to obtain the target TCAD simulation model.
4. The method according to claim 2, characterized in that The tunneling distance is 0.00001, the integral relative accuracy is 5, and the integral accuracy is 0.
001.
5. The method according to claim 1, characterized in that The step of adjusting the target carrier mass parameter when performing transfer characteristic simulation using the target TCAD simulation model based on the target TCAD simulation model and the measured transfer characteristic curve to obtain the target mass parameter comprises: obtaining a first quality parameter; Based on the first quality parameter, using the target TCAD simulation model to perform transfer characteristic curve simulation to obtain a first simulated transfer characteristic curve; Comparing the first simulation transfer characteristic curve with the measured transfer characteristic curve to obtain a first comparison result; If the first comparison result indicates that the similarity between the first simulation transfer characteristic curve and the measured transfer characteristic curve is greater than or equal to a preset threshold, determining the first quality parameter as the target quality parameter; If the first comparison result indicates that the similarity between the first simulation transfer characteristic curve and the measured transfer characteristic curve is less than a preset threshold, the first quality parameter is adjusted according to a preset data adjustment method; based on the adjusted quality parameter, the transfer characteristic curve is simulated using the target TCAD simulation model until a simulation transfer characteristic curve that meets the convergence conditions is obtained, and the quality parameter corresponding to the simulation transfer characteristic curve that meets the convergence conditions is determined as the target quality parameter.
6. The method according to claim 5, characterized in that The target mass parameter of the electron carrier is 0.005 eV; the target mass parameter of the hole carrier is 0.005 eV.
7. The method according to claim 5, characterized in that The adjusting the first quality parameter according to a preset data adjustment method includes: gradually reducing the first quality parameter by 50%; Alternatively, the first quality parameter is adjusted in a manner of reducing by 90% in the first adjustment and by 50% in the Nth adjustment; wherein N is greater than or equal to 2.
8. The method according to claim 1, characterized in that The SBFET size in the target TCAD simulation model is equal to the SBFET size in the actual measurement process.
9. A simulation device for SBFET, characterized in that: include: A measured transfer characteristic curve acquisition module, wherein the measured transfer characteristic curve acquisition module is used to acquire a measured transfer characteristic curve of the SBFET gate voltage and drain current; A model preprocessing module, wherein the model preprocessing module is used to preprocess the TCAD simulation model to obtain a target TCAD simulation model; A quality parameter adjustment module, the quality parameter adjustment module is used to adjust the quality parameters of the target carriers when the transfer characteristics of the gate voltage and the drain current are simulated using the target TCAD simulation model based on the target TCAD simulation model and the measured transfer characteristic curve, so as to obtain the target quality parameters of the target carriers; the target carriers include electron carriers and hole carriers; A simulation transfer characteristic curve determination module is used to simulate the transfer characteristic curve of gate voltage and drain current of the SBFET based on the target mass parameter of the target carrier using the target TCAD simulation model to obtain a simulation transfer characteristic curve.
10. A simulation device for SBFET, characterized in that: The method comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein the processor implements the SBFET simulation method according to any one of claims 1 to 8 when executing the computer program.