Capacitance threshold testing method and device and electronic equipment

Abstract

The invention provides a capacitance threshold testing method and device and electronic equipment, which are applied to an upper computer connected with a solid state disk, and the solid state disk comprises a controller and a capacitance module which are connected in sequence; the method comprises the following steps: sending a first command to a controller, so that the controller controls a capacitor module to discharge according to an initial first preset discharge time length, controls the solid state disk to be powered off after discharging, verifies data of the solid state disk when an off-machine state is reached so as to judge whether the data of the solid state disk is complete or not, and if the data of the solid state disk is complete, sends the verification result to the controller; then, starting from the initial first preset discharge duration, the initial first preset discharge duration is adjusted according to the descending trend or the ascending trend until the target first preset discharge duration is determined; according to the residual capacitance value of the capacitor module corresponding to the target first preset discharge duration and the pre-obtained deviation value of the capacitor module, whether the capacitance threshold value can ensure the data integrity of the solid state disk or not is judged, and the mode can reduce the test cost and improve the efficiency and convenience.

Description

Technical Field

[0001] The present invention relates to the technical field of capacitance threshold test of solid state hard disks, and in particular to a capacitance threshold test method, device and electronic equipment. Background Art

[0002] For SSDs, if there is no power protection and the SSD suddenly loses power, data in the cache will be lost. To prevent this from happening, a power-off protection mechanism is added to enterprise-level SSDs. The health detection of capacitors is an important part of enterprise-level SSDs. The main focus of capacitor health detection is whether the current capacitance value meets the set capacitance threshold. The prior art currently captures the waveform when the SSD is powered off to infer whether the current capacitance meets the set capacitance threshold, thereby determining whether the data integrity requirements can be met. Since waveform capture requires oscilloscopes, probes and other equipment, these precision instruments are expensive, inconvenient to use, and have requirements for operators, resulting in high testing costs, poor convenience, and low efficiency. Summary of the invention

[0003] The purpose of the present invention is to provide a capacitance threshold testing method, device and electronic equipment to reduce testing costs and improve efficiency and convenience.

[0004] The present invention provides a method for testing a capacitance threshold, which is applied to a host computer, the host computer is connected to a solid state hard disk, and the solid state hard disk includes a controller and a capacitance module connected in sequence; the method includes:

[0005] Sending a first command to the controller so that the controller controls the capacitor module to discharge according to an initial first preset discharge time; wherein the initial first preset discharge time is half of the preset maximum discharge time of the capacitor module;

[0006] After the capacitor module is discharged, the solid state drive is controlled to be powered off;

[0007] When the solid state drive is powered off and reaches an off-machine state, the data of the solid state drive is verified to determine whether the data of the solid state drive is complete;

[0008] If the data of the solid-state hard disk is incomplete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the downward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state hard disk until the data of the solid-state hard disk is complete, and the adjusted first preset discharge time when the data of the solid-state hard disk is complete is determined as the target first preset discharge time;

[0009] If the data of the solid-state hard disk is complete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the upward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state hard disk, until the data of the solid-state hard disk is incomplete, and the first preset discharge time that was adjusted when the data of the solid-state hard disk was incomplete is determined as the target first preset discharge time;

[0010] According to the remaining capacitance of the capacitor module corresponding to the target first preset discharge time and the pre-acquired deviation value of the capacitor module, it is determined whether the capacitance threshold can ensure the data integrity of the solid state drive.

[0011] Further, the step of sending a first command to the controller so that the controller controls the capacitor module to discharge according to an initial first preset discharge time includes:

[0012] Writing data in a preset format to the solid state drive through a first function of the preset software;

[0013] The continuous writing time of data is obtained through the second function of the preset software. When the writing time reaches the second preset time, the first command is sent to the controller so that the controller controls the discharge of the capacitor module according to the initial first preset discharge time.

[0014] Furthermore, the host computer is connected to the solid state hard disk through a control switch; after the capacitor module is discharged, the step of controlling the solid state hard disk to power off includes:

[0015] When the capacitor module is discharged to the initial first preset discharge time, a second command is sent to the control switch so that the control switch controls the solid state drive to power off, and a third command is fed back to the host computer;

[0016] The time difference between the time when the host computer sends the second command and the time when the host computer receives the third command is the time required to power off the solid state drive.

[0017] Furthermore, the solid state hard disk further includes a power chip, and the controller is connected to the capacitor module via the power chip; the method further includes:

[0018] Send a fourth command to the controller so that the controller configures the voltage difference between the starting voltage and the ending voltage of the power chip to a preset multiple of the preset voltage difference, thereby configuring the maximum discharge time of the capacitor module; wherein the maximum discharge time of the capacitor module is greater than the time required to power off the solid state drive.

[0019] Furthermore, when the solid state drive is powered off to reach the off-machine state, the step of verifying the data of the solid state drive to determine whether the data of the solid state drive is complete also includes:

[0020] When it is detected that the solid state drive is powered off to the off-machine state, a fifth command is sent to the control switch so that the control switch controls the solid state drive to power on, and a sixth command is fed back to the host computer;

[0021] When the sixth command is received, a seventh command is sent to the solid state drive through the preset software to verify the data of the solid state drive, and an eighth command fed back by the solid state drive according to the seventh command is received;

[0022] Determine whether the data on the solid state drive is complete according to the eighth command.

[0023] Further, according to the remaining capacitance of the capacitor module corresponding to the target first preset discharge time and the pre-acquired deviation value of the capacitor module, the step of determining whether the capacitance threshold can ensure the integrity of the data of the solid state drive also includes:

[0024] Determine a second preset discharge time of the capacitor module according to the target first preset discharge time and the pre-acquired power-off time of the solid-state hard disk; wherein the second preset discharge time is the time interval between the capacitor module starting to discharge and the solid-state hard disk starting to power off;

[0025] Obtaining the remaining capacitance of the capacitor module when the capacitor module is discharged for a second preset discharge time;

[0026] According to the remaining capacitance and the pre-acquired deviation value of the capacitance module, it is determined whether the capacitance threshold can ensure the data integrity of the solid state drive.

[0027] Further, the step of judging whether the capacitance threshold value can ensure the data integrity of the solid state drive according to the remaining capacitance value and the pre-acquired deviation value and capacitance threshold value of the capacitance module includes:

[0028] Determine a first capacitance value according to the remaining capacitance and a pre-acquired deviation value of the capacitance module;

[0029] Comparing the first capacitance value with a capacitance threshold of the capacitance module to obtain a comparison result;

[0030] If the comparison result indicates that the first capacitance value is greater than the capacitance threshold, determining that the capacitance threshold cannot ensure data integrity of the solid state drive;

[0031] If the comparison result indicates that the first capacitance value is not greater than the capacitance threshold, determining the capacitance threshold can ensure data integrity of the solid state drive.

[0032] The present invention also provides a capacitance threshold test device, which is arranged on a host computer, the host computer is connected to a solid state hard disk, and the solid state hard disk includes a controller and a capacitance module connected in sequence; the device includes:

[0033] A sending module, used for sending a first command to the controller, so that the controller controls the capacitor module to discharge according to an initial first preset discharge time; wherein the initial first preset discharge time is half of the preset maximum discharge time of the capacitor module;

[0034] The air module is used to control the power-off of the solid-state hard disk after the capacitor module is discharged;

[0035] The verification module is used to verify the data of the solid state drive when the solid state drive is powered off and reaches the off-machine state, so as to determine whether the data of the solid state drive is complete;

[0036] a first adjustment module, for adjusting the initial first preset discharge time according to a downward trend starting from the initial first preset discharge time if the data of the solid state drive is incomplete, and using the adjusted first preset discharge time as the initial first preset discharge time to verify the data of the solid state drive until the data of the solid state drive is complete, and determining the adjusted first preset discharge time when the data of the solid state drive is complete as the target first preset discharge time;

[0037] a second adjustment module, for, if the data of the solid-state hard disk is complete, adjusting the initial first preset discharge time according to an upward trend starting from the initial first preset discharge time, and using the adjusted first preset discharge time as the initial first preset discharge time to verify the data of the solid-state hard disk, until the data of the solid-state hard disk is incomplete, and determining the first preset discharge time that was last adjusted when the data of the solid-state hard disk was incomplete as the target first preset discharge time;

[0038] The judgment module is used to judge whether the capacitance threshold value can ensure the data integrity of the solid state hard disk according to the remaining capacitance of the capacitance module corresponding to the target first preset discharge time and the pre-acquired deviation value of the capacitance module.

[0039] An electronic device provided by the present invention includes a memory and a processor. The memory stores a computer program that can be run on the processor. When the processor executes the computer program, the steps of any of the above-mentioned capacitance threshold test methods are implemented.

[0040] The present invention provides a computer-readable medium having a non-volatile program code executable by a processor, wherein the program code enables the processor to execute any of the above-mentioned capacitance threshold test methods.

[0041] The present invention provides a capacitance threshold test method, device and electronic equipment, which are applied to a host computer connected to a solid-state hard disk, wherein the solid-state hard disk comprises a controller and a capacitance module connected in sequence; the method comprises: sending a first command to the controller so that the controller controls the capacitance module to discharge according to an initial first preset discharge time, and controls the solid-state hard disk to power off after discharge, and when the power-off state is reached, verifies the data of the solid-state hard disk to determine whether the data of the solid-state hard disk is complete, and then starts from the initial first preset discharge time, adjusts the initial first preset discharge time according to a downward trend or an upward trend until a target first preset discharge time is determined; and determines whether the capacitance threshold can ensure the data integrity of the solid-state hard disk according to the residual capacitance of the capacitance module corresponding to the target first preset discharge time and the deviation value of the capacitance module obtained in advance, and this method can reduce the test cost and improve the efficiency and convenience. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 A flow chart of a capacitance threshold testing method provided by an embodiment of the present invention;

[0044] Figure 2 A flow chart of another capacitance threshold testing method provided by an embodiment of the present invention;

[0045] Figure 3 A schematic diagram of the structure of a capacitance threshold test device provided by an embodiment of the present invention;

[0046] Figure 4 A schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0047] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0048] For SSDs, each data write is first written to the SSD cache, and the SSD controller then writes the data in the cache to NandFlash (flash memory). Therefore, if there is no power protection, if the SSD suddenly loses power, the data in the cache will be lost. To prevent this from happening, a power-off protection mechanism has been added to enterprise-level SSDs. In addition to the voltage detection module, the core is the power storage module, which is mainly carried by capacitors. As the capacitor ages with time and environmental changes, its capacitance will also age. Therefore, capacitor health detection is an important part of enterprise-level SSDs. In capacitor health detection, the main focus is on whether the current capacitance value meets the set capacitance threshold, so as to determine whether the selected capacitor can play a power-off protection function.

[0049] In the prior art, the capacitance is inferred by capturing the waveform when the capacitor solid-state hard disk is powered off, and the capacitance is compared with the capacitance threshold to determine whether the data can meet the data integrity requirements. Since capturing the waveform requires oscilloscopes, probes and other precision instruments, which are expensive and inconvenient to use, and also require operators, the test cost is high, the convenience is poor, and the efficiency is low.

[0050] Based on this, the present application provides a capacitance threshold testing method, device and electronic equipment to reduce testing costs and improve efficiency and convenience.

[0051] To facilitate understanding of this embodiment, a capacitance threshold test method disclosed in an embodiment of the present invention is first introduced in detail. The method is applied to a host computer, the host computer is connected to a solid state drive, and the solid state drive includes a controller and a capacitance module connected in sequence, such as Figure 1 As shown, the method comprises the following steps:

[0052] Step S102, sending a first command to the controller so that the controller controls the capacitor module to discharge according to an initial first preset discharge time; wherein the initial first preset discharge time is half of the preset maximum discharge time of the capacitor module.

[0053] The above-mentioned upper computer generally refers to a computer that can directly issue control commands, usually a PC / hostcomputer / master computer / upper computer.

[0054] The above-mentioned solid state disk (SSD), also known as solid state drive, is a hard disk made of solid-state electronic storage chip array. SSD is generally composed of a control unit (equivalent to the above-mentioned controller) and a storage unit (FLASH chip, DRAM chip). In order to prevent the solid state disk from suddenly losing power and causing data loss in the cache, a power-off protection mechanism is added to enterprise-level solid state disks. Among them, the core is mainly a power storage module (equivalent to the above-mentioned capacitor module) that is mainly carried by capacitors.

[0055] The maximum discharge time is the time required for the capacitor to be discharged from a fully charged state to a target charge to be adjusted.

[0056] In actual implementation, the maximum discharge time can be obtained first, and then half of the maximum discharge time is determined as the first preset discharge time. Then the host computer can send a first command to the controller so that the controller controls the capacitor module to discharge according to the initial first preset discharge time.

[0057] Step S104, after the capacitor module is discharged, the solid state hard disk is controlled to be powered off.

[0058] In actual implementation, after the capacitor module discharges for a first preset discharge time, the host computer can control the solid-state hard disk to power off, that is, disconnect the power connection between the solid-state hard disk and the host computer, and stop the power supply of the host computer to the solid-state hard disk.

[0059] Step S106, when the solid state drive is powered off and reaches an off-machine state, the data of the solid state drive is verified to determine whether the data of the solid state drive is complete.

[0060] In actual implementation, for the solid-state hard drive, after the power-off interruption, the work to be done includes dumping data to fill the block, accessing various tables, and flushing the data in the buffer to NandFlash. Specifically, after the solid-state hard drive is powered off, the remaining capacitance when the capacitor module discharges to the first preset discharge time can support the solid-state hard drive to perform the work to be done after the power-off interruption.

[0061] In fact, if the remaining capacitance can support the solid-state hard disk to perform all the work to be done after the power-off interruption, then after performing all the work to be done after the power-off interruption, the host computer can detect that the solid-state hard disk is no longer displayed in the host computer (that is, the solid-state hard disk is powered off to reach the shutdown state); if the remaining capacitance cannot support the solid-state hard disk to perform all the work to be done after the power-off interruption, then after performing part of the work to be done after the power-off interruption, the host computer will also detect that the solid-state hard disk is no longer displayed in the host computer, and when the solid-state hard disk is performing the work to be done after the power-off interruption, the host computer can detect that the solid-state hard disk is displayed in the host computer (that is, the solid-state hard disk is not powered off to reach the shutdown state).

[0062] In the specific implementation process, when the solid-state hard disk is powered off to the offline state, the host computer can verify the data of the solid-state hard disk to determine whether the data of the solid-state hard disk is complete. Specifically, if the remaining capacitance can support the solid-state hard disk to perform all the work to be done after the power-off interruption, after the data of the solid-state hard disk is verified, the data of the solid-state hard disk is generally complete; if the remaining capacitance cannot support the solid-state hard disk to perform all the work to be done after the power-off interruption, then after the data of the solid-state hard disk is verified, the data of the solid-state hard disk is generally incomplete.

[0063] Step S108, if the data of the solid-state hard disk is incomplete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the downward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state hard disk until the data of the solid-state hard disk is complete, and the adjusted first preset discharge time when the data of the solid-state hard disk is complete is determined as the target first preset discharge time.

[0064] In fact, the discharge time is generally accurate to milliseconds (ms). In actual implementation, if after executing step S106, it is determined that the data of the solid-state hard disk is incomplete, it means that the initial first preset discharge time is set to be relatively long, resulting in less residual capacitance in the capacitor module. The initial first preset discharge time can be started and lowered by 1 millisecond each time to obtain the adjusted first preset discharge time, and then the adjusted first preset discharge time is used as the initial first preset discharge time, and the above steps S102 to S106 are repeated until the adjusted first preset discharge time can make the data of the solid-state hard disk complete, and the adjusted first preset discharge time is determined as the target first preset discharge time.

[0065] Step S110, if the data of the solid-state hard disk is complete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the upward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state hard disk, until the data of the solid-state hard disk is incomplete, and the last adjusted first preset discharge time of the first preset discharge time adjusted when the data of the solid-state hard disk is incomplete is determined as the target first preset discharge time.

[0066] If after executing step S106, it is determined that the data of the solid-state hard disk is complete, it means that the initial first preset discharge time is set shorter, resulting in a large amount of residual capacitance in the capacitor module. Starting from the initial first preset discharge time, the time is increased by 1 millisecond each time to obtain an adjusted first preset discharge time. Then, the adjusted first preset discharge time is used as the initial first preset discharge time. The above steps S102 to S106 are repeated until the adjusted first preset discharge time can make the data of the solid-state hard disk incomplete. Then, the last adjusted first preset discharge time is determined as the target first preset discharge time. For example, starting from the initial first preset discharge time of 30ms, the time is increased by 1 millisecond each time. When it is found that the adjustment to 40ms can just meet the incomplete data of the solid-state hard disk, 39ms (that is, the last adjusted first preset discharge time corresponding to 40ms) can be determined as the target first preset discharge time.

[0067] Step S112, judging whether the capacitance threshold value can ensure the data integrity of the solid state drive according to the remaining capacitance of the capacitance module corresponding to the target first preset discharge time and the pre-acquired deviation value of the capacitance module.

[0068] The above-mentioned capacitance threshold refers to the capacitance threshold of the capacitance module on the solid-state drive currently being tested. Generally, the capacitance threshold is determined by adding the capacitance at the end of life provided by the manufacturer (that is, the capacitance at the end of life corresponding to the factory setting) and the capacitance value deviation result read by the power chip.

[0069] In actual implementation, after continuously adjusting the initial first preset discharge time of the capacitor discharge through step S208 or step S210, the critical time (that is, the above-mentioned target first preset discharge time) can be found. Generally, the critical time can be found after repeating the adjustment 5 to 6 times.

[0070] Then, according to the discharge curve of the capacitor module, the amount of electricity discharged to the target first preset discharge time (that is, the remaining capacitance of the capacitor module corresponding to the target first preset discharge time) can be converted, which is generally recorded as C_dataintegrity. In fact, conventional power chips also have a reading error for the capacitor (that is, the deviation value of the capacitor module), which is generally recorded as C_bias. In the specific implementation process, the deviation value of the capacitor module and the preset capacitance threshold can be obtained in advance, and then the sum of the deviation value and the remaining capacitance of the capacitor module is calculated, which is recorded as C_threshold, that is, C_threshold = C_dataintegrit y+C_bias, C_threshold is the ideal capacitance threshold. The ideal capacitance threshold is compared with the preset capacitance threshold. According to the comparison result, it is judged whether the preset capacitance threshold can ensure the data integrity of the solid-state hard disk, so as to judge whether the selected capacitance module can play the power-off protection function. In fact, when the ideal capacitance threshold is not greater than the preset capacitance threshold, the data integrity of the solid-state hard disk can be ensured. It is considered that the capacitance module is reasonably selected and can play the power-off protection function. When the ideal capacitance threshold is greater than the preset capacitance threshold, it is not enough to ensure the data integrity of the solid-state hard disk. It is considered that the capacitance module is unreasonable and cannot play the power-off protection function.

[0071] The capacitance threshold test method provided in the above embodiment is applied to a host computer connected to a solid-state hard disk, and the solid-state hard disk includes a controller and a capacitance module connected in sequence; the method includes: sending a first command to the controller so that the controller controls the capacitance module to discharge according to an initial first preset discharge time, and controls the solid-state hard disk to power off after discharge, and when the power-off state is reached, the data of the solid-state hard disk is verified to determine whether the data of the solid-state hard disk is complete, and then starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to a downward trend or an upward trend until the target first preset discharge time is determined; according to the residual capacitance of the capacitance module corresponding to the target first preset discharge time and the deviation value of the capacitance module obtained in advance, it is determined whether the capacitance threshold can ensure the data integrity of the solid-state hard disk. This method can reduce testing costs and improve efficiency and convenience.

[0072] The embodiment of the present invention also provides another method for testing the capacitance threshold, which is implemented on the basis of the method in the above embodiment. Figure 2 As shown, the solid state hard disk also includes a power chip, the host computer is connected to the solid state hard disk through a control switch; the controller is connected to the capacitor module through the power chip, and the method includes the following steps:

[0073] Step S202, sending a fourth command to the controller, so that the controller configures the voltage difference between the starting voltage and the ending voltage of the power chip to be a preset multiple of the preset voltage difference, thereby configuring the maximum discharge time of the capacitor module.

[0074] The above starting voltage can be understood as the power supply voltage required by the solid-state hard disk, which is generally a fixed value, and the ending voltage can be understood as the voltage when the capacitor finishes discharging. The end voltage is generally a voltage converted from the capacitor loss at the end of the capacitor life cycle given by the capacitor manufacturer. Under normal conditions, the voltage difference between the start voltage and the end voltage is generally recorded as ▲V (the voltage difference is factory set). By configuring the voltage difference between the discharge start voltage and the end voltage of the power chip, the amount of capacitor discharge can be adjusted, thereby changing the discharge time (generally recorded as T_dischage). In the test stage, it is generally necessary to further amplify the end voltage so that the voltage difference between the start voltage and the end voltage is twice that of the original daily state, and then configure the maximum discharge time of the capacitor module, that is, the maximum value that can be adjusted to the initial first preset discharge time. In fact, after discharging to the corresponding discharge time under the daily state, the remaining capacitance value is relatively large, which is generally considered to be sufficient to support the work to be completed after the solid-state hard disk is powered off. After discharging to a longer time than the set maximum discharge time, it is generally considered that the remaining capacitance value is insufficient to support the work to be completed after the solid-state hard disk is powered off. Therefore, the maximum value that can be adjusted to the initial first preset discharge time is generally set to the discharge time corresponding to the voltage difference between the start voltage and the end voltage being twice that of the original daily state.

[0075] Step S204, writing data in a preset format to the solid state drive through the first function of the preset software.

[0076] Step S206, obtaining the continuous writing time of the data through the second function of the preset software, and when the writing time reaches the second preset time, sending a first command to the controller so that the controller controls the capacitor module to discharge according to the initial first preset discharge time.

[0077] The above-mentioned preset software generally adopts fio, the first function is fio's verify function, and the second function is fio's trigger function; the above-mentioned preset format can be md5, and in fact other formats can also be used. You only need to use the corresponding format for verification according to the format in which it is written.

[0078] In the specific implementation, it is necessary to develop and provide a Vendor Specific Command (command, which is not passed) that can discharge the capacitor of the disk online. Here it is recorded as opcode = FF, feature = 01. The specific format can be defined as follows according to the definition of ATA Command Pass-Through:

[0079]

[0080] Generally, the solid-state drive to be operated can be recorded as sda. Since capacitor discharge is not an ATA Defined Command (general command), when developing a Vendor Specific command, the developer can customize all the fields in the above table. By recording the time difference before and after the capacitor discharge, the capacitor discharge time is recorded as T_discharge. The execution code is as follows:

[0081] date+'%Y-%m-%d%H:%M:%S.%3N';

[0082] sg_raw / dev / sda 85 07 00 00 01 00 00 00 00 00 00 00 00e0 ff 00;

[0083] date+'%Y-%m-%d%H:%M:%S.%3N'.

[0084] In actual implementation, the above software is installed in the host computer. Before writing data, make sure that there is no data on the disk. The specific execution command is blkdiscard / dev / sda; then use the verify function of fio to write data in the verify format of md5 to the solid-state hard disk. The duration of fio writing data is a random duration, which can be set according to actual conditions. It is recorded as variable Rand_T here. It is generally believed that when the writing duration reaches the second preset duration, the data in the buffer of the solid-state hard disk can be filled. Using the trigger function of fio, when the writing duration reaches Rand_T, the trigger capacitor is discharged according to the initial first preset discharge duration, and then sleeps for a period of time (that is, the discharge time reaches the initial first preset discharge duration) and then triggers the control switch (usbrealy) to power off the disk. The sleep time is recorded as IDLE_T. The specific execution code is as follows:

[0085] fio--direct=1--ioengine=libaio--filename= / dev / sda--do_verify=1--verify_dump=1--verify_state_save=1--verify=md5--rw=write--numjobs=8

[0086] --iodepth=4 --bs=64k --size=5% --offset_increment=10% --name=test --trigger-timeout=$Rand_T --trigger="sg_raw / dev / sda 85 07 00 00 01 00 000000 00 00 00 00e0 ff 00&sleep IDLE_T usbrelay_poweroff.sh&”.

[0087] In the specific implementation process, in order to find the target first preset discharge time more quickly, the initial first preset discharge time is usually set to half (that is, one-half) of the maximum discharge time of the capacitor module. Because if the initial first preset discharge time is set to 0 or the maximum discharge time, in subsequent adjustments, it is usually necessary to start from 0 with an upward trend or from the maximum discharge time with a downward trend for a large number of adjustments to determine the target first preset discharge time. When adjusting from half of the maximum discharge time of the capacitor module with an upward trend or a downward trend, it usually takes fewer adjustments to find the target first preset discharge time, thereby improving the efficiency of subsequent tests.

[0088] In fact, when the disk is powered off, the work to be done is to flush the data in the buffer to the NAND. Some flushing methods are to flush this part of the data to the SLC flash first, and some are to flush it directly to the TLC flash. However, no matter which method is used, flushing the buffer data during the power-off process takes the longest time and consumes the most power. The more data in the buffer, the more power is required. Therefore, when the buffer is full, the power required is the largest.

[0089] In actual implementation, in order to trigger the situation with the highest power consumption, a test can be performed when the buffer is filled with data. Specifically, the software is used to trigger the discharge of the capacitor module and the power-off event of the solid-state hard disk during the disk IO write process. The power-off event of the disk is triggered by changing the sleep time after the capacitor module is discharged, and the critical discharge time of the capacitor module that meets the data integrity is found, so as to obtain the remaining capacitance of the capacitor after the critical time is reached.

[0090] In fact, adjusting the sleep time after the capacitor is discharged to trigger the disk to power off, and continuously approaching the target preset discharge time during the test, is equivalent to simulating the work that the capacitor has to complete after the disk is powered off under different power levels, and finding the critical power corresponding to the target preset discharge time.

[0091] The above-mentioned method of triggering the capacitor to power off and the disk to power off during the IO write process of the disk can perform real data integrity verification and improve test accuracy, thereby ensuring the effectiveness of the power-off protection function, compared with the prior art method of merely capturing waveforms when the solid-state hard disk is powered off.

[0092] Step S208, when the capacitor module is discharged to the initial first preset discharge time, a second command is sent to the control switch so that the control switch controls the solid state drive to power off, and a third command is fed back to the host computer.

[0093] In fact, all the steps corresponding to the test method of the capacitance threshold described in this application are performed in a high temperature environment. Specifically, the test can be carried out in a high temperature box. Before powering off, the machine backplane of the host computer can supply power to the disk, and usbrealy controls the power on and off of the disk. Specifically, it is necessary to adjust the usbrelay script for powering on and off the disk to ensure that the disk can be powered off after the power-off command (that is, the second command) is issued, and the disk can be powered on after the power-on command is issued, and the duration of usbrelay triggering the disk to power off is recorded, which must be accurate to the ms level. By recording the time difference between the time point when the host computer sends the power-off command and the time point when the control switch receives the third command returned according to the power-off command, the time required for the solid-state hard disk to power off can be determined, which is recorded as T_poweroff here. The specific execution code for the host computer to control the power-off of the disk and obtain the time required for power-off is as follows:

[0094] date+'%Y-%m-%d%H:%M:%S.%3N'

[0095] usbrelay_poweroff.sh###It is recommended to call the original command of usbrelay manufacturer to reduce the power-off time;

[0096] date+'%Y-%m-%d%H:%M:%S.%3N'.

[0097] In the specific implementation process, if the time required for the above-mentioned solid-state hard disk to power off is small enough, it can be ignored. Otherwise, it is necessary to ensure that the maximum discharge time of the capacitor module is much longer than the time required for the solid-state hard disk to power off, that is, to ensure that the capacitor module cannot stop discharging the additional resistance before the solid-state hard disk is powered off (it should be noted that before the solid-state hard disk is powered off, the capacitor module discharges to the additional resistance, not to the solid-state hard disk). If the capacitor module stops discharging to the additional resistance before the solid-state hard disk is powered off, since the solid-state hard disk has not been powered off at this time, the upper host will quickly charge the capacitor module, which will increase the remaining capacitance of the capacitor module and affect the test accuracy.

[0098] Therefore, when the time required to power off the solid-state hard drive is not short enough and cannot be ignored, it is also necessary to ensure that the sum of the time required to power off the solid-state hard drive and the initial first preset discharge time is not greater than the maximum discharge time of the capacitor module. At this time, the maximum value to which the initial first preset discharge time can be adjusted is set to the difference between the maximum discharge time and the time required to power off the solid-state hard drive.

[0099] Step S210, when it is detected that the solid state drive is powered off to the shutdown state, a fifth command is sent to the control switch so that the control switch controls the solid state drive to power on, and a sixth command is fed back to the host computer.

[0100] Step S212, when the sixth command is received, a seventh command is sent to the solid state drive through the preset software to verify the data of the solid state drive, and an eighth command fed back by the solid state drive according to the seventh command is received.

[0101] Step S214: Determine whether the data on the solid state drive is complete according to the eighth command.

[0102] In the specific implementation process, when it is detected that the solid state drive is powered off to the shutdown state, a power-on command (that is, the fifth command) can be sent to usbrelay to control the disk to power on, and then fio (a preset software) is used to verify the data, and then the eighth command fed back is used to determine whether the data of the solid state drive is complete. The specific execution code is as follows:

[0103] fio--direct=1--ioengine=libaio--filename= / dev / sda--do_verify=1--verify_dump=1--verify_state_load=1--verify=md5--rw=read--numjobs=8

[0104] --iodepth=1--bs=64k--size=5%--offset_increment=10%--name=test.

[0105] Step S216, if the data of the solid-state hard disk is incomplete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the downward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state hard disk until the data of the solid-state hard disk is complete, and the adjusted first preset discharge time when the data of the solid-state hard disk is complete is determined as the target first preset discharge time.

[0106] Step S218, if the data of the solid-state hard disk is complete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the upward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state hard disk, until the data of the solid-state hard disk is incomplete, and the last adjusted first preset discharge time of the first preset discharge time adjusted when the data of the solid-state hard disk is incomplete is determined as the target first preset discharge time.

[0107] In specific implementation, if the eighth command indicates that the data of the solid-state hard disk is incomplete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the downward trend; if the eighth command indicates that the data of the solid-state hard disk is complete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the upward trend until the target first preset discharge time is obtained.

[0108] In fact, in order to further ensure the accuracy of the test, after determining the target first preset discharge time, data writing can be repeated multiple times (that is, the above-mentioned step S204), and data verification is performed after each writing (that is, the above-mentioned step S212). If each data verification is correct, that is, the data of the solid-state hard disk is complete each time, it is determined that the target first preset discharge time is correct, which is the final critical value.

[0109] Step S220, determining a second preset discharge duration of the capacitor module according to the target first preset discharge duration and the pre-acquired power-off duration of the solid-state hard disk; wherein the second preset discharge duration is the time interval between the capacitor module starting to discharge and the solid-state hard disk starting to power off.

[0110] In fact, in order to further ensure the accuracy of the test, it is usually necessary to consider the discharge of the capacitor module within the time required for the solid-state hard disk to power off. Specifically, the target first preset discharge time and the pre-acquired solid-state hard disk power-off time can be summed to obtain the sum result, and the sum result is determined as the second preset discharge time of the capacitor module, that is, the discharge time required for the capacitor module to discharge from a fully charged state until it discharges to the time when the solid-state hard board starts to power off.

[0111] Step S222, obtaining the remaining capacitance of the capacitor module when the capacitor module is discharged for a second preset discharge time.

[0112] Step S224, judging whether the capacitance threshold value can ensure the data integrity of the solid state drive according to the remaining capacitance and the pre-acquired deviation value of the capacitance module.

[0113] In the specific implementation process, the above step S224 can be obtained by following the steps 1 to 4:

[0114] Step 1: Determine a first capacitance value according to the remaining capacitance and a pre-acquired deviation value of the capacitance module.

[0115] Step 2: Compare the first capacitance value with the capacitance threshold of the capacitance module to obtain a comparison result.

[0116] In actual implementation, the remaining capacitance (also called the remaining power) of the capacitor module when the capacitor module is discharged to the second preset discharge time can be obtained first, and then the sum of the remaining capacitance and the deviation value of the power supply chip reading the power (capacity) of the capacitor module obtained in advance can be calculated, and the sum result (equivalent to the first capacitance value, which is actually a reasonable capacitance threshold) is compared with the capacitance threshold of the capacitor module obtained in advance (the capacitance threshold designed by factory research and development).

[0117] Step three: If the comparison result indicates that the first capacitance value is greater than the capacitance threshold, it is determined that the capacitance threshold cannot guarantee the data integrity of the solid state drive.

[0118] Step 4: If the comparison result indicates that the first capacitance value is not greater than the capacitance threshold, determining the capacitance threshold can ensure data integrity of the solid state drive.

[0119] The price of capacitor modules (also known as physical capacitors) varies according to their shapes. If the capacitor is too large, data integrity can be guaranteed but the cost is high. If the capacitor is too small, the power-off protection function cannot be achieved.

[0120] In practice, if the comparison result indicates that the first capacitance value is not greater than the capacitance threshold, and the difference between the capacitance threshold and the first capacitance value is greater than a preset threshold, there is a waste of resources in determining the capacitance threshold.

[0121] In the prior art, there is no judgment on whether the threshold design is reasonable. However, this solution can judge the rationality of the number of physical capacitors by comparing the first capacitance value and the capacitance threshold. If the first capacitance value is high, there is a risk to data integrity. If the capacitance threshold is much higher, there is a waste of capacitance design.

[0122] The capacitor threshold test method provided in the above embodiment mainly powers off the disk during the capacitor power-off process, and continuously adjusts the timing of the disk power-off to adjust the remaining power of the capacitor until a critical value (that is, the target first preset discharge duration) is found to ensure that the remaining power can support the solid-state hard disk to complete the work to be performed after abnormal power-off. The power at this time is obtained, and the power is summed with the deviation of the capacitor power read by the power chip. Then, the summed result is compared with the capacitor threshold designed by the research and development. The method is simple to operate, does not require expensive precision instruments, only requires code implementation, and has flexible and free test time, and can perform real data integrity verification.

[0123] The embodiment of the present invention further provides a capacitance threshold test device, which is arranged in a host computer, the host computer is connected to a solid state hard disk, and the solid state hard disk includes a controller and a capacitance module connected in sequence; Figure 3 As shown, the device includes: a sending module 30, used to send a first command to the controller, so that the controller controls the capacitor module to discharge according to an initial first preset discharge time; wherein the initial first preset discharge time is half of the maximum discharge time of the capacitor module set in advance; a control module 31, used to control the solid-state hard disk to power off after the capacitor module is discharged; a verification module 32, used to verify the data of the solid-state hard disk when the solid-state hard disk is powered off to reach an off-machine state, so as to determine whether the data of the solid-state hard disk is complete; a first adjustment module 33, used to adjust the initial first preset discharge time according to a downward trend starting from the initial first preset discharge time if the data of the solid-state hard disk is incomplete, and use the adjusted first preset discharge time as the initial first preset discharge time to verify the data of the solid-state hard disk until the solid-state hard disk is fully discharged. The data of the solid-state hard disk is complete, and the first preset discharge time adjusted when the data of the solid-state hard disk is complete is determined as the target first preset discharge time; the second adjustment module 34 is used to, if the data of the solid-state hard disk is complete, start from the initial first preset discharge time, adjust the initial first preset discharge time according to the upward trend, and use the adjusted first preset discharge time as the initial first preset discharge time to verify the data of the solid-state hard disk, until the data of the solid-state hard disk is incomplete, and the last adjusted first preset discharge time of the first preset discharge time adjusted when the data of the solid-state hard disk is incomplete is determined as the target first preset discharge time; the judgment module 35 is used to judge whether the capacitance threshold can ensure the data integrity of the solid-state hard disk according to the residual capacitance of the capacitance module corresponding to the target first preset discharge time and the deviation value of the capacitance module obtained in advance.

[0124] The above-mentioned embodiment provides a capacitor threshold test device and a host computer arranged on a solid-state hard disk, wherein the solid-state hard disk includes a controller and a capacitor module connected in sequence; including: sending a first command to the controller so that the controller controls the capacitor module to discharge according to an initial first preset discharge time, and controls the solid-state hard disk to power off after discharge, and when the power-off state is reached, verifies the data of the solid-state hard disk to determine whether the data of the solid-state hard disk is complete, and then starts from the initial first preset discharge time, adjusts the initial first preset discharge time according to a downward trend or an upward trend until the target first preset discharge time is determined; determines whether the capacitor threshold can ensure the data integrity of the solid-state hard disk according to the residual capacitance of the capacitor module corresponding to the target first preset discharge time and the deviation value of the capacitor module obtained in advance. The device can reduce testing costs and improve efficiency and convenience.

[0125] Furthermore, the sending module is also used for:

[0126] Writing data in a preset format to the solid state drive through a first function of the preset software;

[0127] The continuous writing time of data is obtained through the second function of the preset software. When the writing time reaches the second preset time, the first command is sent to the controller so that the controller controls the discharge of the capacitor module according to the initial first preset discharge time.

[0128] Furthermore, the host computer is connected to the solid state drive via a control switch; the control module is also used for:

[0129] When the capacitor module is discharged to the initial first preset discharge time, a second command is sent to the control switch so that the control switch controls the solid state drive to power off, and a third command is fed back to the host computer;

[0130] The time difference between the time when the host computer sends the second command and the time when the host computer receives the third command is the time required to power off the solid state drive.

[0131] Furthermore, the device also includes a configuration module, which is used to:

[0132] Send a fourth command to the controller so that the controller configures the voltage difference between the starting voltage and the ending voltage of the power chip to a preset multiple of the preset voltage difference, thereby configuring the maximum discharge time of the capacitor module; wherein the maximum discharge time of the capacitor module is greater than the time required to power off the solid state drive.

[0133] Furthermore, the verification module is also used to:

[0134] When it is detected that the solid state drive is powered off to the off-machine state, a fifth command is sent to the control switch so that the control switch controls the solid state drive to power on, and a sixth command is fed back to the host computer;

[0135] When the sixth command is received, a seventh command is sent to the solid state drive through the preset software to verify the data of the solid state drive, and an eighth command fed back by the solid state drive according to the seventh command is received;

[0136] Determine whether the data on the solid state drive is complete according to the eighth command.

[0137] Furthermore, the judgment module is also used to:

[0138] Determine a second preset discharge time of the capacitor module according to the target first preset discharge time and the pre-acquired power-off time of the solid-state hard disk; wherein the second preset discharge time is the time interval between the capacitor module starting to discharge and the solid-state hard disk starting to power off;

[0139] Obtaining the remaining capacitance of the capacitor module when the capacitor module is discharged for a second preset discharge time;

[0140] According to the remaining capacitance and the pre-acquired deviation value of the capacitance module, it is determined whether the capacitance threshold can ensure the data integrity of the solid state drive.

[0141] Furthermore, the judgment module is also used to:

[0142] Determine a first capacitance value according to the remaining capacitance and a pre-acquired deviation value of the capacitance module;

[0143] Comparing the first capacitance value with a capacitance threshold of the capacitance module to obtain a comparison result;

[0144] If the comparison result indicates that the first capacitance value is greater than the capacitance threshold, determining that the capacitance threshold cannot ensure data integrity of the solid state drive;

[0145] If the comparison result indicates that the first capacitance value is not greater than the capacitance threshold, determining the capacitance threshold can ensure data integrity of the solid state drive.

[0146] The implementation principle and technical effect of the capacitance threshold testing device provided in the embodiment of the present invention are the same as those of the aforementioned capacitance threshold testing method embodiment. For the embodiment of the capacitance threshold testing device, reference may be made to the corresponding content in the aforementioned capacitance threshold testing method embodiment.

[0147] The embodiment of the present invention further provides an electronic device, see Figure 4 As shown, the electronic device includes a processor 130 and a memory 131 , wherein the memory 131 stores machine executable instructions that can be executed by the processor 130 , and the processor 130 executes the machine executable instructions to implement the above capacitance threshold test method.

[0148] Further, Figure 4 The electronic device shown further includes a bus 132 and a communication interface 133 , and the processor 130 , the communication interface 133 and the memory 131 are connected via the bus 132 .

[0149] The memory 131 may include a high-speed random access memory (RAM), and may also include a non-volatile memory, such as at least one disk storage. The communication connection between the system network element and at least one other network element is realized through at least one communication interface 133 (which may be wired or wireless), and the Internet, wide area network, local area network, metropolitan area network, etc. may be used. The bus 132 may be an ISA bus, a PCI bus, or an EISA bus, etc. The bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0150] The processor 130 may be an integrated circuit chip with signal processing capabilities. In the implementation process, each step of the above method can be completed by the hardware integrated logic circuit or software instructions in the processor 130. The above processor 130 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The methods, steps and logic block diagrams disclosed in the embodiments of the present invention can be implemented or executed. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor, etc. The steps of the method disclosed in conjunction with the embodiments of the present invention can be directly embodied as a hardware decoding processor for execution, or a combination of hardware and software modules in the decoding processor for execution. The software module may be located in a storage medium mature in the art, such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory, or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 131, and the processor 130 reads the information in the memory 131 and completes the steps of the method of the above embodiment in combination with its hardware.

[0151] An embodiment of the present invention further provides a computer-readable storage medium, which stores computer-executable instructions. When the computer-executable instructions are called and executed by a processor, the computer-executable instructions prompt the processor to implement the above-mentioned capacitance threshold test method. The specific implementation can be found in the method embodiment, which will not be repeated here.

[0152] The capacitance threshold testing method, device and electronic device provided in the embodiments of the present invention include a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the method described in the previous method embodiment. The specific implementation can be found in the method embodiment and will not be repeated here.

[0153] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0154] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for testing capacitance threshold, characterized in that: The method is applied to a host computer, the host computer is connected to a solid state hard disk, and the solid state hard disk includes a controller and a capacitor module connected in sequence; the method includes: Sending a first command to the controller so that the controller controls the capacitor module to discharge according to an initial first preset discharge time; wherein the initial first preset discharge time is half of the preset maximum discharge time of the capacitor module; After the capacitor module is discharged, controlling the solid state hard disk to power off; When the solid state drive is powered off and reaches an off-machine state, verifying the data of the solid state drive to determine whether the data of the solid state drive is complete; If the data of the solid-state hard disk is incomplete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the downward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state hard disk until the data of the solid-state hard disk is complete, and the adjusted first preset discharge time when the data of the solid-state hard disk is complete is determined as the target first preset discharge time; If the data of the solid-state drive is complete, starting from the initial first preset discharge time, the initial first preset discharge time is adjusted according to the upward trend, and the adjusted first preset discharge time is used as the initial first preset discharge time to verify the data of the solid-state drive, until the data of the solid-state drive is incomplete, and the first preset discharge time that was adjusted when the data of the solid-state drive was incomplete is determined as the target first preset discharge time; According to the remaining capacitance of the capacitor module corresponding to the target first preset discharge time and the pre-acquired deviation value of the capacitor module, it is determined whether the capacitance threshold can ensure the data integrity of the solid state drive.

2. The method according to claim 1, characterized in that The step of sending a first command to the controller so that the controller controls the capacitor module to discharge according to an initial first preset discharge duration includes: Writing data in a preset format into the solid state drive through a first function of a preset software; The continuous writing duration of the data is obtained through the second function of the preset software. When the writing duration reaches a second preset duration, a first command is sent to the controller so that the controller controls the discharge of the capacitor module according to the initial first preset discharge duration.

3. The method according to claim 2, characterized in that The host computer is connected to the solid state hard disk through a control switch; after the capacitor module is discharged, the step of controlling the solid state hard disk to power off includes: When the capacitor module is discharged to the initial first preset discharge time, a second command is sent to the control switch so that the control switch controls the solid state drive to power off, and a third command is fed back to the host computer; The time difference between the time when the host computer sends the second command and the time when the host computer receives the third command is the time required to power off the solid state drive.

4. The method according to claim 3, characterized in that: The solid state hard disk further includes a power chip, and the controller is connected to the capacitor module via the power chip; the method further includes: Send a fourth command to the controller so that the controller configures the voltage difference between the starting voltage and the ending voltage of the power chip to a preset multiple of the preset voltage difference, thereby configuring the maximum discharge time of the capacitor module; wherein the maximum discharge time of the capacitor module is greater than the time required to power off the solid state drive.

5. The method according to claim 3, characterized in that: When the solid state hard disk is powered off to reach an off-machine state, the step of verifying the data of the solid state hard disk to determine whether the data of the solid state hard disk is complete further includes: When it is detected that the solid state drive is powered off to reach the off-machine state, a fifth command is sent to the control switch so that the control switch controls the solid state drive to power on, and a sixth command is fed back to the host computer; When the sixth command is received, a seventh command is sent to the solid state drive through the preset software to verify the data of the solid state drive, and an eighth command fed back by the solid state drive according to the seventh command is received; Determine whether the data of the solid state drive is complete according to the eighth command.

6. The method according to claim 3, characterized in that: The step of judging whether the capacitance threshold can ensure the integrity of the data of the solid state drive according to the remaining capacitance of the capacitance module corresponding to the target first preset discharge time and the pre-acquired deviation value of the capacitance module further includes: Determine a second preset discharge time of the capacitor module according to the target first preset discharge time and the pre-acquired time required for powering off the solid state drive; wherein the second preset discharge time is the time interval between the capacitor module starting to discharge and the solid state drive starting to power off; Obtaining a remaining capacitance of the capacitor module when the capacitor module is discharged for the second preset discharge time; According to the remaining capacitance and the pre-acquired deviation value of the capacitance module, it is determined whether the capacitance threshold can ensure the data integrity of the solid state drive.

7. The method according to claim 6, characterized in that The step of judging whether the capacitance threshold value can ensure the data integrity of the solid state drive according to the remaining capacitance value and the pre-acquired deviation value and capacitance threshold value of the capacitance module comprises: Determining a first capacitance value according to the remaining capacitance and a pre-acquired deviation value of the capacitance module; Comparing the first capacitance value with a capacitance threshold of the capacitance module to obtain a comparison result; If the comparison result indicates that the first capacitance value is greater than the capacitance threshold, determining that the capacitance threshold cannot ensure data integrity of the solid state drive; If the comparison result indicates that the first capacitance value is not greater than the capacitance threshold, determining the capacitance threshold can ensure data integrity of the solid state drive.

8. A capacitance threshold test device, characterized in that: The device is arranged on a host computer, the host computer is connected to a solid state hard disk, and the solid state hard disk comprises a controller and a capacitor module connected in sequence; the device comprises: A sending module, used for sending a first command to the controller, so that the controller controls the capacitor module to discharge according to an initial first preset discharge time; wherein the initial first preset discharge time is half of the preset maximum discharge time of the capacitor module; An aerial module, used for controlling the solid state hard disk to power off after the capacitor module is discharged; A verification module, used for verifying the data of the solid state drive when the solid state drive is powered off to reach an off-machine state, so as to determine whether the data of the solid state drive is complete; a first adjustment module, configured to, if the data of the solid state drive is incomplete, adjust the initial first preset discharge duration according to a downward trend starting from the initial first preset discharge duration, and use the adjusted first preset discharge duration as the initial first preset discharge duration to verify the data of the solid state drive until the data of the solid state drive is complete, and determine the adjusted first preset discharge duration when the data of the solid state drive is complete as the target first preset discharge duration; a second adjustment module, for, if the data of the solid-state hard disk is complete, adjusting the initial first preset discharge duration according to an upward trend starting from the initial first preset discharge duration, and using the adjusted first preset discharge duration as the initial first preset discharge duration to verify the data of the solid-state hard disk, until the data of the solid-state hard disk is incomplete, and determining the first preset discharge duration that was last adjusted when the data of the solid-state hard disk was incomplete as the target first preset discharge duration; The judgment module is used to judge whether the capacitance threshold value can ensure the data integrity of the solid state drive according to the remaining capacitance of the capacitance module corresponding to the target first preset discharge time and the pre-acquired deviation value of the capacitance module.

9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program that can be run on the processor, characterized in that: When the processor executes the computer program, the steps of the capacitance threshold testing method described in any one of claims 1 to 7 are implemented.

10. A computer readable medium having a non-volatile program code executable by a processor, characterized in that: The program code enables the processor to execute the capacitance threshold testing method described in any one of claims 1 to 7.

Images