Surge voltage suppression circuit
By designing a surge voltage suppression circuit including N first circuit units and one second circuit unit, the controller detects the output voltage and gradually reduces the driving voltage, the power tube is in a linear working state, and the output voltage is maintained at a set value, which solves the problem of difficulty in effectively suppressing the surge voltage in the prior art, and achieves stability of the output voltage and reduction of heat loss.
Patent Information
- Application Number
- CN202411941538.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-26
- Publication Date
- 2025-04-04
AI Technical Summary
The prior art is difficult to effectively suppress surge voltages, and it lacks protection for modern electronic equipment.
A surge voltage suppression circuit including N first circuit units and a second circuit unit is designed. Each first circuit unit includes a first power tube, a current limiting resistor, a diode and a first voltage regulator tube. The output voltage is detected by the controller and the driving voltage is gradually reduced. The power tube is in a linear working state, and the output voltage is maintained at a set value.
Effectively suppress the input surge voltage, keep the output voltage stable, reduce the heat loss of linear MOS tubes, and does not require pairing of MOS tubes.
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Figure CN119765237A_ABST
Abstract
Description
Technical Field
[0001] The present invention mainly relates to the technical field of voltage output circuits, and in particular to a surge voltage suppression circuit. Background Art
[0002] Surge voltage refers to the instantaneous overvoltage that exceeds the normal working voltage due to various reasons in the circuit. This phenomenon is essentially a violent pulse. The impact of surge voltage on modern electronic equipment is particularly serious, because the degree of integration of modern electronic equipment is constantly improving, but their ability to resist surge voltage is decreasing. Therefore, for the protection of sensitive electronic and electrical equipment, preventing surge voltage damage has always been a core issue related to the safe and reliable operation of automation equipment.
[0003] GJB181 requires that the overvoltage surge voltage of 80V lasts for 50ms, and GJB298 requires that the overvoltage surge voltage be 100V / 500 ms. The existing suppression scheme uses a single-stage power MOS for adjustment. During a surge, the voltage drop across the MOS tube is more than 45V. The MOS tube works in the linear region, requiring the MOS tube to have a good SOA (safe operating area), that is, a specific linear MOS tube must be selected. However, the device selection of linear MOS tubes is more difficult, and the on-resistance is large, resulting in large heat loss when the product is working normally. In surge applications above 3A, it is also required to screen MOS tubes with similar VGS for pairing. Summary of the invention
[0004] The technical problem to be solved by the present invention is to provide a surge voltage suppression circuit, which can effectively suppress input surge voltage and keep output voltage stable.
[0005] In order to solve the above technical problems, the present invention provides a surge voltage suppression circuit, comprising: N first circuit units and one second circuit unit cascaded in sequence from the Vin side to the Vout side, N≥1; wherein the first circuit unit comprises a first power tube, a current limiting resistor, a diode and a first voltage regulator tube; the first end of the current limiting resistor is connected to the Vin, the second end of the current limiting resistor is connected to the cathode of the diode, the anode of the diode is connected to the output end of the controller, the drain of the first power tube is connected to the first end of the current limiting resistor, and the source of the first power tube is connected to the first end of the current limiting resistor in the next first circuit unit; the gate of the first power tube is respectively connected to the second end of the current limiting resistor and the cathode of the first voltage regulator tube. , the positive electrode of the first voltage regulator tube is grounded; from the Vin side to the Vout side, the voltage regulator voltage of the previous first voltage regulator tube is greater than the voltage regulator voltage of the next first voltage regulator tube; the second circuit unit includes a second power tube and a second voltage regulator tube, wherein the drain of the second power tube is connected to the source of the first power tube in the adjacent first circuit unit, the source of the second power tube is connected to the Vout, the gate of the second power tube is connected to the negative electrode of the second voltage regulator tube, and the positive electrode of the second voltage regulator tube is grounded; the controller is used to output a control voltage, the first end of the controller is connected to the Vout, the first end of the controller is used as an input end, the other end of the controller is used as an output end, and the output end is also connected to the gate of the second power tube.
[0006] Furthermore, N=3.
[0007] Furthermore, the first voltage regulator tube and / or the second voltage regulator tube is a Zener diode.
[0008] Furthermore, the first power tube and / or the second power tube is a linear power tube.
[0009] Compared with the prior art, the present invention has the following beneficial effects: by sequentially cascading N first circuit units and one second circuit unit from the Vin side to the Vout side, when the input voltage is a surge voltage, the controller detects that the output voltage is higher than the set value, gradually reduces the driving voltage, the power tube is in a linear working state, the output voltage is maintained at the set value, the input surge voltage is effectively suppressed, and the output voltage is kept stable. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] The accompanying drawings are included to provide a further understanding of the present invention, and are incorporated into and constitute a part of the present invention. The accompanying drawings illustrate embodiments of the present invention and together with the specification serve to explain the principles of the present invention. In the accompanying drawings: Figure 1 A schematic structural diagram of a surge voltage suppression circuit according to an embodiment of the present invention. DETAILED DESCRIPTION
[0011] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present invention. For ordinary technicians in this field, the present invention can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.
[0012] It should be understood that when a component is referred to as being "on another component," "connected to another component," "coupled to another component," or "contacting another component," it may be directly on, connected to, coupled to, or contacting the other component, or there may be intervening components. In contrast, when a component is referred to as being "directly on another component," "directly connected to," "directly coupled to," or "directly contacting" another component, there are no intervening components. Similarly, when a first component is referred to as being "electrically in contact with" or "electrically coupled to" a second component, there is an electrical path between the first component and the second component that allows current to flow. The electrical path may include capacitors, coupled inductors, and / or other components that allow current to flow, even without direct contact between conductive components.
[0013] refer to Figure 1 As shown, the surge voltage suppression circuit provided in this embodiment includes: N first circuit units and one second circuit unit cascaded in sequence from the Vin side to the Vout side, N≥1, wherein the first circuit unit includes a first power tube, a current limiting resistor, a diode and a first voltage regulator tube. The first end of the current limiting resistor is connected to Vin, the second end of the current limiting resistor is connected to the cathode of the diode, the anode of the diode is connected to the output end of the controller, the drain of the first power tube is connected to the first end of the current limiting resistor, and the source of the first power tube is connected to the first end of the current limiting resistor in the next first circuit unit. The gate of the first power tube is respectively connected to the second end of the current limiting resistor and the cathode of the first voltage regulator tube, and the anode of the first voltage regulator tube is grounded; from the Vin side to the Vout side, the voltage regulator voltage of the previous first voltage regulator tube is greater than the voltage regulator voltage of the next first voltage regulator tube. The second circuit unit includes a second power tube and a second voltage regulator tube, wherein the drain of the second power tube is connected to the source of the first power tube in the adjacent first circuit unit, the source of the second power tube is connected to Vout, the gate of the second power tube is connected to the negative electrode of the second voltage regulator tube, and the positive electrode of the second voltage regulator tube is grounded. The controller is used to output a control voltage, the first end of the controller is connected to Vout, the first end of the controller is used as an input end, the other end of the controller is used as an output end, and the output end is also connected to the gate of the second power tube.
[0014] In some embodiments, N=3.
[0015] In some embodiments, the first voltage regulator tube and / or the second voltage regulator tube is a Zener diode.
[0016] In some implementations, the first power tube and / or the second power tube is a linear power tube.
[0017] The over-surge voltage suppression circuit of this embodiment has two working modes: 1) Normal working process: After normal power-on, the controller drives the output voltage to be slightly greater than Vin, and each power tube is fully turned on, with only MOS tube conduction loss. 2) Overvoltage surge process: When the input is a surge voltage, the controller detects that the output voltage is higher than the set value, gradually reduces the driving voltage, the power tube is in a linear working state, and the output voltage is maintained at the set value.
[0018] The following is an example of a 4-level surge voltage suppression circuit: Figure 1 As shown, R1~R3 are current limiting resistors, D1A~D3A are ordinary diodes, Q1~Q4 are power adjustment tubes, DZ1, DZ2, DZ3, DZ4 are voltage regulators, and different voltage regulator values are selected to meet VDZ1>VDZ2>VDZ3>Vomax+Vth, where Vomax is the maximum output voltage or set value, and Vth is the minimum turn-on voltage of the MOS tube. A, B, and C are the outputs of the first three levels respectively, Vin-10 represents the theoretical output value of A, Vin-20 represents the theoretical output value of B, and Vin-30 represents the theoretical output value of C.
[0019] Normal working process: After normal power-on (such as greater than 8V and less than Vomax), the controller drives the output voltage (DR) to about Vin+13V, and the driving voltages of each power tube DR-A, DR-B, DR-C, and DR-D are all about Vin+12V. The voltage regulator tubes DZ1~DZ3 do not work, and each power tube is fully turned on, with only MOS tube conduction loss. Overvoltage surge process: When the input is a surge voltage (greater than Vomax, such as Vomax+80V), the controller adjusts the driving voltage DR-D (about Vomax+Vth), the power tube Q4 is in a linear working state, and the output voltage is maintained at Vomax.
[0020] Since V DZ1 >V DZ2 >V DZ3 >Vomax+ Vth, diodes D1A~D3A are all cut off, voltage regulators DZ1~DZ3 are working, and the output voltages of A, B, and C are determined by VDZ1~VDZ3. By selecting appropriate values of DZ1, DZ2, and DZ3, the voltage drops of the power tubes Q1~Q4 can be basically consistent, about 10V, thereby achieving even distribution of heat loss and achieving thermal balance of each body.
[0021] It can be seen that the surge voltage suppression circuit of this embodiment effectively suppresses the input surge voltage and keeps the output voltage stable. Ordinary conventional MOS tubes can be selected, and a large current surge suppressor can be realized without pairing. In addition, when the circuit is working normally, the overall line loss is smaller. Linear MOS generally uses planar MOS, with fewer device models and quantity options and larger internal resistance. The internal resistance of a single linear MOS is larger than that of four MOS tubes connected in series using trench technology. Under the same current, the loss of this solution is smaller. The original or conventional control technology is also used, which will not increase the control difficulty and cost.
[0022] For those skilled in the art, the above invention disclosure is only for example and does not constitute a limitation of the present invention. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and corrections to the present invention. Such modifications, improvements and corrections are suggested in the present invention, so such modifications, improvements and corrections still belong to the spirit and scope of the exemplary embodiments of the present invention.
[0023] Although the present invention has been described with reference to the current specific embodiments, those skilled in the art should recognize that the above embodiments are only used to illustrate the present invention, and various equivalent changes or substitutions may be made without departing from the spirit of the present invention. Therefore, any changes or modifications to the above embodiments within the spirit of the present invention will fall within the scope of the claims of the present invention.
Claims
1. A surge voltage suppression circuit, characterized in that: include: N first circuit units and one second circuit unit are sequentially cascaded from the Vin side to the Vout side, N≥1; The first circuit unit includes a first power tube, a current limiting resistor, a diode and a first voltage regulator tube; the first end of the current limiting resistor is connected to the Vin, the second end of the current limiting resistor is connected to the cathode of the diode, the anode of the diode is connected to the output end of the controller, the drain of the first power tube is connected to the first end of the current limiting resistor, and the source of the first power tube is connected to the first end of the current limiting resistor in the next first circuit unit; the gate of the first power tube is respectively connected to the second end of the current limiting resistor and the cathode of the first voltage regulator tube, and the anode of the first voltage regulator tube is grounded; from the Vin side to the Vout side, the voltage regulator voltage of the previous first voltage regulator tube is greater than the voltage regulator voltage of the next first voltage regulator tube; The second circuit unit includes a second power tube and a second voltage regulator tube, wherein the drain of the second power tube is connected to the source of the first power tube in the adjacent first circuit unit, the source of the second power tube is connected to the Vout, the gate of the second power tube is connected to the negative electrode of the second voltage regulator tube, and the positive electrode of the second voltage regulator tube is grounded; The controller is used to output a control voltage, a first end of the controller is connected to the Vout, the first end of the controller is used as an input end, the other end of the controller is used as an output end, and the output end is also connected to the gate of the second power tube.
2. The surge voltage suppression circuit according to claim 1, characterized in that: N=3。 3. The surge voltage suppression circuit according to claim 1, characterized in that: The first voltage regulator tube and / or the second voltage regulator tube is a Zener diode.
4. The surge voltage suppression circuit according to claim 1, characterized in that: The first power tube and / or the second power tube are linear power tubes.