Backflow prevention protection circuit

Abstract

The invention provides an anti-backflow protection circuit. The anti-backflow protection circuit comprises a power supply, a starting module, a reference module, a comparison module, an anti-backflow module and an acquisition module, the anti-backflow module comprises a first MOS (Metal Oxide Semiconductor) tube, a second MOS tube, a third MOS tube, a triode and a voltage stabilizing diode; the drain electrode of the first MOS tube is connected with a power supply, the source electrode of the first MOS tube is connected with the source electrode of the second MOS tube, the drain electrode of the second MOS tube is connected with the negative electrode of the voltage stabilizing diode, the grid electrode of the first MOS tube is connected with the grid electrode of the second MOS tube, the positive electrode of the voltage stabilizing diode and the collector electrode of the triode, and the grid electrode of the first MOS tube, the grid electrode of the second MOS tube, the positive electrode of the voltage stabilizing diode and the collector electrode of the triode jointly serve as the output end of the anti-backflow module to be connected to the acquisition module; the base electrode of the triode is connected with the grid electrode of the third MOS tube and is connected to the comparison module as the input end of the anti-backflow module. The power consumption is small, the heat dissipation is low, the reference voltage is stable, the response speed is high, and the anti-noise capability is high.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an anti-backflow protection circuit. Background Art

[0002] At present, high-power DC switching power supplies basically use metal oxide semiconductor field effect transistors (MOSFET) to achieve reverse connection protection. In the commonly used MOSFET circuit to achieve reverse connection protection, when the input is normal, the MOSFET is turned on, and the on-resistance of the MOSFET is very small, the loss is very small, and the circuit can work normally; when the input is reversed, the MOSFET cannot be turned on, effectively preventing the circuit from being reversed. However, when this circuit is working normally, if an input short circuit fault suddenly occurs, the input capacitor will discharge quickly through the input end, causing current backflow.

[0003] The anti-backflow protection circuit is often used to prevent the output current from backflowing and damaging the power supply. The DC output anti-backflow control circuit in the prior art uses a diode to achieve anti-backflow. The circuit is as follows Figure 1 The DC positive pole is connected to the positive pole of diode D1, and the negative pole of diode D1 is connected to the DC output positive pole. The DC output negative pole is directly connected to the negative pole of C1. Since diode D1 can only flow current in one direction, that is, the output current can only flow from the positive pole of C1, through the positive pole of D1, then through the negative pole of D1, and then to the DC output positive pole, and after passing through the electrical equipment, it flows to the DC output negative pole to form a loop. That is, connecting a diode in series in the output loop can prevent current backflow.

[0004] However, when the output current of the above-mentioned conventional anti-backfeed protection circuit is large, the power loss on the diode D1 is large, resulting in large heat power consumption of the diode and difficulty in heat dissipation, thereby making the overall circuit poor in anti-noise capability. Summary of the invention

[0005] The present invention provides an anti-backfeed protection circuit, aiming to solve the problem that the existing power supply circuit has large thermal power consumption and difficulty in heat dissipation, thereby making the overall circuit have poor anti-noise ability.

[0006] An embodiment of the present invention provides an anti-backfeed protection circuit, comprising: a power supply, a startup module, a reference module, a comparison module, an anti-backfeed module and a collection module; the power supply is used to supply power to the startup module, the reference module, the comparison module, the anti-backfeed module and the collection module respectively; the startup module is electrically connected to the reference module, the comparison module, the anti-backfeed module and the collection module in sequence, and the output end of the collection module is used to output to a load;

[0007] The anti-backflow module includes a first MOS tube, a second MOS tube, a third MOS tube, a triode and a voltage-stabilizing diode; the drain of the first MOS tube is connected to the power supply, the source of the first MOS tube is connected to the source of the second MOS tube, the drain of the second MOS tube is connected to the cathode of the voltage-stabilizing diode, the gate of the first MOS tube is respectively connected to the gate of the second MOS tube, the anode of the voltage-stabilizing diode and the collector of the triode and are commonly connected to the acquisition module as the output end of the anti-backflow module; the base of the triode is connected to the gate of the third MOS tube and is connected to the comparison module as the input end of the anti-backflow module; the emitter of the triode is grounded, and the source and drain of the third MOS tube are respectively grounded.

[0008] Preferably, the startup module includes a fourth MOS tube, a fifth MOS tube and a sixth MOS tube;

[0009] The source of the fourth MOS tube is connected to the power supply as the input end of the startup module, and the gate of the fourth MOS tube is used to connect the output voltage of the reference module; the drain of the fourth MOS tube is respectively connected to the drain of the fifth MOS tube and the gate of the fifth MOS tube, the gate of the fifth MOS tube is also connected to the gate of the sixth MOS tube, the source of the fifth MOS tube and the source of the sixth MOS tube are grounded respectively; the drain of the sixth MOS tube is connected to the input end of the reference module as the output end of the startup module.

[0010] Preferably, the reference module includes a seventh MOS transistor, an eighth MOS transistor, a ninth MOS transistor, a tenth MOS transistor and a first resistor;

[0011] The source of the seventh MOS tube and the source of the eighth MOS tube are respectively connected to the power supply; the gate of the seventh MOS tube is respectively connected to the gate of the eighth MOS tube, the drain of the sixth MOS tube and the drain of the eighth MOS tube; the gate of the seventh MOS tube also serves as the input end of the reference module; the drain of the seventh MOS tube is respectively connected to the drain of the ninth MOS tube and the gate of the ninth MOS tube, the gate of the ninth MOS tube is also connected to the gate of the tenth MOS tube, the drain of the tenth MOS tube is connected to the drain of the eighth MOS tube and serves as the output end of the reference module; the source of the ninth MOS tube is grounded, and the source of the tenth MOS tube is connected to the first resistor and then grounded.

[0012] Preferably, the comparison module includes an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a fourteenth MOS tube and a fifteenth MOS tube;

[0013] The source of the eleventh MOS tube is connected to the source of the twelfth MOS tube and to the power supply; the gate of the eleventh MOS tube is respectively connected to the gate of the twelfth MOS tube and the drain of the thirteenth MOS tube, the drain of the eleventh MOS tube is connected to the drain of the thirteenth MOS tube, and the gate of the thirteenth MOS tube is connected to the drain of the eighth MOS tube as the input end of the comparison module; the source of the thirteenth MOS tube is respectively connected to the source of the fourteenth MOS tube and the drain of the fifteenth MOS tube, and the gate of the fifteenth MOS tube is connected to the drain of the eighth MOS tube; the source of the fifteenth MOS tube is grounded; the drain of the fourteenth MOS tube is connected to the drain of the twelfth MOS tube and serves as the output end of the comparison module, and the gate of the fourteenth MOS tube is used to be connected to the acquisition module.

[0014] Preferably, the acquisition module includes a sixteenth MOS tube, a second resistor, a third resistor and a fourth resistor;

[0015] The gate of the sixteenth MOS tube is respectively connected to the first end of the fourth resistor and the positive electrode of the voltage-regulating diode, and the drain of the sixteenth MOS tube is respectively connected to the second end of the fourth resistor and the negative electrode of the voltage-regulating diode; the source of the sixteenth MOS tube is connected to the first end of the third resistor, and the second end of the third resistor is respectively connected to the gate of the fourteenth MOS tube and the first end of the second resistor, and the second end of the second resistor is grounded; the drain of the sixteenth MOS tube and the second end of the second resistor are respectively used to be connected to the load.

[0016] Preferably, both the first MOS tube and the second MOS tube are PMOS tubes.

[0017] Preferably, the third MOS tube is an NMOS tube.

[0018] Compared with the prior art, the invention has the beneficial effects that the power supply is used to respectively supply power to the startup module, the reference module, the comparison module, the anti-backflow module and the acquisition module; the startup module is electrically connected to the reference module, the comparison module, the anti-backflow module and the acquisition module in sequence, and the output end of the acquisition module is used to output to the load; the drain of the first MOS tube of the anti-backflow module is connected to the power supply, the source of the first MOS tube is connected to the source of the second MOS tube, the drain of the second MOS tube is connected to the negative electrode of the voltage-stabilizing diode, the gate of the first MOS tube is respectively connected to the gate of the second MOS tube, the positive electrode of the voltage-stabilizing diode and the collector of the triode and are connected to the acquisition module as the output end of the anti-backflow module; the base of the triode is connected to the gate of the third MOS tube and is connected to the comparison module as the input end of the anti-backflow module; the emitter of the triode is grounded, and the source and drain of the third MOS tube are grounded respectively; the circuit has low power consumption, low heat dissipation, stable reference voltage, fast response speed and strong anti-noise ability through the anti-backflow module. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The present invention will be described in detail below in conjunction with the accompanying drawings. The above and other aspects of the present invention will become clearer and easier to understand through the detailed description made in conjunction with the following drawings. In the accompanying drawings:

[0020] Figure 1 It is a circuit diagram of a DC output anti-backflow control circuit in the prior art;

[0021] Figure 2 It is a module diagram of an anti-backfeed protection circuit provided by an embodiment of the present invention;

[0022] Figure 3 4 is a circuit diagram of an anti-backfeed protection circuit provided by an embodiment of the present invention.

[0023] In the figure, 1. startup module, 2. benchmark module, 3. comparison module, 4. anti-backflow module, 5. acquisition module, 6. load. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0025] Combined with Figure 2-Figure 3As shown, an embodiment of the present invention provides an anti-backflow protection circuit, including: a power supply VCC, a startup module 1, a reference module 2, a comparison module 3, an anti-backflow module 4 and a collection module 5; the power supply VCC is used to supply power to the startup module 1, the reference module 2, the comparison module 3, the anti-backflow module 4 and the collection module 5 respectively; the startup module 1 is electrically connected to the reference module 2, the comparison module 3, the anti-backflow module 4 and the collection module 5 in sequence, and the output end of the collection module 5 is used to output to a load 6.

[0026] The anti-backflow module 4 includes a first MOS tube M1, a second MOS tube M2, a third MOS tube M3, a transistor Q1 and a voltage-stabilizing diode D1; the drain of the first MOS tube M1 is connected to the power supply VCC, the source of the first MOS tube M1 is connected to the source of the second MOS tube M2, the drain of the second MOS tube M2 is connected to the cathode of the voltage-stabilizing diode D1, the gate of the first MOS tube M1 is respectively connected to the gate of the second MOS tube M2, the anode of the voltage-stabilizing diode D1 and the collector of the transistor Q1 and are connected to the acquisition module 5 as the output end of the anti-backflow module 4; the base of the transistor Q1 is connected to the gate of the third MOS tube M3 and is connected to the comparison module 3 as the input end of the anti-backflow module 4; the emitter of the transistor Q1 is grounded, and the source and drain of the third MOS tube M3 are grounded respectively.

[0027] Specifically, the anti-reverse injection module 4 composed of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3, the transistor Q1 and the voltage regulator diode D1 is used to prevent the load 6 from damaging the circuit due to excessive voltage. The drain and source of the third MOS tube M3 are both grounded, and the gate is connected to point c, which is used as a capacitor to prevent the instantaneous voltage fluctuation at point c from affecting the transistor Q1 and causing false triggering. The base of the transistor Q1 is connected to point c, the emitter is grounded, and the collector of the transistor Q1 is connected to the gates of the first MOS tube M1 and the second MOS tube M2; the first MOS tube M1 is reversely connected in the circuit, the drain is connected to the power supply VCC, the source of the first MOS tube M1 is connected to the source of the second MOS tube M2, and the source of the first MOS tube M1 is reversely connected to the source of the second MOS tube M2, which can reduce the influence of the MOS tube body diode on the circuit. The voltage regulator diode D1 is used to protect the first MOS tube M1. Among them, the third MOS tube M3 is an NMOS tube. The overall circuit has low power consumption, low heat dissipation, stable reference voltage, fast response speed, and strong anti-noise ability.

[0028] In this embodiment, the startup module 1 includes a fourth MOS tube M4, a fifth MOS tube M5 and a sixth MOS tube M6; the source of the fourth MOS tube M4 is connected to the power supply VCC as the input end of the startup module 1, and the gate of the fourth MOS tube M4 is used to connect the output voltage of the reference module 2; the drain of the fourth MOS tube M4 is respectively connected to the drain of the fifth MOS tube M5 and the gate of the fifth MOS tube M5, the gate of the fifth MOS tube M5 is also connected to the gate of the sixth MOS tube M6, and the source of the fifth MOS tube M5 and the source of the sixth MOS tube M6 are grounded respectively; the drain of the sixth MOS tube M6 is connected to the input end of the reference module 2 as the output end of the startup module 1.

[0029] In this embodiment, the reference module 2 includes a seventh MOS tube M7, an eighth MOS tube M8, a ninth MOS tube M9, a tenth MOS tube M10 and a first resistor R1; the source of the seventh MOS tube M7 and the source of the eighth MOS tube M8 are respectively connected to the power supply VCC; the gate of the seventh MOS tube M7 is respectively connected to the gate of the eighth MOS tube M8, the drain of the sixth MOS tube M6 and the drain of the eighth MOS tube M8; the gate of the seventh MOS tube M7 also serves as the input end of the reference module 2; the drain of the seventh MOS tube M7 is respectively connected to the drain of the ninth MOS tube M9 and the gate of the ninth MOS tube M9, the gate of the ninth MOS tube M9 is also connected to the gate of the tenth MOS tube M10, the drain of the tenth MOS tube M10 is connected to the drain of the eighth MOS tube M8 and serves as the output end of the reference module 2; the source of the ninth MOS tube M9 is grounded, and the source of the tenth MOS tube M10 is connected to the first resistor R1 and then grounded.

[0030] In this embodiment, the comparison module 3 includes an eleventh MOS tube M11, a twelfth MOS tube M12, a thirteenth MOS tube M13, a fourteenth MOS tube M14 and a fifteenth MOS tube M15; the source of the eleventh MOS tube M11 is connected to the source of the twelfth MOS tube M12 and to the power supply VCC; the gate of the eleventh MOS tube M11 is respectively connected to the gate of the twelfth MOS tube M12 and the drain of the thirteenth MOS tube M13, the drain of the eleventh MOS tube M11 is connected to the drain of the thirteenth MOS tube M13, and the gate of the thirteenth MOS tube M14 is connected to the gate of the twelfth MOS tube M12 and the drain of the thirteenth MOS tube M13. The gate of M13 is connected to the drain of the eighth MOS tube M8 as the input end of the comparison module 3; the source of the thirteenth MOS tube M13 is respectively connected to the source of the fourteenth MOS tube M14 and the drain of the fifteenth MOS tube M15, and the gate of the fifteenth MOS tube M15 is connected to the drain of the eighth MOS tube M8; the source of the fifteenth MOS tube M15 is grounded; the drain of the fourteenth MOS tube M14 is connected to the drain of the twelfth MOS tube M12 and serves as the output end of the comparison module 3, and the gate of the fourteenth MOS tube M14 is used to be connected to the acquisition module 5.

[0031] In this embodiment, the acquisition module 5 includes a sixteenth MOS tube M16, a second resistor R2, a third resistor R3 and a fourth resistor R4; the gate of the sixteenth MOS tube M16 is respectively connected to the first end of the fourth resistor R4 and the positive electrode of the voltage stabilizing diode D1, and the drain of the sixteenth MOS tube M16 is respectively connected to the second end of the fourth resistor R4 and the negative electrode of the voltage stabilizing diode D1; the source of the sixteenth MOS tube M16 is connected to the first end of the third resistor R3, the second end of the third resistor R3 is respectively connected to the gate of the fourteenth MOS tube M14 and the first end of the second resistor R2, and the second end of the second resistor R2 is grounded; the drain of the sixteenth MOS tube M16 and the second end of the second resistor R2 are respectively used to be connected to the load 6.

[0032] Specifically, the second resistor R2, the third resistor R3, the fourth resistor R4 and the sixteenth MOS tube M16 of the NMOS tube form a collection module 5, collect the voltage Ve at point e, and transmit it to the gate of the fourteenth MOS tube M14 of the NMOS tube of the comparison module 3; when no current backflow occurs, that is, when it is normal, the voltage Vd at point d is low, the sixteenth MOS tube M16 is in a closed state, and the voltage at point e is low; when current backflow occurs, the current is backflowed to point d through the fourth resistor R4, the voltage at point d increases, and the sixteenth MOS tube M16 is turned on; the voltage at point e is Ve ＝ R2*Vload / (R3+R2)……(1), from the above formula, it can be seen that when the voltage of load 6 increases, the voltage Ve at point e also increases.

[0033] The fourth MOS tube M4 of the PMOS tube and the fifth MOS tube M5 and the sixth MOS tube M6 of the NMOS tube form a startup module 1. The gate of the fourth MOS tube M4 of the startup module 1 is connected to the point b of the reference module 2 and is driven by Vb. The drain of the sixth MOS tube M6 is connected to the point a.

[0034] The ninth MOS tube M9 and the tenth MOS tube M10 of the NMOS tube, the seventh MOS tube M7 and the eighth MOS tube M8 of the PMOS tube and the first resistor R1 form a reference module 2. The width-to-length ratio of the ninth MOS tube M9 and the tenth MOS tube M10 is the same, and the width-to-length ratio of the seventh MOS tube and the eighth MOS tube is the same. The output voltage V b =2(R1+r O10 ) / u n C ox (W / L)7R1R1……(2), from the above formula, it can be seen that the output voltage Vb at point b is a fixed value and is not affected by the power supply VCC. Among them, ro10 represents the equivalent internal resistance of the tenth MOS tube M10, un represents the electron mobility, Cox represents the gate oxide layer capacitance of the MOS tube, and W / L represents the width-to-length ratio of the MOS tube.

[0035] The thirteenth MOS tube M13, the fourteenth MOS tube M14 and the fifteenth MOS tube M15 of the NMOS tube and the eleventh MOS tube M11 and the twelfth MOS tube M12 of the PMOS tube form a comparison module 3, which is a differential amplifier circuit, and can amplify and output the difference between the gate voltage Ve of the fourteenth MOS tube M14 and the gate voltage Vb of the thirteenth MOS tube M13 from point c; the voltage at point c is V c =g m14 (r O14 / / r O12 )(V b -V e )……(3), from the above formula, it can be seen that the voltage Ve at point e increases, and the voltage Vc at point c also decreases. Wherein, gm14 represents the transconductance of the fourteenth MOS tube M14, ro14 represents the equivalent internal resistance of the fourteenth MOS tube M14, and ro12 represents the equivalent internal resistance of the twelfth MOS tube M12.

[0036] When the voltage of the load 6 is normal, the voltage e of the sampling module is at a low level, and the output voltage Vd of the reference module 2 is fixed. It can be seen from formula (3) that at this time, the voltage at point c is at a high level, the first transistor Q1 is turned on, the voltage at point d is at a low level, the first MOS transistor M1 and the second MOS transistor M2 are turned on, and the sixteenth transistor M16 is turned off. The VCC voltage provides voltage to the load 6 through the first MOS transistor M1 and the second MOS transistor M2.

[0037] When the voltage of load 6 is too high, the current is fed back through the fourth resistor R4 to point d, and the voltage at point d also rises. The sixteenth MOS tube M16 is turned on, the voltage at point e rises, and the output voltage Vd of the reference module 2 remains unchanged. It can be seen from formula (3) that the voltage Vc at point c of the comparison module 3 decreases, the transistor Q1 is turned off, the first MOS tube M1 and the second MOS tube M2 are both turned off, and VCC does not provide voltage to load 6. The voltage of load 6 is discharged to the ground through the sixteenth MOS tube M16, the second resistor R2 and the third resistor R3. When the voltage of load 6 is discharged, the circuit returns to normal, and the power supply VCC supplies power to the circuit of load 6. As a result, the overall power consumption of the circuit is small, the heat dissipation is low, and the reference voltage is stable, the response speed is fast, and the anti-noise ability is strong.

[0038] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, article or device. In the absence of more restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, article or device including the element.

[0039] The embodiments of the present invention are described above in conjunction with the accompanying drawings. What is disclosed is only the preferred embodiment of the present invention. However, the present invention is not limited to the above-mentioned specific implementation manner. The above-mentioned specific implementation manner is only illustrative rather than restrictive. Under the enlightenment of the present invention, ordinary technicians in this field can also make many forms and equivalent changes without departing from the scope of protection of the purpose of the present invention and the claims, all of which are within the protection of the present invention.

Claims

1. A backfeed protection circuit, characterized in that: include: Power supply, startup module, reference module, comparison module, anti-backflow module and acquisition module; The power supply is used to supply power to the startup module, the reference module, the comparison module, the anti-backflow module and the acquisition module respectively; the startup module is electrically connected to the reference module, the comparison module, the anti-backflow module and the acquisition module in sequence, and the output end of the acquisition module is used to output to a load; The anti-backflow module includes a first MOS tube, a second MOS tube, a third MOS tube, a triode and a voltage-stabilizing diode; the drain of the first MOS tube is connected to the power supply, the source of the first MOS tube is connected to the source of the second MOS tube, the drain of the second MOS tube is connected to the cathode of the voltage-stabilizing diode, the gate of the first MOS tube is respectively connected to the gate of the second MOS tube, the anode of the voltage-stabilizing diode and the collector of the triode and are commonly connected to the acquisition module as the output end of the anti-backflow module; the base of the triode is connected to the gate of the third MOS tube and is connected to the comparison module as the input end of the anti-backflow module; the emitter of the triode is grounded, and the source and drain of the third MOS tube are respectively grounded.

2. The anti-backflow protection circuit according to claim 1, characterized in that: The startup module includes a fourth MOS tube, a fifth MOS tube and a sixth MOS tube; The source of the fourth MOS tube is connected to the power supply as the input end of the startup module, and the gate of the fourth MOS tube is used to connect the output voltage of the reference module; the drain of the fourth MOS tube is respectively connected to the drain of the fifth MOS tube and the gate of the fifth MOS tube, the gate of the fifth MOS tube is also connected to the gate of the sixth MOS tube, the source of the fifth MOS tube and the source of the sixth MOS tube are grounded respectively; the drain of the sixth MOS tube is connected to the input end of the reference module as the output end of the startup module.

3. The anti-backflow protection circuit according to claim 2, characterized in that: The reference module includes a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube and a first resistor; The source of the seventh MOS tube and the source of the eighth MOS tube are respectively connected to the power supply; the gate of the seventh MOS tube is respectively connected to the gate of the eighth MOS tube, the drain of the sixth MOS tube and the drain of the eighth MOS tube; the gate of the seventh MOS tube also serves as the input end of the reference module; the drain of the seventh MOS tube is respectively connected to the drain of the ninth MOS tube and the gate of the ninth MOS tube, the gate of the ninth MOS tube is also connected to the gate of the tenth MOS tube, the drain of the tenth MOS tube is connected to the drain of the eighth MOS tube and serves as the output end of the reference module; the source of the ninth MOS tube is grounded, and the source of the tenth MOS tube is connected to the first resistor and then grounded.

4. The anti-backflow protection circuit according to claim 3, characterized in that: The comparison module includes an eleventh MOS tube, a twelfth MOS tube, a thirteenth MOS tube, a fourteenth MOS tube and a fifteenth MOS tube; The source of the eleventh MOS tube is connected to the source of the twelfth MOS tube and to the power supply; the gate of the eleventh MOS tube is respectively connected to the gate of the twelfth MOS tube and the drain of the thirteenth MOS tube, the drain of the eleventh MOS tube is connected to the drain of the thirteenth MOS tube, and the gate of the thirteenth MOS tube is connected to the drain of the eighth MOS tube as the input end of the comparison module; the source of the thirteenth MOS tube is respectively connected to the source of the fourteenth MOS tube and the drain of the fifteenth MOS tube, and the gate of the fifteenth MOS tube is connected to the drain of the eighth MOS tube; the source of the fifteenth MOS tube is grounded; the drain of the fourteenth MOS tube is connected to the drain of the twelfth MOS tube and serves as the output end of the comparison module, and the gate of the fourteenth MOS tube is used to be connected to the acquisition module.

5. The anti-backflow protection circuit according to claim 4, characterized in that: The acquisition module includes a sixteenth MOS tube, a second resistor, a third resistor and a fourth resistor; The gate of the sixteenth MOS tube is respectively connected to the first end of the fourth resistor and the positive electrode of the voltage-regulating diode, and the drain of the sixteenth MOS tube is respectively connected to the second end of the fourth resistor and the negative electrode of the voltage-regulating diode; the source of the sixteenth MOS tube is connected to the first end of the third resistor, and the second end of the third resistor is respectively connected to the gate of the fourteenth MOS tube and the first end of the second resistor, and the second end of the second resistor is grounded; the drain of the sixteenth MOS tube and the second end of the second resistor are respectively used to be connected to the load.

6. The anti-backflow protection circuit according to claim 1, characterized in that: The first MOS tube and the second MOS tube are both PMOS tubes.

7. The anti-backflow protection circuit according to claim 1, characterized in that: The third MOS tube is an NMOS tube.

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