Anti-countercurrent control method for inverter system

Abstract

The invention discloses an anti-countercurrent control method for an inverter system. The anti-countercurrent control method comprises the following steps of outputting a current reference value to a current inner ring in a voltage outer ring by comparing a detection value and a reference value of a direct-current bus voltage; performing amplitude limiting processing on the current reference value according to the load unbalance degree of the inverter system; and comparing the current reference value subjected to amplitude limiting processing with the current component obtained by converting the three-phase current so as to generate a duty ratio signal for controlling the inverter. The method has the advantages that according to different load unbalance degrees of the inverter system, amplitude limiting of different degrees can be carried out on the current reference value, and then anti-countercurrent control of the inverter in different load scenes can be achieved.

Description

Technical Field

[0001] The present application relates to the field of renewable energy power generation, and in particular to a method for preventing backflow in an inverter system. Background Art

[0002] In a photovoltaic system, when the power of photovoltaic power generation is greater than the power of the local load, if the load cannot fully consume the power generated by the photovoltaic system, the excess power will flow to the grid, forming a reverse flow. The core principle of anti-reverse flow control technology is to adjust the output power of the photovoltaic system in time when a reverse flow is detected to ensure that the power is only supplied to the local load. Existing anti-reverse flow controllers mainly focus on the precise control of the inverter output power to ensure that the power does not flow back to the grid.

[0003] Although the anti-backflow controller plays a key role in maintaining power balance, its architecture design and information transmission mechanism are difficult to meet the anti-backflow control requirements under the condition of three-phase load imbalance when dealing with the complex situation of three-phase load imbalance. Therefore, further research and development of the anti-backflow controller that can handle the three-phase load imbalance problem under anti-backflow is of great significance to improving the overall performance and stability of the photovoltaic system. Summary of the invention

[0004] One of the objectives of the present application is to provide an inverter system backflow prevention control method that can solve at least one of the defects in the above-mentioned background technology.

[0005] In order to achieve at least one of the above-mentioned purposes, the technical solution adopted in the present application is: a method for preventing reverse current control of an inverter system, comprising the following steps: outputting a current reference value to a current inner loop by comparing the detection value of the DC bus voltage and a reference value in a voltage outer loop; limiting the current reference value according to the load imbalance of the inverter system; comparing the current reference value after limiting with the current component after the three-phase current is transformed to generate a duty cycle signal for controlling the inverter.

[0006] Preferably, when performing the limiting processing of the current reference value, the value of the maximum limiting value of the current reference value is suitable for selection according to the load imbalance of the inverter system, which specifically includes the following process: comparing the load imbalance with the set imbalance threshold; if the load imbalance is lower than the set imbalance threshold, selecting the minimum value between the three-phase load current and the inverter rated current as the value of the maximum limiting value; otherwise, calculating the virtual value of the three-phase load current according to the set imbalance threshold to obtain the virtual load current; and then selecting the minimum value between the virtual load current and the inverter rated current as the value of the maximum limiting value.

[0007] Preferably, the calculation of the virtual load current includes the following process: the maximum value i of the three-phase load current is l_maxReduce Δi1 and set the middle value i of the three-phase load current to l_0 Reduce Δi2; According to the following formulas (1) and (2), the calculated (i l_max -Δi1)、(i l_0 -Δi2) and i l_min As the virtual load current; the specific formula is as follows:

[0008] i avg ′=[(i l_max -Δi1)+(i l_0 -Δi2)+i l_min ] / 3 (1);

[0009] Δn%=[(i l_max -Δi1)-i l_min ] / i avg ′×100% (2);

[0010] Among them, i avg ′ represents the average value of the virtual load current, and Δn% represents the set imbalance threshold.

[0011] Preferably, the selection of the maximum value reduction amount Δi1 of the three-phase load current and the intermediate value reduction amount Δi2 of the three-phase load current meets the following condition: Δi1 / Δi2=i l_max / i l_0 .

[0012] Preferably, the value range of the imbalance threshold Δn% is 10% to 30%.

[0013] Preferably, when performing the amplitude limiting process of the current reference value, the minimum amplitude limiting value of the current reference value is taken as the minimum current for stable operation of the inverter.

[0014] Preferably, the load imbalance of the inverter system is suitable for being represented by one of the effective value imbalance, negative sequence imbalance and zero sequence imbalance of the three-phase load current.

[0015] Preferably, the load imbalance of the inverter system is represented by the effective value imbalance of the three-phase load current, and the effective value imbalance is suitable for being calculated by the ratio of the difference between the maximum value and the minimum value of the three-phase load current to the average value of the three-phase load current.

[0016] Preferably, the inverter system limits the current reference value and includes the following process: when a corresponding current reference value in the three-phase current exceeds the maximum limit value I max * When the corresponding current reference value is limited to the maximum limit value I max *At this time, the other corresponding current reference values ​​will gradually increase until they reach the maximum limit value I max * .

[0017] Compared with the prior art, the beneficial effects of this application are:

[0018] According to the different load imbalance of the inverter system, the current reference value can be limited to different degrees, thereby realizing the anti-reverse current control of the inverter in different load scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 The figure is a schematic diagram of the overall workflow of this application.

[0020] Figure 2 Schematic diagram of the control loop architecture of this application.

[0021] Figure 3 This is a schematic diagram of the limit value setting rule when the inverter is in a slightly unbalanced working state in this application.

[0022] Figure 4 This is a schematic diagram of the structure of the inverter anti-backflow control architecture of the present application.

[0023] Figure 5 This is a schematic diagram of the limit value setting rule when the inverter is in a severely unbalanced working state in this application.

[0024] Figure 6 This is a schematic diagram of the workflow of the present application for adjusting three-phase current based on a given limiting value. DETAILED DESCRIPTION

[0025] Below, the present application is further described in conjunction with specific implementation methods. It should be noted that in the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms should not be understood as necessarily being directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification.

[0026] In the description of the present application, it should be noted that directional words, such as the terms "center", "lateral", "longitudinal", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc., indicating directions and positional relationships are based on the directions or positional relationships shown in the accompanying drawings, which are only for the convenience of narrating the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and cannot be understood as limiting the specific scope of protection of the present application.

[0027] It should be noted that the terms "first", "second", etc. in the description and claims of the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0028] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be connected, detachably connected, or integrated; it can be mechanically connected or electrically connected; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0029] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0030] The terms "including" and "having" and any variations thereof in the specification and claims of the present application are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus comprising a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products or apparatuses.

[0031] One of the preferred embodiments of the present application is as follows: Figure 1 and Figure 2As shown, a reverse current control method for an inverter system includes the following steps: outputting a current reference value to a current inner loop by comparing a detection value of a DC bus voltage with a reference value in a voltage outer loop; limiting the current reference value according to a load imbalance of the inverter system; comparing the current reference value after the limiting process with a current component after transformation of a three-phase current to generate a duty cycle signal for controlling the inverter.

[0032] It is understandable that if Figure 2 As shown, the control loop of the inverter system mainly includes a voltage outer loop, a current inner loop and a voltage inner loop. The specific working process of the control loop is well known to those skilled in the art, so only a brief description is given here: the voltage outer loop outputs a current reference value to the current inner loop, the current inner loop compares the three-phase current detection value with the current reference value to generate a voltage reference value and outputs it to the voltage inner loop, the voltage inner loop compares the three-phase voltage detection value with the voltage reference value, and modulates the comparison result to generate a duty cycle signal d for controlling the inverter.

[0033] It should be known that the three-phase voltage and three-phase current entering the control loop need to be Park transformed, that is, the three-phase voltage and three-phase current of the abc axis are converted into the three-phase voltage and three-phase current of the dq0 axis. The three-phase voltage and three-phase current involved in the generation of the duty cycle signal are all components of the dq axis; that is, in the control loop, the components of the d axis and the q axis can affect the generation of the duty cycle signal d. Then, when dealing with the load imbalance of the inverter system, the control loop can achieve backflow prevention by controlling the q-axis component and / or the d-axis component. However, considering that the reference value corresponding to the d-axis component is obtained by calculating the bus voltage, that is, the d-axis component is a dynamic quantity, and the q-axis component is a fixed value. Therefore, in order to improve the anti-backflow dynamic control capability of the inverter system under load imbalance, in this embodiment, the current reference value for the current limiting processing is selected by comparing the DC bus voltage with the reference value. The current reference value I corresponding to the d-axis current component is generated. d * .

[0034] Specifically, the loop control processes corresponding to phases A, B, and C of the inverter system are basically the same. The following will take phase A as an example to briefly describe the loop control process of the inverter system. Figure 2 As shown, in the voltage outer loop, the DC bus voltage V dc With the set reference value V dc * After comparison, the voltage error is processed by PI controller and the reference value I is output to each corresponding current inner loop. d_a * ,I d_b * and I d_c* ; Grid voltage v g Phase locking is performed by a phase-locked loop (PLL).

[0035] The inverter's A-phase output current i a is decomposed into two orthogonal components i α and i β Next, the current is transformed by Park to obtain the current component i in the dq coordinate system. d and i q Then the current reference value I d_a * Perform amplitude limiting processing to obtain the current reference value I d_a1 * By limiting the current reference value, on the one hand, it can avoid the reverse current phenomenon caused by the inverter output current being greater than the load current, and on the other hand, it can also avoid the fluctuation of the inverter bus voltage caused by the unbalanced current, thereby ensuring that the inverter can maintain a stable working state.

[0036] Then, the current component i d and i q With the current reference value I d_a1 * and I q_a1 * The error signal is obtained and sent to the PI controller; among them, the current reference value I q_a1 * is a given value. The grid voltage v of phase A ga is decomposed into v α and v β , and then after Park transformation, we get the component v in the dq coordinate system gd and v gq , used for feedforward compensation. Finally, the grid feedforward value is superimposed on the output of the current inner loop, and after the coordinate inverse transformation is performed again, the PWM duty cycle signal for adjusting the inverter A phase bridge arm is obtained.

[0037] It should be noted that the selection of the limiting value of the inverter in different working states is different, that is, according to the different load imbalance of the inverter system, the current reference value can be limited to different degrees, thereby realizing the anti-reverse current control of the inverter in different load scenarios. For the phase obtained by the phase-locked loop PLL, the phase difference between two adjacent phases of the inverter is 120°.

[0038] In this embodiment, the load imbalance of the inverter system refers to the degree of balance difference between the three-phase loads of the inverter system, which is mainly reflected in the current difference between the three-phase load currents. Therefore, the load imbalance of the inverter system can be calculated by the specific values ​​of the three-phase load currents. There are many ways to express the load imbalance of the inverter system based on the three-phase load current. For example, it can be expressed by one of the effective value imbalance, negative sequence imbalance and zero sequence imbalance of the three-phase load current. For ease of understanding, in this embodiment, the load imbalance of the inverter system is preferably expressed by the effective value imbalance n% of the three-phase load current, then the specific calculation formula of the effective value imbalance n% is as follows:

[0039] n%=(i l_max -i l_min ) / i avg ×100%;

[0040] Among them, i l_max Indicates the maximum value of the three-phase load current, i l_min Indicates the minimum value of the three-phase load current, i avg Indicates the average value of the three-phase load current. In the above formula and subsequent contents, the three-phase load current is taken as the effective value.

[0041] Specifically, the effective values ​​of the three-phase load currents can be set to be i la 、i lb and i lc ; Assume the effective value i lc Maximum, effective value i la minimum. Then the average value of the three-phase load current i avg =(i la +i lb +i lc ) / 3, then the effective value unbalance degree n% = (ii lc -i la ) / i avg ×100%.

[0042] In this embodiment, Figure 3 and Figure 5 As shown, the current reference value limit range can be set to [I min * , I max * ]; where I max * is the maximum limit value, I min * is the minimum limit value. From the above content, we can know that the minimum limit value I min * and the maximum limit value I max* The specific value of will be adaptively selected according to the load imbalance of the inverter system. The load imbalance of the inverter system can be divided into a slightly unbalanced working state and a severely unbalanced working state according to the compensation capability of the inverter, that is, when the inverter system works in a slightly unbalanced working state, the inverter can compensate for the imbalance of the three-phase load; and when the inverter system works in a severely unbalanced working state, the inverter cannot fully achieve compensation. That is, the load imbalance that the inverter can compensate can be set as the imbalance threshold, then the minimum limit value I when the load imbalance of the inverter system is lower than and exceeds the set imbalance threshold min * and the maximum limit value I max * For ease of understanding, the specific limit value setting process for the inverter system in a slightly unbalanced working state and a severely unbalanced working state will be described in detail below.

[0043] 1. For the slightly unbalanced working state of the inverter system.

[0044] like Figure 3 As shown, when the rated current of the inverter I n Greater than three-phase load circuit i l When the maximum limit value I max * Set to three-phase load current.

[0045] When the rated current I n Less than the three-phase load current i l When the load demand exceeds the rated current capacity of the inverter, the maximum limit value I max * Set to the rated current value of the inverter. In this way, the inverter will output at its maximum capacity but will not exceed its rated current limit, thus ensuring the safe operation of the inverter.

[0046] From the above content, we can know the maximum limit value I max * The value selection process of is summarized as follows: compare the load imbalance with the set imbalance threshold; if the load imbalance is lower than the set imbalance threshold, select the three-phase load current i l and inverter rated current I n The minimum value in is taken as the maximum limit value I max *For the minimum limit value I min * The value should be set to the minimum current i for stable operation of the inverter min .

[0047] For ease of understanding, the following will take the inverter A phase load current i la For example, Figure 3 As shown. The minimum limit value I corresponding to A a _ min * The minimum current i of phase A for stable operation of the inverter can be taken a_min ; The maximum limit value corresponding to A is I a _ max * The rated current I of the inverter can be taken n and A phase load current i la The minimum value in .

[0048] It is understandable that the amplitude limit value setting process of the inverter system in a slightly unbalanced working state is the same as the amplitude limit value setting process of the inverter system in a balanced state. In fact, when the inverter is in a balanced working state, since its output power has been set to not exceed the load power demand, the current reference value of the current inner loop will not exceed the maximum amplitude limit value. In this case, the amplitude limit processing of the current reference value does not actually play a role, and the control loop can be simplified to a control loop that is no different from the conventional one.

[0049] 2. Aiming at the severely unbalanced working state of the inverter system.

[0050] It should be noted that when the inverter system is in a severely unbalanced working state, the inverter's own compensation capability can no longer meet the system's balance requirements. At this time, the inverter system will connect an enhancement module that increases the DC bus capacitance to improve the inverter's ability to handle unbalanced current. There are many specific connection architectures for the enhancement module, and one of the specific examples will be used below to provide a detailed description.

[0051] Specifically, Figure 4As shown, the inverter system includes multiple inverters connected in parallel to the power grid, multiple load imbalance enhancement modules, an anti-backflow controller and a three-phase electric meter. Multiple inverters can be marked as DC / AC#1, DC / AC#2, ..., DC / AC#N; the DC side of each inverter is connected to a bus capacitor connected in parallel to the positive and negative busbars, and the AC side of all inverters is connected in parallel to the power grid. The three-phase electric meter is installed between the AC side of the inverter and the power grid to detect the AC side power of the inverter. The anti-backflow controller is connected to each inverter and the three-phase electric meter for signal connection respectively, so that when the load is in an unbalanced state, it is determined whether the inverter system is in a backflow state according to the detection information of the three-phase electric meter; if backflow occurs, the anti-backflow controller will send an anti-backflow instruction to each inverter to control each inverter to enter the anti-backflow mode. Multiple load imbalance enhancement modules are respectively connected in parallel to the bus capacitors on the DC side of each inverter. When the inverter system is in load imbalance, each load imbalance enhancement module will be turned on and then connected in parallel with the bus capacitor to increase the DC side equivalent capacitance of the inverter system to improve the load balancing capability of the inverter system.

[0052] It is understandable that the essence of the load imbalance enhancement module is the capacitor module, and the load imbalance enhancement module can control its own connection or disconnection according to the load imbalance degree of the inverter system. The specific implementation of the anti-backflow mode of the inverter system is well known to those skilled in the art, so it will not be elaborated in detail here.

[0053] It should be noted that before the inverter system is connected to the aforementioned load imbalance enhancement module for capacitor compensation, in order to ensure that the inverter can continue to work stably, and also to avoid or reduce the current impact when the load imbalance enhancement module is connected, it is necessary to reset the current limit value of each phase to ensure that the load imbalance of the inverter system is controlled within the range that the inverter can handle, so as to avoid excessive bus voltage fluctuations. There are many specific implementation methods for current limiting in a severely unbalanced working state, which will be described in detail through a specific embodiment below.

[0054] In this embodiment, Figure 5 As shown, the maximum limit value I under severe unbalanced working conditions max * The value selection process includes the following: Calculate the virtual value of the three-phase load current according to the set imbalance threshold value to obtain the virtual load current i l * ; Select virtual load current i l * and inverter rated current I n The minimum value in is taken as the maximum limit value I max *Of course, for the minimum limit value I min * The value of is still the minimum current i for stable operation of the inverter min .

[0055] For ease of understanding, the following will take the inverter A phase load current i la For example, Figure 5 As shown. The minimum limit value I corresponding to A a _ min * The minimum current i of phase A for stable operation of the inverter can be taken a_min ; The maximum limit value corresponding to A is I a _ max * The rated current I of the inverter can be taken n and the virtual load current i of phase A la * The minimum value in .

[0056] Specifically, for the virtual load current i l * The specific calculation process is as follows: The maximum value of the three-phase load current i l_max Reduce Δi1 and set the middle value i of the three-phase load current to l_0 Reduce Δi2; According to the following formulas (1) and (2), the calculated (i l_max -Δi1)、(i l_0 -Δi2) and i l_min As the virtual load current; the specific formula is as follows:

[0057] i avg ′=[(i l_max -Δi1)+(i l_0 -Δi2)+i l_min ] / 3 (1).

[0058] Δn%=[(i l_max -Δi1)-i l_min ] / i avg ′×100% (2).

[0059] Among them, i avg ′ represents the average value of the virtual load current, and Δn% represents the set imbalance threshold.

[0060] It is understandable that the value of the imbalance threshold Δn% can be selected according to the actual needs of those skilled in the art. Considering the limited imbalance compensation capability of the inverter system, generally speaking, the value range of the imbalance threshold Δn% is 10% to 30%, preferably 20%.

[0061] It can also be understood that the purpose of setting the virtual load current is to compensate for the load imbalance of the inverter system to a certain extent, so that the adjusted three-phase load current must satisfy the imbalance of the inverter within the allowable range; that is, after setting the virtual load current, the inverter system will be adjusted from a severely unbalanced working state to a slightly unbalanced working state. Then when selecting the maximum value reduction Δi1 and the intermediate value reduction Δi2, it is necessary to select in the direction of reducing the difference between the adjacent phase load currents. Taking the maximum value i of the three-phase load current as l_max and the intermediate value i of the three-phase load current l_0 As an example, we need to ensure that (i l_max -Δi1)-(i l_0 -Δi2)<i l_max -i l_0 , that is, Δi1>Δi2.

[0062] Specifically, there are multiple ways to determine the maximum value reduction Δi1 of the three-phase load current and the intermediate value reduction Δi2 of the three-phase load current that meet the above conditions; in this embodiment, the specific values ​​of the maximum value reduction Δi1 of the three-phase load current and the intermediate value reduction Δi2 of the three-phase load current are preferably determined according to Δi1 / Δi2=i l_max / i l_0 method to select.

[0063] In this embodiment, Figure 6 As shown in the figure, the inverter system's current reference value limiting process includes the following process: when a corresponding current reference value in the three-phase current exceeds the maximum limit value I max * When the corresponding current reference value is limited to the maximum limit value I max * At this time, the other corresponding current reference values ​​will gradually increase until they reach the maximum limit value I max * .

[0064] For ease of understanding, the following example takes the case where the three-phase load current is less than the rated current of the inverter, i.e., the maximum limit value I max * Take the three-phase load current and describe the specific limiting process of the current reference value in detail.

[0065] like Figure 6 As shown in the figure, the voltage outer loop first calculates and outputs the current reference value of the current inner loop through the PI controller according to the dynamic error between the actual value and the reference value of the bus voltage. In this process, the error value of the bus voltage changes dynamically, reflecting the difference between the current system output power and the load demand.

[0066] Then determine whether the current reference value reaches the three-phase load current. If the smallest phase in the current reference value reaches its corresponding load current value, the current reference value of this phase will be continuously limited to the load current level of this phase to prevent reverse current in this phase. At the same time, for other phases that have not yet reached the output power requirement, the PI controller will adjust its current command accordingly according to the current error value of the bus voltage, so as to gradually increase the current reference values ​​of these phases to make up for the lack of output power.

[0067] With the continuous adjustment of the PI controller and the gradual increase of the current reference value, the current reference values ​​of the three phases will approach and reach their corresponding load current values ​​in turn. In this process, the error value of the bus voltage also gradually decreases until the current reference values ​​of the three phases reach their corresponding load current values. At this time, the output power of the inverter system and the load demand have reached a dynamic balance, making the working state of the inverter system tend to be relatively stable, so that the inverter system can safely meet the load demand and effectively avoid the occurrence of reverse current.

[0068] It should be noted that the inverter system backflow prevention control method of the present application can be applied not only to photovoltaic power generation systems, but also to wind power generation systems and hydropower generation systems.

[0069] The above describes the basic principles, main features and advantages of the present application. Those skilled in the art should understand that the present application is not limited by the above embodiments, and the above embodiments and the specification only describe the principles of the present application. The present application may have various changes and improvements without departing from the spirit and scope of the present application, and these changes and improvements fall within the scope of the present application for which protection is sought. The scope of protection claimed by the present application is defined by the attached claims and their equivalents.

Claims

1. A method for preventing reverse flow in an inverter system, characterized in that: The steps include: In the voltage outer loop, a current reference value is output to the current inner loop by comparing the detected value of the DC bus voltage with the reference value; Limiting the current reference value according to the load imbalance of the inverter system; The current reference value after the amplitude limiting process is compared with the current components after the three-phase current is transformed to generate a duty cycle signal for controlling the inverter.

2. The inverter system backflow prevention control method according to claim 1, characterized in that: When performing the amplitude limiting process of the current reference value, the maximum amplitude limiting value of the current reference value is selected according to the load imbalance of the inverter system, which specifically includes the following process: comparing the load imbalance with a set imbalance threshold; If the load imbalance is lower than the set imbalance threshold, the minimum value between the three-phase load current and the inverter rated current is selected as the value of the maximum limit value; Otherwise, a virtual value of the three-phase load current is calculated according to the set unbalance threshold to obtain a virtual load current; and then a minimum value between the virtual load current and the inverter rated current is selected as the value of the maximum limit value.

3. The inverter system backflow prevention control method according to claim 2, characterized in that: The calculation of virtual load current includes the following process: The maximum value of the three-phase load current i l_max Reduce Δi1 and set the middle value i of the three-phase load current to l_0 Reduce Δi2; According to the following formulas (1) and (2), the calculated (i l_max -Δi1)、(i l_0 -Δi2) and i l_min As the virtual load current; the specific formula is as follows: i avg ′=[(i l_max -Δi1)+(i l_0 -Δi2)+i l_min ] / 3 (1); Δn%=[(i l_max -Δi1)-i l_min ] / i avg ′×100% (2); Among them, i avg ′ represents the average value of the virtual load current, and Δn% represents the set imbalance threshold.

4. The inverter system backflow prevention control method according to claim 3, characterized in that: The selection of the maximum value reduction Δi1 of the three-phase load current effective value and the intermediate value reduction Δi2 of the three-phase load current effective value meets the following conditions: Δi1 / Δi2=i l_max / i l_0 .

5. The inverter system backflow prevention control method according to claim 3, characterized in that: The value range of the imbalance threshold Δn% is 10% to 30%.

6. The inverter system backflow prevention control method according to claim 1, characterized in that: When performing the amplitude limiting process of the current reference value, the minimum amplitude limiting value of the current reference value is the minimum current for stable operation of the inverter.

7. The inverter system backflow prevention control method according to claim 1, characterized in that: The load imbalance of the inverter system is suitable for being represented by one of the effective value imbalance, negative sequence imbalance and zero sequence imbalance of the three-phase load current.

8. The inverter system backflow prevention control method according to claim 7, characterized in that: The load imbalance of the inverter system is represented by the effective value imbalance of the three-phase load current. The effective value imbalance is suitable for being calculated by the ratio of the difference between the maximum value and the minimum value of the three-phase load current to the average value of the three-phase load current.

9. The inverter system backflow prevention control method according to any one of claims 2 to 8, characterized in that: The inverter system's current reference value limiting process includes the following steps: When a corresponding current reference value in the three-phase current exceeds the maximum limit value, the corresponding current reference value is limited to the maximum limit value, and at this time, the other corresponding current reference values ​​will gradually increase until they reach the maximum limit value.

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