A clamping drive control circuit, control method and charging device
By designing a clamp driving control circuit in the power conversion circuit, detecting the current signal and generating a driving control signal to control the on-off state of the clamp switching unit, the power loss problem caused by the high main switching voltage stress is solved, and efficiency is improved.
Patent Information
- Application Number
- CN202411965756.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-30
- Publication Date
- 2025-04-04
AI Technical Summary
In the power conversion circuit, the main switching voltage stress is high, resulting in an increase in power loss, and it is difficult for the prior art to reduce the power loss of the clamp branch while reducing the voltage stress.
A clamp driving control circuit is designed to detect the current signal of the clamp branch through the control unit, and generate a driving control signal based on the current signal to control the on-off state of the clamp switch unit. When the main switch unit is turned off, the clamp switch unit is turned on and the conduction time is controlled to be less than the turn-off time of the main switch unit.
It effectively reduces the main switching voltage stress, while reducing the power loss of the clamp branch, and improving the efficiency of the power conversion circuit.
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Figure CN119765877A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present application belong to the field of electronic circuit technology, and in particular, relate to a clamping drive control circuit, a control method, and a charging device. Background Art
[0002] In order to solve the voltage stress problem of the main switch tube in the power conversion circuit, an active clamping absorption circuit is usually used to limit the voltage spike of the main switch tube. The current flowing through the active clamping absorption circuit will also cause power loss problems, affecting the efficiency of the power conversion circuit. Therefore, how to reduce the voltage stress of the main switch in the power conversion circuit while reducing the power loss on the clamping branch to improve the efficiency of the power conversion circuit has become a problem that needs to be solved urgently. Summary of the invention
[0003] The embodiments of the present application provide a clamping drive control circuit, a control method and a charging device, so as to reduce the voltage stress of the main switch in the power conversion circuit and reduce the power loss on the clamping branch.
[0004] In a first aspect, an embodiment of the present application provides a clamp drive control circuit, including a control unit and a drive unit, wherein:
[0005] The first end of the control unit is connected to the clamping branch of the power conversion circuit, the second end of the control unit is connected to the first end of the driving unit, the second end of the driving unit is connected to the control end of the clamping switch unit in the clamping branch, and the clamping branch is connected to the main switch unit of the power conversion circuit;
[0006] The control unit is used to detect the current signal of the clamp branch and generate a drive control signal according to the current signal. The drive unit is used to control the on-off state of the clamp switch unit according to the drive control signal, wherein the drive control signal is used to instruct the drive unit to turn on the clamp switch unit when the main switch unit is turned off, and the on-time of the clamp switch unit is less than the off-time of the main switch unit.
[0007] In a possible implementation, in terms of outputting a drive control signal to the drive unit based on the detected current signal, the control unit is specifically used to determine the current resonance cycle duration of the power conversion circuit based on the current signal, and determine the on-time duration based on the target number of on-times and the current resonance cycle duration, and generate the drive control signal based on the on-time duration.
[0008] In a possible implementation, the target number of conduction cycles is determined based on a first mapping relationship and a second mapping relationship, the first mapping relationship including a correspondence between the number of conduction cycles of the clamp switch unit and the power loss on the clamp switch unit, the second mapping relationship including a correspondence between the number of conduction cycles of the clamp switch unit and a resonant voltage peak value borne by the main switch unit, the power loss corresponding to the target number of conduction cycles is lower than a preset power, and the resonant voltage peak value corresponding to the target number of conduction cycles is lower than a preset voltage.
[0009] In a possible implementation, the control unit includes a sampling subunit and a digital signal processor subunit, wherein a first end of the sampling subunit is connected to the clamping branch, a second end of the sampling subunit is connected to a first end of the digital signal processor subunit, and a second end of the digital signal processor subunit is connected to a first end of the driving unit; the sampling subunit is used to acquire the current signal, and the digital signal processor subunit is used to generate the driving control signal according to the current signal.
[0010] In a possible implementation manner, the control unit includes a first sampling resistor subunit, a first comparator subunit and a first latch subunit, and the driving unit includes a NOR gate subunit; wherein the first sampling resistor subunit and the clamp switch unit are arranged in series in the clamp branch, the first end of the first sampling resistor subunit is connected to the negative input end of the first comparator subunit, the second end of the first sampling resistor subunit is connected to the positive input end of the first comparator subunit, the output end of the first comparator subunit is connected to the set input end of the first latch subunit, the output end of the first latch subunit is connected to the first input end of the NOR gate subunit, the reset input end of the first latch subunit and the second input end of the NOR gate subunit are combined and connected to the control end of the main switch unit, and the output end of the NOR gate is connected to the control end of the clamp switch unit.
[0011] In a possible implementation manner, the control unit includes a second sampling resistor subunit, a second comparator subunit and an inverter subunit, and the driving unit includes a first triode subunit and a second triode subunit; wherein the second sampling resistor subunit and the clamp switch unit are arranged in series in the clamp branch, a first end of the second sampling resistor subunit is connected to a negative input end of the second comparator subunit, a positive input end of the second comparator subunit and an emitter of the second triode subunit are connected to a second end of the second sampling resistor subunit after being combined, a collector of the first triode subunit and a base of the second triode subunit are connected to an output end of the second comparator subunit after being combined, a base of the first triode subunit is connected to a collector of the second triode unit, an emitter of the first triode subunit and an output end of the inverter subunit are connected to a control end of the clamp switch unit after being combined, and an input end of the inverter subunit is connected to a control end of the main switch unit.
[0012] In a possible implementation, the control unit includes a third sampling resistor subunit, a third comparator subunit, a fourth comparator subunit and a second latch subunit, and the driving unit includes a third triode subunit and a fourth triode subunit; wherein the third sampling resistor subunit and the clamp switch unit are arranged in series in the clamp branch, the negative input end of the third comparator subunit and the positive input end of the fourth comparator subunit are combined and connected to the first end of the third sampling resistor subunit, the positive input end of the third comparator subunit, the emitter of the fourth triode subunit, and the fourth comparator subunit are connected to the positive input end of the third sampling resistor subunit. The negative input terminal of the third sampling resistor subunit is connected to the second terminal of the third sampling resistor subunit after being combined, the collector of the third triode subunit and the base of the fourth triode subunit are connected to the output terminal of the third comparator subunit after being combined, the base of the third triode subunit is connected to the collector of the fourth triode subunit, the emitter of the third triode subunit and the output terminal of the second latch subunit are connected to the control terminal of the clamp switch unit after being combined, the set input terminal of the second latch subunit is connected to the output terminal of the fourth comparator subunit, and the reset input terminal of the second latch subunit is connected to the control terminal of the main switch unit.
[0013] In a possible implementation, the control unit includes a sampling transformer subunit, and the driving unit includes a fifth triode subunit, a sixth triode subunit, a seventh triode subunit, and an eighth triode subunit; wherein the primary winding of the sampling transformer subunit is arranged in series with the clamp switch unit in the clamp branch, the first end of the first secondary winding of the sampling transformer subunit is connected to the base of the fifth triode subunit, the collector of the fifth triode subunit is connected to the supply voltage, the second end of the first secondary winding, the emitter of the fifth triode subunit, the collector of the sixth triode subunit, and the emitter of the seventh triode subunit are connected to the control end of the clamp switch unit after being combined, and the sampling The first end of the second secondary winding of the transformer subunit is connected to the base of the sixth triode subunit, the second end of the second secondary winding is connected to the emitter of the sixth triode subunit, the collector of the seventh triode subunit and the base of the eighth triode subunit are connected together and then connected to the first end of the third secondary winding of the sampling transformer subunit, the base of the seventh triode subunit is connected to the collector of the eighth triode subunit, the emitter of the eighth triode subunit, the second end of the third secondary winding and the second end of the primary winding are connected together and then connected to the clamping branch; the first end of the first secondary winding, the second end of the second secondary winding and the second end of the third secondary winding are the same-named ends as the first end of the primary winding.
[0014] In a second aspect, an embodiment of the present application provides a clamp drive control method, which is applied to any clamp drive control circuit as described in the first aspect, and the method includes:
[0015] Detecting the current signal of the clamping branch in the power conversion circuit;
[0016] A drive control signal is generated according to the current signal, and the drive control signal is used to control the on-off state of the clamp switch unit in the clamp branch. The drive control signal is used to instruct the clamp switch unit to be turned on when the main switch unit in the power conversion circuit is turned off, and the on-time of the clamp switch unit is less than the off-time of the main switch unit.
[0017] In a third aspect, an embodiment of the present application provides a charging device, comprising any clamping drive control circuit and a power conversion circuit as described in the first aspect.
[0018] It can be seen that in the embodiment of the present application, the control unit of the clamp drive control circuit is respectively connected to the clamp branch and the drive unit of the power conversion circuit, and the drive unit is further connected to the control end of the clamp switch unit in the clamp branch. The control unit is used to detect the current signal of the clamp branch, and generate a drive control signal according to the current signal and output it to the drive unit, so as to control the on-off state of the clamp switch unit through the drive unit, and specifically turn on the clamp switch unit when the main switch unit is turned off, and control the on-time of the clamp switch unit to be shorter than the off-time of the main switch unit. When the main switch is turned off, turning on the clamp branch reduces the voltage stress of the main switch, and reduces the on-time of the clamp switch unit, which is conducive to reducing the power loss on the clamp branch and improving the efficiency of the power conversion circuit. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The embodiments of the present application are further described using the accompanying drawings, but the embodiments in the accompanying drawings do not constitute any limitation to the embodiments of the present application. A person of ordinary skill in the art can obtain other drawings based on the following drawings without creative work.
[0020] Figure 1 It is a schematic diagram of the composition structure of a clamp drive control circuit provided in an embodiment of the present application;
[0021] Figure 2 It is a schematic diagram of the composition structure of a power conversion circuit provided in an embodiment of the present application;
[0022] Figure 3 It is a schematic diagram of the composition structure of another clamping drive control circuit provided in an embodiment of the present application;
[0023] Figure 4 It is a schematic diagram of the composition structure of another clamping drive control circuit provided in an embodiment of the present application;
[0024] Figure 5 is a schematic diagram of a driving control signal provided in an embodiment of the present application;
[0025] Figure 6 It is a schematic diagram of the composition structure of another clamping drive control circuit provided in an embodiment of the present application;
[0026] Figure 7 It is a schematic diagram of the composition structure of another clamping drive control circuit provided in an embodiment of the present application;
[0027] Figure 8 It is a schematic diagram of the composition structure of another clamping drive control circuit provided in an embodiment of the present application. DETAILED DESCRIPTION
[0028] The technical solutions of the embodiments of the present application will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present application, not all of them. All other embodiments obtained by ordinary technicians in this field without creative work based on the embodiments in the embodiments of the present application are within the scope of protection of the embodiments of the present application.
[0029] In the description of the embodiments of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the embodiments of the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present application. In addition, the terms "first", "second", and "third" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance. The singular forms of "a", "said", and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.
[0030] In order to reduce the loss on the conductive line, in the high-power high-voltage direct current (HVDC) application scenario, the output voltage of the DC bus becomes higher and higher, which makes the voltage stress of the main switch in the power conversion circuit higher and higher. In order to solve the voltage stress problem of the main switch in the power conversion circuit, an active clamping absorption circuit is usually used to limit its voltage spike.
[0031] At present, in the control scheme for the active clamp switch tube mentioned above, a driving signal that is completely complementary to the main switch is usually used to control the active clamp switch tube. This active clamp control method requires a large capacitance of the clamp capacitor, and a large capacitance clamp capacitor occupies a large volume, which is not conducive to high power density design. However, if the capacitance of the clamp capacitor is forcibly reduced in order to reduce the volume of the clamp capacitor, it will cause a larger current spike flowing through the clamp capacitor and the clamp switch tube, which will lead to higher losses and reduce the efficiency of the power conversion circuit.
[0032] Therefore, the embodiment of the present application aims at the problem of excessive peak current and loss of efficiency in the aforementioned high power density design, and proposes a clamping drive control circuit, control method and charging device, so as to reduce the loss caused by the clamping branch while reducing the voltage stress of the main switch by controlling the on-time of the clamping switch. The clamping drive control circuit, control method and charging device provided by the present application are introduced below in conjunction with the accompanying drawings.
[0033] See also Figure 1 , Figure 1 is a schematic diagram of a clamping drive control circuit provided in an embodiment of the present application, such as Figure 1 As shown, the clamp drive control circuit includes a control unit and a drive unit, wherein a first end of the control unit is connected to a clamp branch of a power conversion circuit, a second end of the control unit is connected to a first end of the drive unit, and a second end of the drive unit is connected to a control end of a clamp switch unit Qs in the clamp branch, and the clamp branch is connected to a main switch unit Q of the power conversion circuit; the control unit is used to detect a current signal of the clamp branch, and to generate a drive control signal according to the current signal, and the drive unit is used to control the on-off state of the clamp switch unit Qs according to the drive control signal, wherein the drive control signal is used to instruct the drive unit to turn on the clamp switch unit Qs when the main switch unit Q is turned off, and the on-time of the clamp switch unit Qs is less than the off-time of the main switch unit Q.
[0034] Among them, Figure 1 As shown, the control unit can specifically connect the clamping branch through the sampling port Rs, and then detect the current signal of the clamping branch. Specifically, the sampling port Rs can be a sampling resistor, a mutual inductor sampling port, a Hall sensor sampling port, or an operational amplifier sampling port, etc., which is not specifically limited here.
[0035] In practical applications, the power conversion circuit described in the embodiments of the present application can be, for example, a new generation single-stage converter (such as a matrix converter, a single-ended primary inductor converter, etc.), a forward converter or a flyback converter, and no specific restrictions are made here. Specifically, taking the power conversion circuit as a single-ended primary inductor converter in a new generation single-stage converter as an example, the clamping drive control circuit provided in the embodiments of the present application can be specifically applied to the following: Figure 2 In the power conversion circuit shown.
[0036] Among them, Figure 1 and Figure 2As shown, the clamping branch may specifically include a clamping capacitor Cs and a clamping switch unit Qs, and the clamping switch unit Qs and the main switch unit Qs may both be NMOS tubes to improve the response timeliness of the switch tube conduction control, thereby improving the reliability of the clamping branch and the power conversion circuit. Of course, in other embodiments, the switch unit may also be set as other switch tube devices different from the NMOS tube, such as a PMOS tube, etc., as needed, and no specific limitation is made here.
[0037] In addition, if Figure 2 As shown, the power conversion circuit may also include a circuit for inputting an AC signal u ac The rectifier bridge for rectification (including diode D1, diode D2, diode D3 and diode D4), inductor L1, main switch unit Q, output capacitor Cc, transformer where winding L2 is located, diode D5 and DC voltage V dc The output capacitor Co. Based on this, the power converter circuit can achieve three-phase power factor correction and wide DC charging voltage output through a primary structure, and the conversion efficiency is high. Among them, due to the effects of transformer leakage inductance, the turn-off voltage of the main switch unit Q is high, which can be absorbed by the clamping branch.
[0038] Among them, see Figure 5 , taking DRV1 as a signal complementary to the driving signal of the main switch unit Q and DRV2 as a driving control signal as an example, t1-t3 corresponds to the off time of a single on cycle of the main switch unit Q, and t1-t2 corresponds to the on time of the clamp switch unit Qs during the off period of the main switch unit Q. That is to say, in the clamp drive control circuit provided in the embodiment of the present application, the clamp switch unit Qs does not need to remain on all the time when the main switch unit Q is off, and the off time of the main switch unit Q and the clamp switch unit Qs is allowed to overlap. Figure 5 As shown in , since the resonant voltage peak usually decreases gradually, the reduced resonant voltage peak may also meet the voltage stress requirement of the main switch unit. Therefore, setting the on-time of the clamping switch unit Qs to be shorter than the off-time of the main switch unit Q is beneficial to reducing the power loss on the clamping path while reducing the voltage stress of the main switch tube.
[0039] It should be noted that Figure 5 The on-time of the clamp switch unit Qs is only an example. In actual applications, the control unit can determine the on-time of the clamp switch unit Qs according to the detected clamp branch current signal, and then set the on-time to Figure 5 The duration t1-t2 may be longer or shorter, for example, the conduction duration may also be set to 0, that is, the clamp switch unit may not be turned on, and no specific limitation is made here.
[0040] It can be seen that in the embodiment of the present application, the control unit of the clamp drive control circuit is respectively connected to the clamp branch and the drive unit of the power conversion circuit, and the drive unit is further connected to the control end of the clamp switch unit in the clamp branch. The control unit is used to detect the current signal of the clamp branch, and generate a drive control signal according to the current signal and output it to the drive unit, so as to control the on-off state of the clamp switch unit through the drive unit, and specifically turn on the clamp switch unit when the main switch unit is turned off, and control the on-time of the clamp switch unit to be shorter than the off-time of the main switch unit. When the main switch is turned off, turning on the clamp branch reduces the voltage stress of the main switch, and reduces the on-time of the clamp switch unit, which is conducive to reducing the power loss on the clamp branch and improving the efficiency of the power conversion circuit.
[0041] In one possible example, in terms of outputting a drive control signal to the drive unit based on the detected current signal, the control unit is specifically used to determine the current resonance cycle duration of the power conversion circuit based on the current signal, and determine the on-time duration based on the target number of on-times and the current resonance cycle duration, and generate the drive control signal based on the on-time duration.
[0042] In this possible example, the target number of conduction cycles is determined based on a first mapping relationship and a second mapping relationship, the first mapping relationship including a correspondence between the number of conduction cycles of the clamp switch unit and the power loss on the clamp switch unit, the second mapping relationship including a correspondence between the number of conduction cycles of the clamp switch unit and the resonant voltage peak value borne by the main switch unit, the power loss corresponding to the target number of conduction cycles is lower than a preset power, and the resonant voltage peak value corresponding to the target number of conduction cycles is lower than a preset voltage.
[0043] In this possible example, the control unit includes a sampling subunit and a digital signal processor subunit, wherein the first end of the sampling subunit is connected to the clamping branch, the second end of the sampling subunit is connected to the first end of the digital signal processor subunit, and the second end of the digital signal processor subunit is connected to the first end of the driving unit; the sampling subunit is used to obtain the current signal, and the digital signal processor subunit is used to generate the driving control signal according to the current signal.
[0044] The duration of the current resonance cycle is determined according to the current signal. For example, the duration of the current resonance cycle may be determined according to the time difference between two adjacent current zero-crossing moments. Specifically, the duration of the current resonance cycle may be equal to twice the aforementioned time difference.
[0045] For details, see Figure 5 , Figure 5FIG. 2 exemplarily shows the change of the clamp branch current Is flowing through the sampling port Rs and the clamp switch unit voltage Vsw over time when the resonant peak current is conducted to the clamp branch. Figure 5 As shown, when the transformer leakage inductance in the power conversion circuit is large, the voltage waveform on the clamped switch unit has a large resonant voltage spike, and the first resonant voltage spike value (i.e., the peak value of the resonant voltage spike that appears for the first time) is the highest, which is usually much higher than other resonant voltage spike values.
[0046] The current signal detected by the sampling subunit is Figure 5 Taking Is shown in as an example, the time difference between two adjacent current zero-crossing moments is calculated, specifically, the time difference between ZCD1 and ZCD2 is calculated, and the time difference is the half resonant period of the transformer leakage inductance Lr and the output capacitance Cc of the main switch unit in the power conversion circuit. The same corresponds to the occurrence time of the first resonant voltage peak on the main switch unit Q (for example Figure 5 In the figure, t1-t2 or ZCD1-ZCD2 corresponds to the complete process from the appearance to the end of a voltage spike).
[0047] In the specific implementation, Figure 3 As shown, the control unit can specifically detect the current signal through the sampling subunit, and the digital signal processor subunit processes the current signal collected by the sampling subunit to generate the drive control signal.
[0048] In particular, the sampling subunit may be an isolation sampling unit, and the corresponding sampling port Rs may be, for example, a Hall sensor sampling port, etc. By isolating the power conversion circuit and the control unit through the isolation sampling unit, interference of the power conversion circuit on the control unit may be reduced.
[0049] In particular, the digital signal processor subunit can be a digital signal processor (Digital Signal Processor, DSP), or other control unit structures including an analog-to-digital converter (Analog-to-Digital Converter, ADC) and a capture unit (Capture Unit, CAP). In a specific implementation, the current signal collected by the sampling subunit can be amplified by a first-stage operational amplifier and then transmitted to the digital signal processor subunit for processing, and the digital signal processor subunit can specifically determine the current zero-crossing moment through the analog-to-digital converter unit ADC and the capture unit CAP.
[0050] After determining the duration of the current resonance cycle, the digital signal processor sub-unit can determine the conduction duration of the clamp switch unit Qs by setting the target number of conduction cycles (specifically the number of current resonance cycles that need to be turned on), and generate a drive control signal (specifically in the form of a pulse width modulation signal PWM) in real time and send it to the drive unit to achieve precise control of the conduction time of the drive control signal.
[0051] On this basis, the target number of conduction cycles can be specifically determined according to the test waveform of the switch tube stress, which is conducive to minimizing the loss under acceptable stress conditions. Specifically, determining the number of conduction cycles can obtain two pieces of information, one is the resonant voltage peak value under different numbers of conduction cycles, and the other is the power loss value on the clamping branch under different conduction cycles. The above two pieces of information can be obtained through offline testing and stored in the digital signal processor sub-unit in the form of a digital table, that is, the resonant voltage peak value under different numbers of conduction cycles can be stored in the digital signal processor sub-unit in the form of a second mapping relationship, and the power loss value on the clamping branch under different conduction cycles can be stored in the digital signal processor sub-unit in the form of a first mapping relationship. Furthermore, when determining the target number of conduction cycles, the digital signal processor sub-unit can directly query the first mapping relationship and the second mapping relationship to determine the number of conduction cycles in which the corresponding power loss is less than the preset power (which can be the power loss upper limit of the clamping branch set as needed), and the corresponding resonant voltage peak value is less than the preset voltage (which can be the resonant voltage peak upper limit that the main switch unit can withstand set according to voltage stress requirements, and thus the number of conduction cycles in the low input and output voltage scenarios of the power conversion circuit can be set to a smaller number, and even the clamping branch can be turned off when the voltage is low) as the target number of conduction cycles.
[0052] Alternatively, the power loss value on the clamping branch under different conduction cycles can also be determined in real time by the digital signal processor subunit according to the detected current signal. For example, the digital signal processor subunit can read the peak current value I of each conduction cycle by sampling the current. spk , and the effective value of the current is determined by sinusoidal calculation Then, based on the determined current effective value and the on-resistance of the clamp switch unit (the resistance value may be pre-stored in the digital signal processor subunit), the power loss Ploss is jointly determined, and the power loss Ploss is a function that changes with the number of on-cycles.
[0053] On this basis, the digital signal processor subunit can first determine the number of conduction cycles in which the peak value of the resonance voltage is less than the preset voltage according to the pre-stored second mapping relationship, and combine the power loss on the clamping branch in each conduction cycle detected in real time. Within the number of conduction cycles in which the peak value of the resonance voltage is less than the preset voltage value, if the detected power loss value does not exceed the preset power loss, the clamping switch tube can continue to be turned on in the next current resonance cycle until the power loss of the clamping switch branch is detected to exceed the preset power loss in a certain current resonance cycle. In this case, the current resonance cycle is the current resonance cycle of the last conduction clamping switch unit Qs corresponding to the target number of conduction cycles, and the clamping switch unit Qs needs to be turned off when the next current resonance cycle arrives. In this way, the voltage stress of the main switch unit is minimized under the condition of low power loss, and the service life of the power conversion circuit is improved.
[0054] Alternatively, the number of conduction cycles Tn can be taken as a variable, and the optimization objective functions Vpk(Tn) and Ploss(Tn) can be constructed respectively according to the resonant voltage peak value and the power loss Ploss, and the optimal number of conduction cycles can be determined by a method such as Pareto optimization as the target number of conduction cycles.
[0055] It can be seen that in this example, the current signal is obtained specifically through the sampling subunit, and the current resonance cycle duration of the power conversion circuit is determined by the digital signal processor subunit according to the current signal, and the conduction duration is further determined according to the cycle duration and the target conduction cycle number, and then the drive control signal is generated. The current resonance cycle duration is accurately determined by current sampling, and the conduction duration in the drive control signal is accurately controlled by setting the target conduction cycle number, which is conducive to improving the accuracy of the generated drive control signal, and then improving the accuracy of the clamp drive control. Further, according to the corresponding relationship between the number of conduction cycles and the power loss and the resonant voltage peak, the number of cycles in which the power loss is lower than the preset power resonance voltage peak value and lower than the preset voltage is directly determined as the target cycle number, which is conducive to improving the response timeliness of the clamp switch drive control while reducing voltage stress and power loss.
[0056] See also Figure 4In a possible example, the control unit includes a first sampling resistor subunit R1, a first comparator subunit C1 and a first latch subunit SR1, and the driving unit includes a NOR gate subunit NOR1; wherein the first sampling resistor subunit R1 and the clamp switch unit Qs are arranged in series in the clamp branch, the first end of the first sampling resistor subunit R1 is connected to the negative input end of the first comparator subunit C1, the second end of the first sampling resistor subunit R1 is connected to the positive input end of the first comparator subunit C1, the output end of the first comparator subunit C1 is connected to the set input end S of the first latch subunit SR1, the output end of the first latch subunit SR1 is connected to the first input end of the NOR gate subunit NOR1, the reset input end R of the first latch subunit SR1 and the second input end of the NOR gate subunit NOR1 are combined and connected to the control end of the main switch unit Q, and the output end of the NOR gate is connected to the control end of the clamp switch unit Qs.
[0057] In a specific implementation, for some power conversion circuits, the first resonant voltage spike value (i.e., the voltage peak value of the resonant voltage spike that occurs for the first time) is much higher than the other resonant voltage spike values, and after the first resonant voltage spike occurs, the voltage drops rapidly. At this time, the clamping branch can be turned on only during the period when the first resonant voltage spike occurs, and the control unit and the driving unit can take the form of a comparator and a digital circuit device in this example.
[0058] Wherein, when both the main switch unit Q and the clamp switch unit Qs are NMOS tubes, their control terminals are respectively the gates of the corresponding NMOS tubes.
[0059] For example, the following combination Figure 5 The working principle of each subunit in the control unit and the driving unit in this example is explained. When the first oscillation peak time, that is, the first resonance voltage peak occurrence time (such as t1-t2 or ZCD1-ZCD2) ends (for example, at time t2 or the time corresponding to ZCD2), the current flowing through the clamping branch is reversed, and the voltage across the first sampling resistor subunit R1 is detected by the first comparator subunit C1. When the current is reversed, the first comparator subunit C1 outputs a high level, and the first latch subunit SR1 will be set to a high level. This level is sent to the NOR gate subunit NOR1 together with the driving signal of the main switch unit Q. After the NOR function, the driving control signal DRV2 will only maintain a high level during the first oscillation peak time. Compared with the driving control signal DRV2 that is completely complementary to the main switch unit, the high level time of the driving control signal DRV2 is reduced, and only the first voltage peak opening time is retained.
[0060] It can be seen that in this example, by setting a control unit and a driving unit including a comparator and a digital circuit device, it is possible to control the clamping switch unit to be turned on only at the first resonant voltage peak, which is beneficial to reducing the power loss on the clamping branch while reducing the voltage stress of the main switch in the power conversion circuit. The circuit structure is simple, which is beneficial to cost saving.
[0061] See also Figure 6 In a possible example, the control unit includes a second sampling resistor subunit R2, a second comparator subunit C2 and an inverter subunit D01, and the driving unit includes a first triode subunit VT1 and a second triode subunit VT2; wherein the second sampling resistor subunit R2 is connected in series with the clamp switch unit in the clamp branch, a first end of the second sampling resistor subunit R2 is connected to a negative input end of the second comparator subunit C2, a positive input end of the second comparator subunit C2 and an emitter end of the second triode subunit VT2 are connected together, The collector of the first triode subunit VT1 and the base of the second triode subunit VT2 are connected to the output end of the second comparator subunit C2, the base of the first triode subunit VT1 is connected to the collector of the second triode subunit VT2, the emitter of the first triode subunit VT1 and the output end of the inverter subunit D01 are connected to the control end of the clamp switch unit Qs, and the input end of the inverter subunit D01 is connected to the control end of the main switch unit Q.
[0062] Among them, the first transistor subunit VT1 and the second transistor subunit VT2 can be a PNP transistor and an NPN transistor respectively, and the first transistor subunit VT1 and the second transistor subunit VT2 can specifically form a locking circuit, so that only an initial current needs to be provided to maintain conduction afterwards.
[0063] For example, see Figure 5 , the following combination Figure 5The working principles of each sub-unit in the control unit and the driving unit in this example are explained. Specifically, when the second transistor sub-unit VT2 starts to turn on, the base voltage of the first transistor sub-unit VT1 is pulled down, and the first transistor sub-unit VT1 starts to turn on. At the same time, during the conduction period of the first transistor sub-unit VT1, its current will flow to the base of the second transistor VT2 sub-unit, making the opening of the second transistor VT2 sub-unit larger, which in turn makes the transistor VT1 continue to turn on. Such reciprocating positive feedback makes the two transistors continue to turn on, realizing a function similar to that of an SR latch, that is, a high level is only emitted when the first current direction changes, and the drive signal is continuously pulled down in subsequent current direction changes. Furthermore, the drive signal completely opposite to the main switch tube Q is connected to the clamp switch tube Qs through the inverter subunit D01, and the current reverse is detected by R2, which is the moment when the first peak conduction is completed. At this time, the comparator C2 outputs a high level, which triggers the transistors VT1 and VT2 to enter the locked conduction state, pulling down the subsequent drive level. The control unit and the drive unit in this example can also be used to control the clamp branch to conduct only during the first resonant voltage peak.
[0064] It can be seen that in this example, by setting a control unit and a driving unit including a comparator and a transistor, it is possible to control the clamping switch unit to be turned on only at the first voltage spike, which is beneficial to reducing the power loss on the clamping branch while reducing the voltage stress of the main switch in the power conversion circuit. The circuit structure is simple, which is beneficial to cost saving.
[0065] See also Figure 7In a possible example, the control unit includes a third sampling resistor subunit R3, a third comparator subunit C3, a fourth comparator subunit C4 and a second latch subunit SR2, and the driving unit includes a third triode subunit VT3 and a fourth triode subunit VT4; wherein the third sampling resistor subunit R3 is arranged in series with the clamp switch unit in the clamp branch, the negative input end of the third comparator subunit C3 and the positive input end of the fourth comparator subunit C4 are connected to the first end of the third sampling resistor subunit R3 after being combined, the positive input end of the third comparator subunit C3, the emitter of the fourth triode subunit VT4, and the emitter of the fourth comparator subunit C4 The negative input terminal is connected to the second end of the third sampling resistor subunit R3 after being combined, the collector of the third triode subunit VT3 and the base of the fourth triode subunit VT4 are connected to the output end of the third comparator subunit C3 after being combined, the base of the third triode subunit VT3 is connected to the collector of the fourth triode subunit VT4, the emitter of the third triode subunit VT3 and the output end Q of the second latch subunit SR2 are connected to the control end of the clamp switch unit after being combined, the set input end S of the second latch subunit SR2 is connected to the output end of the fourth comparator subunit C4, and the reset input end R of the second latch subunit SR2 is connected to the control end of the main switch unit.
[0066] In with Figure 6 On the basis of the circuit structure shown, by adding the fourth comparator sub-unit C4 and the second latch sub-unit SR2, a self-driving signal can be formed, thereby separating the driving control signal of the main switch unit Q and the driving control signal of the clamp switch unit Qs. However, the driving control signal of the main switch unit Q is still required as a reset signal, which is beneficial to improving the precision control of the opening moment.
[0067] For example, see Figure 5 , the following combination Figure 5 The working principle of each subunit in the control unit and the driving unit in this example is described. Specifically, first, when the current on the third sampling resistor subunit R3 is forwardly conducted from top to bottom, the fourth comparator subunit C4 sends a high level, which is sent to the clamp switch unit Qs after passing through the second latch subunit SR2. When the first resonant voltage peak time ends, the current on R3 is reversed, which makes the third comparator subunit C3 output a high level, which is pulled down by the latch circuit including the third transistor subunit VT3 and the fourth transistor subunit VT4. The working principle of the latch circuit is the same as Figure 6The same is not repeated here, and then when the main switch unit Q is turned off, that is, when the main switch unit Q driving control signal is at a low level, the second latch sub-unit SR2 is reset to prepare for the next first resonance voltage spike. The control unit and the driving unit in this example can also be used to control the clamping branch to be turned on only during the first resonance voltage spike.
[0068] It can be seen that in this example, by setting a self-driven control unit and a driving unit including a comparator and a latch, it is possible to control the clamping switch unit to be turned on only at the first voltage spike, which is beneficial to reducing the power loss on the clamping branch while reducing the voltage stress of the main switch in the power conversion circuit. The circuit structure is simple, which is beneficial to cost saving.
[0069] See also Figure 8 In a possible example, the control unit includes a sampling transformer subunit, and the driving unit includes a fifth triode subunit VT5, a sixth triode subunit VT6, a seventh triode subunit VT7, and an eighth triode subunit VT8; wherein the primary winding L01 of the sampling transformer subunit is connected in series with the clamp switch unit in the clamp branch, the first end of the first secondary winding L11 of the sampling transformer subunit is connected to the base of the fifth triode subunit VT5, the collector of the fifth triode subunit VT5 is connected to the power supply voltage Vcc, the second end of the first secondary winding L11, the emitter of the fifth triode subunit VT5, the collector of the sixth triode subunit VT6, and the emitter of the seventh triode unit VT7 are connected to the control end of the clamp switch unit after being combined, and the sampling transformer The first end of the second secondary winding L12 of the subunit is connected to the base of the sixth triode subunit VT6, the second end of the second secondary winding L12 is connected to the emitter of the sixth triode subunit VT6, the collector of the seventh triode subunit VT7 and the base of the eighth triode subunit are combined and connected to the first end of the third secondary winding L13 of the sampling transformer subunit, the base of the seventh triode subunit VT7 is connected to the collector of the eighth triode subunit VT8, the emitter of the eighth triode subunit VT8, the second end of the third secondary winding L13 and the second end of the primary winding L01 are combined and connected to the clamping branch; the first end of the first secondary winding L11, the second end of the second secondary winding L12 and the second end of the third secondary winding L13 are the same-named ends as the first end of the primary winding L01.
[0070] In a specific implementation, through the sampling transformer sub-unit, the control unit and the driving unit can be used as a completely self-driven circuit, thereby completely separating the on-off control of the clamp switch from the on-off control of the main switch and performing them independently.
[0071] For example, see Figure 5 , the following combination Figure 5 The working principles of each subunit in the control unit and the driving unit in this example are explained. When the current Is flowing through the primary winding L01 of the transformer is a positive current from top to bottom, the fifth transistor subunit VT5 and the sixth transistor subunit VT6 are turned on, thereby fully turning on the clamp switch unit Qs. When the Is current is reversed, the seventh transistor subunit VT7 and the eighth transistor unit VT8 are turned on to pull down the drive control signal of the clamp switch unit Qs. In order to make the clamp switch unit Qs repeatedly turned on and off in the case of multiple resonances, the seventh transistor subunit VT7 and the eighth transistor unit VT8 can also be used as a locking circuit. For details, please refer to the working principle of the aforementioned locking circuit, which will not be repeated here. The locking circuit can make the drive control signal of the clamp switch unit Qs be pulled down at the moment when the current reverses for the first time, so that the drive control signal of the clamp switch unit Qs is only at a high level during the first resonance voltage peak time.
[0072] In addition, it should be noted that Figure 4-Figure 8 The specific structures and connection modes of the sub-units are exemplary. In practical applications, the specific structures and connection modes of the control sub-units can be set as required. Figure 4-Figure 8 For example, the sampling port of each sampling sub-unit may be other sampling ports such as a Hall sensor detection port in addition to the sampling resistor, or each transistor sub-unit may be set as a MOS tube to improve the driving capability, etc., and no specific limitation is made here.
[0073] It can be seen that in this example, by setting up a fully self-driven control unit and a driving unit including a comparator and a transistor, it is possible to control the clamping switch unit to be turned on only at the first voltage spike, which is beneficial to reducing the power loss on the clamping branch while reducing the voltage stress of the main switch in the power conversion circuit.
[0074] In addition, an embodiment of the present application also provides a clamp drive control method, which can be applied to any clamp drive control circuit described in the embodiment of the present application, the method comprising: detecting a current signal of a clamp branch in a power conversion circuit; generating a drive control signal according to the current signal, the drive control signal being used to control the on-off state of a clamp switch unit in the clamp branch, the drive control signal being used to instruct to turn on the clamp switch unit when the main switch unit in the power conversion circuit is turned off, and the on-time of the clamp switch unit is less than the off-time of the main switch unit.
[0075] In a specific implementation, the clamp drive control method can be implemented by a control unit in a clamp drive control circuit. The specific implementation process can refer to the description of the aforementioned embodiment and will not be repeated here.
[0076] It can be seen that in the embodiment of the present application, the clamping drive control method can turn on the clamping branch when the main switch is off to reduce the voltage stress of the main switch, while reducing the conduction time of the clamping switch unit, which is beneficial to reducing the power loss on the clamping branch and improving the efficiency of the power conversion circuit.
[0077] In addition, an embodiment of the present application further provides a charging device, which may specifically include any one of the clamping drive control circuits and power conversion circuits described in the embodiments of the present application.
[0078] Among them, the power conversion circuit can specifically be a new generation single-stage converter (such as a matrix converter, a single-ended primary inductor converter, etc.), a forward converter or a flyback converter, etc., and no specific restrictions are made here.
[0079] In a specific implementation, the charging device may be, for example, a power battery charging device for a new energy vehicle, etc. The charging device provided in the embodiment of the present application has low power loss on the clamping branch and high conversion efficiency.
[0080] Finally, it should be emphasized that the embodiments of the present application are not limited to the above-mentioned implementation methods. The above are only preferred embodiments of the embodiments of the present application and are not intended to limit the embodiments of the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the protection scope of the embodiments of the present application.
Claims
1. A clamping drive control circuit, characterized in that: It comprises a control unit and a drive unit, wherein: The first end of the control unit is connected to the clamping branch of the power conversion circuit, the second end of the control unit is connected to the first end of the driving unit, the second end of the driving unit is connected to the control end of the clamping switch unit in the clamping branch, and the clamping branch is connected to the main switch unit of the power conversion circuit; The control unit is used to detect the current signal of the clamp branch and generate a drive control signal according to the current signal. The drive unit is used to control the on-off state of the clamp switch unit according to the drive control signal, wherein the drive control signal is used to instruct the drive unit to turn on the clamp switch unit when the main switch unit is turned off, and the on-time of the clamp switch unit is less than the off-time of the main switch unit.
2. The clamping drive control circuit according to claim 1, characterized in that: In terms of outputting a drive control signal to the drive unit based on the detected current signal, the control unit is specifically used to determine the current resonance period duration of the power conversion circuit based on the current signal, and to determine the on-time duration based on the target number of on-times and the current resonance period duration, and to generate the drive control signal based on the on-time duration.
3. The clamping drive control circuit according to claim 2, characterized in that: The target number of conduction cycles is determined based on a first mapping relationship and a second mapping relationship, the first mapping relationship including a correspondence between the number of conduction cycles of the clamp switch unit and the power loss on the clamp switch unit, the second mapping relationship including a correspondence between the number of conduction cycles of the clamp switch unit and a resonant voltage peak value borne by the main switch unit, the power loss corresponding to the target number of conduction cycles is lower than a preset power, and the resonant voltage peak value corresponding to the target number of conduction cycles is lower than a preset voltage.
4. The clamping drive control circuit according to claim 2 or 3, characterized in that: The control unit comprises a sampling subunit and a digital signal processor subunit, wherein: The first end of the sampling subunit is connected to the clamping branch, the second end of the sampling subunit is connected to the first end of the digital signal processor subunit, and the second end of the digital signal processor subunit is connected to the first end of the driving unit; The sampling subunit is used to acquire the current signal, and the digital signal processor subunit is used to generate the drive control signal according to the current signal.
5. The clamping drive control circuit according to claim 1, characterized in that: The control unit includes a first sampling resistor subunit, a first comparator subunit and a first latch subunit, and the driving unit includes a NOR gate subunit; wherein, The first sampling resistor subunit and the clamp switch unit are arranged in series in the clamp branch, the first end of the first sampling resistor subunit is connected to the negative input end of the first comparator subunit, the second end of the first sampling resistor subunit is connected to the positive input end of the first comparator subunit, the output end of the first comparator subunit is connected to the set input end of the first latch subunit, the output end of the first latch subunit is connected to the first input end of the NOR gate subunit, the reset input end of the first latch subunit and the second input end of the NOR gate subunit are combined and connected to the control end of the main switch unit, and the output end of the NOR gate is connected to the control end of the clamp switch unit.
6. The clamping drive control circuit according to claim 1, characterized in that: The control unit includes a second sampling resistor subunit, a second comparator subunit and an inverter subunit, and the driving unit includes a first triode subunit and a second triode subunit; wherein, The second sampling resistor subunit and the clamp switch unit are arranged in series in the clamp branch, the first end of the second sampling resistor subunit is connected to the negative input end of the second comparator subunit, the positive input end of the second comparator subunit and the emitter of the second triode subunit are connected to the second end of the second sampling resistor subunit, the collector of the first triode subunit and the base of the second triode unit are connected to the output end of the second comparator subunit, the base of the first triode subunit is connected to the collector of the second triode unit, the emitter of the first triode unit and the output end of the inverter subunit are connected to the control end of the clamp switch unit, and the input end of the inverter subunit is connected to the control end of the main switch unit.
7. The clamping drive control circuit according to claim 1, characterized in that: The control unit includes a third sampling resistor subunit, a third comparator subunit, a fourth comparator subunit and a second latch subunit, and the driving unit includes a third triode subunit and a fourth triode subunit; wherein, The third sampling resistor subunit and the clamp switch unit are arranged in series in the clamp branch, the negative input end of the third comparator subunit and the positive input end of the fourth comparator subunit are connected to the first end of the third sampling resistor subunit after being combined, the positive input end of the third comparator subunit, the emitter of the fourth triode subunit, and the negative input end of the fourth comparator subunit are connected to the second end of the third sampling resistor subunit after being combined, the collector of the third triode subunit and the base of the fourth triode subunit are connected to the output end of the third comparator subunit after being combined, the base of the third triode subunit is connected to the collector of the fourth triode subunit, the emitter of the third triode subunit and the output end of the second latch subunit are connected to the control end of the clamp switch unit after being combined, the set input end of the second latch subunit is connected to the output end of the fourth comparator subunit, and the reset input end of the second latch subunit is connected to the control end of the main switch unit.
8. The clamping drive control circuit according to claim 1, characterized in that: The control unit includes a sampling transformer sub-unit, and the driving unit includes a fifth triode sub-unit, a sixth triode sub-unit, a seventh triode sub-unit and an eighth triode sub-unit; wherein, The primary winding of the sampling transformer subunit and the clamp switch unit are arranged in series in the clamp branch, the first end of the first secondary winding of the sampling transformer subunit is connected to the base of the fifth triode subunit, the collector of the fifth triode subunit is connected to the power supply voltage, the second end of the first secondary winding, the emitter of the fifth triode subunit, the collector of the sixth triode subunit, and the emitter of the seventh triode subunit are connected to the control end of the clamp switch unit after being combined, and the second secondary winding of the sampling transformer subunit is connected to the control end of the clamp switch unit. The first end of the winding is connected to the base of the sixth triode sub-unit, the second end of the second secondary winding is connected to the emitter of the sixth triode sub-unit, the collector of the seventh triode sub-unit and the base of the eighth triode sub-unit are connected to the first end of the third secondary winding of the sampling transformer sub-unit, the base of the seventh triode sub-unit is connected to the collector of the eighth triode sub-unit, the emitter of the eighth triode sub-unit, the second end of the third secondary winding and the second end of the primary winding are connected to the clamping branch after being connected; The first end of the first secondary winding, the second end of the second secondary winding and the second end of the third secondary winding are the same end as the first end of the primary winding.
9. A clamping drive control method, characterized in that: Applied to the clamp drive control circuit according to any one of claims 1 to 8, the method comprises: Detecting the current signal of the clamping branch in the power conversion circuit; A drive control signal is generated according to the current signal, and the drive control signal is used to control the on-off state of the clamp switch unit in the clamp branch. The drive control signal is used to instruct the clamp switch unit to be turned on when the main switch unit in the power conversion circuit is turned off, and the on-time of the clamp switch unit is less than the off-time of the main switch unit.
10. A charging device, characterized in that: The charging device comprises a clamping drive control circuit and a power conversion circuit as described in any one of claims 1 to 8.