Load modulation balanced continuous power amplifier, device and method

Abstract

The invention discloses an input harmonic controlled load modulation balanced continuous power amplifier, equipment and a method. The amplifier comprises a power divider; the first branch comprises a phase compensation circuit, a first input matching network, a first transistor and a first output matching network which are connected in sequence; an input end 3dB directional orthogonal coupler; the second branch comprises a second input matching network, a second transistor and a second output matching network which are connected in sequence; the third branch comprises a third input matching network, a third transistor and a third output matching network which are connected in sequence; and the input end is a 3dB directional orthogonal coupler. According to the invention, the expansion of the impedance design space of the load modulation balance type continuous power amplifier and the improvement of the overall drain efficiency are realized by adopting an input harmonic control mode, so that high-efficiency work can be realized in a full working frequency band. The method can be widely applied to the technical field of communication.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a load modulation balanced continuous power amplifier, a device and a method. Background Art

[0002] The load-modulated balanced continuous power amplifier (SLMBA) is a power amplifier structure that has emerged in recent years. The load modulation process of the load-modulated balanced continuous power amplifier only occurs in the balanced branch at high power. The output network only needs to consider one load condition, which makes it easier to implement a broadband matching network, and has great broadband potential; at the same time, the balanced branch can generate more power than the carrier branch, and can modulate the load impedance of the balanced amplifier by changing the amplitude and phase of the external control signal, and can dynamically control the power amplifier under broadband and large back-off. Compared with the Doherty power amplifier (DPA), which is the most widely used in wireless cellular base stations, the matching network design of the load-modulated balanced continuous power amplifier is more flexible, the difficulty of broadband design is greatly reduced, and broadband and large back-off can be achieved more easily.

[0003] In order to achieve high back-off efficiency in a wide band, many advanced technical solutions have been proposed in recent years. The first technical solution is to propose a number of continuous mode load modulation balanced continuous power amplifiers, the principle of which is to expand the fundamental load design space of the balanced power amplifier by changing the harmonic impedance space of the input / output matching network of the main power amplifier. The second technical solution is to propose a load modulation balanced continuous power amplifier with an asymmetric structure, using an asymmetric output coupler, changing the load modulation method, so as to achieve high back-off efficiency in a wide band.

[0004] In the first technical solution, the overdrive problem caused by the premature saturation of the main power amplifier will cause stability and linearity problems, making it difficult to maintain high efficiency and linear high gain at the same time. In the second technical solution, the strong saturation of the load-modulated balanced continuous power amplifier can be avoided to a certain extent, and the linearity and stability problems caused by overdrive can be reduced. However, due to the increased complexity of load modulation, it is difficult to achieve a good matching effect and it is also difficult to achieve harmonic control. In summary, it is very difficult to realize an asymmetric load-modulated balanced continuous power amplifier with good performance. Summary of the invention

[0005] In order to solve at least one of the technical problems existing in the prior art to a certain extent, the present invention aims to provide a load-modulated balanced continuous power amplifier, device and method for input harmonic control.

[0006] The first technical solution adopted by the present invention is:

[0007] A load-modulated balanced continuous power amplifier with input harmonic control, comprising:

[0008] A power divider is used to equally divide the RF input signal into two signals, and the two signals are respectively input into the first branch and the balance branch;

[0009] The first branch includes: a first input matching network including a gate bias circuit, a first transistor, and a first output matching network including a drain bias circuit;

[0010] The balancing branch includes a phase compensation circuit, an input 3dB directional orthogonal coupler, a second branch and a third branch connected in sequence;

[0011] The input end 3dB directional orthogonal coupler is used to equally divide the input signal of the balanced branch into two signals, which are respectively input into the second branch and the third branch, and the two signals form a phase difference of 90 degrees;

[0012] The second branch includes: a second input matching network including a gate bias circuit, a second transistor, and a second output matching network including a drain bias circuit;

[0013] The third branch includes: a third input matching network including a gate bias circuit, a third transistor, and a third output matching network including a drain bias circuit;

[0014] The output end 3dB directional orthogonal coupler is coupled with the first output matching network, the second output matching network and the third output matching network to couple and output the signal.

[0015] Further, three transistors are used as power amplifiers, the first transistor is used as a main power amplifier, and the second transistor and the third transistor are in a turned-off state when the input power is low;

[0016] The phase compensation circuit is used to supplement the phase between the first branch and the balanced branch so as to align the phases of the first branch and the balanced branch at the output end of the 3dB directional orthogonal coupler.

[0017] Furthermore, the load modulated balanced continuous power amplifier has an operating frequency of 1.75-2.65 GHz; according to the classification and impedance requirements of the power amplifier, the type of harmonic regulation in the entire frequency band is continuous mode GF -1 kind.

[0018] Furthermore, the first input matching network constitutes IMN1, which includes a harmonic control part and a fundamental compensation part, the first output matching network constitutes OMN1, which includes a harmonic control part and a fundamental compensation part, and the second output matching network and the third output matching network constitute two OMN2s.

[0019] Further, the first input matching network, the second input matching network and the third input matching network have the same structure;

[0020] The first input matching network includes a third metal microstrip line, a fourth metal microstrip line, a fifth metal microstrip line, a sixth metal microstrip line, a seventh metal microstrip line, an eighth metal microstrip line, a ninth metal microstrip line, a tenth metal microstrip line, an eleventh metal microstrip line, a twelfth metal microstrip line, an isolation resistor and an RC parallel stabilization circuit;

[0021] One end of the third metal microstrip line is connected to an isolation capacitor, the other end of the third metal microstrip line is connected to one end of an RC parallel stabilization circuit, the other end of the RC parallel stabilization circuit is connected to one end of the fourth metal microstrip line, the other end of the fourth metal microstrip line is connected to one end of the fifth metal microstrip line, the other end of the fifth metal microstrip line is connected to one end of the sixth metal microstrip line and the seventh metal microstrip line on the bias circuit, the other end of the sixth metal microstrip line is connected to one end of the isolation resistor, the other end of the isolation resistor is connected to a gate bias voltage, the other end of the seventh metal microstrip line is connected to one end of the eighth metal microstrip line, the other end of the eighth metal microstrip line is connected to one end of the ninth metal microstrip line, the other end of the ninth metal microstrip line is connected to one end of the tenth metal microstrip line and the eleventh metal microstrip line, the other end of the eleventh metal microstrip line is connected to the twelfth metal microstrip line, and the other end of the twelfth metal microstrip line is connected to the gate of the first transistor.

[0022] Further, the first output matching network includes a harmonic control part and a fundamental wave compensation part;

[0023] The first output matching network includes a thirteenth metal microstrip line, a fourteenth metal microstrip line, a fifteenth metal microstrip line, a sixteenth metal microstrip line, a seventeenth metal microstrip line, an eighteenth metal microstrip line, a nineteenth metal microstrip line, a twentieth metal microstrip line, a DC blocking capacitor and a twenty-first metal microstrip line;

[0024] One end of the thirteenth metal microstrip line is connected to the drain of the first transistor, the other end of the thirteenth metal microstrip line is connected to one end of the fourteenth metal microstrip line and the fifteenth metal microstrip line, the other end of the fifteenth metal microstrip line is connected to one end of the sixteenth metal microstrip line, the other end of the seventeenth metal microstrip line is connected to one end of the eighteenth metal microstrip line and the nineteenth metal microstrip line, the other end of the eighteenth metal microstrip line is connected to a drain bias voltage, the other end of the nineteenth metal microstrip line is connected to one end of the twentieth metal microstrip line, the other end of the twentieth metal microstrip line is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of the twenty-first metal microstrip line, and the other end of the twenty-first metal microstrip line is connected to the third port of the output 3dB directional orthogonal coupler.

[0025] Further, the second output matching network and the third output matching network have the same structure;

[0026] The second output matching network includes a thirty-second metal microstrip line, a thirty-third metal microstrip line, a thirty-fourth metal microstrip line, a thirty-fifth metal microstrip line, a thirty-sixth metal microstrip line, a thirty-seventh metal microstrip line, a DC blocking capacitor and a thirty-eighth metal microstrip line;

[0027] One end of the thirty-second metal microstrip line is connected to the drain of the second transistor, the other end of the thirty-second metal microstrip line is connected to the thirty-third metal microstrip line and the thirty-fourth metal microstrip line, the other end of the thirty-fourth metal microstrip line is connected to one end of the thirty-fifth metal microstrip line, the other end of the thirty-fifth metal microstrip line is connected to one end of the thirty-sixth metal microstrip line and the thirty-seventh metal microstrip line, the other end of the thirty-sixth metal microstrip line is connected to the drain bias voltage, the other end of the thirty-seventh metal microstrip line is connected to the DC blocking capacitor, the other end of the DC blocking capacitor is connected to the thirty-eighth metal microstrip line, and the other end of the thirty-eighth metal microstrip line is connected to the first port of the output 3dB directional orthogonal coupler.

[0028] Furthermore, the load-modulated balanced continuous power amplifier further comprises a first DC blocking capacitor, a second DC blocking capacitor, a third DC blocking capacitor, a fourth DC blocking capacitor, a fifth DC blocking capacitor and a sixth DC blocking capacitor;

[0029] The first DC blocking capacitor is connected in series between the power divider and the first input matching network, the second DC blocking capacitor is connected in series between the input end 3dB directional orthogonal coupler and the second input matching network, and the third DC blocking capacitor is connected in series between the input end 3dB directional orthogonal coupler and the third input matching network;

[0030] The fourth DC blocking capacitor is connected in series between the twentieth metal microstrip line and the twenty-first metal microstrip line of the first output matching network, the fifth DC blocking capacitor is connected in series between the thirty-seventh metal microstrip line and the thirty-eighth metal microstrip line of the second output matching network, and the sixth DC blocking capacitor is connected in series between the thirty-seventh metal microstrip line and the thirty-eighth metal microstrip line of the third output matching network.

[0031] The second technical solution adopted by the present invention is:

[0032] A communication device, used for mobile communication or satellite communication, comprises the above-mentioned input harmonic controlled load modulation balanced continuous power amplifier.

[0033] The third technical solution adopted by the present invention is:

[0034] A design method for the above-mentioned load-modulated balanced continuous power amplifier with input harmonic control comprises the following steps:

[0035] Determine the operating frequency band of the power amplifier;

[0036] Design the output matching network of the main power amplifier and design the continuous harmonic control so that the fundamental wave and harmonic impedance of the main power amplifier meet F -1 Type of working conditions;

[0037] Design input matching network to control second harmonic and form GF together with output matching network -1 Type of working conditions;

[0038] Design a 3dB directional orthogonal coupler at the input end and a 3dB directional orthogonal coupler at the output end;

[0039] Design the output matching network of the balanced power amplifier, and use the active load modulation to modulate the 3dB directional orthogonal coupler at the output end to design the network;

[0040] Design phase compensation networks and power dividers.

[0041] The beneficial effects of the present invention are as follows: the present invention adopts input harmonic control to achieve broadband effect, adds an input harmonic control network on the basis of continuous mode, realizes simultaneous control of input and output harmonics and fundamental waves, and enables high-efficiency operation within the power fallback range within the operating frequency. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the embodiments of the present invention or the drawings of related technical solutions in the prior art are introduced below. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 It is a continuous GF in the embodiment of the present invention. -1 A schematic diagram of the structure of a load-modulated balanced continuous power amplifier with quasi-input harmonic control;

[0044] Figure 2 It is a circuit structure framework diagram of a load-modulated balanced continuous power amplifier in a saturated and back-off working state according to an embodiment of the present invention;

[0045] Figure 3 is a design flow chart of a load-modulated balanced continuous power amplifier according to an embodiment of the present invention;

[0046] Figure 4 is a curve showing a change in load impedance design space and drain efficiency with input control of a load-modulated balanced continuous power amplifier in an embodiment of the present invention;

[0047] Figure 5 is a schematic diagram of fundamental wave and harmonic wave design impedances for input and output in an embodiment of the present invention;

[0048] Figure 6 1 is a voltage and current waveform diagram at different operating frequencies in an embodiment of the present invention;

[0049] Figure 7 is a comparison diagram between simulation and test of efficiency and power of a load-modulated balanced continuous power amplifier in an embodiment of the present invention;

[0050] Figure 8 It is a sample diagram of a load-modulated balanced continuous power amplifier in an embodiment of the present invention. DETAILED DESCRIPTION

[0051] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limitations of the present invention. For the step numbers in the following embodiments, they are only provided for the convenience of explanation, and the order between the steps is not limited in any way, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0052] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0053] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0054] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0055] Terminology explanation:

[0056] IMN: Input matching network.

[0057] OMN: Output matching network.

[0058] like Figure 1 and Figure 8 As shown, this embodiment provides a load-modulated balanced continuous power amplifier with input harmonic control, comprising:

[0059] A power divider 1 is used to equally divide the RF input signal into two signals, and the two signals are respectively input into the first branch and the balance branch;

[0060] The first branch includes a first input matching network 4 including a gate bias circuit, a first transistor T1, and a first output matching network 7 including a drain bias circuit;

[0061] The balanced branch includes a phase compensation network 2, an input 3dB directional orthogonal coupler 3, a second branch and a third branch, and an output 3dB directional orthogonal coupler 10 connected in sequence;

[0062] The input end 3dB directional orthogonal coupler 3 is used to equally divide the RF input signal into two signals, and the two signals are input into the second branch and the third branch respectively;

[0063] The second branch includes: a second input matching network 5 including a gate bias circuit, a second transistor T2, and a second output matching network 8 including a drain bias circuit;

[0064] The third branch includes: a third input matching network 6 including a gate bias circuit, a third transistor T3, and a third output matching network 9 including a drain bias circuit;

[0065] The output end 3dB directional orthogonal coupler 10 is coupled and connected with the first output matching network 7, the second output matching network 8 and the third output matching network 9 to couple and output the signal. Exemplarily, the output of the first branch is connected to the third port of the output end 3dB directional orthogonal coupler, the second branch is connected to the first port of the output end 3dB directional orthogonal coupler, and the third branch is connected to the second port of the output end 3dB directional orthogonal coupler.

[0066] In some embodiments, see Figure 1 , TL1-TL38 are metal microstrip lines, C1-C6 are DC blocking capacitors, R1-R9 are isolation resistors, and T1, T2, and T3 are transistors. The specific circuit is divided into several parts from the input end to the output end: the power divider 1 divides the RF input signal equally into two signals, the phase compensation circuit 2 ensures that the upper and lower branches (i.e., the first branch and the balanced branch) are phase-aligned when coupled in the output coupler, and the input end 3dB directional orthogonal coupler 3 divides the input signal equally into two signals. The input matching networks 4, 5, and 6, which include the gate bias circuit, are composed of TL3-TL12 and isolation resistors. The structures of the three branches are the same, providing harmonic control and impedance matching functions. Transistors T1, T2, and T3 are used as power amplifiers. The output matching networks 7, 8, and 9, which include the drain bias circuit, are composed of seven sections of metal microstrip lines from TL32 to TL38, providing harmonic control and impedance matching functions. The output end 3dB directional orthogonal coupler 10 is composed of TL28-TL31, and has the same structure as the input end 3dB directional orthogonal coupler 3, and completes the signal coupling of the three branches and transmits them to 50Ω.

[0067] The load-modulated balanced continuous power amplifier with input harmonic control in this embodiment adds an input harmonic control network on the basis of output harmonic control, so as to realize harmonic control at both the input and output ends, and satisfy the fundamental matching conditions of the saturation state and the back-off state while completing the harmonic control.

[0068] As an optional implementation, the first input matching network 4, the second input matching network 5 and the third input matching network 6 have the same structure. The first input matching network 4 includes a third metal microstrip line TL3, a fourth metal microstrip line TL4, a fifth metal microstrip line TL5, a sixth metal microstrip line TL6, a seventh metal microstrip line TL7, an eighth metal microstrip line TL8, a ninth metal microstrip line TL9, a tenth metal microstrip line TL10, an eleventh metal microstrip line TL11, a twelfth metal microstrip line TL12, an isolation resistor R4 and an RC parallel stabilization circuit.

[0069] One end of the third metal microstrip line TL3 is connected to the isolation capacitor C1, the other end of the third metal microstrip line TL3 is connected to the RC parallel stabilization circuit, the other end of the RC parallel stabilization circuit is connected to one end of the fourth metal microstrip line TL4, the other end of the fourth metal microstrip line TL4 is connected to one end of the fifth metal microstrip line TL5, the other end of the fifth metal microstrip line TL5 is connected to one end of the sixth metal microstrip line TL6 and the seventh metal microstrip line TL7 on the bias circuit, the other end of the sixth metal microstrip line TL6 is connected to one end of the isolation resistor R4, and the isolation resistor The other end of R4 is connected to the gate bias voltage, the other end of the seventh metal microstrip line TL7 is connected to one end of the eighth metal microstrip line TL8, the other end of the eighth metal microstrip line TL8 is connected to one end of the ninth metal microstrip line TL9, the other end of the ninth metal microstrip line TL9 is connected to one end of the tenth metal microstrip line TL10 and the eleventh metal microstrip line TL11, the other end of the eleventh metal microstrip line TL11 is connected to the twelfth metal microstrip line TL12, and the other end of the twelfth metal microstrip line TL12 is connected to the gate of the first transistor T1.

[0070] It should be noted that the structure of the input matching network of the present invention is not limited to the above-mentioned circuit structure, and other circuit structures that can provide harmonic control and impedance matching functions are also applicable to the input matching network of the present invention.

[0071] As an optional embodiment, the first output matching network 7 includes a harmonic control part and a fundamental wave compensation part; the first output matching network 7 includes a thirteenth metal microstrip line TL13, a fourteenth metal microstrip line TL14, a fifteenth metal microstrip line TL15, a sixteenth metal microstrip line TL16, a seventeenth metal microstrip line TL17, an eighteenth metal microstrip line TL18, a nineteenth metal microstrip line TL19, a twentieth metal microstrip line TL20, a DC blocking capacitor C4 and a twenty-first metal microstrip line TL21.

[0072] One end of the thirteenth metal microstrip line TL13 is connected to the drain of the first transistor, the other end of the thirteenth metal microstrip line TL13 is connected to one end of the fourteenth metal microstrip line TL14 and the fifteenth metal microstrip line TL15, the other end of the fifteenth metal microstrip line TL15 is connected to one end of the sixteenth metal microstrip line TL16, the other end of the seventeenth metal microstrip line TL17 is connected to one end of the eighteenth metal microstrip line TL18 and the nineteenth metal microstrip line TL19, the other end of the eighteenth metal microstrip line TL18 is connected to the drain bias voltage, the other end of the nineteenth metal microstrip line TL19 is connected to one end of the twentieth metal microstrip line TL20, the other end of the twentieth metal microstrip line TL20 is connected to one end of the DC blocking capacitor C4, the other end of the DC blocking capacitor C4 is connected to one end of the twenty-first metal microstrip line TL21, and the other end of the twenty-first metal microstrip line TL21 is connected to the third port of the output 3dB directional orthogonal coupler 10.

[0073] It should be noted that the structure of the first output matching network of the present invention is not limited to the above-mentioned circuit structure, and other circuit structures that can provide harmonic control and impedance matching functions are also applicable to the first output matching network of the present invention.

[0074] As an optional implementation, the second output matching network 8 has the same structure as the third output matching network 9. The second output matching network 8 includes a thirty-second metal microstrip line TL32, a thirty-third metal microstrip line TL33, a thirty-fourth metal microstrip line TL34, a thirty-fifth metal microstrip line TL35, a thirty-sixth metal microstrip line TL36, a thirty-seventh metal microstrip line TL37, a DC blocking capacitor C5, and a thirty-eighth metal microstrip line TL38.

[0075] One end of the thirty-second metal microstrip line TL32 is connected to the drain of the second transistor T2, the other end of the thirty-second metal microstrip line TL32 is connected to the thirty-third metal microstrip line TL33 and the thirty-fourth metal microstrip line TL34, the other end of the thirty-fourth metal microstrip line TL34 is connected to one end of the thirty-fifth metal microstrip line TL35, the other end of the thirty-fifth metal microstrip line TL35 is connected to one end of the thirty-sixth metal microstrip line TL36 and the thirty-seventh metal microstrip line TL37, the other end of the thirty-sixth metal microstrip line TL36 is connected to the drain bias voltage, the other end of the thirty-seventh metal microstrip line TL37 is connected to the DC blocking capacitor C5, the other end of the DC blocking capacitor C5 is connected to the thirty-eighth metal microstrip line TL38, and the other end of the thirty-eighth metal microstrip line TL38 is connected to the first port of the output end 3dB directional orthogonal coupler 10. Similarly, the end of the third output matching network 9 is connected to the second port of the output end 3dB directional orthogonal coupler 10.

[0076] It should be noted that the structure of the second and third output matching networks of the present invention is not limited to the above-mentioned circuit structure. Other circuit structures that can provide harmonic control and impedance matching functions are also applicable to the second and third output matching networks of the present invention.

[0077] As an optional implementation, the transistor model used is CGH400010F, the dielectric substrate selected for power amplifier printing is Rogers 5880, the dielectric substrate has a thickness of 0.787 mm, a relative dielectric constant of 2.2, and a metal thickness of 0.035 mm.

[0078] The working principle of the power amplifier is described below in conjunction with the accompanying drawings and specific embodiments.

[0079] ① Working principle of load modulation balanced continuous power amplifier

[0080] A load modulated balanced continuous power amplifier (SLMBA) is usually composed of two branch amplifiers, where the main power amplifier is biased in class AB mode and the balanced power amplifier is biased in class C mode. Through active load modulation, the three amplifiers work simultaneously at high input power, and the main amplifier works independently at low input power. This working scheme enables the SLMBA to adapt to high PAPR signals and maintain high efficiency in the back-off region.

[0081] The schematic structure of the load-modulated balanced continuous power amplifier with input harmonic control proposed in this embodiment is as follows: Figure 1 As shown. In the working frequency band, power tube T1 is used as the main power amplifier, and the gate is biased at -2.6V. Power tubes T2 and T3 are in the off state at low input power and are biased at -5V. The drain voltage of power tube T1 is set to 20V, and the drain voltage of power tubes T2 and T3 is set to 36V. Figure 2 As shown in (b), when the back-off point is working, only the power tube T1 of the main power amplifier is turned on, and the balanced power amplifier is in an open-circuit state. The output impedance of the main power amplifier meets the impedance requirement of SLMBA at an operating frequency of 1.75-2.65 GHz.

[0082] Z ca,pt,bo =Z0 (1)

[0083] Z pk,pt,bo =∞ (2)

[0084] like Figure 2 As shown in (c), when working at the saturation point, the two power tubes T2 and T3 of the balanced power amplifier are both turned on, so that the three branches meet the impedance requirements of SLMBA at the operating frequency.

[0085] Z ca,pt,sat =Z0 (3)

[0086]

[0087] Where Z0 is the characteristic impedance of the 3dB directional orthogonal coupler at the output, γ p and γ c Respectively represent the impedance ratio of the balanced power amplifier and the main power amplifier, and

[0088] ② Input-output matching of load-modulated balanced continuous power amplifier with input harmonic control

[0089] Adopt harmonic control and fundamental wave compensation structure, such as Figure 2 As shown in (a), the optimal impedance of the current source plane of the T1 transistor is used as the reference point, and the parasitic network of the package and the input network together constitute IMN1. IMN1 includes the harmonic control and fundamental compensation parts. The designed input impedance curve is shown in Figure 5 As shown in (a). The expression of gate voltage is as follows:

[0090]

[0091] Where γ is the input nonlinear factor introduced, and the range of change is -0.5≤γ≤0.5. As the input voltage waveform changes, the conduction angle of the drain will also change accordingly. The change in conduction angle and the change in input nonlinear factor γ can be expressed as:

[0092]

[0093] At low power, only the power tube T1 of the main amplifier works, and the two power tubes of the balanced amplifier are in an open circuit state. -1 The working current and voltage model can be expressed as:

[0094]

[0095]

[0096] Among them, i r2 Can be obtained by F -1 The second harmonic drain current without real part is obtained as:

[0097]

[0098] Based on the current and voltage expressions of the main power amplifier, the impedance value of the main power amplifier at low power is calculated as follows, and the impedance space obtained is plotted as follows: Figure 4 As shown in (a).

[0099]

[0100]

[0101] Y ca,3rd =∞ (12)

[0102] Based on this impedance space, the first output matching network 7 of the branch where the T1 transistor is located is designed. The first output matching network is named OMN1, which includes a harmonic control part and a fundamental wave compensation part. The designed fundamental wave and harmonic wave impedance curves are shown as follows: Figure 5 As shown in (b), the matching impedance in the working frequency band is enriched in the proposed optimal load impedance space, satisfying GF -1 Impedance requirements.

[0103] At high power, the main amplifier reaches saturation and the two transistors of the balanced amplifier are turned on. The drain current and voltage of the two transistors of the balanced amplifier are expressed as:

[0104]

[0105]

[0106] Among them, θ p =arccos(ρ bo / ρ). According to the active load modulation of the load modulation balanced continuous power amplifier, the impedance Z of the balanced power amplifier pk,1st It can be expressed as:

[0107]

[0108] Based on the above theoretical analysis, the impedance space of the balanced amplifier will be affected by the impedance space of the main amplifier. The design space of the balanced amplifier is as follows: Figure 4 As shown in (b). Design the second output matching network 8 and the third output matching network 9 of the branch where the T2 and T3 transistors are located. The second output matching network and the third output matching network are named OMN2, which include a harmonic control part and a fundamental wave compensation part. The designed fundamental wave and harmonic wave impedance curves are shown in Figure 5 As shown in (c).

[0109] Based on the current and voltage expressions at high and low power obtained by analysis, the output power and efficiency can be calculated as:

[0110]

[0111]

[0112]

[0113]

[0114] Using the above expression, we can get the efficiency curve as Figure 4 As shown in (c).

[0115] The present invention is achieved by Figure 6 The voltage and current waveforms verify the design effect, taking three frequency points as an example. The gate voltage waveforms at 1.8GHz, 2.2GHz and 2.6GHz are as follows: Figure 6 As shown in (a), (b), and (c), it conforms to the characteristic of nonlinear factor -0.5≤γ<0; the waveforms of the main power amplifier drain saturation current voltage at 1.8GHz, 2.2GHz, and 2.6GHz are as follows Figure 6 As shown in (d), (e), and (f), it meets F -1 Class working mode; the waveforms of the balanced power amplifier drain saturation current and voltage at 1.8GHz, 2.2GHz and 2.6GHz are as follows Figure 6 As shown in (g), (h) and (i).

[0116] In summary, the present invention has at least the following advantages and beneficial effects compared to the prior art:

[0117] (1) The present invention is mainly based on a load-modulated balanced continuous power amplifier with input harmonic control. Compared with the continuous mode load-modulated balanced continuous power amplifier in the first technical solution, an input harmonic control network is introduced, and the improvement of the drain efficiency in the full frequency band is achieved; compared with the second technical solution, only the load modulation of the balanced branch needs to be considered, which greatly reduces the difficulty of circuit design. In view of the problem of bandwidth and efficiency compromise, the present invention proposes a load-modulated balanced continuous power amplifier with input harmonic control. In the introduction of the input and output matching network of the present invention, it is detailed how input harmonic control expands the output impedance design space and improves the output drain efficiency.

[0118] (2) The load modulation balanced continuous power amplifier based on input harmonic control of the present invention can work efficiently in the 4G frequency band. The simulation and test results are shown in Figure 7 As shown, Figure 7The following is a comparison chart of simulation and test for efficiency and power. The simulation results show that a peak output power of 45.5-47dBm is obtained in the operating frequency range of 1.75-2.75GHz. The saturated drain efficiency, 6dB drain back-off efficiency and 8dB drain back-off efficiency are 66.9%-77.4%, 51.9%-67.4% and 46%-58.8% respectively. Except for the 100MHz band reduction caused by the indium foil gasket at the grounding point of the transistor, the processing error and the instability of the strong saturation state of the main power amplifier transistor T1, the other performances of the actual processed samples are consistent with the simulation. A high saturation and high back-off efficiency operating frequency band of 1.75-2.65GHz is achieved. The saturated drain efficiency, 6dB drain back-off efficiency and 8dB drain back-off efficiency are 59%-72%, 47.3%-59.3% and 41%-54% respectively. The measured maximum output power is in the range of 43.9-45.9dBm.

[0119] (3) The present invention combines continuous mode harmonic control and proposes a novel design of a load-modulated balanced continuous power amplifier with continuous mode input and output harmonic regulation based on input harmonic control. The load-modulated balanced continuous power amplifier structure with input harmonic control proposed in the present invention can achieve high back-off and saturation efficiency in the entire frequency band within an ultra-wideband range.

[0120] Based on the above power amplifier, see Figure 3 This embodiment also provides a design method, comprising the following steps:

[0121] Determine the operating frequency band of the power amplifier;

[0122] Design the output matching network of the main power amplifier and design the continuous harmonic control so that the fundamental wave and harmonic impedance of the main power amplifier meet F -1 Type of working conditions;

[0123] Design input matching network to control second harmonic and form GF together with output matching network -1 Type of working conditions;

[0124] Design a 3dB directional orthogonal coupler at the input end and a 3dB directional orthogonal coupler at the output end;

[0125] Design the output matching network of the balanced power amplifier, and use the active load modulation to modulate the 3dB directional orthogonal coupler at the output end to design the network;

[0126] Design phase compensation networks and power dividers.

[0127] This embodiment also provides a communication device for performing mobile communication or satellite communication, comprising: Figure 1 An input harmonic controlled load modulation balanced continuous power amplifier is shown.

[0128] The communication device of this embodiment can be a device with wireless communication function such as a mobile smart terminal, a tablet computer, a smart bracelet, a smart watch, a notebook, a smart home, etc. The communication device of this embodiment includes the above-mentioned input harmonic controlled load modulation balanced continuous power amplifier, and thus has the functions and beneficial effects described in the above-mentioned embodiments.

[0129] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0130] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0131] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A load-modulated balanced continuous power amplifier, characterized in that: include: A power divider is used to equally divide the RF input signal into two signals, and the two signals are respectively input into the first branch and the balance branch; The first branch includes: a first input matching network including a gate bias circuit, a first transistor, and a first output matching network including a drain bias circuit; The balancing branch includes a phase compensation circuit, an input end 3dB directional orthogonal coupler, a second branch and a third branch connected in sequence; The input end 3dB directional orthogonal coupler is used to equally divide the input signal of the balanced branch into two signals, which are respectively input into the second branch and the third branch, and the two signals form a phase difference of 90 degrees; The second branch includes: a second input matching network including a gate bias circuit, a second transistor, and a second output matching network including a drain bias circuit; The third branch includes: a third input matching network including a gate bias circuit, a third transistor, and a third output matching network including a drain bias circuit; The output end 3dB directional orthogonal coupler is coupled with the first output matching network, the second output matching network and the third output matching network to couple and output the signal.

2. A load-modulated balanced continuous power amplifier according to claim 1, characterized in that: Three transistors are used as power amplifiers, the first transistor is used as a main power amplifier, and the second transistor and the third transistor are in a turned-off state when the input power is low; The phase compensation circuit is used to supplement the phase between the first branch and the balanced branch so that the phases of the first branch and the balanced branch are aligned at the output end 3dB directional orthogonal coupler.

3. The load-modulated balanced continuous power amplifier according to claim 1, characterized in that: The load modulated balanced continuous power amplifier has an operating frequency of 1.75-2.65 GHz. According to the classification and impedance requirements of the power amplifier, the type of harmonic regulation in the entire frequency band is continuous mode GF -1 kind.

4. The load-modulated balanced continuous power amplifier according to claim 1, characterized in that: The first input matching network constitutes IMN1, which includes a harmonic control part and a fundamental compensation part. The first output matching network constitutes OMN1, which includes a harmonic control part and a fundamental compensation part. The second output matching network and the third output matching network constitute two OMN2s.

5. The load-modulated balanced continuous power amplifier according to claim 1, characterized in that: The first input matching network, the second input matching network and the third input matching network have the same structure; The first input matching network includes a third metal microstrip line, a fourth metal microstrip line, a fifth metal microstrip line, a sixth metal microstrip line, a seventh metal microstrip line, an eighth metal microstrip line, a ninth metal microstrip line, a tenth metal microstrip line, an eleventh metal microstrip line, a twelfth metal microstrip line, an isolation resistor and an RC parallel stabilization circuit; One end of the third metal microstrip line is connected to an isolation capacitor, the other end of the third metal microstrip line is connected to one end of an RC parallel stabilization circuit, the other end of the RC parallel stabilization circuit is connected to one end of the fourth metal microstrip line, the other end of the fourth metal microstrip line is connected to one end of the fifth metal microstrip line, the other end of the fifth metal microstrip line is connected to one end of the sixth metal microstrip line and the seventh metal microstrip line on the bias circuit, the other end of the sixth metal microstrip line is connected to one end of the isolation resistor, the other end of the isolation resistor is connected to a gate bias voltage, the other end of the seventh metal microstrip line is connected to one end of the eighth metal microstrip line, the other end of the eighth metal microstrip line is connected to one end of the ninth metal microstrip line, the other end of the ninth metal microstrip line is connected to one end of the tenth metal microstrip line and the eleventh metal microstrip line, the other end of the eleventh metal microstrip line is connected to the twelfth metal microstrip line, and the other end of the twelfth metal microstrip line is connected to the gate of the first transistor.

6. The load-modulated balanced continuous power amplifier according to claim 1, characterized in that: The first output matching network includes a harmonic control part and a fundamental wave compensation part; The first output matching network includes a thirteenth metal microstrip line, a fourteenth metal microstrip line, a fifteenth metal microstrip line, a sixteenth metal microstrip line, a seventeenth metal microstrip line, an eighteenth metal microstrip line, a nineteenth metal microstrip line, a twentieth metal microstrip line, a DC blocking capacitor and a twenty-first metal microstrip line; One end of the thirteenth metal microstrip line is connected to the drain of the first transistor, the other end of the thirteenth metal microstrip line is connected to one end of the fourteenth metal microstrip line and the fifteenth metal microstrip line, the other end of the fifteenth metal microstrip line is connected to one end of the sixteenth metal microstrip line, the other end of the seventeenth metal microstrip line is connected to one end of the eighteenth metal microstrip line and the nineteenth metal microstrip line, the other end of the eighteenth metal microstrip line is connected to a drain bias voltage, the other end of the nineteenth metal microstrip line is connected to one end of the twentieth metal microstrip line, the other end of the twentieth metal microstrip line is connected to one end of the DC blocking capacitor, the other end of the DC blocking capacitor is connected to one end of the twenty-first metal microstrip line, and the other end of the twenty-first metal microstrip line is connected to the third port of the output 3dB directional orthogonal coupler.

7. The load-modulated balanced continuous power amplifier according to claim 1, characterized in that: The second output matching network and the third output matching network have the same structure; The second output matching network includes a thirty-second metal microstrip line, a thirty-third metal microstrip line, a thirty-fourth metal microstrip line, a thirty-fifth metal microstrip line, a thirty-sixth metal microstrip line, a thirty-seventh metal microstrip line, a DC blocking capacitor and a thirty-eighth metal microstrip line; One end of the thirty-second metal microstrip line is connected to the drain of the second transistor, the other end of the thirty-second metal microstrip line is connected to the thirty-third metal microstrip line and the thirty-fourth metal microstrip line, the other end of the thirty-fourth metal microstrip line is connected to one end of the thirty-fifth metal microstrip line, the other end of the thirty-fifth metal microstrip line is connected to one end of the thirty-sixth metal microstrip line and the thirty-seventh metal microstrip line, the other end of the thirty-sixth metal microstrip line is connected to the drain bias voltage, the other end of the thirty-seventh metal microstrip line is connected to the DC blocking capacitor, the other end of the DC blocking capacitor is connected to the thirty-eighth metal microstrip line, and the other end of the thirty-eighth metal microstrip line is connected to the first port of the output 3dB directional orthogonal coupler.

8. The load-modulated balanced continuous power amplifier according to claim 1, characterized in that: The load-modulated balanced continuous power amplifier further comprises a first DC blocking capacitor, a second DC blocking capacitor, a third DC blocking capacitor, a fourth DC blocking capacitor, a fifth DC blocking capacitor and a sixth DC blocking capacitor; The first DC blocking capacitor is connected in series between the power divider and the first input matching network, the second DC blocking capacitor is connected in series between the input end 3dB directional orthogonal coupler and the second input matching network, and the third DC blocking capacitor is connected in series between the input end 3dB directional orthogonal coupler and the third input matching network; The fourth DC blocking capacitor is connected in series between the twentieth metal microstrip line and the twenty-first metal microstrip line of the first output matching network, the fifth DC blocking capacitor is connected in series between the thirty-seventh metal microstrip line and the thirty-eighth metal microstrip line of the second output matching network, and the sixth DC blocking capacitor is connected in series between the thirty-seventh metal microstrip line and the thirty-eighth metal microstrip line of the third output matching network.

9. A communication device, characterized in that: Used for mobile communication or satellite communication, comprising a load-modulated balanced continuous power amplifier as described in any one of claims 1-8.

10. A design method for a load-modulated balanced continuous power amplifier according to claim 3, characterized in that: The following steps are involved: Determine the operating frequency band of the power amplifier; Design the output matching network of the main power amplifier and design the continuous harmonic control so that the fundamental wave and harmonic impedance of the main power amplifier meet F -1 Type of working conditions; Design input matching network to control second harmonic and form GF together with output matching network -1 Type of working conditions; Design a 3dB directional orthogonal coupler at the input end and a 3dB directional orthogonal coupler at the output end; Design the output matching network of the balanced power amplifier, and use the active load modulation to modulate the 3dB directional orthogonal coupler at the output end to design the network; Design phase compensation networks and power dividers.

Images