A method to improve the CPK of FPC products

By accurately measuring and controlling the increase and shrinkage ratio of the FPC circuit board, obtaining the exposure ratio range, and exposing it on this basis, the problem of difficulty in meeting the requirements of size consistency and CPK values ​​in FPC production is solved, and higher product quality and consistency are achieved.

CN119767552APending Publication Date: 2025-04-04FOREWIN FPC SUZHOU
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Patent Information

Application Number
CN202411755799.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-02
Publication Date
2025-04-04

AI Technical Summary

Technical Problem

In the FPC production process, the consistency of size and CPK value are difficult to meet the strict requirements, mainly due to the limitations of multiple variables and exposure modes in the production process.

Method used

By accurately measuring and controlling the increase and shrinkage ratio of the FPC circuit board, obtain the exposure ratio range, and perform exposure on this basis, set the increase and shrinkage limit value and tolerance value to reduce the exposure rejection rate.

Benefits of technology

It improves the size consistency and quality of FPC products, reduces exposure rejection rate, significantly improves the CPK value, and meets customers' higher requirements for product quality.

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Abstract

The present invention discloses a method for improving the CPK of FPC products, comprising the following steps: providing an FPC circuit board that expands and shrinks after processing; finding alignment points on the FPC circuit board and measuring the positions of the alignment points; inputting design data, obtaining the information to be processed of the FPC circuit board, and comparing it with the FPC circuit board; calculating the deformation amount and expansion and contraction ratio of the FPC circuit board; obtaining the exposure ratio interval range according to the expansion and contraction ratio change trend of the FPC circuit board; obtaining the alignment measurement ratio according to the FPC circuit board after expansion and contraction, and exposing within the exposure ratio interval range. The method for improving the CPK of FPC products described in the present invention can improve the consistency of the exposure pattern production of FPC products by using the intelligent interval automatic limit ratio exposure method.
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Description

Technical Field

[0001] The present invention relates to the technical field of FPC processing, and in particular to a method for improving the CPK of an FPC product. Background Art

[0002] In the production of flexible printed circuit boards (FPCs), dimensional consistency and compliance with process capability index (CPK) requirements are crucial. FPCs are widely used in consumer electronics, medical devices, and automobiles, which have strict requirements on product accuracy and reliability. However, due to the existence of multiple variables in the production process, FPCs face challenges in dimensional consistency.

[0003] The manufacturing of FPC relies on photolithography technology, among which exposure is a key technology. Common exposure modes are fixed-ratio exposure and automatic-ratio exposure. Fixed-ratio exposure has poor flexibility in dealing with FPC circuit boards that have expanded or shrunk, and there may be many FPC circuit boards that are rejected and kicked out. Automatic-ratio exposure may be limited by the accuracy of the algorithm or sensor, resulting in errors under certain conditions, thus affecting the dimensional consistency of the final product. Summary of the invention

[0004] In order to overcome the above shortcomings, the purpose of the present invention is to provide a method for improving the CPK of FPC products, thereby improving the production quality and efficiency of FPC circuit boards, reducing the rejection rate, and improving the consistency of FPC circuit boards.

[0005] Technical solution: The present invention provides a method for improving the CPK of FPC products, comprising the following steps:

[0006] Provide FPC circuit boards that expand and shrink after processing;

[0007] Find the alignment points on the FPC circuit board and measure the positions of the alignment points;

[0008] Input design data, obtain the processing information of FPC circuit board, and compare it with FPC circuit board;

[0009] Calculate the deformation and expansion / contraction ratio of the FPC circuit board;

[0010] Obtain the exposure ratio range according to the expansion and contraction ratio change trend of the FPC circuit board;

[0011] The alignment measurement ratio is obtained according to the FPC circuit board after expansion and contraction, and exposure is performed within the exposure ratio interval, and the exposure ratio interval also includes the exposure limit value.

[0012] Furthermore, the method further comprises the following steps:

[0013] Set the expansion and shrinkage limit value, set the JE value according to the hole ring tolerance, and set the PE value according to the expansion and shrinkage tolerance of the FPC circuit board. If the alignment measurement ratio exceeds the exposure ratio range but does not exceed the JE value / PE value, use the expansion and shrinkage limit value for exposure; if the alignment measurement ratio exceeds the exposure ratio range and also exceeds the JE value / PE value, the FPC circuit board will be rejected for exposure.

[0014] Furthermore, the alignment point of the FPC circuit board is a MARK point or a through hole.

[0015] Furthermore, the information to be processed includes at least the shape, size and position of the alignment point of the FPC circuit board.

[0016] Furthermore, the JE value is a deviation value between the alignment point of the FPC circuit board in the design data and the alignment point of the FPC circuit board after expansion and contraction.

[0017] Furthermore, the PE value is a tolerance value of the deformation amount of the short side, long side and diagonal line of the FPC circuit board after expansion and contraction relative to the FPC circuit board in the design data.

[0018] The beneficial effects of the present invention are:

[0019] (1) By accurately measuring and controlling the expansion and contraction ratio of the FPC circuit board, we can ensure that the processed products are more in line with the design requirements, thereby improving the consistency and quality of the products;

[0020] (2) By setting the JE value and PE value, the FPC circuit board that exceeds the exposure ratio range but does not exceed the expansion and contraction exposure limit value is exposed to reduce the rejection rate and increase the yield rate.

[0021] (3) By controlling the accuracy and consistency of exposure, the CPK value of the FPC circuit board can be significantly improved, thus meeting customers' higher requirements for product quality. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The drawings described herein are only for explanation purposes and are not intended to limit the scope of the present invention in any way. In addition, the shapes and proportional dimensions of the components in the drawings are only for illustration purposes and are used to help understand the present invention. They do not specifically limit the shapes and proportional dimensions of the components of the present invention. Under the guidance of the present invention, those skilled in the art can select various possible shapes and proportional dimensions to implement the present invention according to specific circumstances. In the drawings:

[0023] Figure 1 This is a flowchart of the method for improving the CPK of FPC products according to the present invention. DETAILED DESCRIPTION

[0024] The present invention is further explained below in conjunction with the accompanying drawings and specific embodiments.

[0025] In the description of the present invention, it should be understood that the terms "upper", "lower", "front", "back", "left", "right", "top", "bottom", "inside", "outside" and the like indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific circumstances. The following describes an implementation method of the present invention based on its overall structure.

[0026] The present invention provides a method for improving the CPK of FPC products, comprising the following steps:

[0027] Provide FPC circuit boards that expand and shrink after processing;

[0028] Find the alignment points on the FPC circuit board and measure the positions of the alignment points;

[0029] Input design data, obtain the processing information of FPC circuit board, and compare it with FPC circuit board;

[0030] Calculate the deformation and expansion / contraction ratio of the FPC circuit board;

[0031] Obtain the exposure ratio range according to the expansion and contraction ratio change trend of the FPC circuit board;

[0032] The alignment measurement ratio is obtained according to the expanded and shrunk FPC circuit board, and exposure is performed within an exposure ratio interval, wherein the exposure ratio interval also includes an exposure limit value.

[0033] like Figure 1 As shown, the present application first searches for and measures the alignment points by providing an FPC circuit board that expands and shrinks after processing to obtain the necessary position information. Then, the system compares this information with the information to be processed in the design data to ensure accuracy. On this basis, according to the material, process flow and tolerance required by the customer of the FPC circuit board, the deformation amount and expansion and contraction ratio of the FPC circuit board are calculated, and its changing trend is analyzed. This process provides a basis for the subsequent acquisition of the exposure ratio interval range. When it is determined that the alignment measurement ratio of the FPC circuit board after expansion and contraction is within the exposure ratio interval, the system performs exposure. The above steps ensure the accuracy of the FPC circuit board during the processing process, thereby effectively improving the CPK value of the FPC product and ensuring the quality and consistency of the final product.

[0034] Preferably, the exposure ratio interval also sets an exposure limit value, that is, the upper / lower interval values ​​of the exposure ratio interval also set an error tolerance interval. When exposing FPC circuit boards that exceed the exposure ratio interval range but do not exceed the exposure limit value, the rejection rate can be effectively reduced, thereby increasing the yield rate.

[0035] In this embodiment, an expansion and contraction limit value is also set, and the JE value is set according to the hole ring tolerance, and the PE value is set according to the expansion and contraction tolerance of the FPC circuit board. When the FPC circuit board is exposed, if its alignment measurement ratio exceeds the exposure ratio interval range, the exposure mode in the prior art will usually reject the exposure, but the expansion and contraction limit value set by the present invention will be further compared. When the alignment measurement ratio of the FPC circuit board does not exceed the JE / PE value, that is, it does not exceed the allowable error range, the FPC circuit board continues to be exposed.

[0036] Among them, the control of JE value is point-to-point deviation control, and the control of PE value is to confirm whether the FPC circuit board has no deformation or partial deformation. Specifically, the JE value is the deviation value between the alignment point of the FPC circuit board in the design data and the alignment point of the FPC circuit board after expansion and contraction; the PE value is the tolerance value of the deformation of the short side, long side and diagonal line of the FPC circuit board after expansion and contraction relative to the FPC circuit board in the design data.

[0037] Specifically, the JE value and the PE value can be controlled separately or simultaneously. When the JE value and the PE value are controlled simultaneously. Preferably, the range of the PE limit is between one times the JE limit and two times the JE limit. If the PE limit is less than one times the JE limit, an error will be directly reported during exposure even if the tolerance value is not exceeded; if the PE limit exceeds two times the JE limit, the point-to-point control of the FPC board will be too loose, so that the deformation of the FPC board cannot be detected, which ultimately affects the processing results.

[0038] In this embodiment, setting the MARK point or through hole as the alignment point helps to improve the accuracy of the alignment measurement. These marks usually have good recognizability and stability, and can be aligned more accurately during the processing to reduce errors. The information to be processed includes the shape, size and alignment point position of the FPC circuit board, ensuring that a complete parameter reference is available before processing. Comprehensive data support helps to better judge the processing status of the circuit board and optimize subsequent exposure and processing steps.

[0039] So far, the technical solutions of the present invention have been described in conjunction with the preferred embodiments shown in the accompanying drawings. However, it is easy for those skilled in the art to understand that the protection scope of the present invention is obviously not limited to these specific embodiments. Without departing from the principle of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the protection scope of the present invention.

Claims

1. A method for improving the CPK of FPC products, characterized in that: The following steps are involved: Provide FPC circuit boards that expand and shrink after processing; Find the alignment points on the FPC circuit board and measure the positions of the alignment points; Input design data, obtain the processing information of FPC circuit board, and compare it with FPC circuit board; Calculate the deformation and expansion / contraction ratio of the FPC circuit board; Obtain the exposure ratio range according to the expansion and contraction ratio change trend of the FPC circuit board; The alignment measurement ratio is obtained according to the FPC circuit board after expansion and contraction, and exposure is performed within the exposure ratio interval, and the exposure ratio interval also includes the exposure limit value.

2. The method for improving CPK of FPC products according to claim 1, characterized in that: The following steps are also included: Set the expansion and shrinkage limit value, set the JE value according to the hole ring tolerance, set the PE value according to the expansion and shrinkage tolerance of the FPC circuit board, if the alignment measurement ratio exceeds the exposure ratio range but does not exceed the JE value / PE value, use the expansion and shrinkage limit value for exposure; if the alignment measurement ratio exceeds the exposure ratio range and also exceeds the JE value / PE value, the FPC circuit board will be rejected for exposure.

3. The method for improving CPK of FPC products according to claim 1, characterized in that: The alignment point of the FPC circuit board is a MARK point or a through hole.

4. The method for improving CPK of FPC products according to claim 1, characterized in that: The information to be processed at least includes the shape, size and position of the alignment point of the FPC circuit board.

5. The method for improving CPK of FPC products according to claim 2, characterized in that: The JE value is the deviation value between the alignment point of the FPC circuit board in the design data and the alignment point of the FPC circuit board after expansion and contraction.

6. The method for improving CPK of FPC products according to claim 2, characterized in that: The PE value is the tolerance value of the deformation amount of the short side, long side and diagonal line of the FPC circuit board after expansion and contraction relative to the FPC circuit board in the design data.