Preparation method of diamond CMOS (Complementary Metal-Oxide-Semiconductor Transistor) phase inverter and phase inverter

Abstract

The invention provides a preparation method of a diamond CMOS (Complementary Metal-Oxide-Semiconductor Transistor) phase inverter and the phase inverter, and relates to the technical field of ultra-wide forbidden band semiconductor field effect transistor devices. Comprising the following steps: introducing a boron element and a nitrogen element into a microwave plasma chemical vapor deposition chamber through a gaseous source or a solid source so as to grow an n-type diamond epitaxy on a diamond substrate layer; hydrogen plasma is used for processing the diamond substrate with the deposited metal mask, so that a p-type active region is prepared on the second n-type diamond epitaxy, and the first n-type diamond epitaxy becomes an n-type active region; and preparing a source electrode, a drain electrode, an NMOS (N-channel Metal Oxide Semiconductor) field effect transistor gate dielectric layer, a PMOS (P-channel Metal Oxide Semiconductor) field effect transistor gate dielectric layer and a gate electrode on the p-type active region and the n-type active region. Therefore, a hydrogen terminal diamond preparation process and a diamond boron-nitrogen co-doping process are used, and a p-type active region and an n-type active region are simultaneously formed on the surface of the single-chip single crystal diamond, so that the preparation of the CMOS phase inverter is realized on the single-chip diamond.

Description

Technical Field

[0001] The present invention relates to the technical field of ultra-wide bandgap semiconductor field effect transistor devices, and in particular to a preparation method of a diamond complementary metal oxide semiconductor (CMOS) inverter and the inverter. Background Art

[0002] Diamond is a representative of ultra-wide bandgap semiconductor materials. It has high breakdown electric field, high thermal conductivity, and excellent physical and chemical stability. It is known as the ultimate semiconductor material. The ideal electron mobility of diamond material is 4500cm 2 / Vs, the ideal hole mobility is 3800cm 2 / Vs, and its saturation speed is as high as 3×10 7 cm / s, which shows that diamond devices have ideal application prospects in the field of high-speed switching devices. The excellent electrical properties of diamond materials determine the application potential of diamond devices, and the diamond active area preparation process determines the degree of application development of the material. In logic circuits, CMOS inverters are the most basic logic units. Preparing CMOS inverters on monolithic materials is one of the important research goals of ultra-wide bandgap semiconductor materials. However, for ultra-wide bandgap semiconductor diamond, it is difficult to achieve stable p-type and n-type conductance at the same time, which has become a major obstacle to the preparation of CMOS devices.

[0003] At present, for diamond n-type conductivity, traditional doping impurities are used. However, since traditional doping impurities are difficult to effectively activate in diamond, it is difficult to form effective n-type conductivity at room temperature, making the feasibility of diamond n-type conductivity low; the commonly used doping elements in the diamond doping process are doping elements P and doping elements N. Since the diamond doping process is basically implemented during the diamond growth process, it is impossible to selectively grow specific doped diamond materials, making it difficult to monolithically integrate n-type diamond field effect transistors and p-type diamond field effect transistors. Summary of the invention

[0004] The purpose of the embodiments of the present invention is to provide a method for preparing a diamond CMOS inverter and an inverter, so as to solve the problem that the feasibility of diamond n-type conductivity is low and n-type diamond field effect transistors and p-type diamond field effect transistors are difficult to integrate monolithically.

[0005] To solve the above technical problems, the embodiments of the present invention provide the following technical solutions:

[0006] A first aspect of the present invention provides a method for preparing a diamond CMOS inverter, comprising:

[0007] selecting a diamond substrate layer;

[0008] placing a diamond substrate layer into a microwave plasma chemical vapor deposition system;

[0009] Introducing a boron element precursor and a nitrogen element precursor into a microwave plasma chemical vapor deposition chamber through a gas source or a solid source to grow an n-type diamond epitaxy on a diamond substrate layer, wherein the n-type diamond epitaxy includes a first n-type diamond epitaxy and a second n-type diamond epitaxy, and the first n-type diamond epitaxy and the second n-type diamond epitaxy are adjacent to each other and located on the same horizontal plane;

[0010] depositing a metal mask on the first n-type diamond epitaxy;

[0011] Treating the diamond substrate after depositing the metal mask with hydrogen plasma to prepare a diamond hydrogen terminal on the second n-type diamond epitaxy, and using the diamond hydrogen terminal as a p-type active region, preparing the first n-type diamond epitaxy as a nitrogen-boron co-doped diamond epitaxial layer, and using the nitrogen-boron co-doped diamond epitaxial layer as an n-type active region;

[0012] A source electrode, a drain electrode, an NMOS field effect tube gate dielectric layer, a PMOS field effect tube gate dielectric layer and a gate electrode are sequentially prepared on the p-type active region and the n-type active region.

[0013] In some embodiments, before placing the diamond substrate layer into the microwave plasma chemical vapor deposition system, the method further comprises:

[0014] The diamond substrate layer was cleaned in a strong acid mixed solution, acetone, ethanol and deionized water at 200°C in sequence.

[0015] In some embodiments, a source electrode, a drain electrode, an NMOS field effect transistor gate dielectric layer, a PMOS field effect transistor gate dielectric layer and a gate electrode are sequentially prepared on the p-type active region and the n-type active region, including:

[0016] On the upper surfaces of the p-type active region and the n-type active region, source electrodes and drain electrodes arranged at intervals are prepared;

[0017] A gate dielectric layer of an NMOS field effect tube is prepared on the upper surface of the p-type active region and between the source electrode and the drain electrode;

[0018] A PMOS field effect tube gate dielectric layer is prepared on the upper surface of the n-type active region and between the drain electrode and the source electrode;

[0019] Gate electrodes are prepared on the upper surface of the gate dielectric layer of the NMOS field effect tube and the upper surface of the gate dielectric layer of the PMOS field effect tube respectively.

[0020] In some embodiments, the source electrode and the drain electrode are made of one or more of Ti, Au, and Pt.

[0021] In some embodiments, the materials of the gate dielectric layer of the NMOS field effect tube and the gate dielectric layer of the PMOS field effect tube are one or more of SiO2, Al2O3, MoO3, HfO2, HfAlO2, BaF2, and MgF2.

[0022] In some embodiments, the material of the gate electrode is one or more of Al and Au.

[0023] In some embodiments, the thickness of the nitrogen-boron co-doped diamond epitaxial layer is 50-80 nm.

[0024] In some embodiments, the thickness of the source electrode, the drain electrode, and the gate electrode are all 100-200 nm.

[0025] In some embodiments, the thickness of the gate dielectric layer of the NMOS field effect tube and the gate dielectric layer of the PMOS field effect tube are both 20-50 nm.

[0026] A second aspect of the present invention provides a diamond CMOS inverter, comprising:

[0027] Diamond substrate layer;

[0028] A nitrogen-boron co-doped diamond epitaxial layer is formed on an edge region of one side of the diamond substrate layer;

[0029] A diamond hydrogen termination layer is formed on the edge region of the other side of the diamond substrate layer, and the diamond hydrogen termination layer and the nitrogen-boron co-doped diamond epitaxial layer are arranged alternately;

[0030] Source electrodes are respectively formed on an edge region of the nitrogen-boron co-doped diamond epitaxial layer away from the diamond hydrogen termination layer, and on an edge region of the diamond hydrogen termination layer away from the nitrogen-boron co-doped diamond epitaxial layer, the source electrode on the edge region of the nitrogen-boron co-doped diamond epitaxial layer is connected to GND, and the source electrode on the edge region of the diamond hydrogen termination layer is connected to VDD;

[0031] Drain electrodes are formed on the edge region of the nitrogen-boron co-doped diamond epitaxial layer close to the diamond hydrogen terminal layer, and on the edge region of the diamond hydrogen terminal layer close to the nitrogen-boron co-doped diamond epitaxial layer, respectively, wherein the two drain electrodes are connected, and the two connected drain electrodes serve as the output end of the diamond CMOS inverter;

[0032] The gate dielectric layer of the NMOS field effect tube is formed on the upper surface of the nitrogen-boron co-doped diamond epitaxial layer and is located between the drain electrode and the source electrode;

[0033] The gate dielectric layer of the PMOS field effect tube is formed on the upper surface of the diamond hydrogen terminal layer and is located between the source electrode and the drain electrode;

[0034] The gate electrodes are formed on the upper surfaces of the gate dielectric layer of the NMOS field effect tube and the gate dielectric layer of the PMOS field effect tube, respectively, wherein the two gate electrodes are connected, and the two connected gate electrodes serve as the input terminals of the diamond CMOS inverter.

[0035] Compared with the prior art, the present invention provides a method for preparing a diamond CMOS inverter and an inverter, wherein a diamond substrate layer is selected; the diamond substrate layer is placed in a microwave plasma chemical vapor deposition system; a boron element precursor and a nitrogen element precursor are introduced into a microwave plasma chemical vapor deposition chamber through a gas source or a solid source to grow an n-type diamond epitaxy on the diamond substrate layer; a metal mask is deposited on the first n-type diamond epitaxy; the diamond substrate after the metal mask is deposited is treated with hydrogen plasma to prepare a diamond hydrogen terminal on the second n-type diamond epitaxy, and the diamond hydrogen terminal is used as a p-type active region, the first n-type diamond epitaxy is prepared as a nitrogen-boron co-doped diamond epitaxial layer, and the nitrogen-boron co-doped diamond epitaxial layer is used as an n-type active region; a source electrode, a drain electrode, an NMOS field effect tube gate dielectric layer, a PMOS field effect tube gate dielectric layer and a gate electrode are sequentially prepared on the p-type active region and the n-type active region. In this way, diamond n-type conductivity is achieved by using boron-nitrogen co-doping, and p-type active regions and n-type active regions are simultaneously formed on the surface of a monolithic single crystal diamond through a hydrogen-terminated diamond preparation process and a diamond boron-nitrogen co-doping process, thereby realizing the preparation of a diamond CMOS inverter. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] By reading the detailed description below with reference to the accompanying drawings, the above and other objects, features and advantages of the exemplary embodiments of the present invention will become readily understood. In the accompanying drawings, several embodiments of the present invention are shown in an exemplary and non-limiting manner, and the same or corresponding reference numerals represent the same or corresponding parts, wherein:

[0037] Figure 1 The flowchart of the method for preparing a diamond CMOS inverter is schematically shown;

[0038] Figure 2 The process diagram of the method for preparing a diamond CMOS inverter is schematically shown;

[0039] Figure 3 The structure diagram of the diamond CMOS inverter is schematically shown;

[0040] Figure 4 Schematically shows a top view of a diamond CMOS inverter;

[0041] Figure 5 Schematically shows the Hall test results of the n-type conductance region of the diamond CMOS inverter;

[0042] Figure 6 Schematic diagram showing the Hall test results of the p-type conductance region of the diamond CMOS inverter.

[0043] Description of reference numerals:

[0044] 1. Diamond substrate layer; 2. Nitrogen-boron co-doped diamond epitaxial layer; 3. Diamond hydrogen termination layer; 4. Source electrode; 5. Drain electrode; 6. NMOS field effect transistor gate dielectric layer; 7. PMOS field effect transistor gate dielectric layer; 8. Gate electrode. DETAILED DESCRIPTION

[0045] The following is a further detailed description of the embodiments of the present invention in conjunction with the accompanying drawings and examples. The detailed description of the following embodiments and the accompanying drawings are used to exemplarily illustrate the principles of the present invention, but cannot be used to limit the scope of the present invention. The present invention can be implemented in many different forms and is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

[0046] A method for preparing a diamond CMOS inverter in an embodiment of the present invention is described in detail below.

[0047] See also Figure 1 As shown, Figure 1 The flowchart of the method for preparing a diamond CMOS inverter is schematically shown. The embodiment of the present invention provides a method for preparing a diamond CMOS inverter, comprising:

[0048] S101, selecting a diamond substrate layer 1.

[0049] The selected diamond substrate layer 1 is an intrinsic diamond substrate grown by chemical vapor deposition (CVD).

[0050] The material of the diamond substrate layer 1 includes but is not limited to single crystal diamond, and the thickness is 100-1000 μm.

[0051] S102, placing the diamond substrate layer 1 into a microwave plasma chemical vapor deposition system.

[0052] Before placing the diamond substrate layer 1 into the microwave plasma chemical vapor deposition system, the method further comprises:

[0053] The diamond substrate layer 1 was cleaned in a strong acid mixed solution, acetone, ethanol and deionized water at 200° C. in sequence.

[0054] The strong acid mixed solution may be H2SO4:HNO3.

[0055] Figure 2The process diagram of the method for preparing a diamond CMOS inverter is schematically shown, wherein: Figure 2 (a) is a schematic diagram of the diamond substrate layer 1 after cleaning and drying, see Figure 2 As shown in (a), after the diamond substrate layer 1 is cleaned, the cleaned diamond substrate layer 1 is blown dry with a nitrogen gun for standby use.

[0056] The diamond substrate layer 1 is placed in a microwave plasma chemical vapor deposition system to be pre-treated by hydrogen plasma etching.

[0057] S103 , introducing a boron element precursor and a nitrogen element precursor into the microwave plasma chemical vapor deposition chamber through a gas source or a solid source to grow n-type diamond epitaxy on the diamond substrate layer 1 .

[0058] The n-type diamond epitaxy includes a first n-type diamond epitaxy and a second n-type diamond epitaxy, and the first n-type diamond epitaxy and the second n-type diamond epitaxy are adjacent to each other and are located on the same horizontal plane.

[0059] The first n-type diamond epitaxy is the n-type diamond epitaxy on the left, and the second n-type diamond epitaxy is the n-type diamond epitaxy on the right.

[0060] Specifically, Figure 2 (b) is a schematic diagram of growing n-type diamond epitaxy, see Figure 2 As shown in (b), a boron precursor and a nitrogen precursor are simultaneously introduced into a microwave plasma chemical vapor deposition (MPCVD) chamber through a gas source or a solid source to provide the boron source and nitrogen source required for the epitaxial growth of nitrogen-boron co-doped diamond, and the growth temperature, microwave power and growth pressure are controlled at the same time to achieve the epitaxial growth of n-type diamond.

[0061] S104 , depositing a metal mask on the first n-type diamond epitaxy.

[0062] Specifically, Figure 2 (c) is a schematic diagram of depositing a metal mask, where a metal mask is deposited on the first n-type diamond epitaxy. The metal mask protects the first n-type diamond epitaxy while exposing the diamond region that needs hydrogenation treatment, i.e., the second n-type diamond epitaxy. The metal mask can be made of Mo, W, etc., and W is used as the metal mask in this embodiment.

[0063] S105, using hydrogen plasma to treat the diamond substrate after the metal mask is deposited to prepare a diamond hydrogen terminal on the second n-type diamond epitaxy, and use the diamond hydrogen terminal as the p-type active region, the first n-type diamond epitaxy is prepared as a nitrogen-boron co-doped diamond epitaxial layer 2, and the nitrogen-boron co-doped diamond epitaxial layer 2 is used as the n-type active region.

[0064] Specifically, Figure 2 (d) is a schematic diagram of forming a p-type active region and an n-type active region. A diamond substrate on which a metal mask has been deposited is placed in an MPCVD system. The diamond substrate after the metal mask is deposited is treated with hydrogen plasma to prepare a diamond hydrogen terminal on the second n-type diamond epitaxy, i.e., the area not protected by the metal mask; and the diamond hydrogen terminal is used as the p-type active region, and the first n-type diamond epitaxy, i.e., the n-type diamond epitaxy under the area protected by the 2nd metal mask, becomes a nitrogen-boron co-doped diamond epitaxial layer 2, and the nitrogen-boron co-doped diamond epitaxial layer 2 is used as the n-type active region. Thus, a p-type active region and an n-type active region are simultaneously realized on a single piece of diamond.

[0065] Figure 2 (e) is a schematic diagram of washing away the metal mask. After step S105, the metal mask is washed away to obtain a diamond substrate having both an n-type active region and a p-type active region.

[0066] The thickness of the nitrogen-boron co-doped diamond epitaxial layer 2 is 50-80 nm.

[0067] S106, sequentially preparing a source electrode 4, a drain electrode 5, an NMOS field effect transistor gate dielectric layer 6, a PMOS field effect transistor gate dielectric layer 7 and a gate electrode 8 on the p-type active region and the n-type active region.

[0068] Specifically, a source electrode 4, a drain electrode 5, an NMOS field effect tube gate dielectric layer 6, a PMOS field effect tube gate dielectric layer 7 and a gate electrode 8 are sequentially prepared on the p-type active region and the n-type active region, including:

[0069] Step A1: On the upper surfaces of the p-type active region and the n-type active region, source electrodes 4 and drain electrodes 5 are prepared and arranged alternately.

[0070] Specifically, Figure 2 (f) is a schematic diagram of preparing the source electrode 4 and the drain electrode 5. The source electrode 4 is prepared on the edge region of the p-type active region away from the n-type active region, the source electrode 4 is prepared on the edge region of the n-type active region away from the p-type active region, and the drain electrode 5 is prepared on the adjacent region of the p-type active region and the n-type active region.

[0071] The source electrode 4 and the drain electrode 5 are made of one or more materials selected from Ti, Au, and Pt. The thickness of the source electrode 4, the drain electrode 5, and the gate electrode 8 are all 100-200 nm.

[0072] Step A2: preparing an NMOS field effect transistor gate dielectric layer 6 on the upper surface of the p-type active region and between the source electrode 4 and the drain electrode 5 .

[0073] Step A3: preparing a PMOS field effect transistor gate dielectric layer 7 on the upper surface of the n-type active region and between the drain electrode 5 and the source electrode 4 .

[0074] Figure 2 (g) is a schematic diagram of preparing the gate dielectric layer 6 of the NMOS field effect transistor and the gate dielectric layer 7 of the PMOS field effect transistor. The gate dielectric layer 6 of the NMOS field effect transistor is prepared on the upper surface of the p-type active region between the source electrode 4 and the drain electrode 5, and the gate dielectric layer 7 of the PMOS field effect transistor is prepared on the upper surface of the n-type active region between the drain electrode 5 and the source electrode 4.

[0075] The materials of the NMOS field effect tube gate dielectric layer 6 and the PMOS field effect tube gate dielectric layer 7 are one or more of SiO2, Al2O3, MoO3, HfO2, HfAlO2, BaF2, and MgF2. The thickness of the NMOS field effect tube gate dielectric layer 6 and the PMOS field effect tube gate dielectric layer 7 are both 20-50nm.

[0076] Step A4: forming gate electrodes 8 on the upper surface of the gate dielectric layer 6 of the NMOS field effect transistor and the upper surface of the gate dielectric layer 7 of the PMOS field effect transistor, respectively.

[0077] Figure 2 (h) is a schematic diagram of preparing the gate electrode 8. The gate electrode 8 is prepared on the upper surface of the gate dielectric layer 6 of the NMOS field effect transistor, and the gate electrode 8 is prepared on the upper surface of the gate dielectric layer 7 of the PMOS field effect transistor.

[0078] The material of the gate electrode 8 is one or more of Al and Au.

[0079] Based on the above Figure 1It can be seen from the implementation method that the embodiment of the present invention selects a diamond substrate layer 1; places the diamond substrate layer 1 into a microwave plasma chemical vapor deposition system; introduces a boron element precursor and a nitrogen element precursor into the microwave plasma chemical vapor deposition chamber through a gas source or a solid source to grow an n-type diamond epitaxy on the diamond substrate layer 1; deposits a metal mask on the first n-type diamond epitaxy; uses hydrogen plasma to treat the diamond substrate after the metal mask is deposited to prepare a diamond hydrogen terminal on the second n-type diamond epitaxy, and uses the diamond hydrogen terminal as a p-type active region, the first n-type diamond epitaxy is prepared as a nitrogen-boron co-doped diamond epitaxial layer 2, and the nitrogen-boron co-doped diamond epitaxial layer 2 is used as an n-type active region; and sequentially prepares a source electrode 4, a drain electrode 5, an NMOS field effect tube gate dielectric layer 6, a PMOS field effect tube gate dielectric layer 7 and a gate electrode 8 on the p-type active region and the n-type active region. In this way, diamond n-type conductivity is achieved by using boron-nitrogen co-doping, and p-type active regions and n-type active regions are simultaneously formed on the surface of a monolithic single crystal diamond through a hydrogen-terminated diamond preparation process and a diamond boron-nitrogen co-doping process, thereby realizing the preparation of a diamond CMOS inverter.

[0080] Based on the same inventive concept, as an implementation of the above-mentioned method for preparing a diamond CMOS inverter, an embodiment of the present invention further provides a diamond CMOS inverter. Figure 3 is a schematic structural diagram of a diamond CMOS inverter in an embodiment of the present invention, Figure 4 A top view of a diamond CMOS inverter is schematically shown, see Figure 3 and Figure 4 As shown, the diamond CMOS inverter may include:

[0081] Diamond substrate layer 1;

[0082] A nitrogen-boron co-doped diamond epitaxial layer 2 is formed on an edge region of one side of the diamond substrate layer 1;

[0083] A diamond hydrogen termination layer 3 is formed on the edge region of the other side of the diamond substrate layer 1, and the diamond hydrogen termination layer 3 and the nitrogen-boron co-doped diamond epitaxial layer 2 are arranged alternately;

[0084] The source electrode 4 is formed on an edge region of the nitrogen-boron co-doped diamond epitaxial layer 2 away from the diamond hydrogen terminal layer 3, and on an edge region of the diamond hydrogen terminal layer 3 away from the nitrogen-boron co-doped diamond epitaxial layer 2. The source electrode 4 on the edge region of the nitrogen-boron co-doped diamond epitaxial layer 2 is connected to GND, and the source electrode 4 on the edge region of the diamond hydrogen terminal layer 3 is connected to VDD.

[0085] The drain electrodes 5 are respectively formed on the edge region of the nitrogen-boron co-doped diamond epitaxial layer 2 close to the diamond hydrogen terminal layer 3 on the other side, and on the edge region of the diamond hydrogen terminal layer 3 close to the nitrogen-boron co-doped diamond epitaxial layer 2 on the other side, wherein the two drain electrodes 5 are connected, and the two connected drain electrodes 5 serve as the output end of the diamond CMOS inverter;

[0086] The NMOS field effect tube gate dielectric layer 6 is formed on the upper surface of the nitrogen-boron co-doped diamond epitaxial layer 2 and is located between the drain electrode 5 and the source electrode 4;

[0087] The PMOS field effect tube gate dielectric layer 7 is formed on the upper surface of the diamond hydrogen terminal layer 3 and is located between the source electrode 4 and the drain electrode 5;

[0088] The gate electrodes 8 are formed on the upper surfaces of the NMOS field effect transistor gate dielectric layer 6 and the PMOS field effect transistor gate dielectric layer 7, respectively, wherein the two gate electrodes 8 are connected, and the two connected gate electrodes 8 serve as the input terminals of the diamond CMOS inverter.

[0089] Specifically, the material of the diamond substrate layer 1 includes but is not limited to single crystal diamond, with a thickness of 100-1000 μm. The thickness of the nitrogen-boron co-doped diamond epitaxial layer 2 is 50-80 nm, and the diamond hydrogen terminal layer 3 is on the surface of the diamond, and the thickness is not counted. The material of the source electrode 4 and the drain electrode 5 includes one or more of Ti, Au, and Pt, with a thickness of 100-200 nm. For example, the material of the source electrode 4 and the drain electrode 5 is Ti / Au, with a thickness of 20 / 100 nm. The material of the NMOS field effect tube gate dielectric layer 6 and the PMOS field effect tube gate dielectric layer 7 includes one or more of SiO2, Al2O3, MoO3, HfO2, HfAlO2, BaF2, and MgF2, with a thickness of 20-50 nm. For example, the NMOS field effect tube gate dielectric layer 6 is 20 nm thick Al2O3, and the PMOS field effect tube gate dielectric layer 7 is 20 nm thick BaF2. The material of the gate electrode 8 includes one or more of Al and Au, and the thickness is 100-200 nm.

[0090] Figure 5 Schematic diagram showing the Hall test results of the n-type conductance region of the diamond CMOS inverter. Figure 5 The test results show that the majority carriers in the n-type diamond region are electrons (Ns: -7.861e+14), and the material sheet resistance is 3490ohm / sq. Figure 6 The Hall test results of the p-type conduction region of the diamond CMOS inverter are schematically shown. The test results show that the majority carriers in the n-type diamond region are holes (Ns: +1.266e+13), and the material sheet resistance is 8063 ohm / sq. Figure 5 and Figure 6The test results show that the method for preparing a diamond CMOS inverter of the present invention can realize the preparation of an n-type active region and a p-type active region with small square resistance on a diamond substrate.

[0091] Compared with the prior art, the present invention has the following beneficial effects:

[0092] 1. Effectively improve the feasibility of diamond n-type conductivity. The method for preparing a diamond CMOS inverter provided by the present invention epitaxially grows a diamond layer with n-type conductivity on the surface of a diamond substrate layer 1 by co-doping with boron and nitrogen. Compared with the traditional doping method to achieve diamond n-type conductivity, the method of the present invention has higher feasibility and lower working temperature requirements for the sample, and can form diamond materials with n-type conductivity at room temperature;

[0093] 2. Effectively reduce the difficulty of the process. The method for preparing the diamond CMOS inverter provided by the present invention can prepare p-type and n-type active regions on a single diamond substrate without using ion implantation. This effectively avoids the problem that diamond materials are difficult to selectively dope like silicon semiconductors, thereby promoting the research of diamond CMOS devices;

[0094] 3. The present invention realizes diamond n-type body conductivity by boron-nitrogen co-doping method, and based on this, combines the hydrogen-terminated diamond preparation process to prepare diamond CMOS devices. The present invention simultaneously solves two key problems: the preparation of diamond n-type conductivity and the integration of n-type field effect transistors and p-type field effect transistors on a single diamond, making a big step forward in the application of diamond CMOS devices.

[0095] Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present invention. It should be understood by those skilled in the art that the above embodiments may be modified or some technical features may be replaced by equivalents without departing from the scope and spirit of the present invention. In particular, the various technical features mentioned in the various embodiments may be combined in any manner as long as there is no structural conflict.

[0096] The above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention should be based on the protection scope of the claims.

Claims

1. A method for preparing a diamond CMOS inverter, characterized in that: include: selecting a diamond substrate layer; placing the diamond substrate layer into a microwave plasma chemical vapor deposition system; Introducing a boron element precursor and a nitrogen element precursor into a microwave plasma chemical vapor deposition chamber through a gas source or a solid source to grow an n-type diamond epitaxy on the diamond substrate layer, wherein the n-type diamond epitaxy includes a first n-type diamond epitaxy and a second n-type diamond epitaxy, wherein the first n-type diamond epitaxy and the second n-type diamond epitaxy are adjacent to each other and are located on the same horizontal plane; depositing a metal mask on the first n-type diamond epitaxy; Treating the diamond substrate after depositing the metal mask with hydrogen plasma to prepare diamond hydrogen terminations on the second n-type diamond epitaxy, and using the diamond hydrogen terminations as p-type active regions, preparing the first n-type diamond epitaxy as a nitrogen-boron co-doped diamond epitaxial layer, and using the nitrogen-boron co-doped diamond epitaxial layer as an n-type active region; A source electrode, a drain electrode, an NMOS field effect tube gate dielectric layer, a PMOS field effect tube gate dielectric layer and a gate electrode are sequentially prepared on the p-type active region and the n-type active region.

2. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: Before placing the diamond substrate layer into a microwave plasma chemical vapor deposition system, the method further comprises: The diamond substrate layer was cleaned in a strong acid mixed solution, acetone, ethanol and deionized water at 200° C. in sequence.

3. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: The method of sequentially preparing a source electrode, a drain electrode, an NMOS field effect tube gate dielectric layer, a PMOS field effect tube gate dielectric layer and a gate electrode on the p-type active region and the n-type active region comprises: On the upper surfaces of the p-type active region and the n-type active region, preparing the source electrode and the drain electrode arranged at intervals; Preparing the NMOS field effect transistor gate dielectric layer on the upper surface of the p-type active region and between the source electrode and the drain electrode; Preparing the gate dielectric layer of the PMOS field effect tube on the upper surface of the n-type active region and between the drain electrode and the source electrode; The gate electrodes are respectively prepared on the upper surface of the gate dielectric layer of the NMOS field effect tube and the upper surface of the gate dielectric layer of the PMOS field effect tube.

4. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: The source electrode and the drain electrode are made of one or more materials selected from the group consisting of Ti, Au, and Pt.

5. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: The materials of the NMOS field effect tube gate dielectric layer and the PMOS field effect tube gate dielectric layer are one or more of SiO2, Al2O3, MoO3, HfO2, HfAlO2, BaF2, and MgF2.

6. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: The material of the gate electrode is one or more of Al and Au.

7. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: The thickness of the nitrogen-boron co-doped diamond epitaxial layer is 50-80 nm.

8. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: The thickness of the source electrode, the drain electrode and the gate electrode are all 100-200 nm.

9. The method for preparing a diamond CMOS inverter according to claim 1, characterized in that: The thickness of the NMOS field effect tube gate dielectric layer and the PMOS field effect tube gate dielectric layer are both 20-50 nm.

10. A diamond CMOS inverter, characterized in that: A method for preparing a diamond CMOS inverter according to any one of claims 1 to 9, comprising: a diamond substrate layer; A nitrogen-boron co-doped diamond epitaxial layer is formed on an edge region of one side of the diamond substrate layer; A diamond hydrogen termination layer is formed on the edge region of the other side of the diamond substrate layer, and the diamond hydrogen termination layer and the nitrogen-boron co-doped diamond epitaxial layer are arranged alternately; Source electrodes are respectively formed on an edge region of the nitrogen-boron co-doped diamond epitaxial layer away from the diamond hydrogen termination layer, and on an edge region of the diamond hydrogen termination layer away from the nitrogen-boron co-doped diamond epitaxial layer, the source electrode on the edge region of the nitrogen-boron co-doped diamond epitaxial layer is connected to GND, and the source electrode on the edge region of the diamond hydrogen termination layer is connected to VDD; Drain electrodes are respectively formed on the edge region of the nitrogen-boron co-doped diamond epitaxial layer close to the diamond hydrogen terminal layer on the other side, and on the edge region of the diamond hydrogen terminal layer close to the nitrogen-boron co-doped diamond epitaxial layer on the other side, wherein the two drain electrodes are connected, and the two connected drain electrodes serve as the output end of the diamond CMOS inverter; An NMOS field effect tube gate dielectric layer is formed on the upper surface of the nitrogen-boron co-doped diamond epitaxial layer and is located between the drain electrode and the source electrode; A PMOS field effect tube gate dielectric layer is formed on the upper surface of the diamond hydrogen terminal layer and is located between the source electrode and the drain electrode; The gate electrodes are respectively formed on the upper surfaces of the gate dielectric layer of the NMOS field effect tube and the gate dielectric layer of the PMOS field effect tube, wherein the two gate electrodes are connected, and the two connected gate electrodes serve as the input terminals of the diamond CMOS inverter.

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