Heterojunction solar cell and manufacturing method thereof

Abstract

The invention provides a heterojunction solar cell and a manufacturing method thereof, and the side surface of a monocrystalline silicon substrate of the heterojunction solar cell is provided with an amorphous layer. According to the invention, electric leakage caused by direct contact between the first transparent conductive film layer and the monocrystalline silicon substrate and between the second transparent conductive film layer and the monocrystalline silicon substrate can be avoided, the risk that the edge of the monocrystalline silicon substrate is damaged is reduced, and the passivation effect of the side surface of the monocrystalline silicon substrate can be effectively improved due to the fact that the side surface of the monocrystalline silicon substrate is sequentially covered with the first intrinsic side edge part and the second intrinsic side edge part.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic manufacturing, and in particular to a heterojunction solar cell and a manufacturing method thereof. Background Art

[0002] Heterojunction solar cells are currently a more efficient crystalline silicon solar cell. They combine the characteristics of crystalline silicon cells and silicon-based thin-film cells, and have the advantages of short manufacturing process, low process temperature, high conversion efficiency and high power generation. Figure 1 The figure shows a schematic diagram of the structure of a heterojunction solar cell involved in the prior art, which includes, from top to bottom, a first collector 51', a first transparent conductive film layer 41', a first doped amorphous layer 31', a first intrinsic amorphous layer 21', a single crystal silicon substrate 10', a second intrinsic amorphous layer 22', a second doped amorphous layer 32', a second transparent conductive film layer 42', and a second collector 52'.

[0003] In the specific manufacturing process of heterojunction solar cells in the prior art, the PECVD process is usually used to complete the production of a total of four amorphous layers, namely the first intrinsic amorphous layer 21', the second intrinsic amorphous layer 22', the first doped amorphous layer 31', and the second doped amorphous layer 32' on both surfaces of the single-crystal silicon substrate 10'; then the PVD process is used to produce the first transparent conductive film layer 41' and the second transparent conductive film layer 42'; finally, the first collector 51' and the second collector 52' ​​are produced through the screen printing process.

[0004] In the specific production process of the four amorphous layers, the existing technologies all require the arrangement of metal masks so that the first intrinsic amorphous layer 21', the second intrinsic amorphous layer 22', the first doped amorphous layer 31' and the second doped amorphous layer 32' are only formed on the two main surfaces of the single crystal silicon substrate 10', that is, the first intrinsic amorphous layer 21', the second intrinsic amorphous layer 22', the first doped amorphous layer 31' and the second doped amorphous layer 32' do not extend to the side of the single crystal silicon substrate 10'.

[0005] However, the heterojunction solar cells involved in the prior art have the following problems: there is no amorphous layer blocking the side of the single crystal silicon substrate 10', and the first transparent conductive film layer 41' and the second transparent conductive film layer 42' are easy to form direct contact with the single crystal silicon substrate 10', which poses a risk of leakage; the direct exposure of the edge of the single crystal silicon substrate 10' increases the risk of edge damage; the edge area of ​​the single crystal silicon substrate 10' is not sufficiently passivated.

[0006] In view of this, it is necessary to provide an improved technical solution to solve the above problems. Summary of the invention

[0007] The present invention aims to solve at least one of the technical problems existing in the prior art. To achieve the above-mentioned purpose of the invention, the present invention provides a heterojunction solar cell, and its specific design is as follows.

[0008] A heterojunction solar cell, comprising:

[0009] An N-type single crystal silicon substrate having a first main surface and a second main surface disposed opposite to each other, and a side surface connecting the first main surface and the second main surface, wherein the second main surface is a light-receiving surface and the first main surface is a light-receiving surface;

[0010] A first intrinsic amorphous layer, a first doped amorphous layer, a first transparent conductive film layer, and a first collector are sequentially arranged on the side where the first main surface is located; the first intrinsic amorphous layer has a first intrinsic side edge portion extending toward the second main surface to cover all of the side surfaces; the first doped amorphous layer is a p-type doped amorphous layer, and the first doped amorphous layer has a first doped side edge portion;

[0011] A second intrinsic amorphous layer, a second doped amorphous layer, a second transparent conductive film layer, and a second collector are sequentially arranged on the side where the second main surface is located, the second intrinsic amorphous layer has a second intrinsic side portion extending toward the first intrinsic amorphous layer to cover the first intrinsic side portion, and the sum of the thickness of the first intrinsic side portion and the part of the second intrinsic side portion covering the first intrinsic side portion is not less than 1nm; the second doped amorphous layer is an n-type doped amorphous layer, and the second doped amorphous layer has a second doped side portion, the second doped side portion is located outside the side portion of the second intrinsic layer, and the first doped side portion is located outside the second doped side portion.

[0012] In one embodiment, the sum of the thicknesses of the second intrinsic amorphous layer and the second doped amorphous layer is less than or equal to the sum of the thicknesses of the first intrinsic amorphous layer and the first doped amorphous layer.

[0013] In one embodiment, the sum of the thicknesses of the second intrinsic amorphous layer and the second doped amorphous layer is 6-21 nm, and / or the sum of the thicknesses of the first intrinsic amorphous layer and the first doped amorphous layer is 6-30 nm.

[0014] In one embodiment, the thickness of the second intrinsic amorphous layer is less than or equal to the thickness of the first intrinsic amorphous layer.

[0015] In one embodiment, the thickness of the second intrinsic amorphous layer is 3-6 nm, and / or the thickness of the first intrinsic amorphous layer is 3-10 nm.

[0016] In one embodiment, the thickness of the second doped amorphous layer is less than or equal to the thickness of the first doped amorphous layer.

[0017] In one embodiment, the thickness of the second doped amorphous layer is 3-15 nm, and / or the thickness of the first doped amorphous layer is 3-20 nm.

[0018] In one embodiment, the oxygen content of the second doped amorphous layer is greater than or equal to the oxygen content of the first doped amorphous layer.

[0019] In one embodiment, in the direction from the backlight surface to the light-receiving surface, the second doped amorphous layer sequentially includes a first doped amorphous silicon film and a doped amorphous silicon oxide film, a doped amorphous silicon carbide film or a doped amorphous silicon carbide / doped amorphous silicon oxide composite film located on the surface of the first doped amorphous silicon film.

[0020] In one embodiment, the second doped amorphous layer further includes a second doped amorphous silicon film located on the surface of the doped amorphous silicon oxide film, the doped amorphous silicon carbide film or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film.

[0021] In one embodiment, in the direction from the light-receiving surface to the backlight surface, the first doped amorphous layer sequentially includes a third doped amorphous silicon film and a fourth doped amorphous silicon film located on the surface of the third doped amorphous silicon film and having a doping concentration greater than that of the third doped amorphous silicon film.

[0022] In one embodiment, the thickness of the first intrinsic side edge portion covering the entire side surface, and / or the thickness of the second intrinsic side edge portion covering a portion of the area on which the side surface is connected to the second main surface is not less than 1 nm.

[0023] In one embodiment, the first intrinsic amorphous layer and the second intrinsic amorphous layer respectively include at least two stacked intrinsic films, and each of the intrinsic films is composed of one of intrinsic amorphous silicon, intrinsic amorphous silicon oxide, and intrinsic amorphous silicon carbide.

[0024] In one embodiment, the intrinsic film layer farthest from the single crystal silicon substrate in the first intrinsic amorphous layer and / or the second intrinsic amorphous layer is an intrinsic amorphous silicon oxide.

[0025] In one embodiment, the hydrogen content of the intrinsic film close to the single crystal silicon substrate in the first intrinsic amorphous layer is higher than the hydrogen content of the intrinsic film far away from the single crystal silicon substrate, the hydrogen content of the intrinsic film close to the single crystal silicon substrate in the second intrinsic amorphous layer is higher than the hydrogen content of the intrinsic film far away from the single crystal silicon substrate, and / or the proportion of bonded hydrogen atoms in the first intrinsic amorphous layer and the second intrinsic amorphous layer is 15%-25% of the total hydrogen atoms.

[0026] In one embodiment, the first intrinsic amorphous layer and the second intrinsic amorphous layer respectively include three stacked intrinsic films, and in the direction away from the single crystal silicon substrate, the hydrogen content ranges of the three intrinsic films of the first intrinsic amorphous layer and the second intrinsic amorphous layer are respectively 20%-40%, 10%-25%, and 8%-20%.

[0027] In one embodiment, the second transparent conductive film layer includes a first TCO film attached to the surface of the n-type doped amorphous layer and a second TCO film attached to the surface of the first TCO film, and the mass proportion of the doped oxide in the first TCO film is greater than the mass proportion of the doped oxide in the second TCO film.

[0028] In one embodiment, the mass proportion of the doped oxide in the first TCO film is 5%-20%, and / or the mass proportion of the doped oxide in the second TCO film is 0.5%-5%.

[0029] In one embodiment, the second transparent conductive film layer further includes a third TCO film attached to the surface of the second TCO film, and the mass proportion of the doped oxide in the third TCO film is greater than the mass proportion of the doped oxide in the second TCO film.

[0030] In one embodiment, the first transparent conductive film layer includes a fourth TCO film attached to the surface of the p-type doped amorphous layer and a fifth TCO film attached to the surface of the fourth TCO film, and the mass proportion of the doped oxide in the fourth TCO film is less than the mass proportion of the doped oxide in the fifth TCO film.

[0031] In one embodiment, the thickness of the second transparent conductive film layer is less than or equal to the thickness of the first transparent conductive film layer.

[0032] In one embodiment, one of the first transparent conductive film layer and the second transparent conductive film layer extends outside the side surface to cover the doped side edge portion.

[0033] A method for manufacturing a heterojunction solar cell comprises the following steps in sequence:

[0034] Providing an N-type single crystal silicon substrate, wherein the N-type single crystal silicon substrate has a first main surface, a second main surface and a side surface, wherein the first main surface is a backlight surface, and the second main surface is a light-receiving surface;

[0035] A first intrinsic amorphous layer manufacturing step, depositing a first intrinsic amorphous layer on the side where the first main surface is located, wherein the periphery of the first intrinsic amorphous layer extends to cover the side surface;

[0036] A second intrinsic amorphous layer manufacturing step, depositing a second intrinsic amorphous layer on the side where the second main surface is located, wherein the periphery of the second intrinsic amorphous layer extends to cover the first intrinsic side edge portion;

[0037] a second doped amorphous layer manufacturing step, forming a second doped amorphous layer on a surface of the second intrinsic amorphous layer away from the silicon substrate, wherein the second doped amorphous layer is formed with a second doped side edge portion extending outside the side surface;

[0038] a first doped amorphous layer manufacturing step, forming a first doped amorphous layer on a surface of the first intrinsic amorphous layer away from the silicon substrate, wherein the first doped amorphous layer is formed with a first doped side edge portion extending outside the side surface;

[0039] A transparent conductive film layer manufacturing step, depositing a first transparent conductive film layer and a second transparent conductive film layer on the side where the first main surface is located and on the side where the second main surface is located respectively;

[0040] The collector manufacturing step forms a first collector on a surface of the first transparent conductive film layer that is away from the first doped amorphous layer, and forms a second collector on a surface of the second transparent conductive film layer that is away from the second doped amorphous layer.

[0041] In one embodiment, in the first intrinsic amorphous layer manufacturing step, the single crystal silicon substrate is placed on a first carrier with the first main surface facing upward, the first carrier having a first groove for placing the single crystal silicon substrate, and the first intrinsic amorphous layer is formed by deposition from the upper side of the first carrier on the side where the first main surface of the single crystal silicon substrate is located, wherein the first intrinsic side edge portion covers all the side surfaces;

[0042] A second intrinsic amorphous layer manufacturing step, wherein the single crystal silicon substrate after the first intrinsic amorphous layer manufacturing step is placed with the second main surface facing upward on a second carrier, wherein the second carrier has a second groove for placing the single crystal silicon substrate, and the second intrinsic amorphous layer is deposited from the upper side of the second carrier on the side where the second main surface of the single crystal silicon substrate is located to form the second intrinsic amorphous layer;

[0043] a second doped amorphous layer manufacturing step, placing the single crystal silicon substrate after the second intrinsic amorphous layer manufacturing step with the second main surface facing upward on a fourth carrier, the fourth carrier having a fourth groove for placing the single crystal silicon substrate, and forming the second doped amorphous layer on the second intrinsic amorphous layer from the upper side of the fourth carrier;

[0044] A first doped amorphous layer manufacturing step, placing the single crystal silicon substrate after the second doped amorphous layer manufacturing step with the first main surface facing upward on a third carrier, the third carrier having a third groove for placing the single crystal silicon substrate, and forming the first doped amorphous layer on the first intrinsic amorphous layer from the upper side of the third carrier;

[0045] a transparent conductive film layer manufacturing step, depositing the first transparent conductive film layer and the second transparent conductive film layer on the first main surface side and the second main surface side of the single crystal silicon substrate on which the first doped amorphous layer manufacturing step is completed respectively;

[0046] a collector electrode manufacturing step, forming a first collector electrode on a surface of the first transparent conductive film layer facing away from the first doped amorphous layer, and forming a second collector electrode on a surface of the second transparent conductive film layer facing away from the second doped amorphous layer;

[0047] The difference between the side lengths of the first groove, the second groove, the third groove and the fourth groove and the corresponding side lengths of the single crystal silicon substrate is in the range of 2-4 mm.

[0048] The beneficial effects of the present invention are as follows: based on the heterojunction solar cell provided by the present invention, leakage caused by direct contact between the first transparent conductive film layer, the second transparent conductive film layer and the single crystal silicon substrate can be avoided, thereby reducing the risk of damage to the edge of the single crystal silicon substrate; and the side surface of the single crystal silicon substrate is covered by the first intrinsic side edge portion and the second intrinsic side edge portion, which can also effectively improve the passivation effect of the side surface of the single crystal silicon substrate.

[0049] In the heterojunction solar cell of the present invention, the p-type doped amorphous layer is located on the backlight side of the N-type silicon substrate, and the N-type doped amorphous layer is located on the light-receiving side of the N-type silicon substrate. On the one hand, the band gap of the N-type doped amorphous layer is wider than that of the P-type doped amorphous layer, which can effectively reduce its absorption of light and improve the Isc and efficiency of the battery. On the other hand, the n-type doped amorphous layer is consistent with the doping type of the n-type silicon wafer, so the transparent conductive film layer located on the light-receiving side is in parallel with the lateral resistance of the n-type silicon wafer, which can optimize the second transparent conductive film layer, appropriately increase the square resistance of the TCO film, thereby improving its light transmittance, and improving the Isc and efficiency of the battery. The optimization method includes but is not limited to: only including a first TCO film attached to the surface of the n-type doped amorphous layer and a second TCO film attached to the surface of the first TCO film, and the mass proportion of the doped oxide in the first TCO film is greater than the mass proportion of the doped oxide in the second TCO film.

[0050] In addition, the side of the silicon substrate is covered by the first intrinsic side portion and the second intrinsic side portion, and the sum of the thicknesses of the two is not less than 1nm, which ensures the passivation effect of the side, effectively avoids the influence of phosphorus and boron elements in the doping gas on the interface passivation, and can also reduce the influence of external water vapor, ions, etc. on the battery efficiency, and improve the battery reliability. In addition, when forming the n-type doped amorphous layer and the p-type doped amorphous layer, phosphorus and boron can be effectively prevented from diffusing into the interior.

[0051] In addition, the P-type doping layer is located outside the N-type doping layer, which can prevent the smaller boron from diffusing into the internal silicon substrate during the deposition process. BRIEF DESCRIPTION OF THE DRAWINGS

[0052] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying creative work.

[0053] Figure 1 The figure shows a schematic diagram of the structure of a heterojunction solar cell in the prior art;

[0054] Figure 2 The figure shows a schematic diagram of the first embodiment of the heterojunction solar cell of the present invention;

[0055] Figure 3 Shown Figure 2 A partial schematic diagram of a first specific implementation mode of a heterojunction solar cell with the implementation structure shown;

[0056] Figure 4 Shown Figure 2 A partial schematic diagram of a second specific implementation of a heterojunction solar cell of the implementation structure shown;

[0057] Figure 5 Shown Figure 2 A partial schematic diagram of a third specific implementation mode of a heterojunction solar cell of the implementation structure shown;

[0058] Figure 6 Shown Figure 2 A partial schematic diagram of a fourth specific implementation mode of a heterojunction solar cell of the implementation structure shown;

[0059] Figure 7 Shown Figure 2 A partial schematic diagram of a fifth specific implementation manner of a heterojunction solar cell of the implementation structure shown;

[0060] Figure 8 The figure shows a second embodiment of the heterojunction solar cell structure of the present invention;

[0061] Fig. 9 Shown is a schematic diagram of the third embodiment of the heterojunction solar cell of the present invention;

[0062] Fig.10 Shown is a schematic diagram of a fourth embodiment of a heterojunction solar cell of the present invention;

[0063] Fig.11 FIG. 5 is a schematic diagram showing a fifth embodiment of the heterojunction solar cell of the present invention;

[0064] Fig.12 The figure shows a schematic diagram of the state of manufacturing the first intrinsic amorphous layer in the heterojunction solar cell of the present invention;

[0065] Fig.13 The figure shows a schematic diagram of the state of manufacturing the second intrinsic amorphous layer in the heterojunction solar cell of the present invention;

[0066] Fig.14 The figure shows a schematic diagram of the state of manufacturing the first doped amorphous layer in the heterojunction solar cell of the present invention;

[0067] Fig.15 The figure shows a schematic diagram of the state of manufacturing the second doped amorphous layer in the heterojunction solar cell of the present invention;

[0068] Fig.16 Shown is a schematic diagram of the state of manufacturing the transparent conductive film layer in the heterojunction solar cell of the present invention. DETAILED DESCRIPTION

[0069] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0070] refer to Figure 2 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 As shown, the heterojunction solar cell involved in the present invention includes a single crystal silicon substrate 10, a first intrinsic amorphous layer 21, a first doped amorphous layer 31, a first transparent conductive film layer 41, a first collector electrode 51, a second intrinsic amorphous layer 22, a second doped amorphous layer 32, a second transparent conductive film layer 42, and a second collector electrode 52. The first intrinsic amorphous layer 21, the first doped amorphous layer 31, the first transparent conductive film layer 41, and the first collector electrode 51 are sequentially arranged on one side of the first main surface, and the second intrinsic amorphous layer 22, the second doped amorphous layer 32, the second transparent conductive film layer 42, and the second collector electrode 52 are sequentially arranged on one side of the second main surface.

[0071] The single crystal silicon substrate 10 involved in the present invention has a first main surface and a second main surface disposed opposite to each other, and a side surface connecting the first main surface and the second main surface, wherein one of the first main surface and the second main surface is a light-receiving surface, and the other is a backlight surface.

[0072] refer to Figure 2 , Figure 8 , Fig. 9 , Fig.10 , Fig.11 As shown in, in the present invention, the first intrinsic amorphous layer 21 has a first intrinsic side portion 210 extending toward the second intrinsic amorphous layer 22, and the periphery of the first intrinsic side portion 210 extends to cover all side surfaces of the single crystal silicon substrate 10; that is, the first intrinsic amorphous layer 21 has an area covering all side surfaces in addition to the area covering the first main surface. The second intrinsic amorphous layer 22 has a second intrinsic side portion 220 extending toward the first intrinsic amorphous layer 21 to cover the first intrinsic side portion 210; that is, the second intrinsic amorphous layer 22 has a portion outside the first intrinsic side portion 210 in addition to the area covering the second main surface.

[0073] The first doped amorphous layer 31 and the second doped amorphous layer 32 involved in the present invention both have doped side edges extending outside the side surfaces and connected to each other.

[0074] Based on the heterojunction solar cell provided by the present invention, it is possible to avoid leakage caused by direct contact between the first transparent conductive film layer 41, the second transparent conductive film layer 42 and the single crystal silicon substrate 10, and reduce the risk of damage to the edge of the single crystal silicon substrate 10. In the present invention, the side of the single crystal silicon substrate 10 is covered by the first intrinsic side edge portion 210 and the second intrinsic side edge portion 220, which can effectively improve the passivation effect of the side of the single crystal silicon substrate 10, so that the heterojunction solar cell has a higher photoelectric conversion efficiency than the cell whose edge is not passivated in the prior art.

[0075] In the specific implementation of the present invention, the doped side portions of the first doped amorphous layer 31 and the second doped amorphous layer 32 may have portions that are directly formed on the outer surface of the second intrinsic side portion 220 and are connected to each other; but preferably, the doped side portions of the first doped amorphous layer 31 and the doped side portions of the second doped amorphous layer 32 are stacked outside the second intrinsic side portion 220 to form a connection.

[0076] refer to Figure 2 In the embodiment structure shown, the first doped amorphous layer 31 has, in addition to a region covering the first intrinsic amorphous layer 21 and corresponding to the first main surface, a region covering the outside of the second intrinsic side portion 220 and corresponding to the side surface, that is, the first doped amorphous layer 31 has a first doped side portion 310 covering the outer surface of the second intrinsic side portion 220.

[0077] Further Figure 2As shown in , the second doped amorphous layer 32 has not only a region covering the second intrinsic amorphous layer 22 and corresponding to the second main surface, but also a region covering the outside of the first doped side edge portion 310, that is, the second doped amorphous layer 32 has a second doped side edge portion 320 covering the outer surface of the second intrinsic side edge portion 220. In this specific embodiment, the first doped side edge portion 310 and the second doped side edge portion 320 are sequentially stacked and arranged outside the second intrinsic side edge portion 220.

[0078] In some other embodiments of the present invention, reference Figure 8 As shown, Figure 2 The implementation structure shown is different. The second doped side portion 320 involved in the implementation structure covers the outer surface of the second intrinsic side portion 220, and the first doped side portion 310 covers the outer surface of the second doped side portion 320, that is, the second doped side portion 320 and the first doped side portion 310 are stacked in sequence outside the second intrinsic side portion 220.

[0079] In some other implementation structures of the present invention (not shown in the figure), the first doped side edge portion 310 and the second doped side edge portion 320 can also be formed directly on the outer surface of the second intrinsic side edge portion 220 and connected to each other at the edges.

[0080] In the present invention, the doping type of the second doped amorphous layer 32 is opposite to the doping type of the first doped amorphous layer 31. In a specific implementation, the first doped amorphous layer 31 is one of an N-type doped amorphous layer and a P-type doped amorphous layer, and the second doped amorphous layer 32 is the other of the N-type doped amorphous layer and the P-type doped amorphous layer. Specifically, the N-type doped amorphous layer is formed by phosphorus doping, and the P-type doped amorphous layer is formed by boron doping.

[0081] Furthermore, the first transparent conductive film layer 41 involved in the present invention is located on the side surface of the first doped amorphous layer 31 away from the first intrinsic amorphous layer 21; the first collector 51 is located on the side surface of the first transparent conductive film layer 41 away from the first doped amorphous layer 31; the second transparent conductive film layer 42 is located on the side surface of the second doped amorphous layer 32 away from the second intrinsic amorphous layer 22; the second collector 52 is located on the side surface of the second transparent conductive film layer 42 away from the second doped amorphous layer 32.

[0082] In the present invention Figure 2 , Figure 8 In the embodiment shown, the first main surface is the light receiving surface, and the second main surface is the backlight surface. Fig. 9 , Fig.10 As shown, Figure 2 , Figure 8 The embodiments shown are different in that the second main surface involved in the two embodiments is the light-receiving surface, and the first main surface is the backlight surface.

[0083] In the present invention, the sum of the thicknesses of the first intrinsic amorphous layer 21, the first doped amorphous layer 31, the second intrinsic amorphous layer 22, and the second doped amorphous layer 32 located on the light-receiving surface is less than or equal to the sum of the thicknesses of the first intrinsic amorphous layer 21, the first doped amorphous layer 31, the second intrinsic amorphous layer 22, and the second doped amorphous layer 32 located on the light-receiving surface is preferably less than the sum of the thicknesses of the first intrinsic amorphous layer 21, the first doped amorphous layer 31, the second intrinsic amorphous layer 22, and the second doped amorphous layer 32 located on the light-receiving surface.

[0084] For heterojunction solar cells, the light absorption effect of the light-receiving surface has a much greater influence on the photoelectric conversion efficiency of the cell than the light absorption effect of the backlight surface. Since the sum of the thicknesses of the first intrinsic amorphous layer 21, the first doped amorphous layer 31, the second intrinsic amorphous layer 22 and the second doped amorphous layer 32 located on the light-receiving surface is less than or equal to the sum of the thicknesses of the two located on the backlight surface, the loss of sunlight when entering the light-receiving surface can be effectively reduced, the short-circuit current of the heterojunction solar cell can be increased, and the heterojunction solar cell has a better photoelectric conversion efficiency.

[0085] for Figure 2 , Figure 8 For the embodiment structure shown, the two of the first intrinsic amorphous layer 21, the first doped amorphous layer 31, the second intrinsic amorphous layer 22 and the second doped amorphous layer 32 located on the light-receiving side are the first intrinsic amorphous layer 21 and the first doped amorphous layer 31, and the two located on the backlight side are the second intrinsic amorphous layer 22 and the second doped amorphous layer 32, wherein the sum of the thicknesses of the first intrinsic amorphous layer 21 and the first doped amorphous layer 31 is less than or equal to the sum of the thicknesses of the second intrinsic amorphous layer 22 and the second doped amorphous layer 32.

[0086] More specifically, in Figure 2 , Figure 8 In the illustrated embodiment, the sum of the thicknesses of the first intrinsic amorphous layer 21 and the first doped amorphous layer 31 is 6-21 nm, and the sum of the thicknesses of the second intrinsic amorphous layer 22 and the second doped amorphous layer 32 is 6-30 nm.

[0087] exist Figure 2 , Figure 8 In the illustrated embodiment, the thickness of the first intrinsic amorphous layer 21 is less than or equal to the thickness of the second intrinsic amorphous layer 22. Preferably, the thickness of the first intrinsic amorphous layer 21 is less than the thickness of the second intrinsic amorphous layer 22. In a specific embodiment, the thickness of the first intrinsic amorphous layer 21 is 3-6 nm, and the thickness of the second intrinsic amorphous layer 22 is 3-10 nm.

[0088] Further, the thickness of the first doped amorphous layer 31 is less than or equal to the thickness of the second doped amorphous layer 32. Preferably, the thickness of the first doped amorphous layer 31 is less than the thickness of the second doped amorphous layer 32. In a specific implementation, the thickness of the first doped amorphous layer 31 is 3-15 nm, and the thickness of the second doped amorphous layer 32 is 3-20 nm.

[0089] In the present invention, in order to ensure that the side of the single crystal silicon substrate 10 has a better passivation effect, in the specific implementation process, the sum of the thickness of the first intrinsic side portion 21 and the second intrinsic side portion 22 covering the first intrinsic side portion 21 is not less than 1nm, and the thickness of the second intrinsic side portion 22 covering the side area connected to the second main surface is also not less than 1nm.

[0090] exist Figure 2 , Figure 8 In the illustrated embodiment, the oxygen content in the first doped amorphous layer 31 is greater than or equal to the oxygen content in the second doped amorphous layer 32. Generally, the high oxygen content in the first doped amorphous layer 31 forms amorphous silicon oxide with high light transmittance, thereby improving the light receiving effect of the light receiving surface of the heterojunction solar cell.

[0091] As Figure 2 , Figure 8 For further specific implementation of the structure shown, refer to Figure 3 As shown, the first doped amorphous layer 31 includes a first doped amorphous silicon film 301 located on the surface of the first intrinsic amorphous layer 21 and a doped amorphous silicon oxide film, a doped amorphous silicon carbide film or a doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302 located on the surface of the first doped amorphous silicon film 301. It is relatively easy to understand that the doped amorphous silicon carbide / doped amorphous silicon oxide composite film refers to a film layer formed by a composite of a doped amorphous silicon oxide film and a doped amorphous silicon carbide film.

[0092] Doped amorphous silicon oxide and doped amorphous silicon carbide have better light transmittance than doped amorphous silicon. The first doped amorphous layer 31' involved in the prior art is usually a single-layer doped amorphous silicon film structure; in this embodiment, the first doped amorphous layer 31 adopts a double-layer film design, wherein the first doped amorphous silicon film 301 can ensure that the first doped amorphous layer 31 has good contact with the first intrinsic amorphous layer 21, and the doped amorphous silicon oxide film, doped amorphous silicon carbide film or doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302 is equivalent to replacing part of the doped amorphous silicon in the prior art with doped amorphous silicon oxide or doped amorphous silicon carbide having high light transmittance, so that the overall light transmittance of the first doped amorphous layer 31 can be improved. Based on the cooperation of the first doped amorphous silicon film 301 with the doped amorphous silicon oxide film, doped amorphous silicon carbide film or doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302, the heterojunction solar cell has more excellent performance.

[0093] exist Figure 3 In the specific embodiment shown, preferably, the thickness of the first doped amorphous silicon film 301 is generally less than the thickness of the doped amorphous silicon oxide film, the doped amorphous silicon carbide film, or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302. In this way, while ensuring good contact between the first doped amorphous layer 31 and the first intrinsic amorphous layer 21, the first doped amorphous layer 31 can have a good light transmittance to a great extent.

[0094] In a specific implementation process, the thickness of the doped amorphous silicon oxide film, the doped amorphous silicon carbide film or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302 is 2-10 nm. Correspondingly, the thickness of the first doped amorphous silicon film 301 is 1-5 nm.

[0095] To ensure good contact between the first doped amorphous layer 31 and the first intrinsic amorphous layer 21, the first doped amorphous silicon film 301 is a highly doped film with a carrier concentration of 5E19-5E21 / cm 3 .

[0096] exist Figure 2 , Figure 8 In some other specific implementations of the illustrated implementation structure, refer to Figure 4 As shown, the first doped amorphous layer 31 further includes a second doped amorphous silicon film 303 located on the surface of the doped amorphous silicon oxide film, the doped amorphous silicon carbide film or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302. Doped amorphous silicon generally has relatively excellent electrical conductivity. Figure 4 The second doped amorphous silicon film 303 in the embodiment shown can provide a better contact between the first doped amorphous layer 31 and the first transparent conductive film layer 41. Figure 3 The illustrated embodiment can reduce contact resistance, thereby enabling a heterojunction solar cell to have a higher fill factor.

[0097] exist Figure 4 In the illustrated embodiment, the thickness of the second doped amorphous silicon film 303 is also generally smaller than the thickness of the doped amorphous silicon oxide film, the doped amorphous silicon carbide film, or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302, thereby making the first doped amorphous layer 31 have a good light transmittance. In a specific implementation, the thickness of the first doped amorphous silicon film 301 involved is 1-4 nm, the thickness of the doped amorphous silicon oxide film, the doped amorphous silicon carbide film, or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302 is 1-7 nm, and the thickness of the second doped amorphous silicon film 303 is 1-4 nm.

[0098] To ensure good contact between the first doped amorphous layer 31 and the first transparent conductive film layer 41, the second doped amorphous silicon film 303 is also a highly doped film with a carrier concentration of 5E19-5E21 / cm 3 .

[0099] refer to Figure 3 , Figure 4 As shown, in some further embodiments of the present invention, the second doped amorphous layer 32 includes a third doped amorphous silicon film 304 located on the surface of the second intrinsic amorphous layer 22 and a fourth doped amorphous silicon film 305 located on the surface of the third doped amorphous silicon film 304 and having a doping concentration greater than that of the third doped amorphous silicon film 304.

[0100] Preferably, the carrier concentration of the third doped amorphous silicon film 304 is 5E18-5E19 / cm 3 The carrier concentration of the fourth doped amorphous silicon film 305 is 5E19-5E21 / cm 3 .

[0101] exist Figure 3 , Figure 4 In the illustrated embodiment, the third doped amorphous silicon film 304, due to its relatively low doping concentration, can reduce the impact on the second intrinsic amorphous layer 22, reduce the lattice distortion of the second intrinsic amorphous layer 22, and effectively ensure the passivation effect of the backlight surface of the heterojunction solar cell; the fourth doped amorphous silicon film 305, due to its relatively high doping concentration, can improve the contact between the second doped amorphous layer 32 and the second transparent conductive film, reduce the contact resistance between the two, and improve the battery fill factor.

[0102] Preferably, the thickness of the third doped amorphous silicon film 304 is usually smaller than that of the fourth doped amorphous silicon film 305. In a specific implementation, the thickness of the third doped amorphous silicon film 304 is 1-5 nm, and the thickness of the fourth doped amorphous silicon film 305 is 2-15 nm.

[0103] It should be understood that in the present invention Fig. 9 , Fig.10 In the illustrated embodiment, the two of the first intrinsic amorphous layer 21, the first doped amorphous layer 31, the second intrinsic amorphous layer 22 and the second doped amorphous layer 32 located on the light-receiving side are the second intrinsic amorphous layer 22 and the second doped amorphous layer 32, and the two located on the backlight side are the first intrinsic amorphous layer 21 and the first doped amorphous layer 31, wherein the sum of the thicknesses of the second intrinsic amorphous layer 22 and the second doped amorphous layer 32 is less than or equal to the sum of the thicknesses of the first intrinsic amorphous layer 21 and the first doped amorphous layer 31.

[0104] More specifically, Fig. 9 , Fig.10 In the embodiment shown in the figure, the first intrinsic amorphous layer 21 and the first doped amorphous layer 31 can refer to Figure 2 , Figure 8 The design of the second intrinsic amorphous layer 22 and the second doped amorphous layer 32 in the illustrated embodiment is as follows: Fig. 9 , Fig.10 The second intrinsic amorphous layer 22 and the second doped amorphous layer 32 in the illustrated embodiment can be referred to as Figure 2 , Figure 8 The design of the first intrinsic amorphous layer 21 and the first doped amorphous layer 31 in the illustrated embodiment will not be described in detail here.

[0105] Preferably, the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 involved in the present invention respectively include at least two stacked intrinsic films, and each intrinsic film is composed of one of intrinsic amorphous silicon, intrinsic amorphous silicon oxide, and intrinsic amorphous silicon carbide.

[0106] refer to Figure 7 As shown, it is Figure 2 A specific implementation of the structure shown in the figure, the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 involved in the specific implementation respectively include three layers of intrinsic films stacked. Among them, in the direction away from the single crystal silicon substrate 10, the first intrinsic amorphous layer 21 includes the first intrinsic film 201, the second intrinsic film 202 and the third intrinsic film 203 in sequence, and the second intrinsic amorphous layer 22 includes the fourth intrinsic film 204, the fifth intrinsic film 205 and the sixth intrinsic film 206 in sequence. It can be understood that in other embodiments of the present invention, the number of film layers of the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 is not limited to a three-layer structure.

[0107] In the present invention, since the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 both include at least two stacked intrinsic films, in the specific implementation process, it is convenient to control the characteristics of each film layer to form the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 with better comprehensive performance.

[0108] As a preferred embodiment of the present invention, in a specific implementation process, the intrinsic film layer farthest from the single crystal silicon substrate 10 in the first intrinsic amorphous layer 21 is set to be an intrinsic amorphous silicon oxide. Figure 7 As shown, in this embodiment, the third intrinsic film 203 is the intrinsic film farthest from the single crystal silicon substrate 10 in the first intrinsic amorphous layer 21, and the third intrinsic film 203 in this embodiment is preferably made of intrinsic amorphous silicon oxide. It can be understood that in other embodiments of the present invention, the intrinsic film farthest from the single crystal silicon substrate 10 in the second intrinsic amorphous layer 22 can also be set as intrinsic amorphous silicon oxide, that is, the sixth intrinsic film 206 farthest from the single crystal silicon substrate 10 in this embodiment can be set as intrinsic amorphous silicon oxide.

[0109] The passivation effect of intrinsic amorphous silicon oxide is worse than that of intrinsic amorphous silicon and intrinsic amorphous silicon carbide, but it has better light transmittance than intrinsic amorphous silicon and intrinsic amorphous silicon carbide. In heterojunction solar cells, the intrinsic film farthest from the single crystal silicon substrate 10 in the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 has limited passivation effect on the single crystal silicon substrate 10 due to the distance. Setting it to the intrinsic amorphous silicon oxide with the best light transmittance can optimize the photoelectric conversion efficiency of the heterojunction solar cell to a certain extent.

[0110] As a further preference of the present invention, in the present invention, the hydrogen content of the intrinsic film close to the single crystal silicon substrate 10 in the first intrinsic amorphous layer 21 is higher than the hydrogen content of the intrinsic film far away from the single crystal silicon substrate, and the hydrogen content of the intrinsic film close to the single crystal silicon substrate 10 in the second intrinsic amorphous layer 22 is higher than the hydrogen content of the intrinsic film far away from the single crystal silicon substrate.

[0111] refer to Figure 7 As shown, in this embodiment, the hydrogen contents of the first intrinsic film 201, the second intrinsic film 202 and the third intrinsic film 203 in the first intrinsic amorphous layer 21 decrease in sequence, and the hydrogen contents of the fourth intrinsic film 204, the fifth intrinsic film 205 and the sixth intrinsic film 206 in the second intrinsic amorphous layer 22 also decrease in sequence. It is relatively easy to understand that the closer the intrinsic film is to the single crystal silicon substrate 10 in the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22, the more obvious the passivation effect on it. The first intrinsic film 201 and the fourth intrinsic film 204 are both directly attached to the single crystal silicon substrate 10, and they have the highest hydrogen content, so that the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 have the best passivation effect on the single crystal silicon substrate 10.

[0112] As a preferred embodiment of the present invention, when the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 include three layers of intrinsic films stacked together, in the direction away from the single crystal silicon substrate 10, the hydrogen content of the three layers of the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 are in the range of 20%-40%, 10%-25%, and 8%-20%, respectively. That is, the hydrogen content of the first intrinsic film 201 and the fourth intrinsic film 204 is in the range of 20%-40%, the hydrogen content of the second intrinsic film 202 and the fifth intrinsic film 205 is in the range of 10%-25%, and the hydrogen content of the third intrinsic film 203 and the sixth intrinsic film 206 is in the range of 8%-20%.

[0113] More preferably, Figure 7 In the embodiment, the hydrogen content of the first intrinsic film 201 and the fourth intrinsic film 204 is in the range of 24%-30%, the hydrogen content of the second intrinsic film 202 and the fifth intrinsic film 205 is in the range of 12%-18%, and the hydrogen content of the third intrinsic film 203 and the sixth intrinsic film 206 is in the range of 10%-15%.

[0114] As the present invention Figure 7 Further preference is given to the embodiment shown, when the first main surface of the single crystal silicon substrate 10 is the light receiving surface, the thickness ranges of the first intrinsic film 201, the second intrinsic film 202 and the third intrinsic film 203 in the first intrinsic amorphous layer 21 are 1-3nm, 2-4nm, 1-3nm, respectively, and the thickness ranges of the fourth intrinsic film 204, the fifth intrinsic film 205 and the sixth intrinsic film 206 in the second intrinsic amorphous layer 22 are 1-5nm, 3-10nm, 0-5nm, respectively.

[0115] Correspondingly, it can be understood that when the first main surface of the single-crystal silicon substrate 10 is the backlight surface, the thickness ranges of the fourth intrinsic film 204, the fifth intrinsic film 205 and the sixth intrinsic film 206 in the second intrinsic amorphous layer 22 are 1-3nm, 2-4nm, and 1-3nm, respectively, and the thickness ranges of the first intrinsic film 201, the second intrinsic film 202 and the third intrinsic film 203 in the first intrinsic amorphous layer 21 are 1-5nm, 3-10nm, and 0-5nm, respectively.

[0116] As a further preference, the proportion of bonded hydrogen atoms in the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 involved in the present invention is 15%-25% of the total hydrogen atoms. In the specific passivation effect, the bonded hydrogen atoms play a decisive role. In the prior art, the proportion of bonded hydrogen atoms in the intrinsic amorphous layer is usually about 10% of the total hydrogen atoms. In the present invention, by increasing the proportion of bonded hydrogen atoms in the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22, the passivation effect of the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 on the surface of the single crystal silicon substrate 10 can also be improved, thereby further improving the open circuit voltage of the corresponding heterojunction solar cell.

[0117] In some other embodiments of the present invention, the average concentration of hydrogen atoms in the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 is 1e22-5e22 / cm 3 ; preferably 2.5e22-5e22 / cm 3 The concentration of hydrogen atoms in the intrinsic amorphous silicon layer of the heterojunction solar cell in the prior art is usually less than 1e22 atoms / cm 3 The low concentration of hydrogen atoms makes the passivation effect of the intrinsic amorphous silicon layer poor. In the present invention, by increasing the concentration of hydrogen atoms in the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22, the passivation effect of the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 on the surface of the single crystal silicon substrate 10 can be effectively improved, thereby increasing the open circuit voltage of the corresponding heterojunction solar cell.

[0118] Although the single crystal silicon substrate 10 can be a p-type single crystal silicon substrate or an n-type single crystal silicon substrate, as a preferred embodiment of the present invention, the single crystal silicon substrate 10 is an n-type single crystal silicon substrate. Further preferably, the first doped amorphous layer 31 and the second doped amorphous layer 32 are located on the light-receiving side and are n-type doped amorphous layers, and the first doped amorphous layer 31 and the second doped amorphous layer 32 are located on the backlight side and are p-type doped amorphous layers.

[0119] When the first doped amorphous layer 31 and the second doped amorphous layer 32 are located on the light-receiving side and are n-type doped amorphous layers, and the first doped amorphous layer 31 and the second doped amorphous layer 32 are located on the backlight side and are p-type doped amorphous layers, the first transparent conductive film 41 and the second transparent conductive film 42 involved in the present invention also have the following design.

[0120] for Figure 2 , Figure 8 For the implementation structure shown, a specific implementation method thereof is referenced Figure 5 As shown, the first transparent conductive film layer 41 includes a first TCO film 401 attached to the surface of the n-type doped amorphous layer (the first doped amorphous layer 31) and a second TCO film 402 attached to the surface of the first TCO film 401, wherein the mass proportion of the doped oxide in the first TCO film 401 is greater than the mass proportion of the doped oxide in the second TCO film 402.

[0121] In the heterojunction solar cell structure provided by the present embodiment, based on its specific design structure, the first TCO film 401 can ensure good contact between the first transparent conductive film layer 41 and the n-type doped amorphous layer (first doped amorphous layer 31) due to its high doping, thereby reducing the contact resistance and improving the fill factor of the heterojunction solar cell; and the second TCO film 402 can increase the transmittance of the first transparent conductive film layer 41 as a whole due to its low doping, thereby improving the short-circuit current of the heterojunction solar cell.

[0122] Preferably, in the specific implementation process of this embodiment structure, the mass proportion of the doped oxide in the first TCO film 401 is 5%-20%, and the mass proportion of the doped oxide in the second TCO film 402 is 0.5%-5%.

[0123] Furthermore, the carrier concentration of the first TCO film 401 is 3e20-1e21 / cm 3 The carrier concentration of the second TCO film 402 is 5e19 -4e20 / cm 3In the specific implementation process, the carrier concentration in the first TCO film 401 and the second TCO film 402 is positively correlated with the mass proportion of the doped oxide in the corresponding film layer. However, in the specific production process, the carrier concentration can be further adjusted to a certain extent by controlling the film forming atmosphere of the first TCO film 401 and the second TCO film 402 (for example, adjusting the oxygen concentration).

[0124] As a preferred embodiment of the present invention, the thickness of the first TCO film 401 is less than the thickness of the second TCO film 402. Figure 5 As shown, the thickness of the first TCO film 401 is 5-15 nm, preferably 5-10 nm; the thickness of the second TCO film 402 is 40-90 nm, preferably 60-80 nm.

[0125] The purpose of setting the first TCO film 401 is mainly to form a good contact between the first transparent conductive film layer 41 and the n-type doped amorphous layer (the first doped amorphous layer 31). A relatively thin thickness can meet this requirement. Moreover, since the thickness of the first TCO film 401 is relatively thin, the problem of poor light transmittance due to high doping can be greatly reduced. The second TCO film 402 has good light transmittance due to its low doping concentration. Setting it to a relatively thick thickness can ensure that the first transparent conductive film layer 41 has a sufficient thickness while also ensuring excellent light transmittance, thereby allowing the heterojunction solar cell to have a higher short-circuit current.

[0126] Further references Figure 6 As shown, in some other embodiments of the present invention, the first transparent conductive film layer 41 further includes a third TCO film 403 attached to the surface of the second TCO film 402, and the mass proportion of the doped oxide in the third TCO film 403 is greater than the mass proportion of the doped oxide in the second TCO film 402. In a specific implementation, the mass proportion of the doped oxide in the third TCO film 403 is 5%-20%.

[0127] Since the doping concentration of the third TCO film 403 is also relatively high, it can ensure good contact between the first transparent conductive film layer 41 and the first collector 51 , and can also reduce the contact resistance between the two, thereby further improving the fill factor of the heterojunction solar cell.

[0128] In a specific implementation process, the thickness of the third TCO film 403 is less than the thickness of the second TCO film 402. Figure 6In the illustrated embodiment, the thickness of the first TCO film 401 is 5-15 nm, the thickness of the second TCO film 402 is 35-75 nm, and the thickness of the third TCO film 403 is 5-15 nm. The considerations for setting the thickness of the third TCO film 403 to a relatively small value can refer to the considerations for setting the thickness of the first TCO film 401, and will not be further described here.

[0129] In the specific implementation process of the present embodiment structure, the first TCO film 401, the second TCO film 402 and the third TCO film 403 are all formed by doping oxides in indium oxide or zinc oxide, and the doped oxides are one or more of Al2O3, Ga2O3, In2O3, SnO2, WO3, TiO2, ZrO2 and MoO2. Among them, the doped oxide is preferably SnO2, which has better reliability. It can be understood that the mass proportion of the doped oxide in the corresponding TCO film refers to the ratio of the mass of the doped oxide to the total mass of the corresponding TCO film.

[0130] refer to Figure 5 , Figure 6 As shown, in these embodiments, the second transparent conductive film layer 42 includes a fourth TCO film 404 attached to the surface of the p-type doped amorphous layer (the second doped amorphous layer 32) and a fifth TCO film 405 attached to the surface of the fourth TCO film 404, wherein the mass proportion of the doped oxide in the fourth TCO film 404 is less than the mass proportion of the doped oxide in the fifth TCO film 405.

[0131] Since the fourth TCO film 404 is in direct contact with the p-type doped amorphous layer (the second doped amorphous layer 32), when the fourth TCO film 404 has a lower concentration of doping, the Schottky contact barrier between the two is reduced, so that the two can have optimal contact, thereby improving the filling factor of the heterojunction solar cell. In addition, the fifth TCO film 405 has a higher doping concentration, has better conductivity, and has better electrical contact with the second collector, which can also improve the filling factor of the heterojunction solar cell. It can be known that since the second transparent conductive film layer 42 is located on the backlight side of the heterojunction solar cell, in specific applications, the proportion of sunlight that penetrates the second transparent conductive film layer 42 and irradiates the interior of the heterojunction solar cell is very low, and its transmittance has little effect on the overall performance of the heterojunction solar cell.

[0132] In a specific implementation process, the mass proportion of the doped oxide in the fourth TCO film 404 is 0.5%-5%, and the mass proportion of the doped oxide in the fifth TCO film 405 is 5%-20%.

[0133] Correspondingly, the carrier concentration of the fourth TCO film 404 is 5e19-4e20 / cm 3The carrier concentration of the fifth TCO film 405 is 3e20 -1e21 / cm 3 .

[0134] Preferably, in this embodiment, the thickness of the fourth TCO film 404 is usually less than the thickness of the fifth TCO film 405. The fourth TCO film 404 is set to a relatively small value to meet the excellent contact between the p-type doped amorphous layer (the second doped amorphous layer 32), and the fifth TCO film 405 is set to a relatively large value to meet the total thickness requirement of the second transparent conductive film layer 42 and improve the electrical performance of the second transparent conductive film layer 42.

[0135] In some specific embodiments, the thickness of the fourth TCO film 404 is 5-15 nm, and the thickness of the fifth TCO film 405 is 40-90 nm.

[0136] The fourth TCO film 404 and the fifth TCO film 405 in the present embodiment are also formed by doping indium oxide or zinc oxide with doped oxide, and the doped oxide is one or more of Al2O3, Ga2O3, In2O3, SnO2, WO3, TiO2, ZrO2 and MoO2. Among them, the doped oxide is preferably SnO2, which has better reliability.

[0137] In this embodiment, the thickness of the first transparent conductive film layer 41 is less than or equal to the thickness of the second transparent conductive film layer 42. Preferably, the thickness of the first transparent conductive film layer 41 is less than the thickness of the second transparent conductive film layer 42. The total thickness of the first transparent conductive film layer 41 is 60-120 nm, preferably 60-90 nm.

[0138] For heterojunction solar cells, the light absorption effect of the light-receiving surface has a much greater impact on the photoelectric conversion efficiency of the cell than the light absorption effect of the backlight surface. Since the thickness of the first transparent conductive film layer 41 is small, the loss of sunlight on the light-receiving surface when passing through the first transparent conductive film layer 41 can be effectively reduced, thereby enabling the heterojunction solar cell to have a better photoelectric conversion efficiency.

[0139] It can be understood that in other embodiments of the present structure, the second transparent conductive film layer 42 involved can also be set as a single-layer structure, that is, only the first transparent conductive film layer 41 is set as a double-layer film or a triple-layer film structure.

[0140] It should be understood that in the present invention Fig. 9 , Fig.10 In the illustrated embodiment, the first transparent conductive film layer 41 and the second transparent conductive film layer 42 are located on the light-receiving side, and the first transparent conductive film layer 41 is located on the backlight side. Fig. 9 , Fig.10The first transparent conductive film layer 41 in the illustrated embodiment can refer to Figure 2 , Figure 8 The design of the second transparent conductive film layer 42 in the illustrated embodiment is as follows: Fig. 9 , Fig.10 The second transparent conductive film layer 42 in the illustrated embodiment can refer to Figure 2 , Figure 8 The design of the first transparent conductive film layer 41 in the illustrated embodiment is not described in detail here.

[0141] Furthermore, in the present invention, one of the first transparent conductive film layer 41 and the second transparent conductive film layer 42 extends to the outside of the side surface to cover the doped side edge portion. In this way, the current can be collected more comprehensively on the surface of the heterojunction solar cell, thereby improving the photoelectric conversion efficiency of the cell. For more specific details, please refer to the following different embodiments.

[0142] refer to Figure 2 As shown, in the embodiment, the first transparent conductive film layer 41 has a first conductive layer side edge portion 410 extending outside the side surface to cover the second doped side edge portion 320. At this time, the second transparent conductive film layer 42 only covers the area of ​​the second doped amorphous layer 32 corresponding to the second main surface, and a blank area is formed around it to be insulated from the first conductive layer side edge portion 410.

[0143] refer to Figure 8 As shown, in this embodiment, the first transparent conductive film layer 41 has a first conductive layer side edge portion 410 extending outside the side surface to cover the first doped side edge portion 310. At this time, the second transparent conductive film layer 42 only covers the area of ​​the second doped amorphous layer 32 corresponding to the second main surface, and a blank area is formed around it to be insulated from the first conductive layer side edge portion 410.

[0144] refer to Fig. 9 As shown, in this embodiment, the second transparent conductive film layer 42 has a second conductive layer side edge portion 420 extending outside the side surface to cover the first doped side edge portion 310. At this time, the first transparent conductive film layer 41 only covers the area of ​​the first doped amorphous layer 31 corresponding to the first main surface, and a blank area is formed around it to be insulated from the second conductive layer side edge portion 420.

[0145] refer to Fig.10 As shown, in this embodiment, the second transparent conductive film layer 42 has a second conductive layer side edge portion 420 extending outside the side surface to cover the second doped side edge portion 320. At this time, the first transparent conductive film layer 41 only covers the area of ​​the first doped amorphous layer 31 corresponding to the first main surface, and a blank area is formed around it to be insulated from the second conductive layer side edge portion 420.

[0146] refer to Fig.11As shown, in this embodiment, the second transparent conductive film layer 42 has a second conductive layer side edge portion 420 extending outside the side surface to cover the second doped side edge portion 320. At this time, the first transparent conductive film layer 41 only covers the area of ​​the first doped amorphous layer 31 corresponding to the first main surface, and a blank area is formed around it to be insulated from the second conductive layer side edge portion 420.

[0147] By comparing the above embodiments, Figure 2 , Figure 8 , Fig. 9 and Fig.10 In the embodiment shown, one of the first transparent conductive film layer 41 and the second transparent conductive film layer 42 is located on the light receiving surface and extends to the side surface to cover the doped side edge. Fig.11 In the illustrated embodiment, one of the first transparent conductive film layer 41 and the second transparent conductive film layer 42 located on the backlight side extends to the side surface to cover the doped side edge portion, and other similar implementation structures are not further described herein.

[0148] In a specific implementation process, the width of the blank area between the first transparent conductive film layer 41 and the second transparent conductive film layer 42 for insulating the two is in a range of 0.5-2 mm.

[0149] The present invention also provides a method for manufacturing a heterojunction solar cell, which is used to manufacture the above heterojunction solar cell, and comprises:

[0150] In the single crystal silicon substrate texturing step, the first main surface, the second main surface and the side surfaces of the single crystal silicon substrate 10 are textured.

[0151] The first intrinsic amorphous layer production steps, refer to Fig.12 As shown, the single crystal silicon substrate 10 is placed on the first carrier 61 with the first main surface facing upward. The first carrier 61 has a first groove 610 for placing the single crystal silicon substrate 10. A first intrinsic amorphous layer 21 is deposited on the first main surface side of the single crystal silicon substrate 10 from the upper side of the first carrier 61. The periphery of the first intrinsic amorphous layer 21 extends to cover all side surfaces. In specific implementation, the portion of the first intrinsic amorphous layer 21 extending from the periphery to cover all side surfaces constitutes the first intrinsic side edge portion 210.

[0152] The second intrinsic amorphous layer production steps, refer to Fig.13As shown, after completing the first intrinsic amorphous layer manufacturing step, the single crystal silicon substrate 10 is placed on the second carrier 62 with the second main surface facing upward. The second carrier 62 has a second groove 620 for placing the single crystal silicon substrate 10. A second intrinsic amorphous layer 22 is deposited on the second main surface side of the single crystal silicon substrate 10 from the upper side of the second carrier 62. The periphery of the second intrinsic amorphous layer 22 extends to cover the first intrinsic side portion 210. The portion of the second intrinsic amorphous layer 22 covering the first intrinsic side portion 210 constitutes the second intrinsic side portion 220.

[0153] The first doped amorphous layer manufacturing step, refer to Fig.14 As shown, after completing the second intrinsic amorphous layer manufacturing step, the single crystal silicon substrate 10 is placed on the third carrier 63 with the first main surface facing upward. The third carrier 63 has a third groove 630 for placing the single crystal silicon substrate 10. A first doped amorphous layer 31 is formed on the first intrinsic amorphous layer 21 from the upper side of the third carrier 63. The first doped amorphous layer 31 is formed with a first doped side edge portion 310 extending outside the side surface.

[0154] The second doped amorphous layer manufacturing step, refer to Fig.15 As shown, after completing the second intrinsic amorphous layer manufacturing step, the single crystal silicon substrate 10 is placed with the second main surface facing upward on the fourth carrier 64, and the fourth carrier 64 has a fourth groove 640 for placing the single crystal silicon substrate 10, and a first doped amorphous layer 32 is formed on the second intrinsic amorphous layer 22 from the upper side of the fourth carrier 640, and the second doped amorphous layer 32 is formed with a second doped side edge portion 320 extending to the outside of the side surface to form a connection with the first doped side edge portion 310.

[0155] The transparent conductive film layer manufacturing step includes a first transparent conductive film layer 41 and a second transparent conductive film layer 42. The first main surface side and the second main surface side of the single crystal silicon substrate 10 that completes the first doped amorphous layer manufacturing step and the second doped amorphous layer manufacturing step are respectively deposited to form the first transparent conductive film layer 41 and the second transparent conductive film layer 42.

[0156] The collector manufacturing steps include a first collector 51 and a second collector 52. The first collector 51 is formed on the surface of the first transparent conductive film layer 41 away from the first doped amorphous layer 31, and the second collector 52 is formed on the surface of the second transparent conductive film layer 42 away from the second doped amorphous layer 32.

[0157] In the specific implementation process of the present invention, the order of the second doped amorphous layer manufacturing step and the first doped amorphous layer manufacturing step can be adjusted, so as to form a heterojunction solar cell in which the first doped side edge portion 310 and the second doped side edge portion 320 are arranged in different orders.

[0158] In the specific implementation process of the present invention, when the second doped amorphous layer production step is located before the first doped amorphous layer production step, the second carrier 62 involved in the second intrinsic amorphous layer production step and the fourth carrier 64 involved in the second doped amorphous layer production step can be the same carrier, and there is no need to move the single crystal silicon substrate 10 during the execution of the two steps.

[0159] In a specific transparent conductive film manufacturing step, refer to Fig.16 As shown, the single crystal silicon substrate 10 that has completed the second amorphous film manufacturing step is placed on the fifth carrier 70 with the first main surface facing upward. The fifth carrier 70 includes a through hole 700 that runs through from top to bottom. The through hole 700 has a supporting portion 701 that supports the single crystal silicon substrate 10 and blocks the edge of one side of the second main surface of the single crystal silicon substrate 10. The size of the through hole 700 located on the upper side of the supporting portion 701 is larger than the size of the single crystal silicon substrate 10, and the difference is usually in the range of 2-4mm. The first transparent conductive film layer 41 and the second transparent conductive film layer 42 are deposited on the first main surface side and the second main surface side of the fifth carrier 70 to form a Figure 2 , Figure 8 Heterojunction solar cell with the structure shown.

[0160] In this embodiment, since the size of the through hole 700 located in the upper area of ​​the supporting portion 701 is larger than the size of the single crystal silicon substrate 10, the first transparent conductive film layer 41 will extend toward the side of the single crystal silicon substrate 10 during the formation process to form a first conductive layer side edge portion 410, and the portion of the edge of the second main surface of the single crystal silicon substrate 10 that is blocked by the supporting portion 701 forms a blank area.

[0161] In another embodiment of the present invention, the single crystal silicon substrate 10 after the second amorphous film manufacturing step is completed can also be placed on the fifth carrier 70 (not shown in the figure) with the second main surface facing upward, and then the single crystal silicon substrate 10 can be formed. Fig. 9 , Fig.10 or Fig.11 The heterojunction solar cell with the structure shown will not be described in detail here.

[0162] In order to form the second intrinsic side edge portion 220, the first doped side edge portion 310 and the second doped side edge portion 320 on the side of the single crystal silicon substrate 10, in the specific implementation process of the present invention, the difference between the side length of the first groove 610, the second groove 620, the third groove 630 and the fourth groove 640 and the corresponding side length of the single crystal silicon substrate 10 is 2-4 mm. Based on the difference between the side length of the first groove 610, the second groove 620, the third groove 630 and the fourth groove 640 and the corresponding side length of the single crystal silicon substrate 10, when manufacturing the corresponding film layer, a gap of 1-2 mm can be formed between each side edge of the single crystal silicon substrate 10 and the edge of the corresponding groove, so that the corresponding film layer can be fully plated around the side of the single crystal silicon substrate 10.

[0163] In the present invention, in the step of texturing the single crystal silicon substrate, a 5% diluted HF solution is first used to remove the surface oxide layer, and then the anisotropic corrosion characteristics of single crystal silicon are utilized to texturize using a solution of KOH or NaOH or tetramethylammonium hydroxide (TMAH) plus alcohol.

[0164] The four amorphous layers of the first intrinsic amorphous layer 21, the second intrinsic amorphous layer 22, the first doped amorphous layer 31, and the second doped amorphous layer 32 involved in the present invention are all formed by a PECVD deposition process. The first transparent conductive film layer 41 and the second transparent conductive film layer 42 involved in the present invention are formed by a PVD deposition, RPD deposition, or magnetron sputtering deposition process. The first collector 51 and the second collector 52 involved in the present invention are formed by a screen printing process.

[0165] For a better understanding of the present invention, a specific method for manufacturing four amorphous layers of a heterojunction solar cell is also shown below: pure SiH4 is first introduced into the side facing the first main surface of the single crystal silicon substrate 10, and then SiH4 diluted with H2 is introduced, and a first intrinsic amorphous layer 21 is grown under the action of a 13.56 MHz radio frequency power supply; pure SiH4 is first introduced into the side facing the second main surface of the single crystal silicon substrate 10, and then SiH4 diluted with H2 is introduced, and a second intrinsic amorphous layer 22 is grown under the action of a 13.56 MHz radio frequency power supply; PH3, SiH4, H2 and other gases are introduced into the side facing the first main surface of the single crystal silicon substrate 10 to manufacture a first doped amorphous layer 31; B2H6, SiH4, H2 and other gases are introduced into the side facing the second main surface of the single crystal silicon substrate 10 to manufacture a second doped amorphous layer 32.

[0166] It can be understood that the first intrinsic amorphous layer 21, the first doped amorphous layer 31, the second intrinsic amorphous layer 22 and the second doped amorphous layer 32 are respectively formed in different coating chambers. In addition, during the coating process of the four amorphous layers, before the corresponding amorphous layer is coated, the temperature and pressure of the coating chamber involved need to reach a predetermined value, usually the temperature is 180°C, and the pressure is controlled at 30-200 Pa.

[0167] In order to optimize the passivation effect of the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 on the single crystal silicon substrate 10, during the specific production process of the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22, when SiH4 diluted by H2 is introduced, the dilution ratio of H2 / SiH4 can be adjusted, so that the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 have multiple layers of intrinsic films with different characteristics. Typically, the dilution ratio of H2 / SiH4 ranges from 5 to 250.

[0168] The above only shows the preparation method in which the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 are all made of intrinsic amorphous silicon. It can be understood that in other embodiments of the present invention, the intrinsic film of the first intrinsic amorphous layer 21 and the second intrinsic amorphous layer 22 can also be intrinsic amorphous silicon oxide or intrinsic amorphous silicon carbide. No further detailed description will be given here.

[0169] When manufacturing the first doped amorphous layer 31 and the second doped amorphous layer 32, CO2 or CH4 may be introduced into the corresponding coating chamber, so that the first doped amorphous layer 31 and the second doped amorphous layer 32 are made of amorphous silicon oxide or amorphous silicon carbide.

[0170] When the first doped amorphous film 301 is formed, SiH 4 , H 2 and a first type of doping gas are introduced into a vacuum chamber.

[0171] When making a doped amorphous silicon oxide film, a doped amorphous silicon carbide film, or a doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302: if the film layer is a doped amorphous silicon oxide film, SiH4, H2, CO2, and a first type of doping gas are introduced into a vacuum chamber; if the film layer is a doped amorphous silicon carbide film, SiH4, H2, CH4, and a first type of doping gas are introduced into a vacuum chamber; if the film layer is a doped amorphous silicon carbide / doped amorphous silicon oxide composite film, SiH4, H2, CO2, CH4, and a first type of doping gas are introduced into the vacuum chamber at the same time to form a composite film, or at least one layer of doped amorphous silicon oxide and at least one layer of doped amorphous silicon carbide are deposited separately to form a composite film. In the present invention, the doped amorphous silicon oxide film, the doped amorphous silicon carbide film, or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film 302 can increase the optical band gap of the light-receiving surface film layer of the heterojunction solar cell, increase light transmittance, and improve the optical performance of the cell.

[0172] When it is necessary to form the second doped amorphous film 303, SiH4, H2 and the first type doping gas are introduced into the vacuum chamber.

[0173] When the third doped amorphous film 304 and the fourth doped amorphous film 305 are formed, SiH4, H2 and the second type of doping gas are introduced into the vacuum chamber. The difference is that the doping concentration of the second type of doping gas when the third doped amorphous film 303 is formed is less than the doping concentration of the second type of doping gas when the fourth doped amorphous film 304 is formed.

[0174] It should be understood that the first type of doping gas mentioned above refers to one of PH3 (phosphine) gas and B2H6 (diborane) gas, and the second type of doping gas refers to the other of PH3 (phosphine) gas and B2H6 (diborane) gas.

[0175] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0176] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention. They are not intended to limit the scope of protection of the present invention. Any equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. A heterojunction solar cell, characterized in that: include: An N-type single crystal silicon substrate, the N-type single crystal silicon substrate having a first main surface and a second main surface disposed opposite to each other, and a side surface connecting the first main surface and the second main surface, the second main surface being a light-receiving surface, and the first main surface being a light-receiving surface; A first intrinsic amorphous layer, a first doped amorphous layer, a first transparent conductive film layer, and a first collector are sequentially arranged on the side where the first main surface is located; the first intrinsic amorphous layer has a first intrinsic side edge portion extending toward the light-receiving surface to cover the side surface, the first doped amorphous layer is a p-type doped amorphous layer, and the first doped amorphous layer has a first doped side edge portion; A second intrinsic amorphous layer, a second doped amorphous layer, a second transparent conductive film layer, and a second collector are sequentially arranged on the side where the second main surface is located, the second intrinsic amorphous layer has a second intrinsic side portion extending toward the first intrinsic amorphous layer to cover the first intrinsic side portion, and the sum of the thickness of the first intrinsic side portion and the part of the second intrinsic side portion covering the first intrinsic side portion is not less than 1nm; the second doped amorphous layer is an n-type doped amorphous layer, and the second doped amorphous layer has a second doped side portion, the second doped side portion is located outside the side portion of the second intrinsic layer, and the first doped side portion is located outside the second doped side portion.

2. The heterojunction solar cell according to claim 1, characterized in that: The sum of the thicknesses of the second intrinsic amorphous layer and the second doped amorphous layer is less than or equal to the sum of the thicknesses of the first intrinsic amorphous layer and the first doped amorphous layer.

3. The heterojunction solar cell according to claim 2, characterized in that: The sum of the thicknesses of the second intrinsic amorphous layer and the second doped amorphous layer is 6-21 nm, and / or the sum of the thicknesses of the first intrinsic amorphous layer and the first doped amorphous layer is 6-30 nm.

4. The heterojunction solar cell according to any one of claims 1 to 3, characterized in that: The thickness of the second intrinsic amorphous layer is less than or equal to the thickness of the first intrinsic amorphous layer.

5. The heterojunction solar cell according to claim 4, characterized in that: The thickness of the second intrinsic amorphous layer is 3-6 nm, and / or the thickness of the first intrinsic amorphous layer is 3-10 nm.

6. The heterojunction solar cell according to any one of claims 1 to 3, characterized in that: The thickness of the second doped amorphous layer is less than or equal to the thickness of the first doped amorphous layer.

7. The heterojunction solar cell according to claim 6, characterized in that: The thickness of the second doped amorphous layer is 3-15 nm, and / or the thickness of the first doped amorphous layer is 3-20 nm.

8. The heterojunction solar cell according to claim 1, characterized in that: The oxygen content of the second doped amorphous layer is greater than or equal to the oxygen content of the first doped amorphous layer.

9. The heterojunction solar cell according to claim 1, 2, 3 or 8, characterized in that: In the direction from the backlight surface to the light-receiving surface, the second doped amorphous layer sequentially includes a first doped amorphous silicon film and a doped amorphous silicon oxide film, a doped amorphous silicon carbide film or a doped amorphous silicon carbide / doped amorphous silicon oxide composite film located on the surface of the first doped amorphous silicon film.

10. The heterojunction solar cell according to claim 9, characterized in that: The second doped amorphous layer further includes a second doped amorphous silicon film located on the surface of the doped amorphous silicon oxide film, the doped amorphous silicon carbide film or the doped amorphous silicon carbide / doped amorphous silicon oxide composite film.

11. The heterojunction solar cell according to claim 1, 2, 3 or 8, characterized in that: In the direction from the light receiving surface to the backlight surface, the first doped amorphous layer sequentially includes a third doped amorphous silicon film and a fourth doped amorphous silicon film located on the surface of the third doped amorphous silicon film and having a doping concentration greater than that of the third doped amorphous silicon film.

12. The heterojunction solar cell according to claim 1, 2, 3 or 8, characterized in that: The first intrinsic side edge portion covers the entire side surface, and / or the second intrinsic side edge portion covers a portion of the side surface connected to the second main surface, with a thickness of not less than 1 nm.

13. The heterojunction solar cell according to claim 1, 2, 3 or 8, characterized in that: The first intrinsic amorphous layer and the second intrinsic amorphous layer respectively include at least two stacked intrinsic films, and each of the intrinsic films is made of one of intrinsic amorphous silicon, intrinsic amorphous silicon oxide, and intrinsic amorphous silicon carbide.

14. The heterojunction solar cell according to claim 13, characterized in that: The intrinsic film layer farthest from the single crystal silicon substrate in the first intrinsic amorphous layer and / or the second intrinsic amorphous layer is an intrinsic amorphous silicon oxide.

15. The heterojunction solar cell according to claim 13, characterized in that: The hydrogen content of the intrinsic film close to the single crystal silicon substrate in the first intrinsic amorphous layer is higher than the hydrogen content of the intrinsic film far away from the single crystal silicon substrate, and the hydrogen content of the intrinsic film close to the single crystal silicon substrate in the second intrinsic amorphous layer is higher than the hydrogen content of the intrinsic film far away from the single crystal silicon substrate; and / or, the proportion of bonded hydrogen atoms in the first intrinsic amorphous layer and the second intrinsic amorphous layer to the total hydrogen atoms is 15%-25%.

16. The heterojunction solar cell according to claim 15, characterized in that: The first intrinsic amorphous layer and the second intrinsic amorphous layer respectively include three stacked intrinsic films. In the direction away from the single crystal silicon substrate, the hydrogen content ranges of the three intrinsic films of the first intrinsic amorphous layer and the second intrinsic amorphous layer are respectively 20%-40%, 10%-25%, and 8%-20%.

17. The heterojunction solar cell according to claim 1, characterized in that: The second transparent conductive film layer includes a first TCO film attached to the surface of the n-type doped amorphous layer and a second TCO film attached to the surface of the first TCO film, and the mass proportion of the doped oxide in the first TCO film is greater than the mass proportion of the doped oxide in the second TCO film.

18. The heterojunction solar cell according to claim 17, characterized in that: The mass proportion of the doped oxide in the first TCO film is 5%-20%, and / or the mass proportion of the doped oxide in the second TCO film is 0.5%-5%.

19. The heterojunction solar cell according to claim 17, characterized in that: The second transparent conductive film layer further includes a third TCO film attached to the surface of the second TCO film, and the mass proportion of the doped oxide in the third TCO film is greater than the mass proportion of the doped oxide in the second TCO film.

20. The heterojunction solar cell according to claim 1, characterized in that: The first transparent conductive film layer includes a fourth TCO film attached to the surface of the p-type doped amorphous layer and a fifth TCO film attached to the surface of the fourth TCO film, and the mass proportion of the doped oxide in the fourth TCO film is smaller than the mass proportion of the doped oxide in the fifth TCO film.

21. The heterojunction solar cell according to claim 1, 2, 3 or 8, characterized in that: The thickness of the second transparent conductive film layer is less than or equal to the thickness of the first transparent conductive film layer.

22. The heterojunction solar cell according to claim 1, 2, 3 or 8, characterized in that: One of the first transparent conductive film layer and the second transparent conductive film layer extends outside the side surface to cover the doped side edge portion.

23. A method for manufacturing a heterojunction solar cell, characterized in that: The steps are as follows: Providing an N-type single crystal silicon substrate, wherein the N-type single crystal silicon substrate has a first main surface, a second main surface and a side surface, wherein the first main surface is a backlight surface, and the second main surface is a light-receiving surface; A first intrinsic amorphous layer manufacturing step, depositing a first intrinsic amorphous layer on the side where the first main surface is located, wherein the periphery of the first intrinsic amorphous layer extends to cover all the side surfaces; A second intrinsic amorphous layer manufacturing step, depositing a second intrinsic amorphous layer on the side where the second main surface is located, wherein the periphery of the second intrinsic amorphous layer extends to cover the first intrinsic side edge portion; a second doped amorphous layer manufacturing step, forming a second doped amorphous layer on a surface of the second intrinsic amorphous layer away from the silicon substrate, wherein the second doped amorphous layer is formed with a second doped side edge portion extending outside the side surface; a first doped amorphous layer manufacturing step, forming a first doped amorphous layer on a surface of the first intrinsic amorphous layer away from the silicon substrate, wherein the first doped amorphous layer is formed with a first doped side edge portion extending outside the side surface; A transparent conductive film layer manufacturing step, depositing a first transparent conductive film layer and a second transparent conductive film layer on the side where the first main surface is located and on the side where the second main surface is located respectively; The collector manufacturing step forms a first collector on a surface of the first transparent conductive film layer that is away from the first doped amorphous layer, and forms a second collector on a surface of the second transparent conductive film layer that is away from the second doped amorphous layer.

24. The method for manufacturing a heterojunction solar cell according to claim 23, characterized in that: A first intrinsic amorphous layer manufacturing step, placing the single crystal silicon substrate with the first main surface facing upward on a first carrier, the first carrier having a first groove for placing the single crystal silicon substrate, and depositing the first intrinsic amorphous layer on the side where the first main surface of the single crystal silicon substrate is located from the upper side of the first carrier, wherein the first intrinsic side edge portion covers all the side surfaces; A second intrinsic amorphous layer manufacturing step, wherein the single crystal silicon substrate after the first intrinsic amorphous layer manufacturing step is placed with the second main surface facing upward on a second carrier, wherein the second carrier has a second groove for placing the single crystal silicon substrate, and the second intrinsic amorphous layer is deposited from the upper side of the second carrier on the side where the second main surface of the single crystal silicon substrate is located to form the second intrinsic amorphous layer; a second doped amorphous layer manufacturing step, placing the single crystal silicon substrate after the second intrinsic amorphous layer manufacturing step with the second main surface facing upward on a fourth carrier, the fourth carrier having a fourth groove for placing the single crystal silicon substrate, and forming the second doped amorphous layer on the second intrinsic amorphous layer from the upper side of the fourth carrier; A first doped amorphous layer manufacturing step, placing the single crystal silicon substrate after the second doped amorphous layer manufacturing step with the first main surface facing upward on a third carrier, the third carrier having a third groove for placing the single crystal silicon substrate, and forming the first doped amorphous layer on the first intrinsic amorphous layer from the upper side of the third carrier; a transparent conductive film layer manufacturing step, depositing the first transparent conductive film layer and the second transparent conductive film layer on the first main surface side and the second main surface side of the single crystal silicon substrate on which the first doped amorphous layer manufacturing step is completed respectively; a collector electrode manufacturing step, forming a first collector electrode on a surface of the first transparent conductive film layer facing away from the first doped amorphous layer, and forming a second collector electrode on a surface of the second transparent conductive film layer facing away from the second doped amorphous layer; The difference between the side lengths of the first groove, the second groove, the third groove and the fourth groove and the corresponding side lengths of the single crystal silicon substrate is in the range of 2-4 mm.

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