A back contact battery with a front inverted pyramid structure and a preparation method thereof

Abstract

The present invention belongs to the technical field of back contact batteries, and specifically relates to a back contact battery with a front inverted pyramid structure and a preparation method thereof, comprising the following steps: S1, performing impurity gettering treatment on a silicon wafer; then performing high temperature diffusion; S2, removing the phosphorus-rich silicon oxide layer on the back of the silicon wafer, and then single-sided polishing the surface; S3, forming a first semiconductor layer on the polished surface of the S2 silicon wafer; S4, cleaning and removing the PSG layer naturally formed on the surface of the first semiconductor layer; S5, depositing a mask layer on the back; S6, forming a second semiconductor opening area distributed at intervals on the back; S7, polishing; S8, removing the phosphorus-rich silicon oxide layer on the front, and then using a texturing liquid including alkali and a cyclodextrin-containing texturing additive to perform texturing cleaning. The present invention can form different pyramid morphologies on the front and back sides, which is beneficial to effectively reduce the front reflectivity while ensuring good back passivation performance, thereby facilitating the improvement of open circuit voltage, short circuit current and battery efficiency.

Description

Technical Field

[0001] The present invention belongs to the technical field of back contact batteries, and in particular relates to a back contact battery with a front inverted pyramid structure and a preparation method thereof. Background Art

[0002] The back contact cell has no metal grid lines on the front, and the PN junction area and metal electrode are located on the back of the cell. The purpose is to avoid the blocking of incident light by the front electrode grid lines in the traditional cell structure, so as to maximize the use of incident light and reduce optical loss. Therefore, how to reduce the reflectivity of the front side is the key to improving the efficiency of the back contact cell.

[0003] At present, the front of the back contact cell is a positive pyramid with a high reflectivity. In theory, the inverted pyramid structure can achieve a lower reflectivity, but the inverted pyramid structure is usually formed by MACE (metal assisted chemical etching). In the subsequent cleaning process, the metal ions cannot be completely removed, so they are introduced into the silicon wafer during the high-temperature coating process, forming a recombination center, which seriously reduces the open circuit voltage and cell efficiency of the solar cell.

[0004] It should be noted that this part of the present invention only provides background technology related to the present invention and does not necessarily constitute prior art or known technology. Summary of the invention

[0005] The purpose of the present invention is to overcome the defect of the prior art that the front reflectivity of the back-contact battery is high, thereby affecting the battery short-circuit current and battery efficiency, and to provide a back-contact battery with an inverted pyramid structure on the front and a preparation method thereof, which can form different pyramid morphologies on the front and back, which is beneficial to effectively reduce the front reflectivity while ensuring good back passivation performance, thereby facilitating the improvement of open circuit voltage, short-circuit current and battery efficiency.

[0006] In order to achieve the above object, in a first aspect, the present invention provides a method for preparing a back contact battery with a front inverted pyramid structure, comprising the following steps: S1. The silicon wafer is subjected to a gettering treatment. The gettering treatment process includes: depositing a phosphorus-rich silicon oxide layer with a thickness of 100-1000Å on both sides of the silicon wafer. The phosphorus doping concentration of the phosphorus-rich silicon oxide layer is 1e18cm -3 -5e19cm -3 ; Then high temperature diffusion is carried out, and the temperature of high temperature diffusion is 700-900℃; S2, removing the phosphorus-rich silicon oxide layer on the back of the silicon wafer, and then single-sided polishing the surface; S3, forming a first semiconductor layer on the polished surface of the silicon wafer S2; S4, cleaning and removing the PSG layer naturally formed on the surface of the first semiconductor layer; S5, depositing a mask layer on the surface of the first semiconductor layer; S6, performing a first etching on the mask layer on the back side of the S5 silicon wafer to remove the mask layer and a corresponding portion of the first semiconductor layer, thereby forming second semiconductor opening regions distributed at intervals; S7, polishing to remove the damaged layer in the second semiconductor opening area on the back side and the first semiconductor coating layer on the front side; S8, removing the phosphorus-rich silicon oxide layer on the front side, and then using a texturing liquid including alkali and a cyclodextrin texturing additive to perform texturing cleaning to form an inverted pyramid texturing surface on the front side, and simultaneously forming a positive pyramid texturing surface in the second semiconductor opening region on the back side, and removing at least a portion of the thickness of the mask layer; S11, forming a second semiconductor layer on the back side.

[0007] In some preferred embodiments of the present invention, the reflectivity of the front inverted pyramid velvet surface is 7%-8%, and the reflectivity of the back positive pyramid velvet surface is 11%-12%.

[0008] In some preferred embodiments of the present invention, in S8, the corresponding pyramid lateral size of the front inverted pyramid velvet surface is 0.8-2μm, and the pyramid height is 0.5-0.8μm, and the corresponding pyramid lateral size of the back positive pyramid velvet surface is 1-3μm, and the pyramid height is 1.0-1.5μm.

[0009] In some preferred embodiments of the present invention, the mass content of cyclodextrin in the cyclodextrin-containing texturing additive in S8 is 0.0001wt%-0.1wt%.

[0010] In some preferred embodiments of the present invention, the cyclodextrin-containing texturing additive also includes: 0.01 wt%-0.5 wt% of sodium lignin sulfonate, 0.1 wt%-5 wt% of sodium alginate, and 0.05 wt%-0.1 wt% of sodium benzoate, based on the total amount of the cyclodextrin-containing texturing additive.

[0011] In some preferred embodiments of the present invention, the texturing cleaning described in S8 includes at least two steps: first, a first texturing liquid including a first cyclodextrin texturing additive is used for a first texturing, and then a second texturing liquid including a second cyclodextrin texturing additive is used for a second texturing, wherein the mass content of cyclodextrin in the first cyclodextrin texturing additive is 0.001wt%-0.1wt%, and the mass content of cyclodextrin in the second cyclodextrin texturing additive is 0.0001wt%-0.01wt%.

[0012] In some preferred embodiments of the present invention, the alkali in the S8 texturing solution includes sodium hydroxide and / or potassium hydroxide, the mass content of the alkali in the texturing solution is 1wt%-2wt%, and the mass content of the cyclodextrin texturing additive is 0.5wt%-2wt%.

[0013] In some preferred embodiments of the present invention, the conditions for the texturing and cleaning in S8 include: the texturing temperature is 70° C.-85° C., and the texturing time is 8-15 min.

[0014] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the front side is removed in S8 by using a chain machine, and the speed of the transmission roller of the chain machine is controlled to be 1.2-3.0 m / min.

[0015] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the front side is removed in S8 by using a solution containing hydrofluoric acid, wherein the mass content of the hydrofluoric acid in the solution is 5wt%-10wt%.

[0016] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer in S1 is deposited with POCl 3 The phosphorus source is diffused by low pressure, and the conditions of low pressure diffusion include: ambient pressure of 30-100mba, and diffusion time of 5-20min.

[0017] In some preferred embodiments of the present invention, the time of high temperature diffusion in S1 is 90-120 minutes.

[0018] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the back of the silicon wafer is removed in S2 by using a chain machine, and the speed of the transmission roller of the chain machine is controlled to be 1.2-3.0 m / min.

[0019] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the back of the silicon wafer is removed by using a solution containing hydrofluoric acid, wherein the mass content of hydrofluoric acid in the solution is 5wt%-10wt%.

[0020] In some preferred embodiments of the present invention, the single-side polishing in S2 makes the single-side etching depth of the silicon wafer 2-5 μm; and / or, the polishing in S7 makes the single-side etching depth within 1 μm.

[0021] In some preferred embodiments of the present invention, the single-side polishing in S2 adopts a mixed polishing solution containing alkali, polishing additives and water, wherein the alkali is potassium hydroxide and / or sodium hydroxide, the mass content of the alkali is 2wt%-5wt%, and the mass content of the polishing additive is 0.5wt%-2wt%; the conditions for single-side polishing include: reaction temperature of 60-75°C, reaction time of 90-150s.

[0022] In some preferred embodiments of the present invention, the polishing in S7 adopts a mixed polishing solution containing alkali, polishing additives and water, wherein the alkali is potassium hydroxide and / or sodium hydroxide, the mass content of the alkali is 1wt%-3wt%, and the mass content of the polishing additive is 0.5wt%-2wt%; the polishing conditions include: the reaction temperature is 60-75°C, and the reaction time is 30-180s.

[0023] In some preferred embodiments of the present invention, the method for preparing a back contact battery with a front inverted pyramid structure further comprises: S9, forming a passivation layer and an anti-reflection layer in sequence on the front side of the silicon wafer obtained in S8; wherein the passivation layer comprises a second tunneling oxide layer and a second doped amorphous layer; the thickness of the second tunneling oxide layer is 0.5-1 nm, and the thickness of the second doped amorphous layer is 1-5 nm; S10, secondary cleaning to remove the anti-reflection layer and passivation layer on the back.

[0024] In some preferred embodiments of the present invention, the first semiconductor layer includes a first tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer.

[0025] In some preferred embodiments of the present invention, the method for preparing a back contact battery with a front inverted pyramid structure further comprises: S12, performing a second etching opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region; S13, depositing a conductive film layer on the back surface obtained in S12; S14, performing a third etching opening on a portion of the conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove; S15, forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

[0026] In a second aspect, the present invention provides a back-contact battery with a front inverted pyramid structure, which is prepared by the preparation method of a back-contact battery with a front inverted pyramid structure described in the first aspect.

[0027] Beneficial effects: The present invention adopts the above technical scheme, especially S1-S2 and S7-S8, S1 can absorb metal impurities in the silicon wafer, improve the surface flatness of the back side, thereby improving the passivation performance of the first semiconductor layer, and cooperate with S2 single-sided polishing to remove the phosphorus-rich silicon oxide layer on the back side, retain the phosphorus-rich silicon oxide layer on the front side, and protect the front damaged layer by the phosphorus-rich silicon oxide layer, and cooperate with S8 to use alkali and specific cyclodextrin-containing texturing additives for texturing cleaning, without the need to introduce metal ions, and the nucleating agent cyclodextrin is adsorbed on the line trace cutting of the front damaged layer to form a mask, and along the An inverted pyramid-like structure gradually grows with the line mark as the vertex, forming an inverted pyramid velvet structure on the front side, which enhances the anti-reflection effect on the front side and improves the open circuit voltage and battery efficiency of the battery; at the same time, the back side is polished by S7 and then velveted by S8, and the cyclodextrin nucleating agent will not be adsorbed on the back side, forming a uniform positive pyramid velvet structure, thereby ensuring that the passivation performance of the back side is not affected, and forming different pyramid morphologies on the front and back sides, which is beneficial to effectively reduce the front reflectivity while ensuring better back passivation performance, thereby helping to improve the open circuit voltage, short circuit current and battery efficiency.

[0028] In the preferred embodiment of the present invention, since the front side of the back contact battery of the present invention is an inverted pyramid structure, it is easier to form a passivation layer compared to the positive pyramid structure of the front side of the existing back contact battery. Therefore, the use of a specific tunneling amorphous passivation layer structure on the front side is beneficial to ensuring the passivation effect of the front side, while reducing the equipment cost of the plate-type PECVD. The thickness of the second tunneling oxide layer and the second doped amorphous layer only needs to be maintained at 50%-80% of the existing process to maintain the same passivation. In addition, due to the thinning of the doped amorphous layer, the parasitic absorption of the film layer is reduced, which is more conducive to increasing the current, thereby improving the short-circuit current and battery efficiency of the back contact battery.

[0029] In the preferred embodiment of the present invention, S8 texturing and cleaning adopts two-step texturing, and the cyclodextrin content corresponding to the two-step texturing decreases within an appropriate range. After the two-step texturing, the reflectivity of the inverted pyramid on the front side is 7%-8%, and the anti-reflection effect is greatly enhanced, further improving the short-circuit current of the back contact battery. The reflectivity of the positive pyramid on the back side is 11%-12%, and the passivation performance of the second semiconductor layer is not affected, while meeting the requirements of the pyramid morphology on the front and back sides. In the first texturing, since the damaged layer on the front side of the silicon wafer is not removed, there are many dangling bonds at the damaged part of the diamond wire cutting (there are diamond wire marks when the silicon wafer is incoming, which is formed by the silicon rod being cut into silicon wafers by the diamond wire). In the first texturing process, the texturing additive adopts a high content of cyclodextrin, and a large amount of nucleating agent cyclodextrin is adsorbed at the line mark cutting to form a mask, and an inverted pyramid-like structure gradually grows along the line mark as the vertex. At the same time, the second semiconductor opening area on the back side is polished to remove the damaged layer (such as the laser damaged layer) caused by the etching opening, and there are no obvious defects on the surface. During texturing, the cyclodextrin nucleating agent will not be adsorbed on the back side, so a uniform positive pyramid morphology can be formed, which is beneficial to the deposition of the second semiconductor layer, thereby increasing the open circuit voltage of the battery; in conjunction with the second texturing, the concentration of the nucleating agent cyclodextrin contained therein is low. Under low concentration conditions, the nucleating agent will not be adsorbed on the cutting damage to form a mask layer, but can remove the cutting damage layer on the surface of the front inverted pyramid velvet. The texturing time is short and the temperature is low, so the etching amount is very small, which will not affect the pyramid morphology on the front and back sides, thereby being more conducive to ensuring the passivation level of the front film layer and improving battery efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments are briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without creative work.

[0031] Figure 1 It is a schematic diagram of the structure of the front inverted pyramid of the back contact battery of the present invention.

[0032] Figure 2 It is a schematic structural diagram of the back contact battery of the present invention.

[0033] Figure 3 An electron microscope image of a front inverted pyramid structure in one embodiment; Figure 4 This is an electron microscope image of a back positive pyramid structure in one embodiment.

[0034] Description of Reference Numerals Silicon wafer 1, first tunneling oxide layer 2, first doped polysilicon layer 3, intrinsic amorphous silicon layer 4, second doped amorphous silicon 5, second tunneling oxide layer 6, second doped amorphous layer 7, anti-reflection layer 8, transparent conductive film layer 9, metal electrode 10; first semiconductor opening area W2, second semiconductor opening area W1, isolation trench W3. DETAILED DESCRIPTION

[0035] In the present invention, unless otherwise specified, directional words such as "upper, lower, left, right" are generally understood in conjunction with the directions shown in the drawings and actual applications.

[0036] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0037] In the present invention, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" or "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" or "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0038] The endpoints and any values ​​of the ranges disclosed herein are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article. Among them, the terms "optional" and "optional" all mean that they may be included or not included (or may be present or not).

[0039] In the present invention, the area close to the silicon wafer is referred to as the inside, and the area far from the silicon wafer is referred to as the outside.

[0040] In the present invention, the reflectivity is obtained by ultraviolet spectrophotometer testing, and the size and height of the pyramid are measured by SEM images.

[0041] In a first aspect, the present invention provides a method for preparing a back contact battery having a front inverted pyramid structure, comprising the following steps: S1. The silicon wafer is subjected to a gettering treatment. The gettering treatment process includes: depositing a phosphorus-rich silicon oxide layer with a thickness of 100-1000Å on both sides of the silicon wafer. The phosphorus doping concentration of the phosphorus-rich silicon oxide layer is 1e18cm -3 -5e19cm -3 , preferably 1.5e18cm -3 -5e19cm -3 ; Then high temperature diffusion is carried out, and the temperature of high temperature diffusion is 700-900℃; S2, removing the phosphorus-rich silicon oxide layer on the back of the silicon wafer, and then single-sided polishing the surface; S3, forming a first semiconductor layer on the polished surface of the silicon wafer S2; S4, cleaning and removing the PSG layer naturally formed on the surface of the first semiconductor layer; S5, depositing a mask layer on the surface of the first semiconductor layer; S6, performing a first etching on the mask layer on the back side of the S5 silicon wafer to remove the mask layer and a corresponding portion of the first semiconductor layer, thereby forming second semiconductor opening regions distributed at intervals; S7, polishing to remove the damaged layer in the second semiconductor opening area on the back side and the first semiconductor coating layer on the front side; S8, removing the phosphorus-rich silicon oxide layer on the front side, and then using a texturing solution including alkali and a cyclodextrin texturing additive to perform texturing cleaning, so as to form an inverted pyramid texturing surface on the front side, and simultaneously form a positive pyramid texturing surface in the second semiconductor opening region on the back side, and removing at least a portion of the thickness of the mask layer (preferably removing more than half of the thickness of the mask layer); S11, forming a second semiconductor layer on the back side.

[0042] The thickness of the phosphorus-rich silicon oxide layer is 100-1000Å, for example, 100Å, 200Å, 300Å, 400Å, 500Å, 600Å, 700Å, 800Å, 900Å, 1000Å, etc. and the range between any two point values, preferably 200-1000Å.

[0043] In the present invention, the phosphorus-rich silicon oxide layer on the back is removed in S2, and the phosphorus-rich silicon oxide layer on the front is retained, and the phosphorus-rich silicon oxide layer is used to protect the front damaged layer. The front coating layer (polycrystalline) is first removed by polishing in S7, and then the phosphorus-rich silicon oxide layer on the front is removed by hydrofluoric acid in S8.

[0044] In some preferred embodiments of the present invention, the reflectivity of the front inverted pyramid velvet surface is 7%-8%, and the reflectivity of the back positive pyramid velvet surface is 11%-12%. The different pyramid velvet structures on the front and back sides of the back contact battery of the present invention are matched with their respective appropriate reflectivities, which is conducive to effectively reducing the reflectivity of the front and back sides, thereby enhancing the anti-reflection effect.

[0045] In some preferred embodiments of the present invention, in S8, the corresponding pyramid lateral size of the front inverted pyramid velvet surface is 0.8-2μm, and the pyramid height is 0.5-0.8μm, and the corresponding pyramid lateral size of the back positive pyramid velvet surface is 1-3μm, and the pyramid height is 1.0-1.5μm. The different pyramid velvet structures on the front and back sides of the back contact battery of the present invention are matched with their own appropriate sizes and heights, which is more conducive to the passivation of the front and back film layers.

[0046] In some preferred embodiments of the present invention, the mass content of cyclodextrin in the cyclodextrin-containing texturing additive in S8 is 0.0001wt%-0.1wt%.

[0047] In some preferred embodiments of the present invention, the texturing cleaning described in S8 includes at least two steps: firstly, a first texturing liquid including a first cyclodextrin-containing texturing additive is used for the first texturing, and then a second texturing liquid including a second cyclodextrin-containing texturing additive is used for the second texturing, wherein the mass content of cyclodextrin in the first cyclodextrin-containing texturing additive is 0.001wt%-0.1wt%, and the mass content of cyclodextrin in the second cyclodextrin-containing texturing additive is 0.0001wt%-0.01wt%. The two-step texturing is performed using corresponding texturing liquids with different cyclodextrin contents, and the reflectivity of the front inverted pyramid is 7%-8%, the anti-reflection effect is greatly enhanced, and the short-circuit current of the back contact battery is further improved. The reflectivity of the back positive pyramid is 11%-12%, and the passivation performance of the second semiconductor layer is not affected, while meeting the requirements of the pyramid morphology on the front and back sides.

[0048] The contents of other solutes except cyclodextrin in the first cyclodextrin-containing texturing additive and the second cyclodextrin-containing texturing additive of the present invention are the same, which will not be described in detail here.

[0049] In some preferred embodiments of the present invention, the cyclodextrin-containing texturing additive also includes: 0.01 wt%-0.5 wt% of sodium lignin sulfonate, 0.1 wt%-5 wt% of sodium alginate, and 0.05 wt%-0.1 wt% of sodium benzoate, based on the total amount of the cyclodextrin-containing texturing additive.

[0050] The use of an appropriate amount of sodium lignin sulfonate can form densely distributed nucleation points, and an appropriate amount of sodium alginate and sodium benzoate can control the reaction speed. Combined with cyclodextrin, it is more conducive to forming a pyramid velvet surface with uniform size.

[0051] In some preferred embodiments of the present invention, the alkali in the S8 texturing solution includes sodium hydroxide and / or potassium hydroxide, the mass content of the alkali in the texturing solution is 1wt%-2wt%, and the mass content of the cyclodextrin texturing additive is 0.5wt%-2wt%. Here, the texturing solution can be, for example, the first texturing solution or the second texturing solution, each of which is independently selected within the above-mentioned components and their content ranges.

[0052] In some preferred embodiments of the present invention, the conditions for the texturing and cleaning in S8 include: the texturing temperature is 70° C.-85° C., and the texturing time is 8-15 min.

[0053] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the front side is removed in S8 by using a chain machine, and the speed of the transmission roller of the chain machine is controlled to be 1.2-3.0 m / min.

[0054] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the front side is removed in S8 by using a solution containing hydrofluoric acid, wherein the mass content of the hydrofluoric acid in the solution is 5wt%-10wt%.

[0055] The method of removing the mask layer in S8 of the present invention can be carried out in accordance with the prior art, as long as the mask layer can be removed. Exemplarily, the solution for removing the mask layer is a mixed solution containing hydrofluoric acid and water, the mass content of hydrofluoric acid is 5wt%-10wt%, the treatment temperature is 20℃-30℃, and the reaction time is 120-600s.

[0056] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer in S1 is deposited with POCl 3 The phosphorus source is diffused by low pressure, and the conditions of low pressure diffusion include: ambient pressure of 30-100mba, diffusion time of 5-20min. The present invention uses a suitable low pressure diffusion deposition method to deposit the phosphorus-rich silicon oxide layer, which is conducive to the uniform distribution of phosphorus in the silicon oxide layer.

[0057] In some preferred embodiments of the present invention, the high temperature diffusion time in S1 is 90-120 min, which is more conducive to enhancing the external gettering effect of phosphorus.

[0058] The silicon wafer S1 of the present invention may be an original silicon wafer.

[0059] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the back of the silicon wafer is removed in S2 by using a chain machine, and the speed of the transmission roller of the chain machine is controlled to be 1.2-3.0 m / min.

[0060] In some preferred embodiments of the present invention, the phosphorus-rich silicon oxide layer on the back of the silicon wafer is removed by using a solution containing hydrofluoric acid, wherein the mass content of hydrofluoric acid in the solution is 5wt%-10wt%.

[0061] In some preferred embodiments of the present invention, the single-sided polishing in S2 makes the single-sided etching depth of the silicon wafer 2-5 μm, preferably 2.5-5 μm, which is more conducive to improving the surface flatness of the back side, thereby improving the passivation performance of the first semiconductor layer.

[0062] The first etching in S6 of the present invention may be, for example, laser etching, and the corresponding damaged layer in S7 is a laser damaged layer.

[0063] Preferably, the polishing in S7 makes the single-side corrosion depth within 1 μm, preferably 0.6-1 μm, which can effectively remove the damaged layer and the plating around with a low etching amount, while preventing over-polishing from damaging the passivation film layer on the back.

[0064] In the present invention, the single-side corrosion depth of the silicon wafer is calculated by weighing.

[0065] In some preferred embodiments of the present invention, the single-side polishing in S2 uses a mixed polishing solution containing alkali, polishing additives and water, wherein the alkali is potassium hydroxide and / or sodium hydroxide, the mass content of the alkali is 2wt%-5wt%, and the mass content of the polishing additive is 0.5wt%-2wt%. The polishing additive is commercially available.

[0066] Preferably, the conditions for S2 single-side polishing include: a reaction temperature of 60-75° C. and a reaction time of 90-150 s.

[0067] Preferably, in the present invention, the PSG layer is cleaned and removed in S4 using a solution containing hydrofluoric acid, wherein the mass content of hydrofluoric acid in the solution is 1wt%-5wt%. Preferably, the conditions for cleaning and removing the PSG layer include: a reaction time of 1-3min and a reaction temperature of 20-30°C.

[0068] In some preferred embodiments of the present invention, the polishing in S7 uses a mixed polishing solution containing alkali, polishing additives and water, wherein the alkali is potassium hydroxide and / or sodium hydroxide, the mass content of the alkali is 1wt%-3wt%, and the mass content of the polishing additive is 0.5wt%-2wt%. The polishing additive is commercially available.

[0069] Preferably, the polishing conditions in S7 include: a reaction temperature of 60-75° C. and a reaction time of 30-180 s.

[0070] The single-side polishing in S2 and the polishing in S7 of the present invention can be performed independently using a tank-type cleaning machine.

[0071] In some preferred embodiments of the present invention, the method for preparing a back contact battery with a front inverted pyramid structure further comprises: S9, forming a passivation layer and an anti-reflection layer in sequence on the front side of the silicon wafer obtained in S8; S10, secondary cleaning to remove the anti-reflection layer and passivation layer on the back.

[0072] Preferably, the passivation layer includes a second tunneling oxide layer and a second doped amorphous layer. The front passivation layer adopts a tunneling amorphous structure, which is more conducive to taking into account the passivation of the front side and reducing the equipment cost of plate-type PECVD.

[0073] Further preferably, the thickness of the second tunneling oxide layer is 0.5-1 nm, and the thickness of the second doped amorphous layer is 1-5 nm. The thickness of the second tunneling oxide layer and the second doped amorphous layer only needs to be maintained at 50%-80% of the existing process to maintain the same passivation, and due to the thinning of the doped amorphous layer, the parasitic absorption of the film layer is reduced, which is more conducive to increasing the current, thereby improving the short-circuit current and battery efficiency of the back contact battery.

[0074] The second tunneling oxide layer, the second doped amorphous layer and the anti-reflection layer of the present invention can be independently prepared by, for example, a tubular PECVD method. The second doped amorphous layer is preferably N-type doped amorphous silicon.

[0075] The method of removing the anti-reflection layer and the passivation layer on the back side in S10 of the present invention can refer to the prior art respectively. Exemplarily, a chain cleaning machine is used to remove the anti-reflection layer, and the solution for removing the anti-reflection layer is an aqueous solution containing hydrofluoric acid, the mass content of hydrofluoric acid is 5wt%-10wt%, the reaction temperature is 20-35°C, and the speed of the chain cleaning machine transmission roller is 1.2-3.0m / min. A tank cleaning machine is used to remove the passivation layer, and the solution for removing the passivation layer is a low-concentration alkali solution, the alkali solution is an alkali solution with a mass content of 0.5wt%-2wt%, wherein the alkali can be potassium hydroxide and / or sodium hydroxide, the reaction temperature is 30-50°C, and the reaction time is 30-120s; after completely removing the back side coating, a standard RCA solution is used for cleaning to obtain a clean interface.

[0076] The type and thickness of the anti-reflection layer may refer to the corresponding range in the prior art. For example, the anti-reflection layer is silicon nitride, and the thickness of the silicon nitride is 70-120 nm.

[0077] The first semiconductor layer of the present invention includes a first passivation layer and a first doped silicon layer, and the second semiconductor layer includes a second passivation layer and a second doped silicon layer. The first passivation layer and the second passivation layer are each independently a tunneling oxide layer or an intrinsic silicon layer. The first doped silicon layer and the second doped silicon layer are each independently polycrystalline silicon, amorphous silicon or microcrystalline silicon. The second doped silicon layer can be doped amorphous silicon or microcrystalline silicon. The intrinsic silicon layer is preferably an intrinsic amorphous silicon layer. One of the first doped polycrystalline silicon layer and the second doped silicon layer is N-type and the other is P-type.

[0078] In some preferred embodiments of the present invention, the first semiconductor layer comprises a first tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer comprises an intrinsic silicon layer and a second doped silicon layer. The use of a combined passivation structure, in conjunction with the specific preparation method of the present invention, is more conducive to improving the short-circuit current and battery efficiency of the battery. The intrinsic silicon layer is preferably intrinsic amorphous silicon, and the second doped silicon layer is preferably doped amorphous silicon or doped microcrystalline silicon.

[0079] The thickness and other parameters of the respective film layers contained in the first semiconductor layer and the second semiconductor layer of the present invention can refer to the prior art. For example, the thickness of the first tunneling oxide layer is 1-2nm, the thickness of the first doped polysilicon layer is 70-300nm, and the effective doping concentration is greater than 5e18cm -3 The thickness of the intrinsic silicon layer is 5-15nm, the thickness of the second doped silicon layer is 5-20nm, and the effective doping concentration is 1e18cm -3 -5e19cm -3 .

[0080] In some preferred embodiments of the present invention, the method for preparing a back contact battery with a front inverted pyramid structure further comprises: S12, performing a second etching opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region; S13, depositing a conductive film layer on the back surface obtained in S12; S14, performing a third etching opening on a portion of the conductive film layer between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove; S15, forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

[0081] In a second aspect, the present invention provides a back-contact battery with a front inverted pyramid structure, which is prepared by the preparation method of a back-contact battery with a front inverted pyramid structure described in the first aspect.

[0082] The embodiments of the present invention are described in detail below, which are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0083] Example 1 A back contact battery is prepared by the following steps: S1, gettering treatment of original silicon wafer 1 (N-type single crystal silicon wafer); POCl 3 A layer with a thickness of 300Å and a phosphorus doping concentration of 1e19cm is deposited on the surface of an N-type single crystal silicon wafer 1 by low-pressure diffusion. -3The phosphorus-rich silicon oxide layer is subjected to high-temperature diffusion treatment to allow phosphorus to diffuse on the surface, thereby adsorbing metal impurities in the silicon wafer 1 on the surface of the silicon wafer 1; the high-temperature diffusion process is a heat treatment at 800°C for 100 minutes; the conditions for low-pressure diffusion include: an ambient pressure of 50mba and a diffusion time of 10 minutes.

[0084] S2, removing the phosphorus-rich silicon oxide layer on the back side, and then single-sided polishing the surface; A chain machine is used to remove the phosphorus-rich silicon oxide layer on the back of S1 silicon wafer 1. The solution used is a hydrofluoric acid solution with a hydrofluoric acid mass content of 8wt%. The reaction temperature is room temperature, and the chain machine drive roller speed is 2.0m / min.

[0085] The S2 silicon wafer 1 was single-sided polished using a tank cleaning machine. The polishing solution used was a mixed solution of potassium hydroxide, a polishing additive, and water, wherein the mass content of potassium hydroxide was 3wt%, the mass content of the polishing additive was 0.5wt%, the reaction temperature was 65°C, the reaction time was 120s, and the single-sided corrosion depth of the silicon wafer 1 after polishing was 3μm. S3, forming a first semiconductor layer on the polished surface of the S3 silicon wafer 1, the first semiconductor layer comprising a first tunneling oxide layer 2 (tunneling silicon oxide) and a first doped polysilicon layer 3 (N-type) sequentially formed on the back side; The thickness of the first tunneling oxide layer 2 is 1.5 nm, the thickness of the first doped polysilicon layer 3 is 100 nm, and the effective doping concentration is 5e19 cm -3 .

[0086] S4, cleaning and removing the PSG layer on the surface of the first semiconductor layer; The solution for removing the PSG layer is a solution containing hydrofluoric acid, the mass content of hydrofluoric acid is 2wt%, the reaction time is 2min, and the reaction temperature is 25°C.

[0087] S5, depositing a mask layer on the first semiconductor layer; S6, performing a first laser etching on the first semiconductor layer on the mask layer on the back side of the S4 silicon wafer 1 to remove the mask layer and a corresponding portion of the first semiconductor layer, thereby forming second semiconductor opening regions W1 distributed at intervals; S7, polishing to remove the laser damaged layer on the back and the first semiconductor coating layer on the front; A polishing method is used to remove the laser damaged layer of the second semiconductor opening area W1 and the coating layer of the first semiconductor on the front side. The polishing solution used is a mixed solution of sodium hydroxide, a polishing additive (commercially available) and water, wherein the mass content of sodium hydroxide is 2wt%, the mass content of the polishing additive is 0.5wt%, the reaction temperature is 65°C, the reaction time is 120s, and the single-sided corrosion depth of the polishing is 0.8μm.

[0088] S8, remove the phosphorus-rich silicon oxide layer on the front side, and then perform texturing and cleaning, and at the same time, form an inverted pyramid velvet surface and a positive pyramid velvet surface in the second semiconductor opening area W1 on the front side and the back side, respectively. Figure 1 As shown, all mask layers are removed; A chain machine is used to remove the phosphorus-rich silicon oxide layer on the front side of the S8 silicon wafer 1. The solution used is a hydrofluoric acid solution with a hydrofluoric acid mass content of 6wt%. The reaction temperature is room temperature and the chain machine drive roller speed is 2m / min.

[0089] During the texturing cleaning, texturing is carried out in two steps: firstly, a first texturing liquid including a first cyclodextrin texturing additive is used for the first texturing, and then a second texturing liquid including a second cyclodextrin texturing additive is used for the second texturing.

[0090] Among them, the first texturing: the first texturing liquid of potassium hydroxide, the first cyclodextrin-containing texturing additive and water is used, wherein the mass content of potassium hydroxide is 1%, and the mass content of the first cyclodextrin-containing texturing additive is 0.5%; the texturing time is 10 minutes, and the texturing temperature is 75°C. The first cyclodextrin-containing texturing additive contains the following ingredients: 0.05wt% of cyclodextrin, 0.1wt% of sodium lignin sulfonate, 0.5wt% of sodium alginate, 0.08wt% of sodium benzoate, and the balance is water.

[0091] Second texturing: A second texturing liquid of potassium hydroxide, a second cyclodextrin-containing texturing additive and water is used, wherein the mass content of potassium hydroxide is 1wt%, and the mass content of the texturing additive is 0.5wt%; the texturing time is 4min, and the texturing temperature is 70°C. The composition of the second cyclodextrin-containing texturing additive is basically the same as that of the first cyclodextrin-containing texturing additive, except that the concentration of the nucleating agent cyclodextrin contained is lower, specifically 0.001wt% of cyclodextrin.

[0092] After two steps of texturing, the reflectivity of the inverted pyramid on the front side is 7.23%, and the reflectivity of the positive pyramid on the back side is 11.05%. The lateral size of the pyramid on the inverted pyramid velvet surface on the front side is 0.8-1.0μm, and the pyramid height is 0.5-0.8μm. The lateral size of the pyramid on the positive pyramid velvet surface on the back side is 1-2μm, and the pyramid height is 1.0-1.5μm. The electron microscope images of the inverted pyramid structure on the front side and the positive pyramid structure on the back side are shown below. Figure 3 , Figure 4 shown.

[0093] The method for removing part of the mask layer is a solution etching method, the solution is a mixed solution of hydrofluoric acid and water, the hydrofluoric acid concentration is 7wt%, the processing temperature is 25°C, and the reaction time is 300s.

[0094] S9, forming a passivation layer and an anti-reflection layer 8 in sequence on the front side of the silicon wafer 1 by a tubular PECVD method; The passivation layer includes a second tunneling oxide layer 6 and an N-type second doped amorphous layer 7; the thickness of the second tunneling oxide layer 6 is 0.5 nm, and the thickness of the second doped amorphous layer 7 is 2 nm; the anti-reflection layer 8 is silicon nitride, and the thickness of silicon nitride is 110 nm.

[0095] S10, secondary cleaning, removing the anti-reflection layer and passivation layer on the back side; A chain cleaning machine was used to remove the anti-reflection layer. The solution for removing the anti-reflection layer was an aqueous solution containing hydrofluoric acid, with a mass content of 6wt% of hydrofluoric acid, a reaction temperature of 25°C, and a chain cleaning machine transmission roller speed of 2m / min. A tank cleaning machine was used to remove the passivation layer. The solution for removing the passivation layer was a low-concentration alkali solution, which was a KOH solution with a mass content of 1wt%, a reaction temperature of 40°C, and a reaction time of 80s. After completely removing the back coating, a standard RCA solution was used for cleaning to obtain a clean interface.

[0096] S11, forming a second semiconductor layer on the back side, the second semiconductor layer comprising an intrinsic amorphous silicon layer 4 and a second doped amorphous silicon layer 5 (P type) sequentially formed on the back side; The thickness of the intrinsic amorphous silicon layer 4 is 10 nm, the thickness of the second doped amorphous silicon layer 5 is 15 nm, and the effective doping concentration is 5e18 cm -3 .

[0097] S12, performing a second etching on the polished area on the back side of the S6 silicon wafer to remove the second semiconductor layer and form a first semiconductor opening area W2; S13, forming a transparent conductive film layer 9 to fully cover the back of the S7 silicon wafer; S14, performing a third etching on the transparent conductive film layer 9 on the back side of the S8 silicon wafer to form an isolation groove W3; after etching, the resistance between the first semiconductor and the second semiconductor is greater than 1 kΩ; S15, forming metal electrodes 10 on the outer surfaces of the first semiconductor opening area W2 and the second semiconductor opening area W1 on the back side of the silicon wafer 1, respectively. Figure 2 shown.

[0098] Example 2 The method of Example 1 is referred to, except that the mass content of cyclodextrin in the first cyclodextrin-containing velvet additive is adjusted to 0.01wt%, the content of other solutes remains unchanged, and the balance is water. The corresponding reflectivity of the front inverted pyramid velvet surface is 7.52%, and the reflectivity of the back positive pyramid velvet surface is 11.38%; the corresponding pyramid lateral size of the front inverted pyramid velvet surface is 1.0-1.5μm, and the pyramid height is 0.5-0.8μm, and the corresponding pyramid lateral size of the back positive pyramid velvet surface is 1.5-2.5μm, and the pyramid height is 1.0-1.5μm.

[0099] Example 3 The method of Example 1 is referred to, except that the mass content of cyclodextrin in the second cyclodextrin-containing velvet-making additive is adjusted to 0.0005wt%, the contents of other solutes remain unchanged, and the balance is water. The reflectivity of the corresponding front inverted pyramid velvet surface is 7.15%, and the reflectivity of the back positive pyramid velvet surface is 11.28%.

[0100] Example 4 The method of Example 1 is followed, except that the low-pressure diffusion time in S1 is 5 min. The corresponding phosphorus-rich silicon oxide layer has a thickness of 100 Å and a phosphorus doping concentration of 1.8e19 cm -3 .

[0101] Example 5 The method of Example 1 is referred to, except that the polishing in S2 is controlled so that the single-sided corrosion depth is 2 μm. The process that needs to be adjusted to meet this condition is: the mass content of potassium hydroxide in the polishing solution is 2 wt %, and the reaction temperature is 60° C.

[0102] Example 6 The method of Example 1 is referred to, except that the polishing in S7 is controlled so that the single-side etching depth is 0.5 μm. The process that needs to be adjusted to meet this condition is: the reaction time is 60 s.

[0103] Comparative Example 1 The method of Example 1 is referred to, except that, in the texturing and cleaning step in the conventional post-texturing method (i.e., first forming a first semiconductor layer and a mask layer on the back side of a double-sided polished silicon wafer, then forming a second semiconductor opening area, then texturing and cleaning, then simultaneously depositing a second semiconductor layer on the back side, depositing a passivation layer and an anti-reflection layer on the front side; and then forming the first semiconductor opening area), a conventional MACE (metal assisted chemical etching) method is used to form an inverted pyramid velvet surface on both the front and back sides. Specifically, a copper catalyst and an etching solution are used to form the inverted pyramid velvet surface on the front and back sides, and then the metal ions on the surface are removed by cleaning.

[0104] Comparative Example 2 The method of Example 1 is referred to, except that a tank cleaning machine is used in S2 to remove the phosphorus-rich silicon oxide layer on both sides, and the diamond wire damage on the front side cannot be retained in the subsequent steps, resulting in the front side being polished, so that the front velvet surface is a positive pyramid velvet surface.

[0105] Comparative Example 3 The method of Example 1 is referred to, except that the cyclodextrin-containing texturing additive in S8 is replaced by a conventional texturing additive: its composition is 0.05 wt% hydrolyzed polyacrylonitrile ammonium salt, 0.1 wt% sodium dodecyl sulfonate, 0.5 wt% polyvinyl alcohol, 0.08 wt% sodium benzoate, and the balance is water. The amount of texturing additive remains unchanged.

[0106] Comparative Example 4 The method of Example 1 is referred to, except that cyclodextrin is not added to the specific texturing additive in S8.

[0107] Test Case The back contact cells obtained in the above examples and comparative examples were subjected to performance tests, and the results are shown in Table 1.

[0108] Table 1

[0109] It can be seen from the above results that, compared with the comparative example, the embodiment of the present invention can form different pyramid morphologies on the front and back sides, which is beneficial to effectively reduce the front reflectivity while ensuring good back passivation performance, thereby facilitating the improvement of open circuit voltage, short circuit current and battery efficiency.

[0110] Furthermore, according to Example 1 and Examples 2-6, it can be seen that the adoption of the preferred solution of the present invention is more conducive to improving the open circuit voltage, short circuit current and battery efficiency.

[0111] The preferred embodiments of the present invention are described in detail above, but the present invention is not limited thereto. Within the technical concept of the present invention, the technical solution of the present invention can be subjected to a variety of simple modifications, including the combination of various technical features in any other suitable manner, and these simple modifications and combinations should also be regarded as the contents disclosed by the present invention and belong to the protection scope of the present invention.

Claims

1. A method for preparing a back contact battery with a front inverted pyramid structure, characterized in that: The steps include: S1. The silicon wafer is subjected to a gettering treatment. The gettering treatment process includes: depositing a phosphorus-rich silicon oxide layer with a thickness of 100-1000Å on both sides of the silicon wafer. The phosphorus doping concentration of the phosphorus-rich silicon oxide layer is 1e18cm -3 -5e19cm -3 ; Then high temperature diffusion is carried out, and the temperature of high temperature diffusion is 700-900℃; S2, removing the phosphorus-rich silicon oxide layer on the back of the silicon wafer, and then single-sided polishing the surface; S3, forming a first semiconductor layer on the polished surface of the silicon wafer S2; S4, cleaning and removing the PSG layer naturally formed on the surface of the first semiconductor layer; S5, depositing a mask layer on the surface of the first semiconductor layer; S6, performing a first etching on the mask layer on the back side of the S5 silicon wafer to remove the mask layer and a corresponding portion of the first semiconductor layer, thereby forming second semiconductor opening regions distributed at intervals; S7, polishing to remove the damaged layer in the second semiconductor opening area on the back side and the first semiconductor coating layer on the front side; S8, removing the phosphorus-rich silicon oxide layer on the front side, and then using a texturing liquid including alkali and a cyclodextrin texturing additive to perform texturing cleaning to form an inverted pyramid texturing surface on the front side, and simultaneously forming a positive pyramid texturing surface in the second semiconductor opening region on the back side, and removing more than half of the thickness of the mask layer; S11, forming a second semiconductor layer on the back side.

2. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: The reflectivity of the front inverted pyramid velvet surface is 7%-8%, and the reflectivity of the back positive pyramid velvet surface is 11%-12%; and / or, In S8, the corresponding pyramid lateral size of the inverted pyramid velvet surface on the front side is 0.8-2μm, and the pyramid height is 0.5-0.8μm, and the corresponding pyramid lateral size of the positive pyramid velvet surface on the back side is 1-3μm, and the pyramid height is 1.0-1.5μm.

3. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 2, characterized in that: The mass content of cyclodextrin in the cyclodextrin-containing texturing additive in S8 is 0.0001wt%-0.1wt%, and / or, The cyclodextrin-containing texturing additive also includes: based on the total amount of the texturing additive, 0.01 wt%-0.5 wt% of sodium lignin sulfonate, 0.1 wt%-5 wt% of sodium alginate, and 0.05 wt%-0.1 wt% of sodium benzoate.

4. The method for preparing a back contact battery with a front inverted pyramid structure according to any one of claims 1 to 3, characterized in that: S8 The texturing cleaning includes at least two steps: firstly, a first texturing liquid including a first cyclodextrin texturing additive is used for a first texturing, and then a second texturing liquid including a second cyclodextrin texturing additive is used for a second texturing, wherein the mass content of cyclodextrin in the first cyclodextrin texturing additive is 0.001wt%-0.1wt%, and the mass content of cyclodextrin in the second cyclodextrin texturing additive is 0.0001wt%-0.01wt%.

5. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: S8 The alkali in the texturing solution includes sodium hydroxide and / or potassium hydroxide, the mass content of the alkali in the texturing solution is 1wt%-2wt%, and the mass content of the cyclodextrin texturing additive is 0.5wt%-2wt%; and / or, The conditions for the texturing and cleaning in S8 include: the texturing temperature is 70°C-85°C, and the texturing time is 8-15 minutes.

6. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: In S8, the phosphorus-rich silicon oxide layer on the front side is removed by a chain machine, and the speed of the chain machine transmission roller is controlled to be 1.2-3.0m / min; and / or, In S8, the phosphorus-rich silicon oxide layer on the front side is removed by using a solution containing hydrofluoric acid, wherein the mass content of the hydrofluoric acid in the solution is 5wt%-10wt%.

7. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: The deposition of the phosphorus-rich silicon oxide layer in S1 is carried out by low-pressure diffusion using POCl3 as the phosphorus source. The conditions of the low-pressure diffusion include: an ambient pressure of 30-100 mba and a diffusion time of 5-20 min. And / or, the time of high temperature diffusion in S1 is 90-120 minutes.

8. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: In S2, the phosphorus-rich silicon oxide layer on the back of the silicon wafer is removed by a chain machine, and the speed of the chain machine driving roller is controlled to be 1.2-3.0m / min; and / or, The phosphorus-rich silicon oxide layer on the back of the silicon wafer is removed by using a solution containing hydrofluoric acid, wherein the mass content of hydrofluoric acid in the solution is 5wt%-10wt%.

9. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: The single-side polishing in S2 makes the single-side etching depth of the silicon wafer 2-5 μm; and / or the polishing in S7 makes the single-side etching depth within 1 μm.

10. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1 or 9, characterized in that: The single-side polishing in S2 uses a mixed polishing solution containing alkali, polishing additives and water, wherein the alkali is potassium hydroxide and / or sodium hydroxide, the mass content of the alkali is 2wt%-5wt%, and the mass content of the polishing additive is 0.5wt%-2wt%; the conditions for single-side polishing include: reaction temperature of 60-75°C, reaction time of 90-150s; and / or, The polishing in S7 uses a mixed polishing solution containing alkali, polishing additives and water, wherein the alkali is potassium hydroxide and / or sodium hydroxide, the mass content of the alkali is 1wt%-3wt%, and the mass content of the polishing additive is 0.5wt%-2wt%; the polishing conditions include: reaction temperature of 60-75°C, reaction time of 30-180s.

11. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: The method for preparing a back contact battery with a front inverted pyramid structure further comprises: S9, forming a passivation layer and an anti-reflection layer in sequence on the front side of the silicon wafer obtained in S8; wherein the passivation layer comprises a second tunneling oxide layer and a second doped amorphous layer; the thickness of the second tunneling oxide layer is 0.5-1 nm, and the thickness of the second doped amorphous layer is 1-5 nm; S10, secondary cleaning to remove the anti-reflection layer and passivation layer on the back.

12. The method for preparing a back contact battery with a front inverted pyramid structure according to claim 1, characterized in that: The first semiconductor layer includes a first tunneling oxide layer and a first doped polysilicon layer, and the second semiconductor layer includes an intrinsic silicon layer and a second doped silicon layer; and / or, The method for preparing a back contact battery with a front inverted pyramid structure further comprises: S12, performing a second etching opening on a portion of the second semiconductor layer on the back side of the silicon wafer to form a first semiconductor opening region spaced apart from the second semiconductor opening region; S13, depositing a conductive film layer on the back surface obtained in S12; S14, performing a third etching opening on a portion of the conductive film layer located between the first semiconductor opening region and the second semiconductor opening region to form an isolation groove; S15, forming metal electrodes on the outer surfaces of the corresponding conductive film layers in the areas where the first semiconductor opening region and the second semiconductor opening region are located.

13. A back contact battery with a front inverted pyramid structure, characterized in that: The battery is prepared by the method for preparing a back-contact battery with a front inverted pyramid structure as described in any one of claims 1 to 12.

Images