High-performance FPGA heterogeneous computing virtualization method and system based on vhost-user

Abstract

The invention discloses a vhost-user-based high-performance FPGA heterogeneous computing virtualization method and system, and the method comprises the steps: enabling a para-virtualization FPGA device driver to wait and obtain an FPGA heterogeneous computing request of a heterogeneous computing application of a client, and then writing data needing to be computed into a data queue in a large-page memory region shared with a host; the corresponding control command is sent to the control plane rear end to trigger the data plane rear end to obtain the data message from the data queue and send the data message to the FPGA manager of the host machine to execute a heterogeneous computing task; the data plane rear end obtains the execution result and then writes the execution result into a data queue of the large page memory area, and after the control plane rear end monitors the state change of the data queue, the para-virtualization FPGA device driver is notified to obtain the execution result from the data queue and return the execution result to the corresponding heterogeneous computing application. According to the method, the requirement for carrying out high-performance FPGA heterogeneous computing virtualization in the virtual machine is met, the data interaction efficiency is improved, and the extra overhead is reduced.

Description

Technical Field

[0001] The present invention relates to virtualization and heterogeneous computing technologies, and in particular to a vhost-user-based high-performance FPGA heterogeneous computing virtualization method and system. Background Art

[0002] FPGA heterogeneous computing is a very important trend in modern computing architecture. By combining different types of processors, such as FPGA+CPU, FPGA can provide significant advantages in performance, energy efficiency and flexibility. This computing model not only promotes the development of high-performance computing, but also provides solutions for many emerging application fields. With the continuous advancement of technology, the application prospects of FPGA heterogeneous computing will be broader.

[0003] Heterogeneous computing is a highly computing-intensive requirement. There is frequent data interaction between computing applications and heterogeneous computing hardware (such as FPGA hardware) that implements specific computing tasks. Therefore, there is an urgent need for a high-performance FPGA heterogeneous computing virtualization solution in a cloud computing virtualization scenario to support the use of the host machine's heterogeneous computing FPGA hardware in a virtual machine for high-performance heterogeneous computing.

[0004] Virtio-fpga is an FPGA solution implemented by virtio paravirtualization technology, which can be used to implement heterogeneous computing using FPGA devices in virtual machines. However, due to the limitations of virtio technology itself, virtio-fpga still needs multiple VM Exit (exit virtual machine) and VM Entry (return to virtual machine) operations when communicating data with virtual machines. Each VM Exit and VM Entry requires saving and restoring the runtime snapshot of the virtual machine, which generates a lot of additional overhead and limits the performance improvement of virtio-fpga. Summary of the invention

[0005] The technical problem to be solved by the present invention is as follows: In view of the above-mentioned problems in the prior art, a high-performance FPGA heterogeneous computing virtualization method and system based on vhost-user are provided to meet the needs of high-performance FPGA heterogeneous computing virtualization in a virtual machine, improve data interaction efficiency, and reduce additional overhead.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is:

[0007] A high-performance FPGA heterogeneous computing virtualization method based on vhost-user is applied to a virtualization system including a host machine and a client machine, a paravirtualized FPGA device driver is provided in a virtual machine installed with the client machine, a virtual machine monitor VMM in the host machine is connected to a control plane backend of the paravirtualized FPGA, and a user state in the host machine is provided with a data plane backend of the paravirtualized FPGA. The method comprises the following steps:

[0008] If the client's heterogeneous computing application triggers an FPGA programming request, the paravirtualized FPGA device driver waits for and obtains the FPGA heterogeneous computing request, then writes the data to be calculated in the FPGA heterogeneous computing request into the data queue in the large page memory area shared with the host, and sends the corresponding control command to the control plane backend of the paravirtualized FPGA.

[0009] After receiving the control command, the control plane backend of the paravirtualized FPGA triggers the data plane backend of the paravirtualized FPGA to obtain the data message of the FPGA heterogeneous computing request from the data queue and send it to the FPGA manager of the host machine, so that the FPGA manager calls the FPGA device in the host machine to perform the heterogeneous computing task according to the FPGA heterogeneous computing request;

[0010] The data plane backend of the paravirtualized FPGA waits for and obtains the execution results of the heterogeneous computing tasks, and then writes the execution results into the data queue in the large page memory area. After the control plane backend of the paravirtualized FPGA detects the state change of the data queue, it notifies the paravirtualized FPGA device driver to obtain the execution results from the data queue and returns the execution results to the corresponding heterogeneous computing application.

[0011] Furthermore, before the heterogeneous computing application of the client triggers the FPGA programming request, it also includes:

[0012] Plan the required huge page memory size according to the data scale, and apply for the corresponding huge page memory in the host machine;

[0013] In the host machine, a virtual machine is started through a virtual machine monitor VMM, and a data queue is created in the large page memory, and a connection between the virtual machine monitor VMM and a control plane backend of the paravirtualized FPGA is established;

[0014] The control plane backend of the paravirtualized FPGA obtains memory information and queue information from the virtual machine monitor VMM, performs memory mapping according to the memory information, and performs function negotiation according to the queue information.

[0015] Furthermore, when applying for the corresponding large page memory in the host machine, it includes:

[0016] The virtual machine monitor VMM in the host machine applies for memory, clears the large page memory area that meets the size requirements, and locks the memory;

[0017] The virtual machine maps the locked large page memory area and the quantitative memory specified when starting the virtual machine to the address space of the virtual machine, so that the paravirtualized FPGA device driver in the virtual machine can use the large page memory.

[0018] Furthermore, when creating a data queue in the large page memory and establishing a connection between the virtual machine monitor VMM and the control plane backend of the paravirtualized FPGA, it includes:

[0019] Load the paravirtualized FPGA driver in the virtual machine and create a data queue in the large page memory area pre-allocated by the host machine;

[0020] A socket is created and a control plane backend of the paravirtualized FPGA is connected to a virtual machine monitor VMM through the socket, so that the control plane backend of the paravirtualized FPGA obtains device information, memory file descriptors and queue configuration of the virtual machine.

[0021] Furthermore, the socket is a Unix domain socket used for local inter-process communication.

[0022] Furthermore, the memory information is a file descriptor of a large page memory area of ​​a virtual machine, and when memory mapping is performed according to the memory information, it includes:

[0023] The control plane backend of the paravirtualized FPGA verifies the file descriptor;

[0024] After the verification is passed, the data plane backend of the paravirtualized FPGA maps the virtual machine large page memory area to its own address space according to the file descriptor to directly access the large page memory area for data reading and writing.

[0025] Furthermore, the queue information is metadata of the data queue, and when function negotiation is performed according to the queue information, it includes:

[0026] The control plane backend of the paravirtualized FPGA identifies functional features supported by the virtual machine and the paravirtualized FPGA device driver from the metadata, and negotiates with the virtual machine monitor VMM about specific features supported by the device to confirm compatibility and configuration;

[0027] After the control plane backend of the paravirtualized FPGA completes the negotiation with the virtual machine monitor VMM, the negotiation result is passed to the data plane backend of the paravirtualized FPGA;

[0028] The data plane backend of the paravirtualized FPGA configures the data structure and processing logic according to the information in the negotiation result.

[0029] Furthermore, before the client's heterogeneous computing application triggers the FPGA programming request, the client also includes a step of configuring a paravirtualized FPGA device driver, including: providing an interface for operating the paravirtualized FPGA device driver to listen to request messages and / or notification messages through the operation function fpga_manager_ops, and then calling the registration function fpga_mgr_register to register the interface with the FPGA manager.

[0030] Furthermore, when the data to be calculated in the FPGA heterogeneous computing request is written to the data queue in the large page memory area shared with the host machine, and when the execution result is written to the data queue in the large page memory area, the data is written to the data queue in the hugetlbfs.

[0031] The present invention also proposes a high-performance FPGA heterogeneous computing virtualization system based on vhost-user, including a host machine and a client machine, a virtual machine in which the client machine is installed is provided with a paravirtualized FPGA device driver, a virtual machine monitor VMM in the host machine is connected to a control plane backend of the paravirtualized FPGA, and a user state in the host machine is provided with a data plane backend of the paravirtualized FPGA, wherein:

[0032] When the heterogeneous computing application of the client triggers an FPGA programming request, the paravirtualized FPGA device driver waits for and obtains the FPGA heterogeneous computing request, then writes the data to be calculated in the FPGA heterogeneous computing request into the data queue in the large page memory area shared with the host, and sends the corresponding control command to the control plane backend of the paravirtualized FPGA;

[0033] The control plane backend of the paravirtualized FPGA is used to trigger the data plane backend of the paravirtualized FPGA to obtain the data message of the FPGA heterogeneous computing request from the data queue and send it to the FPGA manager of the host machine after receiving the control command, so that the FPGA manager calls the FPGA device in the host machine to perform the heterogeneous computing task according to the FPGA heterogeneous computing request;

[0034] The data plane backend of the paravirtualized FPGA is used to wait for and obtain the execution results of the heterogeneous computing tasks, and then write the execution results into the data queue in the large page memory area. After the control plane backend of the paravirtualized FPGA monitors the state change of the data queue, it notifies the paravirtualized FPGA device driver to obtain the execution results from the data queue and return the execution results to the corresponding heterogeneous computing application.

[0035] Compared with the prior art, the advantages of the present invention are:

[0036] (1) The present invention realizes the need for high-performance FPGA heterogeneous computing in a virtual machine by implementing a paravirtualized FPGA device driver inside the host machine and simulating a paravirtualized FPGA control plane backend device at the backend of the host-side virtual machine monitor VMM, while implementing the data path in the host user space as the paravirtualized FPGA data plane backend.

[0037] (2) The present invention uses pre-allocated large page memory for data interaction, thereby improving interaction efficiency, saving memory resources, page table resources, and TLB resources in the host machine, and also reducing the probability of TLB failure.

[0038] (3) The present invention uses the vhost-user protocol to focus data interaction on the paravirtualized FPGA device in the virtual machine and the paravirtualized FPGA data plane backend in the host user state, thereby avoiding additional consumption unrelated to data interaction. The paravirtualized FPGA data plane backend and the virtual machine are decoupled. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 Schematic diagram of the virtualization system structure of an embodiment of the present invention.

[0040] Figure 2 The figure is a flow chart of a method according to an embodiment of the present invention. DETAILED DESCRIPTION

[0041] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0042] Before introducing the specific embodiments of the present invention, related concepts or terms are first explained.

[0043] Virtual Machine Manager (VMM): VMM is another name for Virtual Machine Monitor (Hypervisor). Hypervisor is a software layer installed on physical hardware that can divide a physical machine into many virtual machines through virtualization, allowing multiple operating systems to run simultaneously on the same physical hardware. It maintains multiple efficient and isolated program environments that allow users to directly access real hardware.

[0044] QEMU: The full name is Quick Emulator. It is a powerful, open source virtual machine manager that can simulate fully functional computer devices. In the Linux environment, QEMU is usually used in conjunction with KVM, where KVM is responsible for the virtualization of the CPU, memory, etc., and QEMU is responsible for the virtualization of peripherals such as hard disks, network cards, and graphics cards.

[0045] KVM: The full name is Kernel-based Virtual Machine, which is a kernel-based virtual machine. It is a full virtualization solution that uses hardware virtualization technology.

[0046] Host OS: In a virtual machine, the host OS corresponds to the client OS. The former refers to the operating system installed on the physical machine, while the latter refers to the operating system installed in the virtual machine. For example, if we install Ubuntu on a physical computer and then create a virtual machine on this system and install the OpenEuler system, Ubuntu is the host OS.

[0047] Client (GuestOS): In virtualization, a computer can run multiple operating systems at the same time. Each virtualized operating system is called a client, that is, the operating system on the virtual machine.

[0048] VM Exit and VM Entry: In a virtual machine, when a specific instruction or event occurs, the control of the CPU needs to be transferred from the current virtual machine to the virtual machine manager in user mode (such as qemu) for processing (virtual machine exit, VMEntry), and then the control of the CPU is returned to the virtual machine (virtual machine entry, VM Entry). VM Exit and VM Entry require saving and restoring the runtime snapshot of the virtual machine when exiting, which is the main reason for the performance degradation of the virtualization system.

[0049] virtio: A paravirtualization technology based on which a virtual machine can sense that it is in a virtualized environment and load the corresponding virtio bus driver and virtio device driver, execute custom protocols to transmit data with the virtio device simulated by qemu, reduce VM Exit and VM Entry operations during data plane interaction, and thus improve the efficiency of I / O virtualization.

[0050] FPGA: Field-Programmable Gate Array, or field programmable gate array, is an integrated circuit that can implement various digital circuits through user configuration. It plays an important role in heterogeneous computing, especially in application scenarios that require high performance and low latency processing. Heterogeneous computing refers to the use of different types of processing units (such as CPU, GPU and FPGA) to complete tasks to achieve higher efficiency and performance.

[0051] Heterogeneous computing: Heterogeneous computing refers to the joint computing method using processors with different architectures in the system. The purpose of heterogeneous computing is to improve the computing power by combining hardware with different process architectures, different instruction sets, and different functions. Common scenarios for heterogeneous computing are preprocessing, computing, and post-processing tasks in the field of AI, where the CPU is used for preprocessing and post-processing, and GPU, FPGA, or ASIC is used for computing. The advantage of heterogeneous computing is that each processor can specialize in the computing it is good at, reducing switching and improving efficiency.

[0052] virtqueue: A queue used to transfer data between virtual machines and the host to reduce data duplication during transmission.

[0053] virtio-fpga: A semi-virtualized FPGA based on virtio technology, which can use the FPGA hardware device in the host machine in the virtual machine.

[0054] vhost-user: When the virtio device mainly communicates with the user-mode process of the host machine, the vhost-user technology can be used to divide the virtio device into a control plane component that specializes in processing control commands and a data plane component that specializes in processing data. The data plane component can directly communicate data with the virtual machine through memory sharing technology without the participation of qemu, thereby further reducing VM Exit and VM Entry operations and improving the efficiency of I / O virtualization.

[0055] vhost-user-fpga: A semi-virtualized FPGA based on vhost-user technology, consisting of a vhost-user-fpga device implemented by qemu and a vhost-user-fpga data plane backend running independently in user mode. The vhost-user-fpga data plane backend can directly communicate with the virtual machine.

[0056] Linux FPGAManager: is a framework and subsystem for managing FPGA devices in the Linux operating system. It is mainly used to support dynamic reconfiguration and management of FPGA devices, allowing users to load, unload and configure FPGAs at runtime.

[0057] fpga_manager_ops: is a set of structures and operations in the Linux kernel that interact with the FPGA Manager. It defines an interface that enables the FPGA driver to implement specific operations, such as loading bitstreams, unloading bitstreams, and querying status. These operations are usually called by the FPGA management subsystem in the kernel.

[0058] hugetlbfs: Huge TLB Filesystem, is a mechanism provided by the Linux kernel to manage huge pages to optimize memory management. It allows applications to use larger memory pages (such as 2MB or 1GB), thereby improving performance, especially when processing large amounts of data.

[0059] Huge Pages: is a memory management mechanism that allows the operating system to use memory pages larger than regular pages (usually 4KB). It is designed to improve performance, especially in memory-intensive applications.

[0060] TLB: Translation Lookaside Buffer, is a high-speed cache used to store the mapping of recently used virtual addresses to physical addresses.

[0061] virtio-crypto: is part of the Virtio specification, which aims to provide a standardized interface for encryption services in a virtualized environment. It allows virtual machines (VMs) to access and use encryption hardware or software accelerators on the host, thereby improving the performance and efficiency of encryption operations.

[0062] Unix domain socket: is a mechanism for communication between processes on the same computer. It is similar to a network socket, but is specifically used for local inter-process communication rather than transmitting data over a network.

[0063] The Chinese invention patent application "A unified paravirtualization framework for heterogeneous encryption and decryption computing resources" (publication number: CN116032638A) discloses a unified paravirtualization framework for heterogeneous encryption and decryption computing resources, involving the field of information security, including a paravirtualization backend module, a virtual machine monitor, a driver module, and a paravirtualization frontend module. The paravirtualization backend module receives a control plane sess session request from the virtual machine monitor and creates a session object in a local process, receives a data plane crypto encryption and decryption request from the paravirtualization frontend module and constructs a local crypto encryption and decryption request; the paravirtualization frontend module can be directly loaded by an application in a virtual machine as a virtual device engine, can construct simulated sess session requests and crypto encryption and decryption requests, and adopts a front-end and back-end architecture design. When facing different heterogeneous encryption and decryption resources, the solution provides high-performance and universal device virtualization for applications in virtual machines, eliminates virtualization support based on physical hardware, enables virtual devices and physical devices to be completely decoupled, and the number of virtual devices is unlimited. Although this solution does not require VM Exit and VM Entry operations, it focuses on encryption and decryption scenarios and does not involve FPGA heterogeneous computing. In addition, this solution is modified based on the virtio-crypto solution. The heterogeneity mentioned in this solution is for encryption hardware or software accelerators, which is irrelevant to the high-performance use of host FPGA hardware devices for computing in virtual machines, and is not compatible with various different FPGA hardware.

[0064] Embodiment 1

[0065] To achieve the goal of high-performance FPGA heterogeneous computing virtualization, there are the following technical obstacles that need to be overcome:

[0066] 1. It is necessary to be able to use the host machine's diverse FPGA hardware devices in the virtual machine, be compatible with various platforms, and not rely on the host machine's hardware architecture;

[0067] 2. The data interaction between the virtual machine and the host machine should be as simple as possible, reducing unnecessary processes, such as user state and kernel state switching, VM Exit and VM Entry operations;

[0068] 3. High-performance data interaction requires high efficiency. Virtual machines and host machines need to transmit large amounts of data efficiently.

[0069] In order to solve the above problems, this embodiment proposes a high-performance FPGA heterogeneous computing virtualization method based on vhost-user, called vhsot-user-fpga solution, which is applied in heterogeneous computing and cloud computing virtualization environments, such as virtual machines based on kvm+qemu, virtual machines based on xen, etc., and supports FPGA devices from various manufacturers, which is universal.

[0070] like Figure 1 As shown, the method of this embodiment is applied to a virtualization system including a host machine and a client machine, a paravirtualized FPGA device driver is provided in the virtual machine installed with the client machine, also called virtio-fpga device driver, the virtual machine monitor VMM in the host machine adopts qemu, qemu is connected to a paravirtualized FPGA control plane backend, also called vhost-user-fpga control plane backend, and the user state in the host machine is provided with a paravirtualized FPGA data plane backend, also called vhost-user-fpga data plane backend. The overall idea is as follows:

[0071] 1. In order to achieve compatibility with diverse hardware platforms and be platform-independent, a semi-virtualized FPGA device driver, also called virtio-fpga device driver, is added to the virtual machine. This device is independent of the virtual machine platform and is used to receive and process heterogeneous computing requests in the virtual machine. Correspondingly, a semi-virtualized FPGA data plane backend program is also added to the host user state to receive requests from the virtual machine. Considering the existence of diverse FPGA hardware devices, an FPGA manager with a unified interface is used in the host to uniformly distribute and process requests, thereby achieving compatibility with various FPGA hardware devices. When the client GuestOS is started, the virtio-fpga device driver is set according to the custom dynamically configured parameters, and corresponding multiple queues are created for monitoring, and registered with the FPGA manager for dynamic FPGA request interception.

[0072] 2. In order to simplify the data interaction process between the virtual machine and the host machine as much as possible, the back-end data processing function of the virtio-fpga device is transferred outside the QEMU process, avoiding frequent switching between user mode and kernel mode, reducing the context switching overhead, and, by establishing a unix domain socket connection, realizing a highly efficient asynchronous event notification mechanism, avoiding the performance loss of event waiting for processing.

[0073] 3. In order to achieve high-efficiency and high-performance interaction requirements for large-scale data, it is necessary to reduce memory replication. When the virtual machine hypervisor starts the virtual machine, a portion of large page memory is pre-allocated for data interaction, and then a multi-queue memory area in the large page memory pre-allocated by virtio-fpga in the client GuestOS is established to directly access the resource consumption and performance consumption of copying data from the virtual machine to the host machine, realize zero-copy data transmission, and reduce CPU consumption and latency in data transmission. The vhost-user-fpga data plane backend directly accesses the virtual machine memory to write and read memory.

[0074] Based on the above ideas, Figure 2 As shown, the method of this embodiment includes the following steps:

[0075] S101) pre-configuration, specifically including:

[0076] Plan the required huge page memory size according to the data scale, and apply for the corresponding huge page memory in the host machine;

[0077] Start the virtual machine through qemu in the host machine. When the virtual machine starts, create a large page memory area shared with the host machine according to the reserved large page memory, create a data queue in the large page memory, and establish a connection between qemu and the control plane backend of the paravirtualized FPGA;

[0078] The control plane backend of the paravirtualized FPGA obtains memory information and queue information from qemu, performs memory mapping according to the memory information, and performs function negotiation according to the queue information to negotiate and set the data plane backend of the paravirtualized FPGA;

[0079] The client configures the paravirtualized FPGA device driver to perform dynamic FPGA request interception;

[0080] S102) If the heterogeneous computing application of the client triggers an FPGA programming request, the paravirtualized FPGA device driver waits for and obtains the FPGA heterogeneous computing request, then writes the data to be calculated in the FPGA heterogeneous computing request into a data queue in the large page memory area shared with the host, and sends the corresponding control command to the control plane backend of the paravirtualized FPGA;

[0081] S103) After receiving the control command, the control plane backend of the paravirtualized FPGA triggers the data plane backend of the paravirtualized FPGA to obtain the data message of the FPGA heterogeneous computing request from the data queue and send it to the FPGA manager of the host machine, so that the FPGA manager calls the FPGA device in the host machine to perform the heterogeneous computing task according to the FPGA heterogeneous computing request;

[0082] S104) The data plane backend of the paravirtualized FPGA waits for and obtains the execution result of the heterogeneous computing task, and then writes the execution result into the data queue in the large page memory area. After the control plane backend of the paravirtualized FPGA monitors the state change of the data queue, it notifies the paravirtualized FPGA device driver to obtain the execution result from the data queue and returns the execution result to the corresponding heterogeneous computing application.

[0083] Through the above steps, the vhsot-user-fpga solution of this embodiment is composed of the vhost-user-fpga control plane backend (control plane backend of paravirtualized FPGA) in QEMU, the vhost-user-fpga data plane backend (data plane backend of paravirtualized FPGA) running independently in user mode, and the virtio-fpga device driver (device driver of paravirtualized FPGA) running in the virtual machine, wherein the vhost-user-fpga device materialized in QEMU is used to perform interactive operations on the control plane; and the vhost-user-fpga data plane backend can directly interact with the virtual machine without the need for VM Exit and VM Entry operations, thereby meeting the high-performance and frequent large-scale data interaction requirements of the FPGA hardware in the virtual machine and the host machine, improving the throughput and interaction timeliness, and meeting the high-performance heterogeneous computing requirements of the FPGA in the virtual machine.

[0084] The following uses Linux as the client GuestOS and the host HostOS, QEMU / kvm as an example to explain the relevant content in detail.

[0085] In step S101 of this embodiment, when starting the virtual machine through qemu, it is necessary to enable shared huge page memory and pass in the unix domain socket. In order to efficiently interact with large-scale data, a part of the huge page memory is pre-allocated when starting the virtual machine. Specifically, firstly, the required huge page memory size is intelligently planned according to the scale of the data, and the host virtual memory is applied. When applying for the corresponding huge page memory in the host, it includes:

[0086] The qemu in the host machine applies for memory. After receiving the memory application, the host machine clears the large page memory area that meets the size requirements and locks the memory.

[0087] KVM is responsible for creating and managing the memory space of the virtual machine. The KVM virtual machine maps the locked large page memory area and the quantitative memory specified when starting the virtual machine to the address space of the virtual machine so that the paravirtualized FPGA device driver (virtio-fpga device driver) in the virtual machine can use the pre-allocated large page memory. KVM ensures that the shared large page memory area is accessible between the virtual machine and the backend, and enables the acceleration function to optimize the performance of the virtual machine.

[0088] In step S101 of this embodiment, when creating a data queue in the large page memory and establishing a connection between qemu and the control plane backend of the paravirtualized FPGA, it includes:

[0089] Load the paravirtualized FPGA driver in the virtual machine and create a data queue in the large page memory area pre-allocated by the host machine;

[0090] A socket is created and a control plane backend of the paravirtualized FPGA is connected to qemu through the socket, so that the control plane backend of the paravirtualized FPGA obtains device information, memory file descriptors, and queue configurations of the virtual machine.

[0091] Specifically, when the virtual machine starts, it loads the virtio-fpga driver and creates multiple queues in the pre-allocated large page memory area for data exchange according to the specified parameters. At the same time, a unix domain socket is created, and the control plane backend of the paravirtualized FPGA (vhost-user-fpga control plane backend) establishes a connection with qemu through the unix domain socket. This allows the vhost-user-fpga control plane backend to obtain the device information, memory file descriptors, and Virtio queue configuration of the virtual machine, in preparation for the next step of passing this information to the data plane backend of the paravirtualized FPGA (vhost-user-fpga data plane backend).

[0092] In step S101 of this embodiment, when the control plane backend of the paravirtualized FPGA obtains memory information and queue information from qemu, specifically, qemu sends the file descriptor of the virtual machine large page memory area to the vhost-user-fpga control plane backend through the unix domain socket, and at the same time, qemu sends the metadata of the team established by the virtio-fpga device driver (such as the descriptor table, available and used ring buffer addresses) to the vhost-user-fpga control plane backend.

[0093] In step S101 of this embodiment, when memory mapping is performed according to memory information, after the vhost-user-fpga control plane backend receives it and performs basic verification checks, the vhost-user-fpga data plane backend creates the same multi-queues and performs memory mapping, thereby allowing the vhost-user-fpga data plane backend to directly access this pre-allocated shared large page memory area for data reading and writing, specifically including:

[0094] The control plane backend of the paravirtualized FPGA verifies the file descriptor;

[0095] After the verification is passed, the data plane backend of the paravirtualized FPGA maps the virtual machine large page memory area to its own address space according to the file descriptor to directly access the large page memory area for data reading and writing.

[0096] In step S101 of this embodiment, when function negotiation is performed according to queue information, the vhost-user-fpga control plane backend performs vhost-user-fpga data plane backend function area negotiation processing after receiving the queue information, and qemu negotiates with the vhost-user-fpga control plane backend about the features supported by the device to determine the device configuration, avoid compatibility issues, and implement the vhost-user-fpga backend (data plane, control plane) and virtio-fpga driver function negotiation, specifically including:

[0097] The control plane backend of the paravirtualized FPGA identifies functional features supported by the virtual machine and the paravirtualized FPGA device driver from the metadata, and negotiates with qemu the specific features supported by the device to confirm compatibility and configuration;

[0098] After the control plane backend of the paravirtualized FPGA completes the negotiation with qemu, the negotiation result is passed to the data plane backend of the paravirtualized FPGA;

[0099] The data plane backend of the paravirtualized FPGA configures the data structure and processing logic according to the information in the negotiation result. In this embodiment, when configuring the data structure, the data structure of each Virtio queue can be initialized according to the Virtio queue configuration information transmitted by the control plane, such as setting the descriptor table, the address of the available and used ring buffers and related pointers to ensure that the data plane can correctly read and write data packets. When configuring the processing logic, new data on the available ring buffer can be monitored by reading descriptors, processing data, updating ring buffer pointers, etc., data processing can be performed according to the business logic, and the processing results can be written back to the used ring buffer.

[0100] After performing memory mapping according to the memory information and function negotiation according to the queue information, the vhost-user-fpga control plane backend passes the memory and queue information obtained from qemu to the vhost-user-fpga data plane backend and starts data plane processing. After the data plane is started, it can directly access the large page memory shared by the virtual machine to achieve efficient data forwarding.

[0101] In step S101 of this embodiment, when the client configures the para-virtualized FPGA device driver, it specifically provides an interface for operating the para-virtualized FPGA device driver through the operation function fpga_manager_ops, and then calls the registration function fpga_mgr_register to register the interface with the client's FPGA manager. The interface provided by the operation function fpga_manager_ops is used to monitor request messages or notification messages received by the client or the virtual machine that installs the client.

[0102] In step S102 of this embodiment, when the data to be calculated in the FPGA heterogeneous computing request is written to the data queue in the large page memory area shared with the host machine, the request is specifically written to multiple data queues of hugetlbfs to send the data.

[0103] In step S102 of this embodiment, when the corresponding control command is sent to the control plane backend of the paravirtualized FPGA, specifically, after the virtio-fpga device driver in the virtual machine writes the data, it triggers the control command message to be sent to the vhost-user-fpga control plane backend.

[0104] In step S103 of this embodiment, after receiving the control command, the vhost-user-fpga control plane backend triggers the vhost-user-fpga data plane backend to directly access the virtual machine memory. After the vhost-user-fpga data plane backend of the host HostOS user space detects the asynchronous event notification, it obtains the data message sent by the client GusetOS from the corresponding multiple data queues of hugetlbfs, and sends it to the FPGA manager of the host, i.e., FPGA manager. The FPGA manager analyzes and processes the FPGA request, intelligently calls the FPGA manager of the corresponding hardware platform to perform FPGA hardware task processing, and then uses FPGA devices from multiple different hardware manufacturers in the host to perform heterogeneous computing.

[0105] In step S104 of this embodiment, after processing the FPGA request, the FPGA hardware device on the host machine HostOS side returns the result to the vhost-user-fpga data plane backend in sequence. The vhost-user-fpga data plane backend analyzes and processes the request result and encapsulates it and sends it to multiple data queues in hugetlbfs, thereby writing the execution result to the data queue in the large page memory area. The vhost-user-fpga control plane backend on the host machine HostOS side detects that the queue status has changed, and notifies the virtual machine in qemu through the unix domain socket. Correspondingly, after the virtio-fpga device driver on the client machine GuestOS side monitors the message, it takes out the result of the task execution and returns it to the heterogeneous computing application in the user space.

[0106] Embodiment 2

[0107] This embodiment proposes a high-performance FPGA heterogeneous computing virtualization system based on vhost-user, including a host machine and a client machine, a virtual machine in which the client machine is installed is provided with a paravirtualized FPGA device driver, a virtual machine monitor VMM in the host machine adopts qemu, qemu is connected to a control plane backend of the paravirtualized FPGA, and a user state in the host machine is provided with a data plane backend of the paravirtualized FPGA, wherein:

[0108] When the heterogeneous computing application of the client triggers an FPGA programming request, the paravirtualized FPGA device driver waits for and obtains the FPGA heterogeneous computing request, then writes the data to be calculated in the FPGA heterogeneous computing request into the data queue in the large page memory area shared with the host, and sends the corresponding control command to the control plane backend of the paravirtualized FPGA;

[0109] The control plane backend of the paravirtualized FPGA is used to trigger the data plane backend of the paravirtualized FPGA to obtain the data message of the FPGA heterogeneous computing request from the data queue and send it to the FPGA manager of the host machine after receiving the control command, so that the FPGA manager calls the FPGA device in the host machine to perform the heterogeneous computing task according to the FPGA heterogeneous computing request;

[0110] The data plane backend of the paravirtualized FPGA is used to wait for and obtain the execution results of the heterogeneous computing tasks, and then write the execution results into the data queue in the large page memory area. After the control plane backend of the paravirtualized FPGA monitors the state change of the data queue, it notifies the paravirtualized FPGA device driver to obtain the execution results from the data queue and return the execution results to the corresponding heterogeneous computing application.

[0111] In summary, the present invention proposes a high-performance FPGA heterogeneous computing virtualization method and system based on vhost-user, which realizes the demand for high-performance use of FPGA heterogeneous computing in virtual machines by implementing virtio-fpga device driver in the virtual machine kernel and implementing back-end simulation of vhost-user-fpga control plane back-end device in the virtual machine monitor on the host side, combined with the user-state vhost-user-fpga data plane back-end on the host side. It has the following advantages:

[0112] (1) The problem of high-performance FPGA heterogeneous computing not being able to be performed in virtual machines is solved.

[0113] (2) Based on the virtio framework, the virtio-pci bus can be used to allow the simulated device to dynamically allocate bus addresses.

[0114] (3) It can reduce the steps required for data interaction between the virtual machine and the host machine: through the vhost-user technology, data-related processing is offloaded to the host machine's user-mode process vhost-user-fpga data plane backend. When the virtio-fpga device driver in the virtual machine sends data to the host machine, there is no need to perform VM Exit and VM Entry operations through kvm, nor is there any need for memory copying. Instead, the vhost-user-fpga data plane backend directly reads the virtual machine memory and processes the data.

[0115] (4) HUGETLBFS is used, which supports large-scale batch data transmission on the one hand, and reduces memory allocation frequency and page table consumption on the other hand: when the virtual machine creates a virtio-fpga device driver, a shared memory application is made for subsequent data storage. When the applied shared memory is used up and there is no space that can be reused, it is necessary to apply for shared memory again; when heterogeneous computing operates large amounts of data, frequent memory applications seriously affect the efficiency of data interaction (it is necessary to wait for the shared memory application to be completed before writing data), thereby hindering the performance of large-scale computing; the present invention uses large memory pages, and the memory applied for a single time is large (the size of the large memory page used can be configured in the virtio-fpga kernel module startup parameters in the virtual machine), reducing frequent memory applications.

[0116] (5) The capacity of data that can be transmitted concurrently at one time can be increased: vhost-user supports multiple queues, and the present invention supports multiple queue configuration (set in the startup parameters of the virtio-fpga kernel module in the virtual machine), thereby achieving dynamic adjustment of the capacity of data that can be transmitted concurrently at one time.

[0117] (6) The data transmission path is in the host user space, which minimizes the interaction between the host kernel and the user space and reduces a lot of user-mode and kernel-mode switching overhead.

[0118] (7) The vhost-user protocol used in this scheme is a set of message passing mechanisms designed to offload virtio data path processing from qemu to external elements (the handler vhost-user-fpga data plane backend that configures multiple queues and performs actual packet processing).

[0119] (8) This solution uses large page memory, which will reduce the memory consumption of the page table. At the same time, since the memory mapping relationship is reduced, the number of TLB failures will also be reduced.

[0120] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A high-performance FPGA heterogeneous computing virtualization method based on vhost-user, characterized in that: The method is applied to a virtualization system including a host machine and a client machine, wherein a paravirtualized FPGA device driver is provided in a virtual machine in which the client machine is installed, a virtual machine monitor VMM in the host machine is connected to a control plane backend of the paravirtualized FPGA, and a user state in the host machine is provided with a data plane backend of the paravirtualized FPGA. The method comprises the following steps: If the client's heterogeneous computing application triggers an FPGA programming request, the paravirtualized FPGA device driver waits for and obtains the FPGA heterogeneous computing request, then writes the data to be calculated in the FPGA heterogeneous computing request into the data queue in the large page memory area shared with the host, and sends the corresponding control command to the control plane backend of the paravirtualized FPGA. After receiving the control command, the control plane backend of the paravirtualized FPGA triggers the data plane backend of the paravirtualized FPGA to obtain the data message of the FPGA heterogeneous computing request from the data queue and send it to the FPGA manager of the host machine, so that the FPGA manager calls the FPGA device in the host machine to perform the heterogeneous computing task according to the FPGA heterogeneous computing request; The data plane backend of the paravirtualized FPGA waits for and obtains the execution results of the heterogeneous computing tasks, and then writes the execution results into the data queue in the large page memory area. After the control plane backend of the paravirtualized FPGA detects the state change of the data queue, it notifies the paravirtualized FPGA device driver to obtain the execution results from the data queue and returns the execution results to the corresponding heterogeneous computing application.

2. The high-performance FPGA heterogeneous computing virtualization method based on vhost-user according to claim 1 is characterized in that: Before the client's heterogeneous computing application triggers the FPGA programming request, it also includes: Plan the required huge page memory size according to the data scale, and apply for the corresponding huge page memory in the host machine; In the host machine, a virtual machine is started through a virtual machine monitor VMM, and a data queue is created in the large page memory, and a connection between the virtual machine monitor VMM and a control plane backend of the paravirtualized FPGA is established; The control plane backend of the paravirtualized FPGA obtains memory information and queue information from the virtual machine monitor VMM, performs memory mapping according to the memory information, and performs function negotiation according to the queue information.

3. The high-performance FPGA heterogeneous computing virtualization method based on vhost-user according to claim 2 is characterized in that: When applying for the corresponding large page memory in the host machine, it includes: The virtual machine monitor VMM in the host machine applies for memory, clears the large page memory area that meets the size requirements, and locks the memory; The virtual machine maps the locked large page memory area and the quantitative memory specified when starting the virtual machine to the address space of the virtual machine, so that the paravirtualized FPGA device driver in the virtual machine can use the large page memory.

4. The high-performance FPGA heterogeneous computing virtualization method based on vhost-user according to claim 2 is characterized in that: Creating a data queue in the large page memory and establishing a connection between a virtual machine monitor VMM and a control plane backend of a paravirtualized FPGA include: Load the paravirtualized FPGA driver in the virtual machine and create a data queue in the large page memory area pre-allocated by the host machine; A socket is created and a control plane backend of the paravirtualized FPGA is connected to a virtual machine monitor VMM through the socket, so that the control plane backend of the paravirtualized FPGA obtains device information, memory file descriptors and queue configuration of the virtual machine.

5. The high-performance FPGA heterogeneous computing virtualization method based on vhost-user according to claim 4 is characterized in that: The socket is a Unix domain socket used for local inter-process communication.

6. The high-performance FPGA heterogeneous computing virtualization method based on vhost-user according to claim 2 is characterized in that: The memory information is a file descriptor of a large page memory area of ​​a virtual machine. When memory mapping is performed according to the memory information, it includes: The control plane backend of the paravirtualized FPGA verifies the file descriptor; After the verification is passed, the data plane backend of the paravirtualized FPGA maps the virtual machine large page memory area to its own address space according to the file descriptor to directly access the large page memory area for data reading and writing.

7. The high-performance FPGA heterogeneous computing virtualization method based on vhost-user according to claim 2, characterized in that: The queue information is metadata of the data queue, and when function negotiation is performed according to the queue information, it includes: The control plane backend of the paravirtualized FPGA identifies functional features supported by the virtual machine and the paravirtualized FPGA device driver from the metadata, and negotiates with the virtual machine monitor VMM about specific features supported by the device to confirm compatibility and configuration; After the control plane backend of the paravirtualized FPGA completes the negotiation with the virtual machine monitor VMM, the negotiation result is passed to the data plane backend of the paravirtualized FPGA; The data plane backend of the paravirtualized FPGA configures the data structure and processing logic according to the information in the negotiation result.

8. The vhost-user-based high-performance FPGA heterogeneous computing virtualization method according to claim 1, characterized in that: Before the client's heterogeneous computing application triggers an FPGA programming request, the client also includes a step of configuring a paravirtualized FPGA device driver, including: providing an interface for operating the paravirtualized FPGA device driver to monitor request messages and / or notification messages through an operation function fpga_manager_ops, and then calling a registration function fpga_mgr_register to register the interface with the FPGA manager.

9. The vhost-user-based high-performance FPGA heterogeneous computing virtualization method according to claim 1, characterized in that: When writing the data to be calculated in the FPGA heterogeneous computing request to the data queue in the huge page memory area shared with the host machine, and when writing the execution result to the data queue in the huge page memory area, the data is written to the data queue in hugetlbfs.

10. A high-performance FPGA heterogeneous computing virtualization system based on vhost-user, characterized in that: The invention comprises a host machine and a client machine, wherein a virtual machine in which the client machine is installed is provided with a paravirtualized FPGA device driver, a virtual machine monitor VMM in the host machine is connected to a control plane backend of the paravirtualized FPGA, and a user state in the host machine is provided with a data plane backend of the paravirtualized FPGA, wherein: When the heterogeneous computing application of the client triggers an FPGA programming request, the paravirtualized FPGA device driver waits for and obtains the FPGA heterogeneous computing request, then writes the data to be calculated in the FPGA heterogeneous computing request into the data queue in the large page memory area shared with the host, and sends the corresponding control command to the control plane backend of the paravirtualized FPGA; The control plane backend of the paravirtualized FPGA is used to trigger the data plane backend of the paravirtualized FPGA to obtain the data message of the FPGA heterogeneous computing request from the data queue and send it to the FPGA manager of the host machine after receiving the control command, so that the FPGA manager calls the FPGA device in the host machine to perform the heterogeneous computing task according to the FPGA heterogeneous computing request; The data plane backend of the paravirtualized FPGA is used to wait for and obtain the execution results of the heterogeneous computing tasks, and then write the execution results into the data queue in the large page memory area. After the control plane backend of the paravirtualized FPGA monitors the state change of the data queue, it notifies the paravirtualized FPGA device driver to obtain the execution results from the data queue and return the execution results to the corresponding heterogeneous computing application.

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