Batch task processing method and device

Abstract

The present invention provides a batch task processing method and device, which is applied to a parallel computing system based on a GPU, including: obtaining a batch of secondary planning tasks including N secondary planning tasks; creating N×M parallel execution threads on the GPU, and correspondingly assigning the N secondary planning tasks to the N×M parallel execution threads; each secondary planning task corresponds to M threads, and each M threads execute the corresponding secondary planning task, including: using an iterative optimization method to determine the value of a target parameter, and determining the convergence state of the corresponding secondary planning task according to the value of the currently determined target parameter after each round of iteration; if all secondary planning tasks are not all in a converged state, instructing the target thread to execute the next round of iteration; if all secondary planning tasks are in a converged state, outputting the value of the target parameter determined by the N secondary planning tasks. The present application can improve task processing efficiency and computing speed.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing, and in particular to a batch task processing method and device. Background Art

[0002] In many fields such as robot motion planning, recommendation systems, image processing, and financial quantitative analysis, we often face multiple quadratic programming tasks, each of which requires an iterative optimization method to determine the value of the target parameter. However, the existing technology has a significant limitation: it can only solve the problem of one quadratic programming task at a time. This single-task solution method greatly limits the processing efficiency and computing speed, so there is an urgent need for a method that can efficiently process batch tasks. Summary of the invention

[0003] In view of this, the present application provides a batch task processing method and device to achieve efficient parallel processing of batch quadratic programming tasks, significantly improving task processing efficiency and computing speed, while also improving resource utilization.

[0004] This application provides the following solutions:

[0005] In a first aspect, a batch task processing method is provided, which is applied to a parallel computing system based on a graphics processing unit (GPU), and the method comprises:

[0006] Acquire a batch of quadratic planning tasks, where the batch of quadratic planning tasks includes N quadratic planning tasks, where N is a positive integer greater than 1;

[0007] Create N×M parallel execution threads on the GPU, and assign the N quadratic programming tasks to the N×M parallel execution threads; wherein each quadratic programming task corresponds to M parallel execution threads, and the M threads execute the corresponding quadratic programming tasks, and the execution of the corresponding quadratic programming tasks includes: using an iterative optimization method to determine the value of the target parameter in the quadratic programming task, and after each round of iteration, determining the convergence state of the corresponding quadratic programming task according to the value of the currently determined target parameter; and M is a positive integer greater than 1;

[0008] If all the secondary planning tasks are not in a converged state, instruct the target thread to execute the next round of iteration; the target thread at least includes: a thread corresponding to the secondary planning task in an unconverged state;

[0009] If all the quadratic programming tasks are in a converged state, the values ​​of the target parameters determined by the N quadratic programming tasks are output.

[0010] Optionally, the adopting an iterative optimization method to determine the value of the target parameter in the quadratic programming task includes:

[0011] Constructing an augmented Lagrangian function for the quadratic programming task;

[0012] In each round of iteration, an alternating direction multiplier algorithm is used to determine the value of the target parameter in the augmented Lagrangian function.

[0013] Optionally, instructing the target thread to execute a next round of iteration includes:

[0014] Updating the penalty coefficient in the alternating direction multiplier algorithm adopted by the target thread;

[0015] A command is sent to the target thread to trigger execution of the next round of iterations.

[0016] Optionally, determining the convergence state of the corresponding quadratic programming task according to the value of the currently determined target parameter includes:

[0017] Determine the principal residual according to the currently determined target parameter value and the constraint conditions pre-set for the corresponding quadratic programming task;

[0018] Determine the dual residual according to the value of the target parameter currently determined and the value of the target parameter determined in the previous round;

[0019] The main residual and the dual residual are used to determine a convergence state of a corresponding quadratic programming task.

[0020] Optionally, before each round of iteration begins, the iteration flag variable stored in the target storage space is set to an initial value;

[0021] After determining the convergence state of the corresponding quadratic programming task according to the value of the currently determined target parameter after each round of iteration, the method further includes:

[0022] When the convergence state of the corresponding quadratic programming task is a non-convergence state, performing a self-increment process on the iteration identification bit variable stored in the target storage space;

[0023] After each round of iteration, if the current value of the iteration flag variable is the initial value, it is determined that all quadratic programming tasks are in a converged state; if the current value of the iteration flag variable is not the initial value, it is determined that not all quadratic programming tasks are in a converged state.

[0024] Optionally, the step of self-incrementing the iteration identification bit variable stored in the target storage space is performed using an atomic write method.

[0025] Optionally, the method further includes:

[0026] The execution time of each of the threads is monitored, and an exception handling mechanism is triggered when the iteration is not completed within a predetermined time.

[0027] In a second aspect, a computer-readable storage medium is provided, on which a computer program is stored, and when the program is executed by a processor, the steps of any one of the methods in the first aspect are implemented.

[0028] In a third aspect, an electronic device is provided, including:

[0029] one or more processors; and

[0030] A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of the first aspects above.

[0031] According to a fourth aspect, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the steps of any one of the methods described in the first aspect.

[0032] The embodiment of the present application achieves efficient parallel processing of batch quadratic programming tasks by creating parallel execution threads using a parallel computing system on a GPU, significantly improving computing efficiency and resource utilization. At the same time, the accuracy of the calculation results is ensured by precisely controlling the iteration and convergence process of each quadratic programming task. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 A flowchart of a batch task processing method provided in an embodiment of the present application;

[0035] Figure 2 A schematic diagram of a process for determining the convergence state of a batch quadratic programming task provided in an embodiment of the present application;

[0036] Figure 3 A schematic diagram of an implementation process of N threads processing N secondary planning tasks in parallel provided in an embodiment of the present application;

[0037] Figure 4 A schematic block diagram of a batch task processing device provided in an embodiment of the present application;

[0038] Figure 5A schematic block diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0039] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. All other embodiments obtained by ordinary technicians in this field based on the embodiments in the present application belong to the scope of protection of this application.

[0040] The terms used in the embodiments of the present invention are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The singular forms "a", "said" and "the" used in the embodiments of the present invention and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0041] It should be understood that the term "and / or" used in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0042] There are already some technologies that use quadratic programming solvers to solve quadratic programming problems. This method has been widely used in many fields such as robot control, vehicle path planning, and financial investment. However, the implementation in the existing technology is limited to solving a single problem. This single-problem solving method is inefficient when dealing with multiple quadratic programming problems. In scenarios where multiple quadratic programming problems need to be processed in batches, the computing speed and processing efficiency are significantly limited.

[0043] In view of this, the present application provides a new idea, and provides a batch task processing method and device. Figure 1 The flowchart of the batch task processing method provided in the embodiment of the present application can be applied in a parallel computing system based on a graphics processor (GPU, Graphics Processing Unit), which can be set in any computer device with data storage and processing capabilities, can be set on the server side, and can also be set in a computer terminal with strong data processing capabilities. The method may include the following steps:

[0044] Step 101: Obtain a batch of quadratic programming tasks, where the batch of quadratic programming tasks includes N quadratic programming tasks, where N is a positive integer greater than 1;

[0045] Step 102: Create N×M parallel execution threads on the GPU, and assign N quadratic programming tasks to the N×M parallel execution threads; wherein each quadratic programming task corresponds to M parallel execution threads, and the M threads execute the corresponding quadratic programming tasks, and the execution of the corresponding quadratic programming tasks includes: using an iterative optimization method to determine the value of the target parameter, and after each round of iteration, determining the convergence state of the corresponding quadratic programming task according to the currently determined value of the target parameter; M is a positive integer greater than 1.

[0046] Step 103: If all the quadratic programming tasks are not in a converged state, instruct the target thread to execute the next round of iteration, and the target thread at least includes threads corresponding to the quadratic programming tasks in an unconverged state.

[0047] Step 104: If all the quadratic programming tasks are in a converged state, then the values ​​of the target parameters determined by the N quadratic programming tasks are output.

[0048] It can be seen that this application achieves efficient parallel processing of batch quadratic programming tasks by creating parallel execution threads using a parallel computing system on the GPU, significantly improving computing efficiency and resource utilization. At the same time, by precisely controlling the iteration and convergence process of each quadratic programming task, the accuracy of the calculation results is ensured.

[0049] The following describes in detail each step in the above process and the effects that can be further produced in conjunction with the embodiments.

[0050] First, the above step 101, namely, "obtaining a batch of quadratic planning tasks, where the batch of quadratic planning tasks includes N quadratic planning tasks, where N is a positive integer greater than 1" is described in detail in conjunction with an embodiment.

[0051] The quadratic programming task is an optimization problem whose goal is to find a vector x that minimizes the quadratic objective function under given linear equality or inequality constraints.

[0052] At present, there is a demand for batch quadratic planning task processing in many application scenarios. For example, in the field of robot motion planning, batch quadratic planning tasks can be used to calculate the optimal joint angles and positions of multiple sampling points of the robot on a preset path. Specifically, when the robot performs complex tasks, it needs to reach the target position through the coordinated motion of multiple joints. The determination of the angle and position of each joint can be regarded as a quadratic planning problem, because they need to minimize energy consumption, avoid collisions, and meet kinematic constraints. Therefore, batch processing of these quadratic planning tasks can efficiently plan an optimal path for the robot.

[0053] In an embodiment of the present application, according to the specific requirements of the application scenario, the parallel computing system first generates a batch processing task including N quadratic planning tasks, where N is a positive integer greater than 1, representing the number of independent quadratic planning tasks included in a batch quadratic planning task, and then uploads the batch quadratic planning tasks to the GPU, which implements parallel processing of the batch quadratic planning tasks based on the parallel computing system.

[0054] In the embodiment of the present application, the above-mentioned parallel computing system can adopt system architectures such as CUDA (Compute Unified Device Architecture), OpenCL, etc. In the embodiment of the present application, the CUDA system architecture is used as an example for description.

[0055] In an embodiment of the present application, each quadratic programming task in a batch processing task can be expressed as an optimization problem, and the system can convert each optimization problem into a form suitable for GPU processing, which may include but is not limited to standardizing data and optimizing data structures to improve memory access efficiency.

[0056] Once the batch optimization problem is constructed, the system uploads the data to the GPU memory and starts multiple threads based on CUDA to solve the batch optimization problem in parallel.

[0057] In the embodiment of the present application, the batch quadratic programming task can be expressed as:

[0058]

[0059] subject to l≤Ax≤u

[0060] Among them, x is the target parameter to be solved, with dimension batch×n×1, the parameter P is a batch positive definite symmetric matrix, representing the quadratic term coefficient of the batch quadratic programming task, with dimension batch×n×n, the dimension of parameter q is batch×n×1, the dimension of constraint parameter A is batch×m×n, the dimension of constraint lower limit l and upper limit u are both batch×m×1, batch, m and n represent the number of quadratic programming tasks in the batch quadratic programming task, the dimension of a single quadratic programming task and the number of constraints of a single quadratic programming task, respectively.

[0061] The above step 102, i.e., "creating N×M parallel execution threads on the GPU, assigning N secondary planning tasks to the N×M parallel execution threads, each secondary planning task corresponds to M parallel execution threads, and each M threads execute the corresponding secondary planning task" is described in detail below in conjunction with the embodiments.

[0062] First, let me introduce CUDA.

[0063] The CUDA software architecture consists of the following three main layers:

[0064] Grid: It is the largest execution unit in CUDA and contains multiple thread blocks.

[0065] Thread block: It is the basic unit that makes up the grid. Each thread block contains a certain number of threads. Usually, each thread block contains a maximum of 1024 threads.

[0066] Thread: It is the smallest execution unit in CUDA. Each thread executes the same kernel function but can process different data.

[0067] In CUDA, Kernel is a function running on GPU. A Kernel corresponds to a grid, and a grid consists of multiple thread blocks, which can be represented as one-dimensional, two-dimensional, or three-dimensional thread blocks. Threads in each thread block can share data and perform synchronization operations. When a Kernel is called, GPU will start many threads to execute the Kernel at the same time, realizing large-scale parallel computing.

[0068] Therefore, in an embodiment of the present application, CUDA is used to create N×M parallel execution threads on the GPU, and each M threads is responsible for executing a quadratic planning task. That is, each M threads executes the corresponding quadratic planning task by calling a Kernel, and the logic required for the thread to execute the corresponding quadratic planning task is configured in the Kernel.

[0069] In one possible implementation, each of the M threads executes a corresponding quadratic planning task, which may specifically include:

[0070] a. Use iterative optimization method to determine the value of target parameters;

[0071] b. After each round of iteration, the convergence state of the corresponding quadratic programming task is determined based on the value of the currently determined target parameter.

[0072] A quadratic programming solver is usually used to solve the quadratic programming task, so a CUDA-based batch quadratic programming solver is constructed in the embodiment of the present application. As one of the achievable methods, the solver can construct an augmented Lagrangian function for the quadratic programming task and derive the KKT (Karush-Kuhn-Tucker) condition.

[0073] Among them, the KKT condition can be as follows:

[0074]

[0075] Among them, z is an auxiliary variable with a dimension of batch×m×1; y is a Lagrange multiplier with a dimension of batch×m×1.

[0076] After constructing the augmented Lagrangian function, the alternating direction method of multipliers (ADMM) algorithm can be used in each round of iteration to determine the value of the target parameter in the augmented Lagrangian function. Then, the penalty coefficient in the alternating direction method of multipliers used by the target thread is updated, and a command is sent to the target thread to trigger the execution of the next round of iteration.

[0077] Furthermore, the main residual is determined according to the value of the currently determined target parameter and the constraints pre-set for the corresponding quadratic programming task, and the dual residual is determined according to the value of the currently determined target parameter and the value of the target parameter determined in the previous round, and then the main residual and the dual residual are used to determine the convergence state of the corresponding quadratic programming task.

[0078] The convergence state here includes the unconverged state and the converged state, which are used for subsequent iterative control.

[0079] In addition to this implementation method of constructing the augmented Lagrangian function, other methods may also be used, such as constructing a Lagrangian function, a barrier function, etc. for a quadratic programming task. In the following embodiments, constructing an augmented Lagrangian function is taken as an example.

[0080] The above step 103, namely "if all the quadratic planning tasks are not in a converged state, instructing the target thread to execute the next round of iteration" is described in detail below in conjunction with the embodiments.

[0081] In the embodiment of the present application, the target thread at least includes a thread corresponding to a secondary planning task that is in an unconverged state.

[0082] In one achievable manner, after a round of iterations, if there is a quadratic programming task in an unconverged state among the N quadratic programming tasks, only the thread corresponding to the quadratic programming task in an unconverged state is instructed to execute the next round of iterations. This method reduces unnecessary repeated calculations of quadratic programming tasks in a converged state, thereby improving the overall computing efficiency and saving computing resources for processing other tasks.

[0083] In another feasible way, when a round of iteration ends, as long as there are non-converged quadratic planning tasks stored in the N quadratic planning tasks, all threads corresponding to the quadratic planning tasks are instructed to execute the next round of iteration. This method is relatively simple to implement, and does not require complex logical judgment and thread management after each round of iteration. All threads act in unison, which can reduce the complexity of the control logic and maintain the synchronization of all threads, making it easy to debug and maintain. Especially in parallel computing, synchronous operations can reduce the risk of race conditions and deadlocks. It can also further improve the convergence accuracy of each quadratic planning task, so that the value of the target parameter obtained is more accurate.

[0084] After each round of iteration, each thread will determine whether its corresponding quadratic programming task has converged based on the data and calculation results it processes. When all threads have completed this round of iteration, the value of the iteration identification bit vector stored in the target storage space can be used to determine whether all quadratic programming tasks are in a converged state.

[0085] Specifically, before each round of iteration begins, the iteration flag variable stored in the target storage space is set to an initial value, which can be a single scalar value, such as an integer or a Boolean value. In this way, the iteration flag variable can always reflect the latest overall convergence state of the entire batch quadratic programming task, ensuring the accuracy of the system's iterative control logic.

[0086] Furthermore, after the convergence state of the corresponding quadratic programming task is determined according to the value of the currently determined target parameter in each round of iteration, if the convergence state of the corresponding quadratic programming task is not converged, the iteration flag variable stored in the target storage space is incremented.

[0087] For example, set the iteration identifier variable iter tag The initial value of is 0. When the convergence state of the quadratic planning task corresponding to any thread is not converged, the iteration flag variable iter tag Perform self-increment processing to make the iteration identification variable iter tag =Iteration identifier variable iter tag +1.

[0088] Furthermore, since multiple threads may need to increment the iteration flag variable, in order to ensure the consistency and accuracy of data in parallel execution, the iteration flag variable can be incremented using atomic write. The atomic write method is a special operation that ensures that access to shared variables is safe in a multi-threaded environment, avoiding data competition and inconsistency problems caused by multiple threads modifying the same variable at the same time.

[0089] In addition, the iteration flag variable can be pre-built and stored in the target storage space of the GPU, or it can be built and stored in the target storage space of the GPU after obtaining the batch quadratic programming task. The reason for storing it in the target storage space of the GPU is to facilitate fast access and update by the thread.

[0090] The target storage space in the embodiment of the present application is a storage space accessible to all threads, and may include global memory or shared memory, wherein the global memory is used to store data shared by all threads, and the shared memory is used to share data between threads in a thread block.

[0091] The following example introduces the process of determining the convergence state of a batch quadratic programming task.

[0092] like Figure 2 As shown in Figure 1, when a batch quadratic programming task is received, the iteration flag variable iter is first constructed in the global memory of the GPU. tag , where iter tag is a scalar value. CUDA is used to create batch threads on the GPU for parallel computing. Each thread is responsible for determining whether the residual r of the corresponding problem (i.e., the quadratic programming task) meets the convergence condition (corresponding to Figure 2 ∥r∥<epsilon, where epsilon is the preset residual threshold); if it is satisfied, iter tag Perform the operation; if it is not satisfied, write iter using atomic operation tag , execute iter tag =iter tag +1. After all threads have finished judging, judge iter tag Is it equal to 0? If it is equal to 0, it means that all problems meet the convergence conditions and the iterative calculation is stopped; otherwise, the iteration continues.

[0093] In addition to using the above iteration flag variable iter tag In addition to determining whether all quadratic programming tasks are in a converged state, other forms of variables may be used, which are not listed here.

[0094] The above step 104, namely "if all the quadratic programming tasks are in a converged state, outputting the values ​​of the target parameters determined by the N quadratic programming tasks" is described in detail below in conjunction with an embodiment.

[0095] In the embodiment of the present application, once it is confirmed that all quadratic programming tasks are in a converged state, the system will extract the values ​​of the target parameters calculated by each quadratic programming task from the target storage space of the GPU for subsequent processing and analysis.

[0096] In addition, in the embodiment of the present application, the execution time of each thread can be further monitored, and an exception handling mechanism can be triggered when the iteration is not completed within the predetermined time. The exception handling mechanism may include pausing or terminating a thread that has been executing for too long, recording exception information, releasing related resources, etc.

[0097] The following uses the iterative optimization method as the alternating direction multiplier method as an example to introduce the implementation process of N threads processing N quadratic planning tasks in parallel in the embodiment of the present application. Figure 3 As shown, including the following:

[0098] After obtaining the batch quadratic programming tasks, the N quadratic programming tasks contained in the batch quadratic programming tasks are uploaded to the GPU, an augmented Lagrangian function is constructed for each quadratic programming task, and the N quadratic programming tasks are assigned to N×M threads for parallel execution. The specific execution process includes:

[0099] Step 301: Batch set initial values.

[0100] Three variables are designed during the calculation process: x is the target parameter to be solved, with a dimension of batch×n×1; y is the Lagrange multiplier, with a dimension of batch×m×1; and z is the auxiliary variable in the augmented Lagrangian function, with a dimension of batch×m×1.

[0101] Among them, the intermediate variables used by x and y are and x 0 、z 0 , and 0 are the initial values ​​corresponding to the variables, which can be set to vectors of all zeros.

[0102] Step 302: Batch calculation of intermediate variables and

[0103] The formula for calculating the intermediate variable for the k+1th iteration is as follows:

[0104]

[0105] Among them, σ is the auxiliary penalty coefficient, which is a fixed scalar value, and ρ is the main penalty coefficient, which changes adaptively during the iteration process and has a dimension of batch×1. When , you can use the conjugate gradient method to avoid the time-consuming matrix inversion operation. I is an identity matrix used to ensure that certain dimensions remain unchanged when updating variables, or as a multiplication factor in the calculation process.

[0106] Step 303: Batch update x, y and z.

[0107] The formula for calculating the variable for the k+1th iteration is as follows:

[0108]

[0109] Among them, α is the relaxation parameter, which is a fixed scalar.

[0110] Step 304: Batch calculate the primary residual and the dual residual.

[0111] Primal res The calculation formula is as follows:

[0112] primal res =||Ax-z||

[0113] Dual residual res The calculation formula is as follows:

[0114] dual res =||q+A T y+Px||

[0115] Step 305: Calculate the iteration flag variable by comparing the primary residual and the dual residual.

[0116] Each thread compares the calculated primary residual and dual residual with the preset convergence condition. If the convergence condition is met, the quadratic programming task is considered to have converged; if the convergence condition is not met, the quadratic programming task is considered to have not converged, and the iteration flag variable iter is set to tag Perform a +1 operation.

[0117] Step 306: Compare the iteration flag variable.

[0118] System check iter tag If iter tag If it is 0, it means that all quadratic programming tasks have converged and the iteration ends. Otherwise, continue to execute step 307.

[0119] Step 307: Update the main penalty coefficients in batches, and then return to step 302.

[0120] If iter tag If it is not 0, it means that there are still unconverged quadratic programming tasks. In order to speed up the convergence speed or improve the convergence accuracy, the penalty coefficient, that is, the main penalty coefficient, can be dynamically adjusted according to the size of the residual. The convergence of each quadratic programming task is different, so the main penalty coefficient after dynamic adjustment of each quadratic programming task is different, so the dimension of the main penalty coefficient is batch×1.

[0121] Each M threads adjusts the main penalty coefficient of a quadratic programming task. One cuda kernel calculation starts multiple threads to complete the adjustment of all quadratic programming tasks.

[0122] Common dynamic adjustment methods are as follows:

[0123]

[0124] Here, η is a fixed scalar value.

[0125] The batch quadratic programming solver implemented in the embodiment of the present application is based on the alternating direction multiplier method (ADMM), which realizes efficient solution of batch quadratic programming problems by constructing augmented Lagrangian functions and deriving KKT conditions. With the support of the CUDA parallel computing model, the system can set initial values, calculate intermediate variables, update variables, check convergence, and dynamically adjust the main penalty coefficient in batches to realize parallel processing of multiple quadratic programming tasks.

[0126] The above is a description of a specific embodiment of the specification. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the embodiments and still achieve the desired results. In addition, the processes depicted in the drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0127] According to an embodiment of another aspect, a batch task processing device is provided. Figure 4 A schematic block diagram of a batch task processing device according to an embodiment is shown. The device can be arranged in a parallel computing system based on a GPU, such as Figure 4 As shown, the device 400 includes:

[0128] The task acquisition unit 401 is configured to acquire a batch of quadratic planning tasks, where the batch of quadratic planning tasks includes N quadratic planning tasks, where N is a positive integer greater than 1;

[0129] The parallel execution unit 402 is configured to create N×M parallel execution threads on the GPU, and assign the N quadratic programming tasks to the N×M parallel execution threads; wherein each quadratic programming task corresponds to M parallel execution threads, and each of the M threads executes a corresponding quadratic programming task, and the execution of the corresponding quadratic programming task includes: determining the value of the target parameter by an iterative optimization method, and determining the convergence state of the corresponding quadratic programming task according to the value of the target parameter currently determined after each round of iteration;

[0130] The iteration unit 403 is configured to instruct the target thread to execute the next round of iteration if all the secondary planning tasks are not in a converged state; the target thread at least includes: a thread corresponding to the secondary planning task in an unconverged state;

[0131] The output unit 404 is configured to output the values ​​of the target parameters determined by the N quadratic programming tasks if all quadratic programming tasks are in a converged state.

[0132] Optionally, the parallel execution unit 402 is configured to:

[0133] Constructing an augmented Lagrangian function for the quadratic programming task;

[0134] In each round of iteration, an alternating direction multiplier algorithm is used to determine the value of the target parameter in the augmented Lagrangian function.

[0135] Furthermore, the parallel execution unit 402 may also be configured as follows:

[0136] Updating the penalty coefficient in the alternating direction multiplier algorithm adopted by the target thread;

[0137] A command is sent to the target thread to trigger execution of the next round of iterations.

[0138] Furthermore, the parallel execution unit 402 may also be configured as follows:

[0139] Determine the principal residual according to the currently determined target parameter value and the constraint conditions pre-set for the corresponding quadratic programming task;

[0140] Determine the dual residual according to the value of the target parameter currently determined and the value of the target parameter determined in the previous round;

[0141] The main residual and the dual residual are used to determine a convergence state of a corresponding quadratic programming task.

[0142] Optionally, the device 400 may further include:

[0143] The initialization unit 406 is configured to set the iteration flag variable stored in the target storage space to an initial value before each round of iteration starts.

[0144] The self-increment processing unit 407 is configured as follows:

[0145] When the convergence state of the corresponding quadratic programming task is a non-convergence state, the iteration flag variable stored in the target storage space is incremented.

[0146] The comparison unit 408 is configured to:

[0147] After each round of iteration, if the current value of the iteration flag variable is the initial value, it is determined that all quadratic planning tasks are in a converged state; otherwise, the iteration unit 403 is triggered to execute the quadratic planning task in the target storage space that is in an unconverged state, and instructs the thread corresponding to the quadratic planning task to execute the next round of iteration.

[0148] Furthermore, the self-increment processing unit 407 is configured as follows:

[0149] The iteration flag variable stored in the target storage space is incremented by using an atomic write method.

[0150] Optionally, the device 400 may further include a monitoring unit 405 configured to:

[0151] The execution time of each of the threads is monitored, and an exception handling mechanism is triggered when the iteration is not completed within a predetermined time.

[0152] Each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can refer to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the batch task processing device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can refer to the partial description of the method embodiment. The batch task processing device embodiment described above is only schematic, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0153] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and provide corresponding operation entrances for users to choose to authorize or refuse.

[0154] In addition, an embodiment of the present application further provides a computer-readable storage medium on which a computer program is stored, and when the program is executed by a processor, the steps of any one of the methods in the aforementioned method embodiments are implemented.

[0155] And an electronic device, comprising:

[0156] one or more processors; and

[0157] A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of the aforementioned method embodiments.

[0158] The present application also provides a computer program product, including a computer program, which implements the steps of any one of the methods in the aforementioned method embodiments when executed by a processor.

[0159] in, Figure 5 The architecture of the electronic device is shown as an example, which may include a processor 510, a video display adapter 511, a disk drive 512, an input / output interface 513, a network interface 514, and a memory 520. The processor 510, the video display adapter 511, the disk drive 512, the input / output interface 513, the network interface 514, and the memory 520 may be communicatively connected via a communication bus 530.

[0160] The processor 510 may be implemented by a general-purpose CPU, a microprocessor, an application-specific integrated circuit (ASIC), or one or more integrated circuits, etc., and is used to execute relevant programs to implement the technical solutions provided in this application.

[0161] The memory 520 can be implemented in the form of ROM (Read Only Memory), RAM (Random Access Memory), static storage device, dynamic storage device, etc. The memory 520 can store an operating system 521 for controlling the operation of the electronic device 500, and a basic input and output system (BIOS) 522 for controlling the low-level operation of the electronic device 500. In addition, a web browser 523, a data storage management system 524, and a batch data processing device 400, etc. can also be stored. The above-mentioned batch data processing device 400 can be an application program that specifically implements the operations of the aforementioned steps in the embodiment of the present application. In short, when the technical solution provided by the present application is implemented by software or firmware, the relevant program code is stored in the memory 520 and is called and executed by the processor 510.

[0162] The input / output interface 513 is used to connect the input / output module to realize information input and output. The input / output module can be configured in the device as a component (not shown in the figure), or it can be externally connected to the device to provide corresponding functions. The input device may include a keyboard, a mouse, a touch screen, a microphone, various sensors, etc., and the output device may include a display, a speaker, a vibrator, an indicator light, etc.

[0163] The network interface 514 is used to connect to a communication module (not shown) to realize communication interaction between the device and other devices. The communication module can realize communication through a wired mode (such as USB, network cable, etc.) or a wireless mode (such as mobile network, WIFI, Bluetooth, etc.).

[0164] The bus 530 comprises a pathway for transmitting information between the various components of the device (eg, the processor 510, the video display adapter 511, the disk drive 512, the input / output interface 513, the network interface 514, and the memory 520).

[0165] It should be noted that, although the above device only shows a processor 510, a video display adapter 511, a disk drive 512, an input / output interface 513, a network interface 514, a memory 520, a bus 530, etc., in the specific implementation process, the device may also include other components necessary for normal operation. In addition, it can be understood by those skilled in the art that the above device may also only include components necessary for implementing the solution of the present application, and does not necessarily include all the components shown in the figure.

[0166] It can be known from the description of the above implementation methods that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application can be essentially or partly contributed to the prior art in the form of a computer program product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application or certain parts of the embodiments.

[0167] The technical solution provided by the present application is described in detail above. The principle and implementation method of the present application are described in detail using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present application. At the same time, for those skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present application.

Claims

1. A batch task processing method, characterized in that: Applied to a parallel computing system based on a graphics processing unit (GPU), the method comprises: Acquire a batch of quadratic planning tasks, where the batch of quadratic planning tasks includes N quadratic planning tasks, where N is a positive integer greater than 1; Create N×M parallel execution threads on the GPU, and assign the N quadratic programming tasks to the N×M parallel execution threads; wherein each quadratic programming task corresponds to M parallel execution threads, and each of the M threads executes the corresponding quadratic programming task, and the execution of the corresponding quadratic programming task includes: using an iterative optimization method to determine the value of the target parameter in the quadratic programming task, and after each round of iteration, determining the convergence state of the corresponding quadratic programming task according to the value of the currently determined target parameter; and M is a positive integer greater than 1; If all the secondary planning tasks are not in a converged state, instruct the target thread to execute the next round of iteration; the target thread at least includes: a thread corresponding to the secondary planning task in an unconverged state; If all the quadratic programming tasks are in a converged state, the values ​​of the target parameters determined by the N quadratic programming tasks are output.

2. The method according to claim 1, characterized in that The iterative optimization method is used to determine the value of the target parameter in the quadratic programming task, including: Constructing an augmented Lagrangian function for the quadratic programming task; In each round of iteration, an alternating direction multiplier algorithm is used to determine the value of the target parameter in the augmented Lagrangian function.

3. The method according to claim 2, characterized in that The instructing the target thread to execute the next round of iteration includes: Updating the penalty coefficient in the alternating direction multiplier algorithm adopted by the target thread; A command is sent to the target thread to trigger execution of the next round of iterations.

4. The method according to claim 2, characterized in that: Determining the convergence state of the corresponding quadratic programming task according to the value of the currently determined target parameter includes: Determine the principal residual according to the currently determined target parameter value and the constraint conditions pre-set for the corresponding quadratic programming task; Determine the dual residual according to the value of the target parameter currently determined and the value of the target parameter determined in the previous round; The main residual and the dual residual are used to determine a convergence state of a corresponding quadratic programming task.

5. The method according to claim 1, characterized in that Before each round of iteration begins, the iteration flag variable stored in the target storage space is set to an initial value; After determining the convergence state of the corresponding quadratic programming task according to the value of the currently determined target parameter after each round of iteration, the method further includes: When the convergence state of the corresponding quadratic programming task is a non-convergence state, performing a self-increment process on the iteration identification bit variable stored in the target storage space; After each round of iteration, if the current value of the iteration flag variable is the initial value, it is determined that all quadratic programming tasks are in a converged state; if the current value of the iteration flag variable is not the initial value, it is determined that not all quadratic programming tasks are in a converged state.

6. The method according to claim 5, characterized in that The step of performing self-increment processing on the iteration identification bit variable stored in the target storage space is performed by using an atomic write method.

7. The method according to claim 1, characterized in that The method further comprises: The execution time of each of the threads is monitored, and an exception handling mechanism is triggered when the iteration is not completed within a predetermined time.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the steps of the method described in any one of claims 1 to 7 are implemented.

9. An electronic device, characterized in that: include: one or more processors; as well as A memory associated with the one or more processors, the memory being used to store program instructions, wherein the program instructions, when read and executed by the one or more processors, execute the steps of the method described in any one of claims 1 to 7.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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