Verification method of large messages exceeding memory capacity in SOC sha unit
By chunking large messages and adding corresponding statements to the SOC hardware simulation environment and embedded programs, and performing sha unit calculations in batches, the problem of large messages that exceed SOC memory capacity in the existing technology is solved, and the automated verification of large messages in the SOC sha unit is realized.
Patent Information
- Application Number
- CN202411873392.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-18
- Publication Date
- 2025-04-08
AI Technical Summary
The prior art cannot effectively verify the validity of large messages exceeding the SOC memory capacity in the SOC sha unit, and it requires artificial declaration of message content, which is time-consuming and labor-intensive.
By chunking large messages and adding corresponding statements to the SOC hardware simulation environment and embedded programs, we can perform segmented sha unit calculations to achieve automated verification of large messages.
Automatic verification of large messages with message length greater than SOC memory capacity in SOC sha unit is achieved, avoiding the steps of artificial declaration and improving verification efficiency.
Smart Images
Figure CN119783601A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of validity verification of functional units of a system chip, and in particular to a verification method of a large message exceeding a memory capacity in a SOC sha unit. Background Art
[0002] The sha unit in the SOC system-level chip is used to generate a summary of the message data in security verification such as digital signatures. The sha unit is usually a one-way encryption algorithm based on HASH. Since the one-way encryption algorithm is irreversible, the validity verification of the sha unit in the SOC cannot be verified by reverse decryption.
[0003] Whether it is manual or automatic verification, the method is to declare the message and the standard digest in the embedded program of the SOC. Then copy the message to the memory accessible by the SOC sha unit, call the sha unit in the SOC, calculate the digest of the message, and then compare the calculation result with the standard digest automatically or manually to verify the validity of the sha unit.
[0004] Since the message is declared in the embedded program, the content of the message needs to be manually input. When the specified message file is large, manual declaration is time-consuming and laborious. On the other hand, because the method of declaring in the program is adopted, the maximum message size cannot exceed the memory capacity of the SOC. Therefore, there is currently no verification method for large messages exceeding the memory capacity in the SOC sha unit. Summary of the invention
[0005] The present invention provides a method for verifying a large message exceeding the memory capacity in a SOC sha unit, which can realize the verification of a sha unit whose message length is greater than the SOC memory capacity. The technical solution is as follows:
[0006] On the one hand, a method for verifying a large message exceeding the memory capacity in a SOC sha unit is provided, the method comprising:
[0007] Split large messages that exceed the SOC memory capacity into chunks;
[0008] Adding a first statement for sequentially loading each of the blocks in the SOC hardware simulation environment;
[0009] Adding a second statement for declaration and sub-sha unit calculation in the SOC embedded program;
[0010] The first statement and the second statement are used to collaboratively verify the large message in the SOC sha unit.
[0011] On the other hand, a verification device for a large message exceeding the memory capacity in a SOC sha unit is provided, which is used to implement the steps of any method embodiment in the above specification, and the device includes:
[0012] A chunking unit, used to chunk large messages that exceed the SOC memory capacity;
[0013] A first adding unit, used for adding a first statement for sequentially loading each of the blocks in the SOC hardware simulation environment;
[0014] A second adding unit is used to add a second statement for declaring and performing sub-sha unit calculation in the SOC embedded program;
[0015] The verification unit is used to use the first statement and the second statement to collaboratively verify the large message in the SOC sha unit.
[0016] On the other hand, a computer device is provided, which includes a memory and a processor, wherein the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory to implement the steps of the above-mentioned method.
[0017] On the other hand, a computer-readable storage medium is provided, wherein a computer program is stored in the storage medium, and when the computer program is executed by a processor, the steps of the above-mentioned method are implemented.
[0018] On the other hand, a computer program product is provided, comprising a computer program, wherein the computer program implements the steps of the above method when executed by a processor.
[0019] The technical solution provided by the present invention can at least bring the following beneficial effects:
[0020] By dividing the large message into blocks, the software program and the hardware simulation environment collaborate to complete the loading of multiple block messages and the SHA calculations. Since the message content is loaded multiple times directly using the hardware, there is no need to declare the large message in the embedded program, and no manual declaration is required. This can achieve automatic verification of large messages whose message length is greater than the SOC memory capacity in the SOC sha unit. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0022] Figure 1 It is a flow chart of a method for verifying a large message exceeding the memory capacity in a SOC sha unit provided by an embodiment of the present invention;
[0023] Figure 2 A hardware simulation script with a first statement added is provided in one embodiment of the present invention;
[0024] Figure 3 An embodiment of the present invention provides a SOC embedded program with a second statement added;
[0025] Figure 4 is an interactive flow chart of a software program and a hardware simulation environment provided by an embodiment of the present invention;
[0026] Figure 5 It is a structural diagram of a verification device for a large message exceeding the memory capacity in a SOC sha unit provided by an embodiment of the present invention;
[0027] Figure 6 It is a hardware architecture diagram of a computer device provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0028] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.
[0029] The specific implementation of the above concept is described below.
[0030] Please refer to Figure 1 , an embodiment of the present invention provides a method for verifying a large message exceeding the memory capacity in a SOC sha unit, the method comprising:
[0031] Step 100, dividing the large message that exceeds the SOC memory capacity into blocks;
[0032] Step 102, adding a first statement for sequentially loading each block in the SOC hardware simulation environment;
[0033] Step 104, adding a second statement for declaration and sub-sha unit calculation in the SOC embedded program;
[0034] Step 106, using the first statement and the second statement, collaboratively verifying the large message in the SOC sha unit.
[0035] In an embodiment of the present invention, by dividing a large message into blocks, the software program and the hardware simulation environment collaborate to complete the loading of multiple block messages and the multiple SHA calculations. Since the message content is directly loaded multiple times using hardware, there is no need to declare the large message in the embedded program, and no manual declaration is required. Automatic verification of large messages whose message length is greater than the SOC memory capacity in the SOCsha unit can be achieved.
[0036] Described below Figure 1 How the various steps are performed.
[0037] For step 100:
[0038] In some embodiments, large messages that exceed the SOC memory capacity are generated as follows:
[0039] Determine the target length of large messages based on the SOC memory capacity;
[0040] Use openssl rand command parameters to randomly generate large messages of the specified target length.
[0041] In the traditional verification method, the message file needs to be manually specified, which lacks randomness. Therefore, in this embodiment, the openssl rand command parameter can be used to automatically and randomly generate a large message, which not only has randomness but also can improve the degree of automation. In this embodiment, the maximum memory capacity of the SOC is 64K bytes, that is, 65536 bytes. Then, the target length of the large message needs to be greater than 65536 bytes. Taking the target length of 231008 bytes as an example, the openssl rand command parameter can be used to randomly generate a large message of 231008 bytes.
[0042] In some implementations, chunking a large message that exceeds the memory capacity of the SOC includes:
[0043] Get the ASCII text file of the large message; the size of the ASCII text file is three times the target length;
[0044] Determine the maximum length of the ASCII text file that the SOC memory capacity can accommodate;
[0045] Splits large message ASCII text files into chunks based on maximum length.
[0046] In this embodiment, the hardware needs to load a text file with message data, so the large message needs to be converted into an ASCII text file and the message file needs to be divided into blocks. The ASCII text file of the large message is three times the target length. The text file represents one byte and requires two ASCII codes plus a line break. Therefore, the ASCII text file of the large message is 231008 bytes times 3, that is, 693024 bytes.
[0047] The maximum length of the ASCII code text file that the SOC memory capacity can accommodate is also three times the SOC memory capacity, that is, 196608 bytes. Then, the ASCII code text file of the large message can be divided into 4 blocks. The ASCII code text files of the first three blocks of messages are all 196608 bytes, that is, the length of the first three blocks of messages is 65536 bytes, and the ASCII code text file of the last block of messages is 103200 bytes.
[0048] Regarding step 102 and step 104:
[0049] You can refer to Figure 2 , add the following to the SOC hardware simulation environment testbench.v Figure 2 The first statement shown uses the readmem command parameters to load each block message in turn.
[0050] You can refer to Figure 3 , add the following to the SOC embedded program Main.c: Figure 3 The second statement for declaring and calculating the sha unit in batches is shown. It can be understood that the block message can be directly loaded by hardware without declaring the message content, but the second statement needs to declare the number of times the sha unit is called and the length of the block message calculated each time, so as to call and drive the sha unit for sha calculation multiple times; among which, except for the last block, the length of the remaining block messages is equal to the SOC memory capacity.
[0051] Regarding step 106:
[0052] In some implementations, step 106 may include the following steps B1-B7:
[0053] B1, the SOC simulation hardware uses the first statement to load the first block in the memory;
[0054] B2, the SOC embedded program uses the second statement to call and drive the SOC sha unit to calculate the block summary according to the SOC memory capacity, and sets the register used to represent that the sha unit has completed the calculation to 1;
[0055] B3, the SOC simulation hardware detects that the register is set to 1 and loads the next block, then resets the register to zero;
[0056] B4, after the SOC embedded program waits for the register to be set to 0, it calls the SOC sha unit and determines whether this is the last call;
[0057] B5, if not, jump to step B2;
[0058] B6, if yes, drive the SOC sha unit to calculate the block summary with the message length of the last block;
[0059] B7, concatenates the summary calculation results of each block and compares and verifies them with the standard summary of the large message.
[0060] This embodiment can refer to Figure 4 The second statement determines the length of the block message calculated by the SOC sha unit each time by judging whether it is the last call of the sha unit each time, so as to drive the sha unit calculation accordingly. After each sha unit calculation is completed, the second statement sets the register used to represent the completion of the sha unit calculation to 1, indicating that the simulation hardware can load the next block. The first statement starts to load each block in turn by monitoring the state of the register, so as to realize multiple block calculations of large messages that exceed the SOC memory capacity.
[0061] In some implementations, the second statement is also used to declare a standard summary of the large message.
[0062] In step B7, the comparison and verification with the standard digest of the large message may include:
[0063] In SOC, the concatenated summary calculation result is directly and automatically compared and verified with the standard summary of the large message.
[0064] In traditional verification methods, it is usually necessary to output the sha unit summary calculation results to a computer log file and then compare them with the standard summary through manual and third-party tools to see if they are consistent. This method has poor automation and low verification efficiency.
[0065] In this embodiment, in order to improve automation and verification efficiency, the two can be compared directly in the SOC, so it is necessary to use the second statement to declare the standard summary of the large message in advance. It can be understood that the length of the standard summary is shorter and it is easy to declare it. In this embodiment, the length of the standard summary is only 32 bytes.
[0066] In some embodiments, the standard digest is calculated as follows:
[0067] Based on the function algorithm of the sha unit to be verified, the openssl encryption toolkit is used to generate a standard summary of the large message.
[0068] In this embodiment, the function algorithm of the sha unit to be verified includes at least MD5, SHA1, SHA2, SHA3 and SHA256. It can be understood that different versions of the sha unit have different function algorithms for calculating the digest. In this embodiment, it is necessary to select a corresponding function algorithm from the openssl encryption toolkit to calculate the standard digest of the large message according to the function algorithm of the sha unit to be verified.
[0069] Please refer to Figure 5 The embodiment of the present invention provides a verification device for a large message exceeding the memory capacity in a SOC sha unit, which is used to implement the steps of any method embodiment in the specification, and the device includes:
[0070] A block division unit 501 is used to divide large messages exceeding the memory capacity of the SOC into blocks;
[0071] A first adding unit 502, used for adding a first statement for sequentially loading each block in the SOC hardware simulation environment;
[0072] A second adding unit 503, used for adding a second statement for performing declaration and sub-sha unit calculation in the SOC embedded program;
[0073] The verification unit 504 is used to use the first statement and the second statement to collaboratively verify the large message in the SOC sha unit.
[0074] In one embodiment of the present invention, a large message exceeding the memory capacity of the SOC in the block unit 501 is generated in the following manner:
[0075] Determine the target length of large messages based on the SOC memory capacity;
[0076] Use openssl rand command parameters to randomly generate large messages of the specified target length.
[0077] In one embodiment of the present invention, the block unit 501 is used to perform:
[0078] Get the ASCII text file of the large message; the size of the ASCII text file is three times the target length;
[0079] Determine the maximum length of the ASCII text file that the SOC memory capacity can accommodate;
[0080] Splits large message ASCII text files into chunks based on maximum length.
[0081] In one embodiment of the present invention, the second statement in the second adding unit 503 is used to declare the number of times the sha unit is called and the length of the block message calculated each time; wherein, except for the last block, the lengths of the remaining block messages are equal to the SOC memory capacity;
[0082] The verification unit 504 is used to perform:
[0083] B1, the SOC simulation hardware uses the first statement to load the first block in the memory;
[0084] B2, the SOC embedded program uses the second statement to call and drive the SOC sha unit to calculate the block summary according to the SOC memory capacity, and sets the register of the sha unit to 1;
[0085] B3, the SOC simulation hardware detects that the register is set to 1 and loads the next block, then resets the register to zero;
[0086] B4, after the SOC embedded program waits for the register to be set to 0, it calls the SOC sha unit and determines whether this is the last call;
[0087] B5, if not, jump to step B2;
[0088] B6, if yes, drive the SOC sha unit to calculate the block summary with the message length of the last block;
[0089] B7, concatenates the summary calculation results of each block and compares and verifies them with the standard summary of the large message.
[0090] In one embodiment of the present invention, the second statement in the second adding unit 503 is also used to declare the standard summary of the large message;
[0091] When performing comparative verification with the standard digest of the large message, the verification unit 504 is used to:
[0092] In SOC, the concatenated summary calculation result is directly and automatically compared and verified with the standard summary of the large message.
[0093] In one embodiment of the present invention, the standard digest in the verification unit 504 is calculated as follows:
[0094] Based on the function algorithm of the sha unit to be verified, the openssl encryption toolkit is used to generate a standard summary of the large message.
[0095] It should be noted that the verification device for a large message exceeding the memory capacity in the SOC sha unit provided in the above embodiment is only illustrated by the division of the above functional units. In practical applications, the above functions can be assigned to different functional units as needed, that is, the internal structure of the device can be divided into different functional units to complete all or part of the functions described above. In addition, the above device embodiment and the method embodiment belong to the same concept, and the specific implementation process is detailed in the method embodiment, which will not be repeated here.
[0096] The embodiment of the present application also provides a computer device, please refer to Figure 6 The computer device includes a processor and a memory, wherein at least one instruction, at least one program, code set or instruction set is stored in the memory, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by the processor to implement the verification method of a large message exceeding the memory capacity in a SOC sha unit provided by the above-mentioned method embodiments.
[0097] An embodiment of the present application also provides a computer-readable storage medium, on which is stored at least one instruction, at least one program, code set or instruction set, and the at least one instruction, at least one program, code set or instruction set is loaded and executed by a processor to implement the verification method of large messages exceeding the memory capacity in the SOC sha unit provided by the above-mentioned method embodiments.
[0098] An embodiment of the present application also provides a computer program product, which includes a computer program. A processor of a computer device reads the computer program from a computer-readable storage medium, and the processor executes the computer program, so that the computer device executes the verification method of a large message exceeding the memory capacity in a SOC sha unit as described in any of the above embodiments.
[0099] For the convenience of description, the above system or device is described by dividing it into various modules or units according to its functions. Of course, when implementing the present application, the functions of each unit can be implemented in the same or multiple software and / or hardware.
[0100] It can be known from the description of the above implementation methods that those skilled in the art can clearly understand that the present application can be implemented by means of software plus a necessary general hardware platform. Based on such an understanding, the technical solution of the present application can be essentially or partly contributed to the prior art in the form of a software product, which can be stored in a storage medium such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application or certain parts of the embodiments.
[0101] Finally, it should be noted that, in this article, relational terms such as first, second, third and fourth are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.
[0102] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.
Claims
1. A method for verifying a large message exceeding the memory capacity in a SOC sha unit, characterized in that: include: Split large messages that exceed the SOC memory capacity into chunks; Adding a first statement for sequentially loading each of the blocks in the SOC hardware simulation environment; Adding a second statement for declaration and sub-sha unit calculation in the SOC embedded program; The first statement and the second statement are used to collaboratively verify the large message in the SOC sha unit.
2. The method according to claim 1, characterized in that Large messages that exceed the SOC memory capacity are generated as follows: Determine the target length of large messages based on the SOC memory capacity; Use opensslrand command parameters to randomly generate a large message of the specified target length.
3. The method according to claim 2, characterized in that The large message exceeding the memory capacity of the SOC is divided into blocks, including: Obtaining an ASCII code text file of the large message; wherein the size of the ASCII code text file is three times the target length; Determine the maximum length of the ASCII text file that the SOC memory capacity can accommodate; Based on the maximum length, the ASCII text file of the large message is divided into blocks.
4. The method according to claim 3, characterized in that The second statement is used to declare the number of times the sha unit is called and the length of the block message calculated each time; wherein, except for the last block, the length of the remaining block messages is equal to the SOC memory capacity; The using the first statement and the second statement to collaboratively verify the large message in the SOC sha unit includes: B1, the SOC simulation hardware uses the first statement to load the first block into the memory; B2, the SOC embedded program uses the second statement to call and drive the SOC sha unit to calculate the block summary according to the SOC memory capacity, and sets the register used to represent that the sha unit has completed the calculation to 1; B3, the SOC simulation hardware detects that the register is set to 1 and then loads the next block, and then resets the register to zero; B4, after the SOC embedded program waits for the register to be set to 0, it calls the SOC sha unit and determines whether this is the last call; B5, if not, jump to step B2; B6, if yes, drive the SOC sha unit to calculate the block summary with the message length of the last block; B7, concatenate the digest calculation results of each block, and compare and verify them with the standard digest of the large message.
5. The method according to claim 4, characterized in that The second statement is also used to declare a standard summary of the large message; The standard digest of the above and the above large message is compared and verified, including: In the SOC, the concatenated summary calculation result and the standard summary of the large message are directly and automatically compared and verified.
6. The method according to claim 5, characterized in that The standard summary is calculated as follows: Based on the function algorithm of the sha unit to be verified, the standard digest of the large message is generated using the openssl encryption toolkit.
7. A verification device for a large message exceeding the memory capacity in a SOC sha unit, used to implement the steps of any of the methods described in claims 1-6 above, characterized in that: include: A chunking unit, used to chunk large messages that exceed the SOC memory capacity; A first adding unit, used for adding a first statement for sequentially loading each of the blocks in the SOC hardware simulation environment; A second adding unit is used to add a second statement for declaring and performing sub-sha unit calculation in the SOC embedded program; The verification unit is used to use the first statement and the second statement to collaboratively verify the large message in the SOC sha unit.
8. A computer device, characterized in that: The computer device includes a memory and a processor, the memory is used to store a computer program, and the processor is used to execute the computer program stored in the memory to implement the steps of any one of the methods described in claims 1-6.
9. A computer-readable storage medium, characterized in that: The storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method described in any one of claims 1 to 6 are implemented.
10. A computer program product, characterized in that The method comprises a computer program, wherein when the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.