Low-noise amplifiers for millimeter-wave applications

Abstract

The present invention discloses a low-noise amplifier for millimeter waves, the low-noise amplifier comprising a first-stage common-source common-gate amplifier circuit and a second-stage common-source amplifier circuit, wherein: the first-stage common-source common-gate amplifier circuit comprises NMOS transistors NM1-NM2, mutual inductors L1-L2 with a mutual inductance coefficient of K1, capacitors C1-C3, mutual inductors L4-L5 with a mutual inductance coefficient of K2, and inductor L3; the second-stage common-source amplifier circuit comprises an NMOS transistor NM3, inductors L6-L8, and capacitor C4. The input end of the low-noise amplifier of the present invention uses a coupled resonator for impedance matching to compensate for the narrow operating bandwidth caused by the single resonant frequency of the source-degenerate inductor amplifier, thereby improving the operating bandwidth of the low-noise amplifier. The low-noise amplifier of the present invention has a simple functional implementation method and has high gain flatness and noise flatness on the basis of achieving the function.

Description

Technical Field

[0001] The present invention belongs to the field of electronic information and relates to a low-noise amplifier, in particular to a low-noise amplifier applied to millimeter waves. Background Art

[0002] With the rapid development of wireless communication technology, especially the global deployment of 5G technology, the demand for data transmission speed and network capacity is increasing. Millimeter wave frequency band, due to its abundant spectrum resources, has become one of the key technologies to meet these needs.

[0003] Millimeter-wave technology can provide data transmission rates of up to tens of Gbps, making it an important means of achieving high-speed wireless communications. However, due to their higher frequencies and shorter wavelengths, millimeter-wave signals are susceptible to various interferences and losses, necessitating high-performance millimeter-wave low-noise amplifiers to ensure signal quality.

[0004] As the first active circuit in the RF receive chain, the performance of the low-noise amplifier (LNA) directly impacts the sensitivity and noise performance of the entire system. Due to the wide bandwidth of the millimeter-wave frequency band, a broadband LNA is required to cover its operating frequency band. A broadband, high-gain LNA can provide more stable signal amplification for millimeter-wave communication systems and ensure good communication performance under various environmental conditions. Therefore, developing a broadband, high-gain LNA is crucial for millimeter-wave communication systems. Summary of the Invention

[0005] The present invention provides a low-noise amplifier for millimeter waves, which can not only cover the operating frequency band of 24GHz to 27GHz, but also achieve high gain and low noise while also making its gain and noise have high flatness.

[0006] The purpose of the present invention is achieved through the following technical solutions:

[0007] A low-noise amplifier for millimeter waves, comprising a first-stage common-source and common-gate amplifier circuit and a second-stage common-source amplifier circuit, wherein:

[0008] The first-pole cascode amplifier circuit includes NMOS transistors NM1-NM2, mutual inductors L1-L2 with a mutual inductance coefficient of K1, capacitors C1-C3, mutual inductors L4-L5 with a mutual inductance coefficient of K2, and an inductor L3;

[0009] One end of the mutual inductor L1 is connected to the input end, and the other end of the mutual inductor L1 is connected to the ground end;

[0010] One end of the mutual inductor L2 is connected to the gate of the NMOS transistor NM1, and the other end of the mutual inductor L2 is connected to the bias voltage VB1;

[0011] One end of the capacitor C1 is connected to the input end, and the other end of the capacitor C1 is connected to the ground end;

[0012] One end of the capacitor C2 is connected to the gate of the NMOS transistor NM1, and the other end of the capacitor C2 is connected to the ground;

[0013] One end of the inductor L3 is connected to the ground, and the other end of the inductor L3 is connected to the source of the NMOS transistor NM1;

[0014] The source of the NMOS transistor NM1 is connected to one end of the inductor L3, the gate of the NMOS transistor NM1 is connected to the mutual inductor L2 and one end of the capacitor C2, and the drain of the NMOS transistor NM1 is connected to the source of the NMOS transistor NM2;

[0015] The gate of the NMOS transistor NM2 is connected to the power supply terminal, and the drain of the NMOS transistor NM2 is connected to one end of the mutual inductor L4;

[0016] One end of the mutual inductor L4 is connected to the power supply terminal, and the other end of the mutual inductor L4 is connected to the drain of the NMOS transistor NM2;

[0017] One end of the mutual inductor L5 is connected to the bias voltage VB2, and the other end of the mutual inductor L5 is connected to the capacitor C3 and the input end of the second stage amplifier circuit;

[0018] One end of the capacitor C3 is connected to one end of the mutual inductor L5 and the input end of the second stage amplifier circuit, and the other end of the capacitor C3 is connected to the ground;

[0019] The second-stage common-source amplifier circuit includes an NMOS transistor NM3, inductors L6 to L8, and a capacitor C4;

[0020] The gate of the NMOS transistor NM3 is connected to the capacitor C3 and one end of the mutual inductor L5, the source of the NMOS transistor NM3 is connected to one end of the inductor L6, and the drain of the NMOS transistor NM3 is connected to one end of the inductor L7;

[0021] One end of the inductor L6 is connected to the source of the NMOS transistor NM3, and one end of the inductor L6 is connected to the ground;

[0022] One end of the inductor L7 is connected to the drain of the NMOS transistor NM3, and the other end of the inductor L7 is connected to one end of the inductor L8 and one end of the capacitor C4;

[0023] One end of the inductor L8 is connected to the capacitor C4 and one end of the inductor L7, and the other end of the inductor L8 is connected to the power supply terminal;

[0024] One end of the capacitor C4 is connected to one end of the inductor L7 and one end of the inductor L8, and the other end of the capacitor C4 is connected to the output end.

[0025] Compared with the prior art, the present invention has the following advantages:

[0026] 1. The input end of the low noise amplifier of the present invention uses a coupled resonator for impedance matching to compensate for the narrow operating bandwidth caused by the single resonant frequency of the source-degenerate inductor amplifier, thereby improving the operating bandwidth of the low noise amplifier.

[0027] 2. The low noise amplifier of the present invention has a simple function implementation mode and has high gain flatness and noise flatness based on the function implementation. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 This is the overall circuit module of the low noise amplifier of the present invention.

[0029] Figure 2 is the gain S of the low noise amplifier of the present invention 21 curve chart.

[0030] Figure 3 is the input return loss S of the low noise amplifier of the present invention 11 curve chart.

[0031] Figure 4 is the output return loss S of the low noise amplifier of the present invention 22 curve chart.

[0032] Figure 5 FIG. 4 is a noise figure (NF) curve diagram of the low noise amplifier of the present invention. DETAILED DESCRIPTION

[0033] The technical solution of the present invention is further described below with reference to the accompanying drawings, but is not limited thereto. Any modification or equivalent replacement of the technical solution of the present invention that does not depart from the spirit and scope of the technical solution of the present invention should be included in the scope of protection of the present invention.

[0034] The present invention provides a low noise amplifier for use in a 24GHz to 27GHz operating frequency band. The low noise amplifier can be used in a radio frequency integrated system on a chip (SoC). Figure 1As shown, the low-noise amplifier includes a low-noise amplifier main circuit composed of an NMOS transistor, a mutual inductor, an inductor, and a capacitor. The low-noise amplifier main circuit includes a first-stage common-source and common-gate amplifier circuit and a second-stage common-source amplifier circuit composed of the NMOS transistor, the mutual inductor, the inductor, and the capacitor. The first-stage common-source and common-gate amplifier circuit connects the NMOS transistor in a common-source and common-gate form, and provides feedback through the inductor. The input end of the first-stage common-source and common-gate amplifier circuit is matched through the mutual inductor and the capacitor to compensate for the narrow operating bandwidth caused by the single resonant frequency of the source-degenerate inductor amplifier, thereby improving the operating bandwidth of the low-noise amplifier. The second-stage common-source amplifier circuit provides feedback to the common-source NMOS transistor through the inductor, and matches the output by the series inductor and capacitor.

[0035] The first-stage cascode amplifier circuit is composed of NMOS transistors NM1-NM2, mutual inductors L1-L2 with mutual inductance coefficient K1, capacitors C1-C3, mutual inductors L4-L5 with mutual inductance coefficient K2, and inductor L3. One end of the mutual inductor L1 is connected to the input end, and the other end of the mutual inductor L1 is connected to the ground end; one end of the mutual inductor L2 is connected to the gate of the NMOS transistor NM1, and the other end of the mutual inductor L2 is connected to the bias voltage VB1; one end of the capacitor C1 is connected to the input end, and the other end of the capacitor C1 is connected to the ground end; one end of the capacitor C2 is connected to the gate of the NMOS transistor NM1, and the other end of the capacitor C2 is connected to the ground end; one end of the inductor L3 is connected to the ground end, and the other end of the inductor L3 is connected to the source of the NMOS transistor NM1; the source of the NMOS transistor NM1 is connected to one end of the inductor L3, and the gate of the NMOS transistor NM1 is connected to the mutual inductor L 2 and one end of capacitor C2, the drain of NMOS transistor NM1 is connected to the source of NMOS transistor NM2; the gate of NMOS transistor NM2 is connected to the power supply terminal, and the drain of NMOS transistor NM2 is connected to one end of mutual inductor L4; one end of mutual inductor L4 is connected to the power supply terminal, and the other end of mutual inductor L4 is connected to the drain of NMOS transistor NM2; one end of mutual inductor L5 is connected to bias voltage VB2, and the other end of mutual inductor L5 is connected to capacitor C3 and the input terminal of the second-stage amplifier circuit; one end of capacitor C3 is connected to one end of mutual inductor L5 and the input terminal of the second-stage common-source amplifier circuit, and the other end of capacitor C3 is connected to ground. Mutual inductors L1-L2 and capacitors C1-C2 form an input impedance matching structure to perform input impedance matching and ensure low input return loss of the circuit. At the same time, a coupled resonator is used at the input end for impedance matching to compensate for the narrow operating bandwidth caused by the single resonant frequency of the source-degenerate inductor amplifier, thereby improving the operating bandwidth of the low-noise amplifier.

[0036] The second-stage common-source amplifier circuit consists of an NMOS transistor NM3, inductors L6-L8, and capacitor C4. The gate of NMOS transistor NM3 is connected to capacitor C3 and one end of the mutual inductor L5. The source of NMOS transistor NM3 is connected to one end of inductor L6, and the drain of NMOS transistor NM3 is connected to one end of inductor L7. One end of inductor L6 is connected to the source of NMOS transistor NM3, and one end of inductor L6 is connected to ground. One end of inductor L7 is connected to the drain of NMOS transistor NM3, and the other end of inductor L7 is connected to one end of inductor L8 and one end of capacitor C4. One end of inductor L8 is connected to capacitor C4 and one end of inductor L7, and the other end of inductor L8 is connected to the power supply. One end of capacitor C4 is connected to inductor L7 and one end of inductor L8, and the other end of capacitor C4 is connected to the output terminal. Inductor L7, inductor L8, and capacitor C4 form an output impedance matching structure to achieve output impedance matching and ensure low output return loss of the circuit.

[0037] In the present invention, the working principle of the low noise amplifier is as follows:

[0038] like Figure 1 As shown, the input signal is matched to the input impedance through a matching structure formed by mutual inductors L1-L2 and capacitors C1-C2. The output signal is then input to the gate of NMOS transistor NM1. The gate signal of NMOS transistor NM1 is fed through the feedback structure of NMOS transistor NM1 and inductor L3 to the drain of NMOS transistor NM1 and the source of NMOS transistor NM2. The signal is then fed from the drain of NMOS transistor NM2 to the cascode structure formed by NMOS transistors NM1 and NMOS transistors NM2. The input DC signal of NMOS transistor NM1 is fed from bias voltage VB1 through mutual inductor L2 to the gate of NMOS transistor NM1. The input DC signal of NMOS transistor NM2 is connected to the power supply. The drain signal of NMOS transistor NM2 is fed through the matching structure formed by mutual inductors L4-L5 with a mutual inductance coefficient of K2 and capacitor C3 to the second-stage common-source amplifier circuit. The output signal of the first amplifier circuit is input to the gate of NMOS transistor NM3. The gate signal of NMOS transistor NM3 is output to the drain of NMOS transistor NM3 through the feedback structure of NMOS transistor NM3 and inductor L6. The drain signal of NMOS transistor NM3 is output through the output impedance matching structure composed of inductor L7, inductor L8, and capacitor C4. The input signal of NMOS transistor NM3 is connected from bias voltage VB2 to the gate of NMOS transistor NM3 through mutual inductor L5.

[0039] Figure 2 is the gain S of the low noise amplifier 21 curve chart, Figure 3is the input return loss S of the low noise amplifier 11 curve chart, Figure 4 is the output return loss S of the low noise amplifier 22 curve chart, Figure 5 The noise figure (NF) curve of the low noise amplifier is shown in Figure 2. Figure 2 It can be seen that the gain S 21 ≥13.56dB and the gain flatness is 1.36dB, by Figure 5 It can be seen that the NF flatness is 0.28dB.

[0040] It can be seen from the above embodiments that the low-noise amplifier of the present invention has the advantages of wider bandwidth, better gain, noise, gain flatness and noise flatness, lower input return loss and output return loss, and can be widely used in RF / millimeter wave technology.

Claims

1. A low noise amplifier for millimeter wave applications, characterized in that The low noise amplifier comprises a first-stage common-source and common-gate amplifier circuit and a second-stage common-source amplifier circuit, wherein: The first-stage cascode amplifier circuit includes NMOS transistors NM1-NM2, mutual inductors L1-L2 with a mutual inductance coefficient of K1, capacitors C1-C3, mutual inductors L4-L5 with a mutual inductance coefficient of K2, and an inductor L3; One end of the mutual inductor L1 is connected to the input end, and the other end of the mutual inductor L1 is connected to the ground end; One end of the mutual inductor L2 is connected to the gate of the NMOS transistor NM1, and the other end of the mutual inductor L2 is connected to the bias voltage VB1; One end of the capacitor C1 is connected to the input end, and the other end of the capacitor C1 is connected to the ground end; One end of the capacitor C2 is connected to the gate of the NMOS transistor NM1, and the other end of the capacitor C2 is connected to the ground; One end of the inductor L3 is connected to the ground, and the other end of the inductor L3 is connected to the source of the NMOS transistor NM1; The source of the NMOS transistor NM1 is connected to one end of the inductor L3, the gate of the NMOS transistor NM1 is connected to the mutual inductor L2 and one end of the capacitor C2, and the drain of the NMOS transistor NM1 is connected to the source of the NMOS transistor NM2; The gate of the NMOS transistor NM2 is connected to the power supply terminal, and the drain of the NMOS transistor NM2 is connected to one end of the mutual inductor L4; One end of the mutual inductor L4 is connected to the power supply terminal, and the other end of the mutual inductor L4 is connected to the drain of the NMOS transistor NM2; One end of the mutual inductor L5 is connected to the bias voltage VB2, and the other end of the mutual inductor L5 is connected to the capacitor C3 and the input end of the second stage amplifier circuit; One end of the capacitor C3 is connected to one end of the mutual inductor L5 and the input end of the second stage amplifier circuit, and the other end of the capacitor C3 is connected to the ground; The second-stage common-source amplifier circuit includes an NMOS transistor NM3, inductors L6 to L8, and a capacitor C4; The gate of the NMOS transistor NM3 is connected to the capacitor C3 and one end of the mutual inductor L5, the source of the NMOS transistor NM3 is connected to one end of the inductor L6, and the drain of the NMOS transistor NM3 is connected to one end of the inductor L7; One end of the inductor L6 is connected to the source of the NMOS transistor NM3, and one end of the inductor L6 is connected to the ground; One end of the inductor L7 is connected to the drain of the NMOS transistor NM3, and the other end of the inductor L7 is connected to one end of the inductor L8 and one end of the capacitor C4; One end of the inductor L8 is connected to the capacitor C4 and one end of the inductor L7, and the other end of the inductor L8 is connected to the power supply terminal; One end of the capacitor C4 is connected to one end of the inductor L7 and one end of the inductor L8, and the other end of the capacitor C4 is connected to the output end.

2. The low noise amplifier for millimeter waves according to claim 1, characterized in that The mutual inductors L1 - L2 and capacitors C1 - C2 form an input impedance matching structure.

3. The low noise amplifier for millimeter waves according to claim 1, characterized in that The inductor L7, the inductor L8 and the capacitor C4 form an output impedance matching structure.

Images