A664 terminal message delay upper bound analysis method based on static scheduling

Abstract

The invention provides an A664 terminal message delay upper bound analysis method based on static scheduling, and the method comprises the steps: an analysis end system data transmission stage 1: obtaining the maximum delay of a message in a sending end system traffic shaping stage; in the second data transmission stage of the analysis end system, the maximum delay of VL multiplexing scheduling of the message in the sending end system is obtained; the maximum delay of a data frame of the sending end system is obtained by combining the maximum delay of the flow shaping stage of the sending end system and the maximum delay of VL multiplexing scheduling of the sending end system; according to the method, the physical architecture of the A664 terminal system is analyzed, and the frame delay generated by traffic shaping of the A664 terminal system and the jitter upper bound generated by static scheduling of an output port are theoretically calculated, so that the accuracy of the network message delay upper bound in the terminal system calculated by the algorithm is ensured.

Description

Technical Field

[0001] The present application belongs to the technical field of ARINC664 network deterministic analysis, and in particular to an A664 terminal message delay upper bound analysis method based on static scheduling. Background Art

[0002] The Avionics Full-Duplex switched Ethernet (AFDX) standard protocol is defined in ARINC664 part7. It is an aviation bus standard widely used in current aircraft platforms and a typical real-time network for civil aviation information exchange. It not only reduces the weight of traditional point-to-point communications similar to ARINC 429, but also meets the growing bandwidth and real-time performance requirements of large civil avionics systems.

[0003] In the AFDX network environment, the information interaction between task layers can be regarded as a large complex network structure. In addition to the relationship links in the general sense of the complex network, different transmission modes and transmission requirements are also added. For the components of the AFDX network topology model, including: end systems, switches and virtual links, the entire network adopts a dual redundant star topology structure, asynchronous transmission mode, such as Figure 1 As shown in Figure 1. Communication messages in the network are generated by partitions residing on end systems, and the transmission process is carried by virtual links. The transmission process starts from the source end system where the message is generated, is forwarded through different switches in the network, and finally reaches the destination end system of the message.

[0004] Due to the particularity of the aircraft platform, the AFDX network has strict reliability requirements and the network adopts a redundant design solution. Figure 2 A dual-redundant network diagram is given. When end systems use redundant networks for communication, the impact on communication between end systems can be reduced when a switch or link fails.

[0005] End System (ES) is an essential part of the avionics network and is usually embedded in the system's equipment, such as Figure 3 As shown. The generation and consumption of messages are all implemented on the terminal system. The terminal system can provide deterministic communication services for the network to ensure that data exchange between applications can be carried out safely and reliably. Usually, multiple aviation subsystems can be supported by one end system, and the isolation of multiple subsystems only needs to be achieved through the partition mechanism. This partition isolation mechanism is defined in ARINC653, specifically, it is achieved by limiting the processing execution time and address access space of each partition.

[0006] Generally speaking, the terminal system forms the logical bandwidth of each message by providing a traffic shaping mechanism. The schematic diagram of message transmission and traffic shaping in the network is as follows: Figure 4 As shown in Figure 1. The end system can be divided into the receiving end system and the sending end system. The messages generated by the sending end system are stored in the output buffer, and then these messages are normalized according to the specified parameters. After the message is processed, the normalized message is passed to the physical link through the scheduling information. The receiving end system receives messages from different subsystems, stores them in their respective buffers, and then consumes the messages.

[0007] Virtual Link (VL) is formed in the end system, which can effectively divide the bandwidth resources. Virtual Link can start from the source of the data packet and reach one or more destinations, that is, it can be a one-to-one or one-to-many transmission mode. Virtual Link is the main way for AFDX network protocol to improve the real-time performance of ordinary Ethernet, which can shape the traffic, statically route, manage redundancy, filter frames and control traffic.

[0008] (1) Traffic Shaping: AFDX network protocol messages use a traffic shaping mechanism to allocate communication resources among multiple virtual links. Virtual links are limited by the maximum frame length L_max and the bandwidth allocation gap T_BAG, which limits the minimum scheduling interval of any two adjacent frames. Therefore, the maximum bandwidth that a virtual link can utilize is L_max / T_BAG. According to the AFDX protocol, this flow control method is implemented on the source terminal system. For a given virtual link, data frames can appear in a bounded time interval, which is defined as the maximum allowed jitter. If the frame has no jitter in the scheduler, the BAG represents the minimum time interval between the first bit of two consecutive frames from the same virtual link. Jitter is introduced by the scheduler, not by the communication data stream itself. Figure 5 shown.

[0009] (2) VL Scheduling: The VL scheduler can schedule multiple virtual links according to the round-robin scheduling strategy when sending data frames, such as Figure 6 As shown in the figure, messages from different ports in the network are assembled into VLs through traffic shaping when entering the sub-virtual link queue, and then aggregated by the scheduler, and then connected to the AFDX network through redundant network interfaces in the manner of sharing physical links.

[0010] In order to ensure the certainty of the A664 network, it is necessary to analyze the terminal system. The present invention provides an A664 terminal message delay upper bound analysis method based on static scheduling for the A664 network. Summary of the invention

[0011] Purpose of the present invention: In order to ensure the determinism of the A664 network, the present application provides an A664 terminal message delay upper bound analysis method based on static scheduling.

[0012] The present application provides an A664 terminal message delay upper bound analysis method based on static scheduling, the method comprising:

[0013] Analyze the end system data transmission phase 1 and obtain the maximum delay of the message in the traffic shaping phase of the sending end system;

[0014] Analyze the end system data transmission phase 2 and obtain the maximum delay of the message in the VL multiplexing scheduling of the sending end system;

[0015] The maximum delay of the data frame of the sending end system is obtained by combining the maximum delay of the traffic shaping stage of the sending end system and the maximum delay of the VL multiplexing scheduling of the sending end system.

[0016] Preferably, the feature of phase 1 is to perform traffic shaping on messages sent by different applications bound to the same VL.

[0017] Preferably, the analyzing end system data transmission phase 1 to obtain the maximum delay of the message in the traffic shaping phase of the sending end system includes:

[0018] Messages bound to the same VL will first queue at the COM port and undergo IP fragmentation to form data frames. Each VL has at most four SubVLs, where SubVL represents a sub-virtual link of a virtual link. Here, data frames are read from the SubVL queue to the VL in a round-robin mechanism in accordance with the BAG interval rule. BAG is an attribute of a virtual link, indicating the minimum interval for a virtual link to send data frames. At this time, a message delay will occur, called BAGDelay. The present invention provides the following formula:

[0019] BAGDelay i =p×BAG i

[0020] Among them, BAG i Indicates the BAG attribute value of virtual link i;

[0021] Considering that all messages bound to the VL may be sent last, to calculate the upper bound of the traffic shaping delay of the message, first assume that the message is placed in the last SubVL of the polling mechanism. At this time, p represents the total number of message fragments that may be placed before the last frame of the message in this virtual link;

[0022]

[0023] Here, i represents any message belonging to this sub-virtual link; n represents the number of sub-virtual links of the virtual link.

[0024] Preferably, the feature of stage 2 is that at the output port of the terminal system, multiple virtual links are output to the network bus following the virtual link scheduling mode of the terminal system, i.e., multiplexing;

[0025] Among them, in the multiplexing process, if multiple virtual links have data frames to be processed at the same output port, the terminal output port will generate data transmission jitter, and the data frame to be transmitted may be delayed. The maximum value of the jitter generated here is calculated, which is called Max_jitter.

[0026] Preferably, the analyzing end system data transmission phase 2 to obtain the maximum delay of the VL multiplexing scheduling of the sending end system includes:

[0027] The small cycle represents the time period allocated to each virtual link. There are N small cycles with a fixed time of T. 小周期 This constitutes a large cycle, which is repeated to form a complete static scheduling transmission table.

[0028] Each virtual link has a sending permission and is sent within a corresponding fixed small period;

[0029] The large cycle and BAG must meet the following restrictions: Where i represents any virtual link among all virtual links;

[0030] In static scheduling, the time of each small cycle is equal and can complete the transmission of the maximum frame, that is, Where i represents a virtual link, max S i Indicates the maximum frame length of a virtual link;

[0031] The large cycle is a multiple of the small cycle and should not be too large, satisfying the large cycle ≥ T 小周期 ×VL number;

[0032] It is known that the jitter of the virtual link in the terminal is generated in the static time slicing scheduling area. The present invention provides the following formula:

[0033] Max_jitter i =VL i Maximum Delay-VL i Minimum delay

[0034] The VLi maximum delay represents the maximum delay generated by the virtual link i when the second part is multiplexed, and the VLi minimum delay represents the minimum delay generated by the virtual link i when the second part is multiplexed.

[0035] Preferably, the calculation formula of the VL maximum delay is as follows:

[0036]

[0037] Where i represents a virtual link, max S i Indicates the maximum frame length of a virtual link, in bits.

[0038] Preferably, the calculation formula of VL minimum delay is as follows:

[0039]

[0040] Where i represents a virtual link, min S i Indicates the minimum frame length of a virtual link, in bits.

[0041] Preferably, the step of combining the maximum delay of the traffic shaping phase of the transmitting end system and the maximum delay of the VL multiplexing scheduling of the transmitting end system to obtain the maximum delay of the data frame of the transmitting end system includes:

[0042] Considering that there is a technical delay in the data transmission process of the terminal system, and it is a constant, the maximum delay of message i in the terminal system should be defined by the following formula;

[0043] MAX_Latency i =BAGDelay i +Max_jitter i +Technical delays.

[0044] Beneficial technical effects of the present invention:

[0045] The present invention analyzes the physical architecture of the A664 terminal system, and theoretically calculates the frame delay caused by traffic shaping of the A664 terminal system and the upper bound of jitter caused by static scheduling of the output port, thereby ensuring the accuracy of the upper bound of network message delay in the terminal system calculated by the algorithm in this paper. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 This is a schematic diagram of the AFDX network topology;

[0047] Figure 2 This is a schematic diagram of the AFDX dual-redundancy network;

[0048] Figure 3 The terminal is a schematic diagram of the core components in the A664 network;

[0049] Figure 4 It is a schematic diagram of message transmission and traffic shaping in AFDX network;

[0050] Figure 5 Schematic diagram of virtual link jitter of the output port of the sending end system;

[0051] Figure 6 Schematic diagram of VL scheduling model for the sending end system;

[0052] Figure 7 Schematic diagram of traffic shaping and VL scheduling model for the sending end system;

[0053] Figure 8 This is a schematic diagram of traffic shaping in the sending end system;

[0054] Fig. 9 Schematic diagram of polling reading mechanism for sub-virtual links;

[0055] Fig.10 Schematic diagram of the static time slicing scheduler of the A664 end system. DETAILED DESCRIPTION

[0056] The present invention relates to deterministic analysis of ARINC664 network. In order to verify that a terminal system based on static scheduling can perform deterministic data transmission in an ARINC664 network and provide a reliable upper bound judgment of delay for the terminal system, an A664 terminal message delay analysis method based on static scheduling is implemented to calculate the upper bound of the delay generated by the message in the terminal system.

[0057] See also Figure 1 - Fig.10 , this application provides the following solutions:

[0058] In order to mathematically process the allowable delay of the sending terminal system and analyze the physical architecture of the terminal system, the process of data transmission of the terminal system targeted by the present invention is divided into two stages, such as Figure 7 As shown, FIFO represents a first-in-first-out transmission mode.

[0059] The characteristic of phase 1 is to perform traffic shaping on messages sent by different applications bound to the same VL, such as Figure 8 shown.

[0060] Messages bound to the same VL will first be queued at the COM port and IP fragmented to form data frames. Each VL has at most four SubVLs, and SubVL represents a sub-virtual link of a virtual link, such as Fig. 9 As shown, here, data frames are read from the SubVL queue to the VL in turn according to the BAG interval rule according to the round-robin mechanism. BAG is an attribute of the virtual link, which indicates the minimum interval for the virtual link to send data frames. At this time, a message delay will occur, which is called BAGDelay. The present invention provides the following formula:

[0061] BAGDelayi =p×BAG i

[0062] Among them: BAG i Indicates the BAG attribute value of virtual link i;

[0063] Considering that all messages bound to the VL may be sent last, to calculate the upper bound of the traffic shaping delay of the message, first assume that the message is placed in the last SubVL of the polling mechanism. At this time, p represents the total number of message fragments that may be placed before the last frame of the message in this virtual link;

[0064]

[0065] Wherein, i represents any message belonging to this sub-virtual link;

[0066] n represents the number of sub-virtual links of the virtual link.

[0067] The characteristic of phase 2 is that at the output port of the terminal system, multiple virtual links follow the virtual link scheduling mode of the terminal system and are output to the network bus, i.e., multiplexing; during the multiplexing process, if multiple virtual links have data frames to be processed at the same output port, data transmission jitter will occur at the terminal output port, and the data frame to be transmitted may be delayed. The present invention calculates the maximum value of the jitter generated here, which is called Max_jitter;

[0068] There are multiple scheduling modes for the output port of the terminal. The present invention provides a method for calculating the upper limit of data frame delay for the static scheduling mode. The static scheduling is a scheduling table that can be manually configured.

[0069] The static time slicing scheduler of the A664 terminal system targeted by the present invention is as follows: Fig.10 As shown, its characteristics are:

[0070] (1) The small cycle represents the time period allocated to each virtual link. There are N small cycles (grids, with a fixed time of T 小周期 ) constitutes a large cycle, which repeats itself

[0071] Constitute a complete static scheduling transmission table;

[0072] (2) Each virtual link has a transmission permission and is transmitted within a corresponding fixed small period;

[0073] (3) The large cycle and BAG must meet the following restrictions: Where i represents any virtual link among all virtual links;

[0074] (4) In static scheduling, the time of each small cycle is equal and can complete the transmission of the maximum frame, that is, Where i represents a virtual link, max S i Indicates the maximum frame length of a virtual link;

[0075] (5) The large cycle is a multiple of the small cycle and should not be too large, satisfying the large cycle ≥ T 小周期 ×VL number.

[0076] It is known that the jitter of the virtual link in the terminal is generated in the static time slicing scheduling area. The present invention provides the following formula:

[0077] Max jitter i =VL i Maximum Delay-VL i Minimum delay

[0078] Among them, VLi maximum delay represents the maximum delay caused by virtual link i when multiplexing the second part, and VLi minimum delay represents the minimum delay caused by virtual link i when multiplexing the second part. The formula is as follows:

[0079]

[0080] Where i represents a virtual link, max S i Indicates the maximum frame length of a virtual link, min S i Indicates the minimum frame length of a virtual link, in bits.

[0081] Considering that there is a technical delay in the data transmission process of the terminal system, and it is a constant, the maximum delay of the message in the terminal system should be defined by the following formula.

[0082] MAX_Latency i =BAGDelay i +Max_jitter i +Technical delays.

Claims

1. A method for analyzing the upper bound of A664 terminal message delay based on static scheduling, characterized in that: The method comprises: Analyze the end system data transmission phase 1 and obtain the maximum delay of the message in the traffic shaping phase of the sending end system; Analyze the end system data transmission phase 2 and obtain the maximum delay of the message in the VL multiplexing scheduling of the sending end system; The maximum delay of the data frame of the sending end system is obtained by combining the maximum delay of the traffic shaping stage of the sending end system and the maximum delay of the VL multiplexing scheduling of the sending end system.

2. The method according to claim 1, characterized in that The characteristic of phase 1 is to perform traffic shaping on messages sent by different applications bound to the same VL.

3. The method according to claim 2, characterized in that The analyzing end system data transmission phase 1, obtaining the maximum delay of the message in the traffic shaping phase of the sending end system, includes: Messages bound to the same VL will first queue at the COM port and undergo IP fragmentation to form data frames. Each VL has at most four SubVLs, where SubVL represents a sub-virtual link of a virtual link. Here, data frames are read from the SubVL queue to the VL in a round-robin mechanism in accordance with the BAG interval rule. BAG is an attribute of a virtual link, indicating the minimum interval for a virtual link to send data frames. At this time, a message delay will occur, called BAGDelay. The present invention provides the following formula: BACKDelay i =p×BACK i Among them, BAG i Indicates the BAG attribute value of virtual link i; Considering that all messages bound to the VL may be sent last, to calculate the upper bound of the traffic shaping delay of the message, first assume that the message is placed in the last SubVL of the polling mechanism. At this time, p represents the total number of message fragments that may be placed before the last frame of the message in this virtual link; Here, i represents any message belonging to this sub-virtual link; n represents the number of sub-virtual links of the virtual link.

4. The method according to claim 3, characterized in that: The characteristic of phase 2 is that at the output port of the terminal system, multiple virtual links follow the virtual link scheduling mode of the terminal system and are output to the network bus, i.e., multiplexing; Among them, in the multiplexing process, if multiple virtual links have data frames to be processed at the same output port, the terminal output port will generate data transmission jitter, and the data frame to be transmitted may be delayed. The maximum value of the jitter generated here is calculated, which is called Max_jitter.

5. The method according to claim 4, characterized in that The analysis end system data transmission phase 2, obtaining the maximum delay of the VL multiplexing scheduling of the sending end system, includes: The small cycle represents the time period allocated to each virtual link. There are N small cycles with a fixed time of T. 小周期 This constitutes a large cycle, which is repeated to form a complete static scheduling transmission table. Each virtual link has a sending permission and is sent within a corresponding fixed small period; The large cycle and BAG must meet the following restrictions: Where i represents any virtual link among all virtual links; In static scheduling, the time of each small cycle is equal and can complete the transmission of the maximum frame, that is, Where i represents a virtual link, max S i Indicates the maximum frame length of a virtual link; The large cycle is a multiple of the small cycle and should not be too large, satisfying the large cycle ≥ T 小周期 ×VL number; It is known that the jitter of the virtual link in the terminal is generated in the static time slicing scheduling area. The present invention provides the following formula: Max_jitter i =VL i Maximum Delay-VL i Minimum delay The VLi maximum delay represents the maximum delay generated by the virtual link i when the second part is multiplexed, and the VLi minimum delay represents the minimum delay generated by the virtual link i when the second part is multiplexed.

6. The method according to claim 5, characterized in that The calculation formula of VL maximum delay is as follows: Where i represents a virtual link, max S i Indicates the maximum frame length of a virtual link, in bits.

7. The method according to claim 6, characterized in that The calculation formula for VL minimum delay is as follows: Where i represents a virtual link, min S i Indicates the minimum frame length of a virtual link, in bits.

8. The method according to claim 7, characterized in that The step of combining the maximum delay of the traffic shaping phase of the transmitting end system and the maximum delay of the VL multiplexing scheduling of the transmitting end system to obtain the maximum delay of the data frame of the transmitting end system includes: Considering that there is a technical delay in the data transmission process of the terminal system, and it is a constant, the maximum delay of message i in the terminal system should be defined by the following formula; MAX_Latenay i =BAGDelay i +Max_jitter i +Technical delays.

Images