A Sketch measurement precision improvement method based on programmable switch virtualization registers, electronic equipment and medium

Abstract

The present invention discloses a Sketch measurement accuracy improvement method based on programmable switch virtualization register, an electronic device, and a medium, comprising: obtaining a Sketch program; setting parameters required for register virtualization, including: a maximum impact threshold θ on the programmable switch bandwidth when virtualizing registers, and the number of register arrays m required to be used. u and the number of registers n in each register array i ; Determine whether to provide and implement virtualized registers based on the physical registers of the programmable switch, the bandwidth of the data recycling channel, and the parameters required for register virtualization; when virtualized registers need to be provided and implemented, determine the virtualized registers; input Sketch data, and store or update the Sketch data through the virtualized registers; the server receives data push from the physical registers of the programmable switch on a periodic basis, while always monitoring the virtualized registers, and restores the Sketch data by fusing the data of the physical registers and the virtualized registers.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer networks, and particularly relates to a Sketch measurement accuracy improvement method based on programmable switch virtualized registers, an electronic device and a medium. BACKGROUND

[0002] In modern networks such as data centers and wide area networks, traffic measurement is the basis of network management applications such as traffic engineering and anomaly detection. In existing measurement techniques, Sketch is of great concern, which can accurately measure traffic with low resource consumption.

[0003] Sketch is a fast and low-overhead network measurement technique based on probability algorithms. It uses fixed-size data structures and hash algorithms to compress network traffic information and retain key features, reducing storage and computing overhead while maintaining high measurement accuracy, thereby quickly capturing network traffic features and providing real-time measurement results.

[0004] Past practices have shown that the accuracy of Sketch can be significantly improved by using more registers to store Sketch data. The reason is that using more registers can reduce the probability of hash collisions when recording flows in Sketch. This rule applies to most Sketches, and theoretically the higher accuracy of Sketch is positively correlated with more registers

[0005] However, programmable switches have serious limitations in terms of register resources. Each switch uses a multi-stage pipeline to maintain its line-speed packet processing performance. Each stage provides limited computing resources and memory resources. These limitations result in: each stage can only retain a small number of register arrays, and the number of registers in each array is at most 10 5 levels. In addition, the number of stages of each switch is also limited.

[0006] Therefore, there are two major limitations in building Sketch:

[0007] (1) The number of register arrays used by each Sketch is limited by the number of arrays in each stage and the number of stages;

[0008] (2) The number of registers in each array should be lower than the capacity of each stage. These limitations determine the maximum memory budget allocated to each Sketch, thereby limiting the accuracy of Sketch-based measurements. SUMMARY

[0009] To overcome the deficiencies of the prior art, the embodiments of the present application provide a Sketch measurement accuracy improvement method based on programmable switch virtualized registers, an electronic device and a medium.

[0010] In a first aspect, an embodiment of the present application provides a Sketch measurement method based on programmable switch virtualization registers, the method comprising:

[0011] obtaining a Sketch program;

[0012] setting parameters required for register virtualization, including a maximum influence threshold θ of the programmable switch bandwidth when the registers are virtualized, a number m of register arrays to be used, and a number n of registers in each register array u . i ;

[0013] determining whether to provide and implement virtualization registers according to the physical registers of the programmable switch, the data recirculation channel bandwidth, and the parameters required for register virtualization;

[0014] when it is necessary to provide and implement virtualization registers, determining the virtualization registers; inputting Sketch data, and performing data storage or data update on the Sketch data through the virtualization registers;

[0015] the server receives data push of the physical registers of the programmable switch according to a period, always listens to the virtualization registers, and recovers Sketch data by fusing the data of the physical registers and the virtualization registers.

[0016] In a second aspect, an embodiment of the present application provides an electronic device, comprising a memory and a processor, wherein the memory is coupled to the processor; the memory is configured to store program data, and the processor is configured to execute the program data to implement the above-described Sketch measurement method based on programmable switch virtualization registers.

[0017] In a third aspect, an embodiment of the present application provides a computer readable storage medium, which stores a computer program, and the program is executed by a processor to implement the above-described Sketch measurement method based on programmable switch virtualization registers.

[0018] In a fourth aspect, an embodiment of the present application provides a computer program product, comprising computer programs / instructions, and the computer programs / instructions are executed by a processor to implement the above-described Sketch measurement method based on programmable switch virtualization registers.

[0019] Compared with the prior art, the present application has the following beneficial effects:

[0020] The present invention provides a method for improving Sketch measurement accuracy based on programmable switch virtualized registers. Without excessively affecting user programming, a register virtualization solution that can meet user needs is developed based on hardware parameters such as the number of register arrays required by Sketch, the required number of registers, the number of physical register arrays of the programmable switch, and the bandwidth of the programmable switch data recycling channel. The accuracy of Sketch real-time network measurement is improved by increasing the number of registers available to users. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 is a schematic diagram of virtualized registers;

[0023] Figure 2 This is a flow chart of virtual register data preservation and recovery in the method of the present invention;

[0024] Figure 3 It is an architectural diagram of the method of the present invention;

[0025] Figure 4 It is a workflow diagram of the method of the present invention;

[0026] Figure 5 It is a schematic diagram of an electronic device. DETAILED DESCRIPTION

[0027] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0028] It should be noted that, unless there is any conflict, the features in the following embodiments and implementations may be combined with each other.

[0029] The present invention is structured as follows Figure 3 As shown, the present invention is a method for improving Sketch measurement accuracy based on virtualized registers of a programmable switch. Users use the Phantom framework and P4 language for programming. Phantom runs programs on both the programmable switch and the server to achieve register recovery and Sketch data recovery.

[0030] The Phantom framework consists of three components, which are:

[0031] Component 1: Sketch receiver. The user uses the programmable switch on the Phantom through the API provided by the Phantom, and the Sketch receiver is responsible for receiving the Sketch code implemented by the user in the P4 language and the resource parameters allowed to be used by the Phantom virtualization register, and submitting to the component 2 data plane processor.

[0032] Component 2: Data plane processor. The data plane processor is responsible for virtualization setting and implementation on the programmable switch, and communicates with the server processor to complete the recovery of register data for the Sketch algorithm to use.

[0033] When receiving the Sketch data packet, the data plane processor will use the data recirculation channel of the programmable switch to virtualize the register under the condition defined by the user, and the operation of the virtual register will be in the form of register update data packet in the data recirculation channel. Continuous circulation plays a role in saving.

[0034] Component 3: Server processor. The server processor is located on the server directly connected with the programmable switch, and is responsible for collecting the update push of the physical register at the end of the period and listening to the Sketch update data packet for the virtual register sent by the data plane processor during the period; The server processor also needs to be responsible for recovering and fusing the data of the physical register and the virtual register, and recovering to the complete data format of the Sketch for network measurement and analysis.

[0035] The mathematical symbols used in this example are shown in Table 1:

[0036] Table 1 Mathematical symbols used in this example

[0037]

[0038]

[0039] As shown in Figure 4 The embodiment of the present application provides a Sketch measurement precision improvement method based on a programmable switch virtual register, which comprises the following steps:

[0040] Step S1, obtaining a Sketch program.

[0041] Specifically, the user uses the register virtualization (Phantom) framework programming to implement the Sketch, writes the Sketch program using P414 or P416 language, and writes in the same way as writing a traditional Sketch program, only when defining the register, uses the API provided by Phantom to customize the register, and the use of the register is the same as the P4 language standard, and machine code is obtained through the P4C compiler and the backend compiler provided by the manufacturer to run.

[0042] Step S2, set the parameters required for register virtualization, including: the maximum impact threshold θ of the programmable switch bandwidth when virtualizing the register, the number m of register arrays to be used u and the number n of registers in each register array i .

[0043] Wherein, m is the maximum value of the programmable switch possible register array, in order to calculate m, the following five factors need to be considered:

[0044] (1) Each programmable switch stage supports up to k register arrays, use N stage to represent the total entry stage and exit stage of the programmable switch, so m≥N stage ·k.

[0045] (2) m is limited by the bandwidth threshold θ, at runtime, each data packet is sent to each register array and hashed to a register to update the register data. Therefore, for a Sketch with m arrays, where m-N stage ·k arrays are virtual arrays, each data packet will generate m-N stage ·k register updates, and the target of these updates is the virtual register. The size of each update is denoted by l. In this case, for the maximum possible traffic γ (in pps) and the measurement time t, there are at most γ·t data packets and γ·t·(m-N stage ·k) virtual register updates. In each cycle, the bandwidth consumed by the loop updates should be less than θ, so the equation γ·t·(m-N stage ·k)·l≤t·θ can be derived, and the m restriction condition can be obtained after derivation:

[0046] (3) m is also limited by the memory threshold λ of the programmable switch traffic manager (Traffic Manager, TM). Specifically, the normal forwarding packet behavior of the programmable switch in the register virtualization process implemented by the data recirculation channel will not be affected by exceeding the limit value, and if the memory consumption of the virtualization to the TM is greater than λ, the cyclic update will compete with the normal traffic for the TM buffer, thereby causing packet loss. Assuming that α is the maximum number of updates residing in the data recirculation channel, the number of updates per cycle is γ·t·(m-N stage ·k), and therefore the number of updates in the cache is γ·t·(m-N stage ·k)-α, the virtualization consumption of the TM memory should be less than λ, and therefore l·(γ·t·(m-N stage ·k)-α)≤λ, from which the following formula can be derived:

[0047] (4) In each reporting period, the virtualization register update must be sent to the server before the end of the period to ensure the timeliness of the measurement. Assuming that ω is the bandwidth budget of the programmable switch and t is the length of a period, the following formula can be derived in combination with the above textual description: γ·t·(m-N stage ·k)·l≤t·ω / l, which is transformed into:

[0048] (5) m is limited by the maximum number of hash functions N hash in each programmable switch, because each register array needs at least one hash function to calculate the index of the target register, and therefore m≤N hash

[0049] In summary, the calculation formula of m can be obtained as follows:

[0050]

[0051] In the formula, the stage of each programmable switch supports at most k register arrays, N stage represents all the entry stages and exit stages of the programmable switch; γ represents the maximum traffic, t represents the measurement period length, l represents the length of each register update packet, ω represents the bandwidth budget of each programmable switch port, λ represents the maximum cache of the programmable switch traffic manager TM, α represents the maximum number of pipeline cycles of the Sketch update packet, and N hash represents the maximum number of hash functions in each programmable switch.

[0052] n i is the number of register arrays m uThe number of registers in each register array, in order to calculate n i Three scenarios need to be considered:

[0053] (1) When m u = m, then the top N stage ·k registers are physical register arrays, and the remaining m-N stage ·k are virtual register arrays; for physical register arrays, the maximum number of available registers is the number of registers allowed per stage And for virtual register arrays, the maximum number of available registers is the maximum number of hash functions that can be indexed, that is The above text can be expressed in the following formula:

[0054]

[0055] (2) When N stage ·k≤m u <m, Sketch uses N stage ·k physical register arrays and m u -N stage ·k virtual register arrays, then the first m-m u physical register arrays can use virtual registers, and the part exceeding N stage ·k physical register arrays can provide an upper limit also uses virtual registers, which can be expressed in the formula as:

[0056] (3) When 1≤m u <N stage ·k, then use physical register arrays completely without the need for virtualized register arrays.

[0057] In summary, the calculation formula of n i can be summarized as:

[0058]

[0059] Step S3, according to the programmable switch physical register, data recirculation channel bandwidth, the parameters required for register virtualization to determine whether to provide and implement virtualized registers.

[0060] Step S4, when it is necessary to provide and implement the virtualized register, the virtualized register is determined; the Sketch data is inputted, and the update and operation of the newly arrived Sketch data to the virtual register are saved by using the data recirculation channel of the programmable switch to implement the virtualization, until it is necessary to restore the Sketch data or the link state meets the preset condition, the data recirculation channel of the programmable switch sends the virtual register update data packet to the server;

[0061] The process of determining the virtualized register includes:

[0062] According to the number of the available physical register arrays of the current programmable switch, the number of the required register arrays of the Sketch, the number of the available registers of each register array and the number of the required registers of the Sketch, a comprehensive judgment is made to determine the virtualization array strategy. If the number of the required register arrays of the Sketch is greater than the number of the available physical register arrays of the programmable switch (m i N i >N stage ·k), the Phantom virtualizes the remaining m i -N stage ·k register arrays; if the number of the required registers of the jth register array exceeds the number of the physical registers Then, the Phantom virtualizes the registers after the jth register array. Figure 1 .

[0063] Further, the virtualized register completes the abstraction of the register function by implementing two functions, which are the simulation of the data storage and the simulation of the Sketch operation.

[0064] The process of storing the Sketch data by using the virtualized register includes: the Sketch data is continuously sent to the data recirculation channel of the programmable switch, and continuously circulates, so that the data of the virtual register is stored in the programmable switch.

[0065] The process of updating the Sketch data by using the virtualized register includes:

[0066] When the write-only operation of the Sketch is executed, the Sketch update is sequentially submitted to the server, and the data packet in the data recirculation channel is time-stamped to enable the server to identify the sequence of the data packet.

[0067] When the read-after-write operation of the Sketch is executed, for example, Figure 2 ​As shown, the new data to be written is calculated after reading the register data and comparing with the register data. By making an equivalent operation on the read-after-write operation, the read-after-write operation is adjusted to a write-only operation under a condition, so that the server can understand the Sketch update and restore the Sketch data.

[0068] It should be noted that some operations of the Sketch need to read the register data first and then determine how to change the data, and the data of the virtual register (saved in the switch in the form of a data packet in the programmable switch data recirculation channel) is not available before the server restores it, so this example adopts a fine-grained strategy to perform these operations.

[0069] Further, the virtualized register strictly guarantees data recirculation control, load control and small update aggregation during runtime, including:

[0070] The virtualized register performs each arriving Sketch data, calculates the index, then generates an update packet (including a write-only operation packet and a read-after-write packet) according to the Sketch data, and finally sends the update packet to the data recirculation channel of the programmable switch

[0071] Real-time detection of the memory occupation of the virtualized register to the TM, the bandwidth occupation of the non-data recirculation channel, etc.

[0072] The size of the register update is small (13 bytes), and the programmable switch usually does not provide a line rate guarantee for processing updates smaller than 64 bytes. Therefore, in order to prevent the loss of small updates, the updates created for the same data packet are aggregated into a large update. In this way, each recirculation update is composed of multiple register updates and is greater than 100 bytes. Therefore, the programmable switch processes the update at the line rate, and the aggregation does not affect the normal workflow of the programmable switch and the server.

[0073] Step S5, the server receives the data push of the programmable switch physical register according to the period, and always listens to the virtualized register, and restores the Sketch data by fusing the data of the physical register and the virtualized register; including:

[0074] For the physical register, the programmable switch pushes the register data to the server at the end of each period; for the virtual register, the server receives the update from the programmable switch and restores the data;

[0075] The server receives the register update from the programmable switch and maintains the same copy of the register array; when the period is in progress, the register update is temporarily buffered in the server memory and sorted according to the timestamp;

[0076] When the period ends, the server processes the updates in timestamp ascending order; for each update, the server uses the update index to address the corresponding register in its replica; if the register uses write-only operations, the server directly updates the register data; if the register uses read-after-write operations, the server first reads the register data, then compares the data with the operand extracted from the update, according to the comparison result, the server calculates the new value to be written, and performs the write operation; after processing all updates, the register data is restored.

[0077] Embodiment 1

[0078] S1: This example implements virtualization (Phantom) on a 64x100Gbps Tofino programmable switch. First, this example builds a control plane agent on the front-end compiler P4C, which accepts Sketch written in P4. The agent converts Sketch to intermediate representation (IR). Then it automatically analyzes IR to identify virtual registers and integrates the code of the switch handler into IR to activate virtual registers. It converts IR to configuration and loads it onto the switch through the back-end Tofino compiler.

[0079] S2: This example implements a data plane handler in P4. When a data packet updates a virtual register, the handler records these updates in metadata. When the data packet leaves the Sketch, the data plane handler extracts register updates from the metadata and performs subsequent processing. To configure the user-specified threshold, the data plane executes the corresponding system command in the switch operating system. For θ, the data plane handler calls the port management command to set the loop transmission channel. For λ, the data plane handler calls the TM command to allocate enough buffer memory for the queue access control of the data loop. For ω, the data plane handler calculates t i in the switch operating system and fills in the rule that sets t i to the ASIC pipeline.

[0080] S3: This example implements the server processor in C++ and uses the libraries provided by DPDK (Data Plane Development Kit) to implement its I / O driver. This example builds a test platform that contains both control and data planes. On the control plane, this example runs a control plane agent on a server. This server is directly connected to the data plane devices and sends messages to them through remote procedure calls. On the data plane, this example connects a switch running the switch processor and three servers running the server processor through a 100 Gbps link. This example also connects two servers to the switch. This example uses PktGen of the DPDK toolkit to build traffic generators and receivers in these servers. Each server is equipped with an Intel(R) Xeon(R) Gold 6240C CPU (2.60 GHz) with 36 cores and 128 GB of RAM. This example adopts the serpentine test method, which is an industry standard for performance evaluation. For the switch running Phantom, its first and ports are traffic ports, connected to two test servers (because the ports are loopback ports). The 2i-th port is connected to the (2i-1)-th port, where Then, this example sets each test server to inject 100 Gbps of traffic to each traffic port, while the switch forwards the traffic to another server through the connected normal ports. In this case, the serpentine structure enables all ports to receive and send traffic simultaneously, thus stressing the switch performance.

[0081] S4: This example programs the Phantom framework to implement the Sketch structure, and configures two user-specified thresholds θ and ω as follows, unless otherwise specified:

[0082] (1) This example sets θ to 100 Gbps, which is about 1 / 4 of the built-in loop bandwidth p.

[0083] (2) This example sets λ to 5 MB, which is a small fraction of the buffer memory in modern switches (e.g., Tofino and Tomahawk provide 64 MB of buffer).

[0084] (3) ω is set to be equal to θ. For other target-specific parameters, such as N stage and N hash , this example sets their values according to the specifications of the switch.

[0085] Meanwhile, this example sets the length of each period t to 1 millisecond.

[0086] This example implements five state-of-the-art Sketches, including count-min Sketch (CM), count Sketch (CS), elastic Sketch (ES)

[73] , FlowRadar (FR), and UnivMon (UM). CM, CS, and FR use write-only operations to manipulate their register arrays, while ES and UM use read-after-write operations. This example configures the corresponding parameters based on their typical usage.

[0087] S5: Based on the parameters set in step S4, Phantom determines the virtualization register strategy. This example demonstrates one of the situations. Figure 1 As shown in the figure: This situation covers the strategy mode of Phantom virtualized registers more comprehensively. Assume that the current Sketch user requires m u =4, while the current maximum number of physical register arrays in a programmable switch is 3. Therefore, to meet the user's required number of register arrays, Phantom uses physical register arrays for the first three register arrays and virtualizes the fourth register array. Furthermore, the user requires each register array to have 16 registers, while the maximum number of physical registers is 12. Therefore, Phantom uses physical registers for the first 12 registers of the physical register array and virtual registers for the next four registers. For the fourth register array, since the entire array is virtualized, all registers are virtual registers. Four Sketch packets arrive at time points T1, T2, T3, and T4, respectively. The access indexes at time points T1 and T2 are all physical registers, so Phantom does not need to perform any operations and can directly manipulate the physical register values ​​according to the packet requirements. The packet arriving at time T3 requests a +1 operation on the fifteenth register of the third register array. The Phantom recognizes this as a write-only operation on the virtual register and creates a write-only Sketch update packet with the content ((3,15),+1,T3), indicating that a +1 operation is requested on the fifteenth register of the third register array at time T3. This update packet is then sent to the data recirculation channel. The packet arriving at time T4 requests a conditional check and modification on the eighth register of the fourth register array. The Phantom recognizes this as a read-after-write operation on the virtual register and creates a read-after-write Sketch update packet with the content ((4,8),100,T4), indicating that a comparison is requested at time T4 between the eighth register of the fourth register array and 100. If the data is greater than 100, a 0 is written; otherwise, no operation is performed. The Phantom then sends this Sketch update packet to the data recirculation channel.

[0088] S6: The server processor recovers and merges the physical register and virtual register data obtained from the programmable switch. The server processor uses two methods to collect register data.

[0089] (1) For physical registers, the switch pushes register data to the handler at the end of each cycle.

[0090] (2) For virtual registers, the server processor receives updates from the switch and recovers the data. It supports user queries on register data, recovery of register data.

[0091] At runtime, the server processor receives register updates from the switch and maintains a consistent copy of the register array. During a cycle, register updates are temporarily buffered in the server memory and sorted by timestamps. When the cycle ends, the server processor processes the updates in ascending order of timestamps. For each update, it uses the updated index to access the corresponding register in its copy. If the register uses write-only operations, the server processor directly operates on the updated register data. If the register utilizes read-after-write operations, it first performs a read of the register data. Then, the data is compared with the operand extracted from the update. Based on the comparison result, the server processor determines the new value to write and forces the write to the register. After processing all updates, it recovers the register data for the cycle. Register updates can be out-of-order during the loop or transmission. However, this reordering does not affect recovery, as each update is accompanied by a timestamp of when it was generated. With the timestamp, the handler can correctly process the updates and avoid errors. According to the S5 example, the update ((3, 15), +1, T3) targets a write-only operation register, so the server processor increases the register data by 1. For the update ((4, 8), 100, T4), the target register supports read-after-write operations. Therefore, the server processor reads the latest register data, e.g., 101. Next, it extracts the operand (100) from the update ((4, 8), 100, T4) and compares the operand with the data. The data exceeds the operand, so the server processor rewrites the data to zero.

[0092] S7: The server provides APIs for network real-time measurement programs to query Sketch data.

[0093] In summary, the present application first implements the storage of virtual registers in each switch by circulating its registers to keep its data within the switch. Secondly, in order to correctly perform the operation of the virtual register without generating high overhead, it transmits the register update from the switch to the server while keeping the overhead below the user-specified budget by utilizing data circulation. With the support of the Phantom framework, the classic programmable switch Tofino can virtualize O(10 6 ) registers under Tbps-level traffic, thereby bringing up to 86% accuracy improvement for Sketch.

[0094] Correspondingly, the present application also provides an electronic device, comprising: one or more processors; a memory for storing one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the programmable switch-based virtual register Sketch measurement method as described above. As Figure 5 shown, the programmable switch-based virtual register Sketch measurement method provided by the embodiment of the present application is a hardware structure diagram of any data processing capable device. In addition to the processor, memory and network interface shown, any data processing capable device in which the apparatus in the embodiment is generally according to the actual function of the data processing capable device, and can also include other hardware, which will not be described here. Figure 5

[0095] Correspondingly, the present application also provides a computer readable storage medium having computer instructions stored thereon, which are executed by a processor to implement the programmable switch-based virtual register Sketch measurement method as described above. The computer readable storage medium can be an internal storage unit of any data processing capable device, such as a hard disk or memory. The computer readable storage medium can also be an external storage device, such as a plug-in hard disk, a smart media card (SMC), an SD card, a flash card, etc. Further, the computer readable storage medium can include both the internal storage unit of any data processing capable device and the external storage device. The computer readable storage medium is used to store the computer program and other programs and data required by the data processing capable device, and can also be used to temporarily store data that has been output or will be output.

[0096] ​The above examples are only used to illustrate the technical solutions of the present application, and are not intended to limit the present application; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that the technical solutions recorded in the foregoing examples can be modified, or some technical features can be replaced by equivalent features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A Sketch measurement method based on a programmable switch virtualization register, characterized in that: The method comprises: Get the Sketch app; Set the parameters required for register virtualization, including the maximum impact threshold on programmable switch bandwidth when virtualizing registers. , the number of register arrays to be used and the number of registers in each register array ; Determine whether to provide and implement virtualized registers based on the physical registers of the programmable switch, the bandwidth of the data recycling channel, and the parameters required for register virtualization; When a virtualized register needs to be provided and implemented, the virtualized register is determined; Sketch data is input, and data is stored or updated on the Sketch data through the virtualized register; The server periodically receives data pushes from the physical registers of the programmable switch, while always monitoring the virtualized registers. It then restores the Sketch data by fusing the data of the physical and virtualized registers.

2. The Sketch measurement method based on programmable switch virtualization register according to claim 1, characterized in that: Calculate the maximum possible register array of a programmable switch The process includes: ； In the formula, each programmable switch stage supports up to register arrays, Represents all ingress and egress stages of a programmable switch; Indicates the maximum flow rate, Indicates the length of the measurement cycle, Indicates the length of each register update data packet, represents the maximum recirculation bandwidth, represents the bandwidth budget of each programmable switch port, Indicates the maximum buffer size of the Programmable Switch Traffic ManagerTM, Indicates the maximum number of cycles of Sketch update data packets in the pipeline. Indicates the maximum number of hash functions in each programmable switch.

3. The Sketch measurement method based on programmable switch virtualization register according to claim 2, characterized in that: The number of register arrays to use The number of registers in each register array The calculation process includes: ； Where, Indicates the maximum value of the register array of a programmable switch. Represents all ingress and egress stages of a programmable switch. Indicates the number of registers allowed in each stage of the programmable switch. Indicates the maximum number of indices that the hash function can index.

4. The Sketch measurement method based on programmable switch virtualization register according to claim 3, characterized in that: The number of register arrays to use The number of registers in each register array The calculation process also includes: when When registers are physical register arrays, and the remaining It is a virtual register array; for the physical register array, the maximum number of registers available is the number of registers allowed in each stage ; For the virtual register array, the maximum number of available registers is the maximum number that can be indexed by the hash function ; when When physical register arrays and virtual register arrays, the front The physical register array uses virtual registers, exceeding Virtual registers are also used for parts of the physical register array that can provide an upper limit; when When using , all physical register arrays are used without virtualizing the register array.

5. The Sketch measurement method based on programmable switch virtualization register according to claim 3, characterized in that: The process of determining virtualized registers includes: Determine the virtualization array strategy based on the number of available physical register arrays of the current programmable switch, the number of register arrays required by Sketch, the number of available registers in each register array, and the number of registers required by Sketch; if The number of required register arrays is greater than the number of physical register arrays. , then virtualize the remaining Register array; if The number of registers required by a register array exceeds the number of physical registers , then the virtual register array register.

6. The Sketch measurement method based on programmable switch virtualization register according to claim 1, characterized in that: The process of storing or updating Sketch data through virtual registers include: The process of storing Sketch data through the virtualized register includes: continuously sending Sketch data to the data recycling channel of the programmable switch and continuously circulating the data, so that the data of the virtual register is stored in the programmable switch; The process of updating Sketch data through virtualized registers includes: When performing Sketch write-only operations, Sketch updates are submitted to the server in order, and the server can identify the order of data packets by adding timestamps to the data packets in the data recycling channel; When performing a sketch read-after-write operation, the register data is read first and then compared with the register data before the new data to be written is calculated. However, the programmable switch cannot obtain real-time register data. Therefore, the read-after-write operation needs to be equivalently operated, thereby adjusting it to a write-only operation under a condition. The server uses this condition to understand the sketch update and then restore the sketch data.

7. The Sketch measurement method based on programmable switch virtualization register according to claim 1, characterized in that: The server periodically receives data pushes from the physical registers of the programmable switch while always monitoring the virtualized registers. The server then fuses the data from the physical and virtualized registers to restore the Sketch data. The process includes: For physical registers, the programmable switch pushes register data to the server at the end of each cycle; for virtual registers, the server receives updates from the programmable switch and restores the data in sequence; The server receives register updates from the programmable switch and maintains an identical copy of the register array. While a cycle is in progress, register updates are temporarily buffered in server-side memory and sorted by timestamp. When the cycle ends, the server processes the updates in ascending timestamp order; for each update, the server uses the update index to address the corresponding register in its replica; if the register uses write-only operations, the server directly updates the register data; if the register uses read-after-write operations, the server first reads the register data and then compares the data with the operand extracted from the update. Based on the comparison result, the server calculates the new value to be written and performs the write operation; after processing all updates, the register data is restored.

8. An electronic device comprising a memory and a processor, characterized in that: The memory is coupled to the processor; wherein the memory is used to store program data, and the processor is used to execute the program data to implement the Sketch measurement method based on the programmable switch virtualization register according to any one of claims 1 to 7.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the Sketch measurement method based on a programmable switch virtualization register is implemented as described in any one of claims 1 to 7.

10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instruction is executed by a processor, the Sketch measurement method based on a programmable switch virtualization register according to any one of claims 1 to 7 is implemented.

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