Image sensing device
By introducing different charge amount differences in different exposure times into the pixel array of iToF sensors, the problem of limited sensor measurement range is solved, and a wider distance measurement range and a higher dynamic depth range are achieved.
Patent Information
- Application Number
- CN202410755246.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-10-06
- Filing Date
- 2024-06-12
- Publication Date
- 2025-04-08
AI Technical Summary
Indirect time-of-flight (iToF) sensors operate over a limited range of distances, depth errors and charge saturation problems caused by external light seriously limit the measurement range.
By introducing charge difference at different exposure times into the pixel array, the processor generates different charge difference for each pixel to extract the distance information of the object and enhance the distance measurement range.
This method significantly enhances the distance measurement range of the iToF sensor by using multiple charge difference and obtains up to four different distance information through the adaptive high dynamic depth range (AHDDR).
Smart Images

Figure CN119788986A_ABST
Abstract
Description
Technical Field
[0001] An exemplary embodiment of the present disclosure relates to an image sensing device. Background Art
[0002] In recent years, time-of-flight (ToF) image sensors have begun to be installed in mobile devices, resulting in a rapid growth in market demand.
[0003] The indirect time-of-flight (iToF) sensor measures distance by calculating time based on the phase difference generated by the movement of light. In this case, when the distance is calculated using two charge values (Q) that store phase information, depth errors may occur due to external light. Accurate distance measurement requires external light removal. To this end, four charge values Q0, Q90, Q180, and Q270, each storing phase information, are obtained. The distance is then calculated using two charge amount differences (ΔQ0=Q0-Q180, ΔQ0=Q90-Q270).
[0004] For performance reasons, iToF sensors typically employ pixels configured to include two taps, and in this case, two frames are used to calculate the distance.
[0005] iToF systems typically operate within a limited distance range. The iToF system emits light and detects the phase difference of the light reflected from the object and returned. For nearby objects, the light reflected from the object and incident on the sensor has a high intensity, resulting in saturation of the charge value (Q) of the stored phase. This can cause critical depth errors, thereby severely limiting the measurement range of the iToF sensor.
[0006] A related technology of the present invention is disclosed in Korean Patent No. 10-2567502 (registered on August 10, 2023 and named “TIME OF FLIGHT APPARATUS”). Summary of the invention
[0007] An object of the present disclosure is to provide an imaging device that can enhance a distance measurement range by using a difference in charge amount with different exposure times.
[0008] According to one aspect of the present disclosure, an image sensing device is provided, which may include: a pixel array, in which pixels that convert light reflected from an object into electrical signals are arranged in the form of a grid; and a processor, which generates a difference in charge amount of at least one of exposure time and phase for each pixel in each frame according to the electrical signal detected from the pixel array, and extracts distance information of the object.
[0009] Each adjacent pixel in the pixel array of the present disclosure may have a different charge amount difference in the same frame.
[0010] The n-th column line and the (n+1)-th column line in the pixel array of the present disclosure may have different charge amount differences in the same frame.
[0011] The n-th row line and the (n+1)-th row line in the pixel array of the present disclosure may have different charge amount differences in the same frame.
[0012] The pixel array of the present disclosure may include pixels, wherein corresponding pixels in each frame have different charge amount differences in an nth frame and an (n+1)th frame.
[0013] The exposure time of the present disclosure may be an integration time for charge accumulation.
[0014] The integration time of the present disclosure may include at least one of a maximum time of the integration time, 1 / 2 of the maximum time, 1 / 4 of the maximum time, and 1 / 8 of the maximum time.
[0015] The processor of the present disclosure may obtain, for each pixel, a charge amount difference corresponding to an integration time of each adjacent pixel, and extract a charge amount difference corresponding to an integration time of each pixel based on the obtained integration time of each adjacent pixel.
[0016] The integration time of the present disclosure may include at least one of a maximum time of the integration time, 1 / 4 of the maximum time, 1 / 16 of the maximum time, and 1 / 64 of the maximum time.
[0017] The integration time of the present disclosure can be adjusted by having capacitors of different sizes.
[0018] The processor of the present disclosure may extract distance information of an object by using a charge amount difference of the same pixel in two frames.
[0019] The processor of the present disclosure may extract distance information of an object by using a charge amount difference of the same pixel in the nth frame and the (n+1)th frame.
[0020] The charge amount difference of pixels in the pixel array of the present disclosure may include at least one of the following: the charge amount difference between the charge at a 0 degree phase and the charge at a 180 degree phase; and the charge amount difference between the charge at a 0 degree phase and the charge at a 180 degree phase.
[0021] According to an aspect of the present disclosure, an image sensing device may enhance a distance measurement range by using a plurality of charge amount differences having different exposure times.
[0022] According to another aspect of the present disclosure, an image sensing device may obtain up to four different distance information for one pixel by applying an adaptive high dynamic depth range (AHDDR). BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 is a block diagram illustrating an image sensing device according to an embodiment of the present disclosure.
[0024] Figure 2 is a diagram showing a pixel array according to an embodiment of the present disclosure.
[0025] Figure 3 is a circuit diagram showing a pixel according to an embodiment of the present disclosure.
[0026] Figure 4 is a diagram illustrating an example of frame output according to an embodiment of the present disclosure.
[0027] Figure 5 is a diagram illustrating an example of interpolating a charge amount difference of a pixel according to an embodiment of the present disclosure.
[0028] Figure 6 is a diagram illustrating an example of calculating distance information according to an embodiment of the present disclosure.
[0029] Figure 7 is a diagram illustrating an example of adjusting the size of an FD node capacitor according to an embodiment of the present disclosure.
[0030] Figure 8 is a diagram showing an example of a TX configuration of a pixel array according to an embodiment of the present disclosure.
[0031] Fig. 9 is a diagram showing an example of an RST configuration of a pixel array according to an embodiment of the present disclosure.
[0032] Fig.10 is a diagram showing an example of an AB configuration of a pixel array according to an embodiment of the present disclosure.
[0033] Fig.11 is a diagram showing a pixel array consisting of TX, RST, and AB according to an embodiment of the present disclosure.
[0034] Fig.12 is a timing diagram showing a pixel according to an embodiment of the present disclosure. DETAILED DESCRIPTION
[0035] The components described in the example embodiments may be implemented by hardware components, including, for example, at least one digital signal processor (DSP), a processor, a controller, an application specific integrated circuit (ASIC), a programmable logic element (such as an FPGA), other electronic devices, or a combination thereof. At least some of the functions or processes described in the example embodiments may be implemented by software, and the software may be recorded on a recording medium. The components, functions, and processes described in the example embodiments may be implemented by a combination of hardware and software.
[0036] The method according to the exemplary embodiment may be embodied as a computer-executable program and may be implemented as various recording media such as a magnetic storage medium, an optical reading medium, and a digital storage medium.
[0037] The different techniques described herein may be implemented as digital electronic circuits, or as computer hardware, firmware, software, or a combination thereof. The techniques may be implemented as computer program products, i.e., computer programs tangibly embodied in information carriers, such as in machine-readable storage devices (e.g., computer-readable media) or in propagated signals for processing or controlling the operation of data processing devices (e.g., programmable processors, computers, or multiple computers) by data processing devices (e.g., programmable processors, computers, or multiple computers). Computer programs may be written in any form of programming language including compiled or interpreted languages, and may be deployed in any form including stand-alone programs or modules, components, subroutines, or other units suitable for use in a computing environment. Computer programs may be deployed to execute on a computer or on multiple computers at a site or distributed on multiple sites and interconnected by a communication network.
[0038] For example, processors suitable for executing computer programs include general and special purpose microprocessors and any one or more processors of any kind of digital computer. Typically, the processor will receive instructions and data from a read-only memory or a random access memory or both. The elements of a computer may include at least one processor for executing instructions and one or more memory devices for storing instructions and data. Typically, the computer will also include or be coupled to receive data from one or more mass storage devices (e.g., magnetic disks, magneto-optical disks, or optical disks), transmit data to them, or execute on both to store data. Embodiments of information carriers suitable for embodying computer program instructions and data include semiconductor memory devices, for example, magnetic media such as hard disks, floppy disks, and tapes, optical media such as compact disk read-only memory (CD-ROM), digital video disks (DVD), and magneto-optical media such as floppy disks, as well as read-only memory (ROM), random access memory (RAM), flash memory, erasable programmable ROM (EPROM), and electrically erasable programmable ROM (EEPROM) and any other known computer readable media. The processor and memory may be supplemented by or integrated into a dedicated logic circuit.
[0039] The processor may run an operating system (OS) and one or more software applications running on the OS. The processor device may also access, store, manipulate, process, and create data in response to the execution of the software. For simplicity, the description of the processor device is used as the singular; however, those skilled in the art will understand that the processor device may include multiple processing elements and / or multiple types of processing elements. For example, the processor device may include multiple processors or a processor and a controller. In addition, different processing configurations are possible, such as parallel processors.
[0040] Furthermore, non-transitory computer readable media can be any available media that can be accessed by a computer and can include both computer storage media and transmission media.
[0041] This specification includes details of multiple specific embodiments, but it should be understood that the details do not limit any invention or what may be claimed in the specification, but rather describe the features of specific embodiment implementations. The features described in this specification in the context of each example embodiment can be implemented as a combination of a single example embodiment. Conversely, the different features described in the specification in the context of a single example embodiment can be implemented in multiple example embodiments individually or in appropriate sub-combinations. In addition, these features can operate in a specific combination and can be initially described as required in the combination, but in some cases one or more features can be excluded from the required combination, and the required combination can be changed into a sub-combination or a modification of the sub-combination.
[0042] Similarly, even if operations are described in a particular order on the accompanying drawings, it should not be understood that the operations need to be performed in a particular order or sequence to obtain the desired results, nor should it be understood that all operations need to be performed. In certain circumstances, multitasking and parallel processing can be advantageous. In addition, in all example embodiments, it should not be understood that the various device components in the above example embodiments are required to be separated, and it should be understood that the above program components and devices can be incorporated into a single software product or can be packaged in multiple software products.
[0043] It should be understood that the exemplary embodiments disclosed herein are only illustrative and are not intended to limit the scope of the invention. It will be apparent to those skilled in the art that various modifications may be made to the exemplary embodiments without departing from the spirit and scope of the claims and their equivalents.
[0044] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present disclosure. However, the present disclosure can be embodied in many different forms and is not limited to the embodiments described herein.
[0045] In the following description of the embodiments of the present disclosure, detailed descriptions of known functions and configurations included herein will be omitted when it may make the subject matter of the present disclosure rather unclear. Parts not related to the description of the present disclosure in the drawings are omitted, and similar parts are represented by similar reference numerals.
[0046] In the present disclosure, components that are distinguished from each other are intended to clearly illustrate each feature. However, it does not necessarily mean that the components are separate. That is, multiple components can be integrated into one hardware or software unit, or a single component can be distributed into multiple hardware or software units. Therefore, unless otherwise indicated, such integrated or distributed implementations are also included in the scope of the present disclosure.
[0047] In the present disclosure, the components described in various embodiments are not necessarily required components, and some may be optional components. Therefore, an embodiment consisting of a subset of the components described in one embodiment is also included in the scope of the present disclosure. In addition, an embodiment including other components other than the components described in various embodiments is also included in the scope of the present disclosure.
[0048] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present disclosure. However, the present disclosure can be embodied in many different forms and is not limited to the embodiments described herein.
[0049] In the following description of the embodiments of the present disclosure, detailed descriptions of known functions and configurations included herein will be omitted when it may make the subject matter of the present disclosure rather unclear. Parts not related to the description of the present disclosure in the drawings are omitted, and similar parts are represented by similar reference numerals.
[0050] In the present disclosure, when a component is referred to as being "connected", "coupled" or "connected" to another component, it should be understood that not only a direct connection relationship but also an indirect connection relationship through an intermediate component may be included. In addition, when a component is referred to as "including" or "having" another component, it may mean further including the other component rather than excluding it, unless explicitly described to the contrary.
[0051] In the present disclosure, unless otherwise specifically stated, the terms first, second, etc. are used only for the purpose of distinguishing one component from another, and do not limit the order or importance of the components, etc. Therefore, within the scope of the present disclosure, a first component in one exemplary embodiment may be referred to as a second component in another embodiment, and similarly, a second component in one exemplary embodiment may be referred to as a first component.
[0052] In the present disclosure, components that are distinguished from each other are intended to clearly illustrate each feature. However, it does not necessarily mean that the components are separate. That is, multiple components can be integrated into one hardware or software unit, or a single component can be distributed into multiple hardware or software units. Therefore, unless otherwise indicated, such integrated or distributed implementations are also included in the scope of the present disclosure.
[0053] In the present disclosure, the components described in various embodiments are not necessarily required components, and some may be optional components. Therefore, an embodiment consisting of a subset of the components described in one embodiment is also included in the scope of the present disclosure. In addition, exemplary embodiments including other components except the components described in various embodiments are also included in the scope of the present disclosure.
[0054] Figure 1 is a block diagram of an image sensing device according to an embodiment of the present disclosure.
[0055] Reference Figure 1 According to an embodiment of the present disclosure, the image sensing device may include a light source 100 , an image sensor 200 , and a processor 300 .
[0056] The light source 100 may illuminate a subject (not shown) with light.
[0057] The light source 100 may irradiate the object with light during a predetermined exposure period.
[0058] The exposure period may be a frame period. Thus, when a plurality of frames are generated, the exposure period may be repeated.
[0059] Light emitted from the light source 100 may be reflected from an object and input to the image sensor 200 .
[0060] The light source 100 may be a light emitting diode that emits light of infrared or near-infrared wavelengths, or a laser diode that emits laser light. The type of the light source 100 is not particularly limited.
[0061] The image sensor 200 may receive light emitted from the light source 100 and reflected from an object and generate an electrical signal.
[0062] The image sensor 200 may be synchronized with a flash cycle of the light source 100 and receive light.
[0063] Image sensor 200 may include pixel array 210 .
[0064] The pixel array 210 may include a plurality of pixels 211 arranged in a grid form.
[0065] The pixel 211 may receive light reflected from an object and convert the light into an electrical signal.
[0066] Figure 2 is a diagram showing a pixel array according to an embodiment of the present disclosure, Figure 3 is a circuit diagram of a pixel according to an embodiment of the present disclosure.
[0067] refer to Figure 2 and Figure 3 , the pixel array 210 may include a plurality of pixels 211 in a grid form.
[0068] The pixel 211 may be a 2-tap type pixel 211 .
[0069] When light is input, current may be output to the photodiode due to the input light.
[0070] At this time, the switch TX1 may be turned on in the same phase as the input light, and the switch TX2 may be turned on in the opposite phase to the input light.
[0071] When the switch TX1 is turned on in the same phase as the input light, the current from the photodiode can be applied to the capacitor of FD1, thereby charging the capacitor of FD1. At this time, the switch TX2 is turned off.
[0072] On the other hand, when the switch TX2 is turned on in a phase opposite to the input light, the current from the photodiode is applied to the capacitor of FD2, thereby charging the capacitor of FD2. At this time, the switch TX1 is turned off.
[0073] The difference in charge amount between the charge charged in the capacitor of FD1 and the charge charged in the capacitor FD2 (hereinafter simply referred to as “charge amount difference”) can be extracted for each frame.
[0074] Based on the charge amount difference of the same pixel 211 extracted for each frame, distance information for the object may be extracted.
[0075] The AB switch prevents FD1 or FD2 from being charged when strong light (such as blooming) is received.
[0076] See also Figure 3 , each RST switch can discharge the capacitor of FD1 and the capacitor of FD2 respectively.
[0077] In this embodiment, adjacent pixels 211 in each frame may have different charge differences. That is, each of the pixels 211 in the same frame may not output the same charge difference, but may output a different charge difference. Based on the different charge differences, the distance measurement range may be improved.
[0078] In the same frame, the nth column line and the (n+1)th column line may have different charge amount differences, and the nth row line and the (n+1)th row line may have different charge amount differences.
[0079] Two frames are required to extract the distance information of the object. Assuming that the frames for extracting the distance information are referred to herein as frame #1 and frame #2, the output of the pixel array 210 of frame #1 and frame #2 may be repeated.
[0080] That is, for the pixel array 210 , the same pixel 211 in the n-th frame and the (n+1)-th frame may have different charge amount differences.
[0081] Figure 4 is a diagram illustrating an example of frame output according to an embodiment of the present disclosure.
[0082] See also Figure 4 , in frame #1, the charge difference of pixel <0,0> is ΔQ(0), the charge difference of pixel <0,1> is ΔQ(90), the charge difference of pixel <1,0> is ΔQ(90), and the charge difference of pixel <1,1> is ΔQ(0).
[0083] ΔQ(0) may be a charge amount difference between charges at a 0-degree phase and charges at a 180-degree phase.
[0084] ΔQ(90) may be the difference in charge amount between a charge at a 90 degree phase and a charge at a 270 degree phase.
[0085] In frame #2, the charge amount difference of pixel <0,0> is ΔQ(90), the charge amount difference of pixel <0,1> is ΔQ(0), the charge amount difference of pixel <1,0> is ΔQ(0), and the charge amount difference of pixel <1,1> is ΔQ(90).
[0086] Here, the output of the pixel arrays 210 of frame #1 and frame #2 may be repeated for each frame. That is, after the output of the pixel array 210 of frame #2, the pixel array 210 of frame #1 may be output, and then the pixel array 210 of frame #2 may be output again.
[0087] The processor 300 may generate different charge amount differences for the pixels 211 in the frame according to the electrical signals detected from the pixel array 210 and extract distance information of the object.
[0088] The processor 300 may extract the charge amount difference for each pixel 211 at a plurality of different exposure times.
[0089] The multiple different exposure times may be integration times during which charge is accumulated according to the exposure period.
[0090] The integration time can be the maximum time of the integration time (T MAX ), 1 / 2 of the maximum time (T MAX / 2), 1 / 4 of the maximum time (T MAX / 4) and 1 / 8 of the maximum time (T MAX / 8).
[0091] In another embodiment, the integration time may be a maximum time (T MAX ), 1 / 4 of the maximum time (T MAX / 4), 1 / 16 of the maximum time (T MAX 16) and 1 / 64 of the maximum time (T MAX / 64).
[0092] There is no particular restriction on the integration time.
[0093] The processor 300 may use an interpolation method to obtain the charge amount difference at different integration times for each pixel 211 .
[0094] To this end, the processor 300 may obtain a charge amount difference corresponding to the integration time of each adjacent pixel 211 for each pixel 211. Then, the processor 300 may extract a charge amount difference corresponding to the integration time of each pixel 211 based on the obtained integration time of each pixel 211.
[0095] Figure 5 : is a diagram illustrating an example of interpolating a charge amount difference of a pixel according to an embodiment of the present invention.
[0096] See also Figure 5 , charge amount differences ΔQ(90) and ΔQ(0) of the pixel 211 in the blue frame in frame #1 and frame #2 are respectively illustrated as examples.
[0097] First, for the charge difference ΔQ(90) of the pixel 211 in the blue frame in frame #1, the processor 300 can calculate the charge difference ΔQ(90) by performing a calculation on the pixel 211 with the maximum time (T MAX ) of the pixel 211 (in Figure 5 In the example, the charge amount differences (ΔQ(0)1, ΔQ(0)2) of the pixels above and below the pixel with the charge amount difference ΔQ(90) are averaged to obtain the value at the maximum time (T MAX ) has a charge difference of ΔQ(90). The mathematical expression is:
[0098]
[0099] For the charge amount difference ΔQ(90) of the pixel 211 in the blue frame in frame #1, the processor 300 can calculate the charge amount difference ΔQ(90) by comparing the charge amount difference ΔQ(90) of the pixel 211 in the blue frame in frame #1 with ... MAX The maximum time 1 / 2 (T / 2) is obtained by averaging the charge amount differences (ΔQ(0)1, ΔQ(0)2) of the pixels 211 (pixels on the left and right of the pixel with the charge amount difference ΔQ(90)) MAX / 2) at the charge difference ΔQ(90). The mathematical expression is:
[0100]
[0101] For the charge amount difference ΔQ(90) of the pixel 211 in the blue frame in frame #1, the processor 300 can calculate the charge amount difference ΔQ(90) by comparing the adjacent pixels 211 with the charge amount difference ΔQ(90) in the maximum time 1 / 4 (T MAX The charge amount differences (ΔQ(90)1, ΔQ(90)2, ΔQ(90)2, ΔQ(90)4) of the pixels 211 (four pixels diagonally located with respect to the pixel having the charge amount difference ΔQ(90)) with a charge amount difference at 1 / 4 of the maximum time (T MAX / 4) at the charge difference ΔQ(90). The mathematical expression is:
[0102]
[0103] For the charge difference ΔQ(90) of the pixel 211 in the blue frame in frame #1, the processor 300 can obtain 1 / 8 of the maximum time (T MAX / 8) is the charge difference ΔQ(90), which is the charge difference (ΔQ(90)) itself. The mathematical expression is:
[0104]
[0105] Next, for the charge amount difference ΔQ(0) of the pixel 211 in the blue frame in frame #2, the processor 300 can generate a charge difference ΔQ(0) by performing a calculation on the charge amount difference ΔQ(0) of the pixel 211 in the blue frame in frame #2. MAX ) of the pixel 211 (in Figure 5 In the example, the charge amount differences (ΔQ(90)1, ΔQ(90)2) of the pixels above and below the pixel with the charge amount difference ΔQ(90) are averaged to obtain the value at the maximum time (T MAX ) has a charge difference ΔQ(0). The mathematical expression is:
[0106]
[0107] For the charge amount difference ΔQ(0) of the pixel 211 in the blue frame in frame #2, the processor 300 can calculate the charge amount difference ΔQ(0) by comparing the charge amount difference ΔQ(0) of the pixel 211 in the blue frame in frame #2 with the charge amount difference ΔQ(0) of the pixel 211 in the blue frame in frame #2. MAX The charge amount differences (ΔQ(90)1, ΔQ(90)2) of the pixels 211 having a charge amount difference at ΔQ(0) and ΔQ(90)(2) are averaged to obtain 1 / 2 of the maximum time (T MAX / 2) at the charge difference ΔQ(0). The mathematical expression is:
[0108]
[0109] For the charge amount difference ΔQ(0) of the pixel 211 in the blue frame in frame #2, the processor 300 can calculate the charge amount difference ΔQ(0) by comparing the adjacent pixels 211 with the charge amount difference ΔQ(0) in the maximum time 1 / 4 (T MAX The charge amount differences (ΔQ(0)1, ΔQ(0)2, ΔQ(0)2, ΔQ(0)4) of the pixels 211 (four pixels diagonally located with respect to the pixel having the charge amount difference ΔQ(0)) at 1 / 4 of the maximum time (T MAX / 4) at the charge difference ΔQ(0). The mathematical expression is:
[0110]
[0111] For the charge difference ΔQ(0) of the pixel 211 in the blue frame in frame #2, the processor 300 can obtain 1 / 8 of the maximum time (T MAX / 8) is the charge difference ΔQ(0) itself. The mathematical expression is:
[0112]
[0113] That is, for each pixel 211, the processor 300 may use the charge amount difference of the adjacent pixels 211 to extract the maximum time (T MAX ), 1 / 2 of the maximum time (T MAX / 2), 1 / 4 of the maximum time (T MAX / 4) and 1 / 8 of the maximum time (T MAX The processor 300 may perform this process for each frame.
[0114] The processor 300 may extract the distance information of the object by using the charge amount difference of the same pixel 211 in frame #1 and frame #2. In this case, the processor 300 may extract the distance information of the object by using the charge amount difference of the same pixel 211 in two consecutive frames. That is, the processor 300 may extract the distance information of the object by using the charge amount difference of the same pixel 211 in the nth frame and the (n+1)th frame.
[0115] Figure 6 is a diagram illustrating an example of calculating distance information according to an embodiment of the present disclosure.
[0116] See also Figure 6 , when the two frames required to calculate the distance information are referred to as frame #1 and frame #2, for five consecutive frames, the processor 300 can extract the first distance information (depth calculation #1) by using the charge amount difference between the first frame (corresponding to frame #1) and the second frame (corresponding to frame #2).
[0117] The processor 300 may extract second distance information (depth calculation #2) by using a charge amount difference between the second frame (corresponding to frame #1) and the third frame (corresponding to frame #2).
[0118] The processor 300 may extract third distance information (depth calculation #3) by using a charge amount difference between the third frame (corresponding to frame #1) and the fourth frame (corresponding to frame #2).
[0119] The processor 300 may extract fourth distance information (depth calculation #4) by using a charge amount difference between the fourth frame (corresponding to frame #1) and the fifth frame (corresponding to frame #2).
[0120] In this manner, the processor 300 can extract distance information having a high dynamic range by using the difference in the amount of charges output from the frame #1 and the frame #2.
[0121] The integration time adjustment method described in this embodiment is used to extract the maximum time (T MAX ), 1 / 2 of the maximum time (T MAX / 2), 1 / 4 of the maximum time (TMAX / 4) and 1 / 8 of the maximum time (T MAX / 8) and then extracting distance information based on the extracted charge difference. In addition to this method, an FD node capacitor size adjustment method can be used to extract the charge difference.
[0122] Figure 7 is a diagram illustrating an example of adjusting the size of an FD node capacitor according to an embodiment of the present disclosure.
[0123] See also Figure 7 , multiple capacitors C1, ..., CN are connected in parallel to the FD2 node, and switches S1, ..., SN are connected in series to the capacitors C1, ..., CN, respectively, so that each of the switches S1, ..., SN is controlled to adjust the size of the FD node capacitor. Based on this adjustment, various values of charge amount differences can be extracted based on the charge amount of the FD1 node capacitor and the charge amount of the multiple capacitors C1, ..., CN connected to the FD2 node.
[0124] Figure 8 is a diagram showing an example of a TX configuration of a pixel array according to an embodiment of the present disclosure. Fig. 9 is a diagram showing an example of an RST configuration of a pixel array according to an embodiment of the present disclosure. Fig.10 is a diagram showing an example of an AB configuration of a pixel array according to an embodiment of the present disclosure. Fig.11 is a diagram showing a pixel array composed of TX, RST, and AB according to an embodiment of the present disclosure.
[0125] exist Figures 8 to 10 , an embodiment is shown in which the TX switch, the RST switch, and the AB switch of the corresponding pixel 211 are configured in such a manner that the corresponding pixel 211 has a charge amount difference of different intensities.
[0126] exist Figure 8 In this case, the following pixels (TX1:0, Tx1:180) may be alternately arranged in column lines or row lines in the pixel array 210: in the pixel, the TX1 switch is turned on at a 0-degree phase and turned off at a 180-degree phase, and the TX2 switch is turned on at a 180-degree phase and turned off at a 0-degree phase.
[0127] The following pixels (TX1:90, TX1:270) may be alternately arranged in column lines or row lines in the pixel array 210: in the pixel, the TX1 switch is turned on at a 90 degree phase and turned off at a 270 degree phase, and the TX2 switch is turned on at a 270 degree phase and turned off at a 90 degree phase.
[0128] In this manner, the pixel (TX1:0, TX1:180) and the pixel (TX1:90, TX1:270) may be arranged in a zigzag form in the horizontal direction.
[0129] In addition, RST1 and RST2 may be arranged in a zigzag form in the downward direction, and AB1 and AB2 may be arranged alternately in the row lines. Here, when AB is enabled, TX is disabled.
[0130] Fig.12 is a timing diagram of a pixel according to an embodiment of the present disclosure.
[0131] See also Fig.12 , the photodiode continues to operate to receive light, and TX1 and TX2 operate.
[0132] When AB1 is disabled, RST1 continues to integrate after the operation, resulting in the longest integration time and integration for the maximum time.
[0133] When AB2 is enabled, TX does not operate, resulting in charging for a maximum of 1 / 2 of the integration time.
[0134] Furthermore, when AB2 is enabled, RST2 operates, resulting in charging for a maximum of 1 / 4 of the integration time.
[0135] When AB2 is disabled, sensing occurs in the remaining portion, resulting in charging for a maximum of 1 / 4 of the integration time.
[0136] The processor 300 may be connected to a memory (not shown), and the memory may store instructions for performing operations, steps, etc. according to an embodiment of the present disclosure. Here, in addition to a volatile storage device that requires power to maintain stored information, the memory may include a magnetic storage medium or a flash memory medium, but the scope of the present disclosure is not limited thereto.
[0137] In addition, the processor 300 can also be configured separately at the hardware, software or logic level to perform each function. In this case, dedicated hardware can be used to perform each function separately. To this end, the processor 300 can be implemented in or include at least one of the following: an application-specific integrated circuit (ASIC), a digital signal processor (DSP), a programmable logic device (PLD), a field programmable gate array (FPGA), a central processing unit (CPU), a microcontroller and / or a microprocessor.
[0138] The processor 300 may be implemented in a central processing unit (CPU) or a system on chip (SoC), may run an operating system or an application to control a plurality of hardware or software components connected to the processor 300, and may perform various data processing and calculations. The processor 300 may be configured to execute at least one instruction stored in a memory and store the resulting data in the memory.
[0139] As described above, the image sensing device according to the embodiment of the present disclosure can enhance the distance measurement range by using a plurality of charge amount differences.
[0140] Furthermore, the image sensing device according to the embodiment of the present disclosure may obtain up to four different distance information for one pixel 211 by applying an adaptive high dynamic depth range (AHDDR).
[0141] The present disclosure has been described with reference to the embodiments shown in the accompanying drawings, but these are exemplary only, and it should be understood by those skilled in the art that various modifications and other embodiments of equivalent number are possible. Therefore, the true technical protection scope of the present disclosure will be determined by the following claims.
Claims
1. An image sensing device, comprising: a pixel array in which pixels are arranged in a grid form, wherein the pixels convert light reflected from an object into an electrical signal; and A processor is configured to generate a charge amount difference that is different in at least one of exposure time and phase according to an electric signal detected from the pixel array for each of the pixels in each frame, and extract distance information of the object.
2. The image sensing device according to claim 1, wherein: In the same frame, each adjacent pixel in the pixel array has a different difference in charge amount.
3. The image sensing device according to claim 2, wherein: In the same frame, the nth column line and the (n+1)th column line in the pixel array have different charge amount differences.
4. The image sensing device according to claim 2, wherein: In the same frame, the nth row line and the (n+1)th row line have different charge amount differences.
5. The image sensing device according to claim 1, wherein: The pixel array includes the pixels, and corresponding pixels in each frame have different charge amount differences between an nth frame and an ((n+1)th frame.
6. The image sensing device according to claim 5, wherein: The exposure time is an integration time during which charges are accumulated.
7. The image sensing device according to claim 6, wherein: The integration time includes at least one of a maximum time of the integration time, 1 / 2 of the maximum time, 1 / 4 of the maximum time, and 1 / 8 of the maximum time.
8. The image sensing device according to claim 6, wherein: The processor obtains, for each of the pixels, a charge amount difference corresponding to an integration time of each adjacent pixel, and extracts the charge amount difference corresponding to the integration time of each of the pixels based on the obtained integration time of each adjacent pixel.
9. The image sensing device according to claim 6, wherein: The integration time includes at least one of a maximum time of the integration time, 1 / 4 of the maximum time, 1 / 16 of the maximum time, and 1 / 64 of the maximum time.
10. The image sensing device according to claim 6, wherein: The integration time is adjusted by capacitors of different sizes.
11. The image sensing device according to claim 1, wherein: The processor extracts distance information of the object by using a charge amount difference of the same pixel in two frames.
12. The image sensing device according to claim 11, wherein: The processor extracts distance information of the object by using a charge amount difference of the same pixel in the nth frame and the (n+1)th frame.
13. The image sensing device according to claim 1, wherein: The charge amount difference of the pixels in the pixel array includes at least one of the following items: the charge amount difference between the charge of the 0 degree phase and the charge of the 180 degree phase; And the difference in charge between the charge at 0 degree phase and the charge at 180 degree phase.
Citation Information
Patent Citations
Time of flight apparatus
KR102567502B1