Light emitting diode manufacturing method and light emitting diode

By using a current-blocking thin film to pattern the epitaxial structure of the light-emitting diode (LED), and forming a stepped structure and isolation trench through two etching processes, the problem of excessive sidewall area of ​​the stepped structure affecting brightness was solved, thus improving the brightness and voltage of the LED.

CN119789620BActive Publication Date: 2026-08-04HC SEMITEK ZHEJIANG CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
HC SEMITEK ZHEJIANG CO LTD
Filing Date
2024-11-19
Publication Date
2026-08-04

AI Technical Summary

Technical Problem

When related technologies create steps on the epitaxial structure of a light-emitting diode (LED), the area of ​​the unstepped portion becomes small, affecting the brightness of the LED.

Method used

A current blocking film is used as a shield for patterning the epitaxial structure. A stepped structure and isolation groove are formed by two etching processes, which reduces the sidewall area of ​​the stepped structure, increases the width of the bottom surface of the step, and enhances the light-emitting area.

Benefits of technology

By reducing the sidewall area of ​​the stepped structure, the light-emitting area is increased, thereby improving the brightness of the light-emitting diode and reducing the operating voltage.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a light emitting diode preparation method and a light emitting diode. The method comprises: making an epitaxial structure on a substrate; making a first current blocking film on the epitaxial structure, the first current blocking film having a first through hole; patterning the epitaxial structure under the shielding of the first current blocking film to form a step structure at a position corresponding to the first through hole of the epitaxial structure; patterning the first current blocking film to remove an edge portion of the first current blocking film to form a notch, thereby obtaining a second current blocking film; and patterning the epitaxial structure under the shielding of the second current blocking film to form an isolation groove at a position corresponding to the notch of the epitaxial structure, and increasing the width of a step bottom surface of the step structure.
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Description

Technical Field

[0001] This disclosure relates to the field of light-emitting devices, and in particular to a method for fabricating a light-emitting diode and the light-emitting diode itself. Background Technology

[0002] Light-emitting diodes (LEDs) can cover a wavelength range from ultraviolet to infrared and are widely used in displays, lighting and other fields.

[0003] The light-emitting diodes provided by related technologies typically include a substrate and an epitaxial structure located on the substrate, wherein the epitaxial structure has steps.

[0004] However, when the related technology creates steps on the epitaxial structure, the area of ​​the unstepped portion is small, which affects the brightness of the light-emitting diode after etching. Summary of the Invention

[0005] This disclosure provides a method for fabricating a light-emitting diode (LED) and an LED itself, which helps to reduce the bottom width of the LED step and enhance the LED brightness. The technical solution is as follows:

[0006] On one hand, a method for fabricating a light-emitting diode is provided, the method comprising:

[0007] Fabricating epitaxial structures on a substrate;

[0008] A first current-blocking film is fabricated on the epitaxial structure, the first current-blocking film having a first through-hole;

[0009] Under the shielding of the first current blocking film, the epitaxial structure is patterned to form a stepped structure at the position corresponding to the first through hole in the epitaxial structure;

[0010] The first current blocking film is patterned, and the notch formed at the edge of the first current blocking film is removed to obtain the second current blocking film.

[0011] Under the shielding of the second current blocking film, the epitaxial structure is patterned, and an isolation groove is formed at the position corresponding to the notch on the epitaxial structure, thereby increasing the width of the bottom surface of the stepped structure.

[0012] Optionally, after the epitaxial structure is patterned using the first current blocking film, the width of the bottom surface of the stepped structure is 4 to 5 μm.

[0013] After the epitaxial structure is patterned using the second current blocking film, the width of the bottom surface of the stepped structure is 5-6 μm.

[0014] Optionally, a first current-blocking thin film is formed on the epitaxial structure, comprising:

[0015] Using N2O and SiH4 as reactants, a silicon dioxide thin film was grown on the epitaxial structure using PECVD technology at a temperature of 100℃~500℃.

[0016] A first photoresist mask is fabricated on the silicon dioxide thin film;

[0017] Under the cover of the first photoresist mask, the silicon dioxide film is etched to obtain the first current blocking film.

[0018] Optionally, the thickness of the silicon dioxide film is 0.2 to 2 μm, and the thickness of the first photoresist mask is 0.2 to 2 μm.

[0019] Optionally, a first photoresist mask is formed on the silicon dioxide thin film, comprising:

[0020] A layer of photoresist is deposited on the silicon dioxide film at an temperature of 100℃~110℃.

[0021] The photoresist is exposed and developed to obtain the first photoresist mask;

[0022] The first photoresist mask is baked at a temperature of 100℃~120℃.

[0023] Optionally, the silicon dioxide film is etched under the cover of the first photoresist mask to obtain the first current blocking film, comprising:

[0024] In an environment with a temperature of 20℃~25℃, under the cover of the first photoresist mask, the first current blocking film is etched with BOE solution to obtain the second current blocking film.

[0025] Optionally, under the shielding of the first current-blocking film, the epitaxial structure is patterned, including:

[0026] In an environment with a temperature of -25℃ to -15℃ and a pressure of 2.9 to 3.1 mt, dry etching was performed on the epitaxial structure shielded by the first current blocking film using Cl2 and BCl3 etching gases.

[0027] The etching power of the dry etching is 220-300W, the flow rate of Cl2 is 100-150 sccm, and the flow rate of BCl3 is 5-15 sccm.

[0028] Optionally, the step of patterning the epitaxial structure under the shielding of the second current-blocking film includes:

[0029] Dry etching of the epitaxial structure shielded by the second current blocking film was performed using Cl2 and BCl3 etching gases at a temperature of -5℃ to 5℃ and a pressure of 3.1 to 3.3mt.

[0030] The etching power of the dry etching method is 1100-1300W, the flow rate of Cl2 is 100-140sccm, and the flow rate of BCl3 is 10-30sccm.

[0031] Optionally, the height of the stepped structure is 1 to 2.5 μm.

[0032] On the other hand, a light-emitting diode is provided, the light-emitting diode comprising: a substrate, an epitaxial structure, and a current blocking layer;

[0033] The epitaxial structure is located on the substrate, and the epitaxial structure has a stepped structure and an isolation trench. The width of the bottom surface of the stepped structure is 5-6 μm. The current blocking layer is located on the surface of the epitaxial structure.

[0034] The beneficial effects of the technical solutions provided in this disclosure are:

[0035] In this embodiment, a current blocking film is used as a shield for patterning the epitaxial structure. During the etching of the epitaxial structure, the current blocking film is also etched. Due to material differences, the etching rate of the current blocking film is lower than that of the epitaxial structure, resulting in a smaller width of the bottom surface of the etched stepped structure compared to related technologies. Furthermore, during the etching process, by etching the stepped structure and the isolation trench sequentially, the inclined sidewalls of the stepped structure are etched again when the isolation trench is etched, reducing the area occupied by the sidewalls of the stepped structure. By reducing the area occupied by the sidewalls while maintaining the width of the bottom surface of the stepped structure (but ensuring that the area of ​​the bottom surface is not too small), the light-emitting area is increased, thereby enhancing the brightness of the light-emitting diode. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of the present disclosure;

[0038] Figure 2 This is a flowchart of a method for fabricating a light-emitting diode provided in an embodiment of this disclosure;

[0039] Figure 3 This is a flowchart of another method for fabricating a light-emitting diode provided in this disclosure embodiment;

[0040] Figure 4 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0041] Figure 5 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0042] Figure 6 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0043] Figure 7 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0044] Figure 8 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0045] Figure 9 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0046] Figure 10 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0047] Figure 11 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0048] Figure 12 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of the present disclosure;

[0049] Figure 13 This is a schematic diagram of the structure during the fabrication process of a light-emitting diode according to an embodiment of this disclosure.

[0050] The attached figures are labeled as follows:

[0051] 100: Substrate; 101: First semiconductor layer; 102: Active layer; 103: Second semiconductor layer; 104: Current blocking layer; 105: Current spreading layer; 106: First electrode; 107: Second electrode; 120: Step structure; 130: Isolation trench; 2020: Silicon dioxide thin film; 2001: First current blocking film; 2002: Second current blocking film; 2011: First via; 2012: Notch; 3000: Photoresist; 3001: First photoresist mask layer; 3002: Second photoresist thin film layer; 1000: Epitaxial structure. Detailed Implementation

[0052] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0053] Figure 1 This is a schematic diagram of the structure of a light-emitting diode provided in an embodiment of this disclosure. See also... Figure 1 The light-emitting diode includes a substrate 100, an epitaxial structure 1000, and a current blocking layer 104.

[0054] The epitaxial structure 1000 is located on the substrate 100, and the epitaxial structure 1000 has a stepped structure 120 and an isolation trench 130; the current blocking layer 104 is located on the surface of the epitaxial structure 1000.

[0055] In this embodiment, the step structure 120 is formed by two etching processes: the first etching is performed on the step structure alone, and the second etching is performed on the isolation groove.

[0056] In this embodiment, a current blocking film is used as a shield for patterning the epitaxial structure. During the etching of the epitaxial structure, the current blocking film is also etched. Due to material differences, the etching rate of the current blocking film is lower than that of the epitaxial structure, resulting in a smaller width of the bottom surface of the etched stepped structure compared to related technologies. Furthermore, during the etching process, by etching the stepped structure and the isolation trench sequentially, the inclined sidewalls of the stepped structure are etched again when the isolation trench is etched, reducing the area occupied by the sidewalls of the stepped structure. By reducing the area occupied by the sidewalls while maintaining the width of the bottom surface of the stepped structure (but ensuring that the area of ​​the bottom surface is not too small), the light-emitting area is increased, thereby enhancing the brightness of the light-emitting diode.

[0057] In related technologies, the width of the bottom surface of the stepped structure is 8 to 10 μm, and the width of the bottom surface of the stepped structure is 5 to 6 μm.

[0058] In related technologies, the projection of the sidewall of the stepped structure onto the plane where the bottom surface of the step is located is about 1 μm larger than the projection of the sidewall of the stepped structure onto the plane where the bottom surface of the step is located in the embodiment of this disclosure. For example, 1 μm is the width that is reduced by the second etching.

[0059] Optionally, the light-emitting diode further includes: a current spreading layer 105, a first electrode 106, and a second electrode 107.

[0060] The current spreading layer 105 is located on the current blocking layer 104 and is connected to the epitaxial structure 1000; the first electrode 106 is located on the bottom surface of the step of the step structure 120, and the second electrode 107 is located on the current spreading layer 105.

[0061] In the embodiments of this disclosure, the substrate 100 can be any one of sapphire substrate, Si substrate, SiC substrate, etc., and this disclosure does not limit the material of the substrate.

[0062] For example, substrate 100 is a sapphire substrate.

[0063] In this embodiment of the disclosure, the epitaxial structure 1000 may include a first semiconductor layer 101, an active layer 102, and a second semiconductor layer 103 stacked sequentially. The first semiconductor layer 101, the active layer 102, and the second semiconductor layer 103 form a stepped structure 120, with the bottom surface of the step structure 120 located on the first semiconductor layer 101. The sidewalls of the stepped structure 120 at least penetrate the second semiconductor layer 103 and the active layer 102.

[0064] It is worth noting that the epitaxial structure 1000 described above is only an example. In other embodiments, the epitaxial structure 1000 may include more film layers, and this disclosure does not limit this.

[0065] In this embodiment of the disclosure, the first semiconductor layer 101 can be an N-type semiconductor layer, and the second semiconductor layer 103 can be a P-type semiconductor layer.

[0066] For example, the first semiconductor layer 101 can be an N-type GaN layer, and the second semiconductor layer 103 can be a P-type GaN layer.

[0067] In another example, the first semiconductor layer 101 can be a P-type semiconductor layer, and the second semiconductor layer 103 can be an N-type semiconductor layer.

[0068] In this embodiment of the disclosure, the active layer 102 can be a multi-quantum well layer.

[0069] In this embodiment, the current blocking layer 104 is made of a material with a slow reaction rate with the etching gas used in dry etching. The etching gas includes Cl2 and BCl3.

[0070] For example, the current blocking layer 104 can be a silicon dioxide layer.

[0071] In this embodiment of the disclosure, the thickness of the current blocking layer 104 can be 0.01 to 6 μm.

[0072] Using the current blocking layer 104 of the above thickness can meet the current blocking requirements on the one hand, and the shielding requirements when making the stepped structure on the other hand, so that the bottom width of the stepped structure is smaller.

[0073] For example, the current blocking layer 104 has a thickness of 3 μm.

[0074] like Figure 1 As shown, in one example, the current blocking layer 104 covers only a portion of the surface of the epitaxial structure 1000, and the current spreading layer 105 is connected to the surface of the epitaxial structure 1000 by covering the current blocking layer 104.

[0075] In other examples, the current blocking layer 104 may also cover the entire surface of the epitaxial structure 1000, and multiple vias may be formed on the current blocking layer 104, through which the current spreading layer 105 is connected to the surface of the epitaxial structure 1000.

[0076] In one implementation of this disclosure, the current spreading layer 105 can be a transparent conductive layer, such as an indium tin oxide (ITO) layer.

[0077] In another implementation of the embodiments of this disclosure, the current spreading layer 105 may also be other film layer structures, such as a stack of transparent conductive layer and metal layer, and the embodiments of this disclosure do not limit this.

[0078] In this embodiment of the disclosure, both the first electrode 105 and the second electrode 106 may include AuGe or AuBe electrodes.

[0079] Optionally, the light-emitting diode may further include a passivation layer covering the sidewalls of the epitaxial structure 1000, the current spreading layer 105, the first electrode 105, and the second electrode 106.

[0080] In this embodiment, the passivation layer can be a film formed from materials such as SiO2 layer or Al2O3 layer.

[0081] For example, the passivation layer is a SiO2 layer.

[0082] like Figure 1 As shown, the depth of the step structure 120 can be 0.01 to 6 μm.

[0083] For example, the depth of the step structure 120 is 3 μm.

[0084] In this implementation, the aforementioned depth ensures that the step extends to the first semiconductor layer while avoiding excessive step depth that would result in an excessively wide step structure.

[0085] It is worth noting that the structure of the above-mentioned light-emitting diode may have more or fewer film layers, and the embodiments disclosed herein do not impose any limitations on this.

[0086] Figure 2 This disclosure provides a flowchart of a method for fabricating a light-emitting diode (LED). See also... Figure 2 This method is used to create Figure 1 The method for the light-emitting diode shown includes the following steps:

[0087] S11. Fabricate an epitaxial structure on a substrate.

[0088] S12. A first current blocking film is formed on the epitaxial structure, the first current blocking film having a first through hole.

[0089] S13. Under the shielding of the first current blocking film, the epitaxial structure is patterned to form a stepped structure at the position corresponding to the first through hole in the epitaxial structure.

[0090] S14. The first current blocking film is patterned to remove the notch formed at the edge of the first current blocking film, thereby obtaining the second current blocking film.

[0091] S15. Under the shielding of the second current blocking film, the epitaxial structure is patterned to form an isolation groove at the position corresponding to the notch on the epitaxial structure, thereby increasing the width of the bottom surface of the stepped structure.

[0092] In this embodiment, a current blocking film is used as a shield for patterning the epitaxial structure. During the etching of the epitaxial structure, the current blocking film is also etched. Due to material differences, the etching rate of the current blocking film is lower than that of the epitaxial structure, resulting in a smaller width of the bottom surface of the etched stepped structure compared to related technologies. Furthermore, during the etching process, by etching the stepped structure and the isolation trench sequentially, the inclined sidewalls of the stepped structure are etched again when the isolation trench is etched, reducing the area occupied by the sidewalls of the stepped structure. By reducing the area occupied by the sidewalls while maintaining the width of the bottom surface of the stepped structure (but ensuring that the area of ​​the bottom surface is not too small), the light-emitting area is increased, thereby enhancing the brightness of the light-emitting diode.

[0093] Figure 3 A flowchart illustrating another method for fabricating a light-emitting diode (LED) according to an embodiment of this disclosure. See also... Figure 3 The method includes the following steps:

[0094] S21. A first semiconductor layer, an active layer, and a second semiconductor layer are sequentially fabricated on a substrate to form an epitaxial structure.

[0095] In the embodiments of this disclosure, the substrate can be any one of sapphire substrate, Si substrate, SiC substrate, etc., and this disclosure does not limit the material of the substrate.

[0096] For example, the substrate is a sapphire substrate with a thickness of 100-300 μm.

[0097] In this embodiment of the disclosure, the first semiconductor layer may be an N-type semiconductor layer, and the second semiconductor layer may be a P-type semiconductor layer.

[0098] For example, the first semiconductor layer can be an N-type GaN layer, and the second semiconductor layer can be a P-type GaN layer.

[0099] In another example, the first semiconductor layer can be a P-type semiconductor layer and the second semiconductor layer can be an N-type semiconductor layer.

[0100] In this embodiment of the disclosure, the active layer can be a multi-quantum well layer.

[0101] For example, an N-type semiconductor layer, a multiple quantum well layer, and a P-type semiconductor layer are sequentially fabricated on the substrate surface using a metal-organic chemical vapor deposition (MOCVD) apparatus.

[0102] In the embodiments disclosed herein, the above-mentioned semiconductor layer can be grown using a Veeco K465i or C4 or RB MOCVD equipment or an AIXTRON metal-organic chemical vapor deposition equipment. High-purity H2 (hydrogen), high-purity N2 (nitrogen), or a mixture of high-purity H2 and high-purity N2 is used as the carrier gas; high-purity NH3 is used as the N source; trimethylgallium (TMGa) and triethylgallium (TEGa) are used as gallium sources; trimethylindium (TMIn) is used as the indium source; silane (SiH4) is used as the N-type dopant; trimethylaluminum (TMAl) is used as the aluminum source; and magnesium pyrocene (CP2Mg) is used as the P-type dopant.

[0103] Figure 4 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 4 An epitaxial structure 1000 is formed on the surface of the substrate 100.

[0104] S22. A first current blocking film is formed on the epitaxial structure, the first current blocking film having a first through hole.

[0105] In this embodiment of the disclosure, step S22 may include the following steps:

[0106] Step 1: Using N2O and SiH4 as reactants, a silicon dioxide thin film is grown on the epitaxial structure using plasma-enhanced chemical vapor deposition (PECVD) technology at a temperature of 100℃~500℃.

[0107] In the embodiments of this disclosure, the thickness of the silicon dioxide film can be 0.2 to 2 μm.

[0108] Using a silica film of the aforementioned thickness can meet both the current blocking requirements and the shielding requirements when fabricating stepped structures.

[0109] For example, the current blocking film has a thickness of 1 μm.

[0110] For example, the growth temperature of the silicon dioxide film can be 300°C.

[0111] Optionally, before step one, the method may further include cleaning the epitaxial structure.

[0112] Figure 5 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 5 A silicon dioxide thin film 2020 is formed on the surface of the epitaxial structure 1000.

[0113] Step 2: A first photoresist mask is formed on the silicon dioxide thin film.

[0114] In this embodiment of the disclosure, the thickness of the first photoresist mask is 0.2 to 2 μm.

[0115] For example, the thickness of the first photoresist mask is 1 μm.

[0116] In this embodiment of the disclosure, step two may include the following steps:

[0117] The first step is to deposit a layer of photoresist on the silicon dioxide thin film (2020) at an environment with a temperature of 100℃~100℃.

[0118] In the examples of embodiments of this disclosure, the photoresist may be a positive photoresist.

[0119] In other examples, the photoresist can also be a negative photoresist.

[0120] Figure 6This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 6 Photoresist 3000 is formed on the surface of silicon dioxide thin film 2020.

[0121] The second step is to expose and develop the photoresist to obtain the first photoresist mask.

[0122] For example, a lithography machine is used to project a step (Mesa) pattern using ultraviolet light under the cover of a photomask. The ultraviolet light can be provided by an ultraviolet mercury lamp, and the exposure energy of the ultraviolet mercury lamp is controlled at 50-80 mJ. After exposure, the image is immersed in a developing solution and rinsed and dried after 8-15 minutes.

[0123] The third step is to bake the first photoresist mask at a temperature of 100℃~120℃.

[0124] Optionally, when baking the photoresist mask layer, the baking time is 5 to 8 minutes.

[0125] For example, the baking temperature is 110°C and the baking time is 6 minutes.

[0126] At a fixed temperature, the longer the baking time, the gentler the photoresist angle. Using the aforementioned baking temperature and time enhances the photoresist's adhesion and corrosion resistance, providing a foundation for subsequent etching of current-blocking films and epitaxial structures.

[0127] Figure 7 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 7 The photoresist 3000 is exposed, developed, and baked to obtain the first photoresist mask layer 3001.

[0128] Step 3: Under the cover of the first photoresist mask, the silicon dioxide film is etched to obtain the first current blocking film.

[0129] In this embodiment of the disclosure, step three may include the following steps:

[0130] In an environment with a temperature of 20℃~25℃, under the cover of the first photoresist mask, the silicon dioxide film is etched using a buffered oxide etching (BOE) solution to obtain a first current blocking film.

[0131] For example, after baking, the silicon dioxide film is placed in BOE solution for wet etching to etch away the silicon dioxide film not covered by the photoresist mask layer. The etching time depends on the thickness of the deposited silicon dioxide film.

[0132] Figure 8This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 8 The silicon dioxide thin film 2020 is wet etched to form a patterned first current blocking film 2001, the first current blocking film 2001 having a first through hole 2011.

[0133] Optionally, the method may further include: rinsing and drying after corrosion; drying and then baking in an oven at a temperature controlled at 80-100℃ for 10-20 minutes.

[0134] S23. Under the shielding of the first current blocking film, the epitaxial structure is patterned to form a stepped structure at the position corresponding to the first through hole in the epitaxial structure.

[0135] The first semiconductor layer, the active layer, and the second semiconductor layer form a stepped structure, with the bottom surface of the step located in the first semiconductor layer. The sidewalls of the stepped structure penetrate at least the second semiconductor layer and the active layer.

[0136] In this embodiment of the disclosure, step S23 may include the following steps:

[0137] In an environment with a temperature of -25℃ to -15℃ and a pressure of 2.9 to 3.1 mt, the epitaxial structure shielded by the first current blocking film is dry etched using Cl2 and BCl3 etching gases to obtain the stepped structure.

[0138] In this embodiment of the present disclosure, the etching power of the dry etching is 220-300W, the Cl2 flow rate is 100-150sccm, and the BCl3 flow rate is 5-15sccm.

[0139] For example, in an environment with a temperature of -20°C and a pressure of 3 mt, the etching power of the dry etching is 260 W, the Cl2 flow rate is 130 sccm, and the BCl3 flow rate is 10 sccm.

[0140] Using the above etching parameters, both silicon dioxide and epitaxial structures can be etched simultaneously, and the difference between the two under the above parameters is sufficient to form a step structure of the above width.

[0141] In this embodiment of the disclosure, the height of the step structure can be 1 to 2.5 μm.

[0142] For example, the height of the step structure is 2 μm.

[0143] In this implementation, the aforementioned depth ensures that the step extends to the first semiconductor layer while avoiding excessive step depth that would result in an excessively wide step structure.

[0144] Figure 9 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 9 The epitaxial structure 1000, which is shielded by the first current blocking film 2001, is processed by dry etching to obtain the stepped structure 120.

[0145] Figure 9 In this context, 'a' represents the bottom width of the step structure 120, and 'h' represents the height of the step structure 120.

[0146] S24. The first current blocking film is patterned to remove the notch formed at the edge of the first current blocking film, thereby obtaining the second current blocking film.

[0147] Step S24 is the same as step S22, except that the pattern of the second photoresist mask used is different, and the etching removes the edge of the first current blocking film.

[0148] Figure 10 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 10 Under the cover of the second photoresist film layer 3002, the first current blocking film 2001 is patterned to form a patterned second current blocking film 2002. In addition to the first through hole 2011, the second current blocking film 2002 also has a notch 2012.

[0149] S25. Under the shielding of the second current blocking film, the epitaxial structure is patterned to form an isolation groove at the position corresponding to the notch on the epitaxial structure, thereby increasing the width of the bottom surface of the stepped structure.

[0150] The bottom surface of the isolation trench is located on the first semiconductor layer. The isolation trench extends through at least the second semiconductor layer and the active layer.

[0151] In this embodiment of the disclosure, S25 may include the following steps:

[0152] Dry etching of the epitaxial structure shielded by the second current blocking film was performed using Cl2 and BCl3 etching gases at a temperature of -5℃ to 5℃ and a pressure of 3.1 to 3.3 mt.

[0153] In this embodiment of the present disclosure, the etching power of the dry etching is 1100-1300W, the Cl2 flow rate is 100-140sccm, and the BCl3 flow rate is 10-30sccm.

[0154] For example, in an environment with a temperature of 0°C and a pressure of 3.2 mt, the etching power of the dry etching is 1200 W, the Cl2 flow rate is 120 sccm, and the BCl3 flow rate is 20 sccm.

[0155] After the epitaxial structure is patterned using the first current blocking film, the width of the bottom surface of the stepped structure is 4-5 μm.

[0156] After the epitaxial structure is patterned using the second current blocking film, the width of the bottom surface of the stepped structure is 5-6 μm.

[0157] In this implementation, the width of the bottom surface of the step is increased by two etching processes, while the width of the side wall of the step structure is narrowed. This further increases the light-emitting area while ensuring that the width of the bottom surface of the step is still smaller than that of related technologies.

[0158] Figure 11 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 11 The epitaxial structure 1000, which is shielded by the second current blocking film 2002, is processed by dry etching to obtain the isolation groove 130 and the stepped structure 120 with a larger bottom surface.

[0159] S26. The second current blocking film is patterned to obtain a current blocking layer.

[0160] In this embodiment of the disclosure, step S26 may include:

[0161] The first step is to remove the second photoresist mask layer and then fabricate a third photoresist mask layer on the second current blocking film.

[0162] The thickness and fabrication method of the third photoresist mask layer can be referenced from that of the first photoresist mask layer.

[0163] The second step involves etching the second current-blocking film under the cover of the third photoresist mask layer to obtain a current-blocking layer.

[0164] In the second step, wet etching can be used to form a current blocking layer. The wet etching method can be referred to in step S22.

[0165] Figure 12 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 12 Wet etching is performed on the second current blocking film 2002 to obtain the current blocking layer 104.

[0166] After fabrication, the third photoresist mask is removed.

[0167] In this embodiment, the first, second, and third photoresist mask layers are all removed using an organic solution.

[0168] S27. Fabricate a current spreading layer, which is located on the current blocking layer and connected to the epitaxial structure.

[0169] In one implementation of the embodiments of this disclosure, the current spreading layer can be a transparent conductive layer, such as an ITO layer.

[0170] In another implementation of the embodiments of this disclosure, the current spreading layer may also be other film layer structures, such as a stack of transparent conductive layer and metal layer, and the embodiments of this disclosure do not limit this.

[0171] Figure 13 This is a schematic diagram illustrating the structure of a light-emitting diode (LED) during its fabrication process, as provided in an embodiment of this disclosure. See also... Figure 13 A current extension layer 105 is fabricated, which is located on the current blocking layer 104 and connected to the epitaxial structure 1000.

[0172] S28. Fabricate a first electrode and a second electrode, wherein the first electrode is located on the bottom surface of the stepped structure and the second electrode is located on the current spreading layer.

[0173] The structure of the electrode after fabrication is as follows Figure 1 As shown, it will not be elaborated further here.

[0174] In this embodiment of the disclosure, both the first electrode and the second electrode may include AuGe or AuBe electrodes.

[0175] Optionally, the method may further include: fabricating a passivation layer that covers the epitaxial structure, the current spreading layer, and the sidewalls of the first and second electrodes.

[0176] In one example, a SiO2 layer is fabricated using PECVD or ALD technology; the SiO2 layer is then patterned to obtain a passivation layer.

[0177] In the embodiments disclosed herein, the passivation layer may also be a transparent insulating material such as Al2O3, and the material of the passivation layer is not limited in this disclosure.

[0178] Optionally, the above steps produce a light-emitting diode wafer. The method further includes grinding, polishing, and cutting the prepared wafer to obtain a light-emitting diode chip.

[0179] The light-emitting diode (LED) chips prepared using the method of this disclosure and those prepared using conventional methods were compared by measuring their electrical parameters at a 150mA point. The comparison results are shown in Table 1 below, where Vf1Avg represents the average voltage and Lop1Avg represents the average brightness.

[0180] Table 1

[0181] Vf1Avg / V Lop1Avg / mW Related technologies 2.982 329.86 This disclosure embodiment 2.974 322.00 Related technologies 2.999 323.43 This disclosure embodiment 2.959 325.74 Related technologies 2.983 324.36 This disclosure embodiment 2.983 321.92 Related technologies 2.993 321.97 This disclosure embodiment 3.002 321.84 Related technologies 2.986 317.91 This disclosure embodiment 2.973 323.10 Related technologies 3.009 321.78 This disclosure embodiment 2.979 326.41 Related technologies 3.011 325.47 This disclosure embodiment 3.003 333.34 Related technologies 2.955 327.32 This disclosure embodiment 2.989 335.00 Related technologies 2.990 324.01 This disclosure embodiment 2.983 326.17

[0182] As shown in Table 1, the average brightness of the LED chip prepared by the method of this embodiment is 326.1 mW, while the average brightness of the LED chip prepared by the conventional method is 324.0 mW. The average voltage of the LED chip prepared by the method of this embodiment is 2.983 V, while the average voltage of the LED chip prepared by the conventional method is 2.990 V. Therefore, the method of this embodiment significantly improves the chip brightness while reducing the operating voltage.

[0183] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A method for fabricating a light-emitting diode, characterized in that, The method includes: An epitaxial structure (1000) is fabricated on a substrate (100); A first current blocking film (2001) is formed on the epitaxial structure (1000), the first current blocking film (2001) having a first through hole (2011). Under the shielding of the first current blocking film (2001), the epitaxial structure (1000) is patterned, and a stepped structure (120) is formed at the position corresponding to the first through hole (2011) on the epitaxial structure (1000). The first current blocking film (2001) is patterned, and the edge portion of the first current blocking film (2001) is removed to form a notch (2012) to obtain the second current blocking film (2002). Under the shielding of the second current blocking film (2002), the epitaxial structure (1000) is patterned, and an isolation groove (130) is formed at the position corresponding to the notch (2012) on the epitaxial structure (1000), thereby increasing the width of the bottom surface of the step structure (120).

2. The method for fabricating a light-emitting diode according to claim 1, characterized in that, After the epitaxial structure (1000) is patterned by using the first current blocking film (2001) to shield it, the width of the bottom surface of the step structure (120) is 4~5μm. After the epitaxial structure (1000) is patterned using the second current blocking film (2002), the width of the bottom surface of the step structure (120) is 5~6μm.

3. The method for fabricating a light-emitting diode according to claim 1 or 2, characterized in that, A first current-blocking thin film (2001) is fabricated on the epitaxial structure (1000), comprising: Using N2O and SiH4 as reactants, a silicon dioxide thin film (2020) was grown on the epitaxial structure (1000) using PECVD technology at a temperature of 100℃~500℃. A first photoresist mask (3001) is formed on the silicon dioxide thin film (2020). Under the cover of the first photoresist mask (3001), the silicon dioxide film (2020) is etched to obtain the first current blocking film (2001).

4. The method for fabricating a light-emitting diode according to claim 3, characterized in that, The thickness of the silicon dioxide thin film (2020) is 0.2~2μm, and the thickness of the first photoresist mask (3001) is 0.2~2μm.

5. The method for fabricating a light-emitting diode according to claim 3, characterized in that, Fabricating a first photoresist mask (3001) on the silicon dioxide thin film (2020) includes: A photoresist layer is deposited on the silicon dioxide thin film (2020) at an environment with a temperature of 100℃~110℃; The photoresist is exposed and developed to obtain the first photoresist mask (3001). The first photoresist mask (3001) is baked at a temperature of 100℃~120℃.

6. The method for fabricating a light-emitting diode according to claim 3, characterized in that, Under the shielding of the first photoresist mask (3001), the silicon dioxide thin film (2020) is etched to obtain the first current blocking film (2001), comprising: In an environment with a temperature of 20℃~25℃, under the cover of the first photoresist mask (3001), the first current blocking film (2001) is etched with BOE solution to obtain the second current blocking film (2002).

7. The method for fabricating a light-emitting diode according to claim 1 or 2, characterized in that, Under the shielding of the first current blocking film (2001), the epitaxial structure (1000) is patterned, including: In an environment with a temperature of -25℃ to -15℃ and a pressure of 2.9 to 3.1 mt, the epitaxial structure (1000) shielded by the first current blocking film (2001) was dry etched using Cl2 and BCl3 etching gases. The etching power of the dry etching method is 220~300W, the flow rate of Cl2 is 100~150sccm, and the flow rate of BCl3 is 5~15sccm.

8. The method for fabricating a light-emitting diode according to claim 1 or 2, characterized in that, The step of patterning the epitaxial structure (1000) under the shielding of the second current blocking film (2002) includes: Dry etching of the epitaxial structure (1000) shielded by the second current blocking film (2002) was performed using Cl2 and BCl3 etching gases at a temperature of -5℃ to 5℃ and a pressure of 3.1 to 3.3mt. The etching power of the dry etching method is 1100~1300W, the flow rate of Cl2 is 100~140sccm, and the flow rate of BCl3 is 10~30sccm.

9. The method for fabricating a light-emitting diode according to claim 1 or 2, characterized in that, The height of the stepped structure (120) is 1~2.5μm.

10. A light-emitting diode, characterized in that, The light-emitting diode is fabricated using the method described in any one of claims 1 to 9, and the light-emitting diode includes: a substrate (100), an epitaxial structure (1000), and a current blocking layer (104). The epitaxial structure (1000) is located on the substrate (100). The epitaxial structure (1000) has a stepped structure (120) and an isolation trench (130). The width of the bottom surface of the stepped structure (120) is 5~6μm. The current blocking layer (104) is located on the surface of the epitaxial structure (1000).