Display device and method of manufacturing the same

Abstract

The present disclosure relates to a display device and a method for manufacturing the display device. The display device includes: a display element layer disposed on a substrate and including a light-emitting element; and an encapsulation member disposed on the display element layer and including a first inorganic encapsulation layer, an organic encapsulation layer disposed on the first inorganic encapsulation layer, and a second inorganic encapsulation layer, the second inorganic encapsulation layer including a first seed crystal layer disposed on the organic encapsulation layer, and a first inorganic layer disposed on the first seed crystal layer and having a density less than that of the first seed crystal layer.

Description

Technical Field

[0001] Embodiments generally provide display devices, and more particularly, relate to display devices that provide visual information and methods of manufacturing the display devices. Background Art

[0002] As information technology develops, the importance of display devices as a medium for communication between users and information is becoming more prominent. Therefore, the use of display devices such as liquid crystal display devices, organic light emitting display devices, and plasma display devices is increasing.

[0003] Meanwhile, a thin and flexible display device may include a thin film type encapsulation member to prevent moisture or oxygen from penetrating from the outside. In general, the encapsulation member may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. Summary of the invention

[0004] The embodiment provides a display device including a packaging member having a relatively thin thickness.

[0005] The embodiment provides a method of manufacturing a display device.

[0006] According to an embodiment, a display device may include: a display element layer disposed on a substrate and including a light emitting element, and a packaging component disposed on the display element layer, and the packaging component includes a first inorganic packaging layer, an organic packaging layer disposed on the first inorganic packaging layer, and a second inorganic packaging layer, and the second inorganic packaging layer includes a first seed crystal layer disposed on the organic packaging layer and a first inorganic layer disposed on the first seed crystal layer and having a density less than that of the first seed crystal layer.

[0007] In an embodiment, the difference between the density of the first seed layer and the density of the first inorganic layer is about 0.1 g / cm 3 or greater up to about 1g / cm 3 or smaller.

[0008] In an embodiment, the second inorganic encapsulation layer may have a thickness of about 4000 angstroms. or less thickness.

[0009] In an embodiment, the thickness of the first seed layer may be about 10% or less of the thickness of the second inorganic encapsulation layer.

[0010] In an embodiment, the first inorganic encapsulation layer may include: a second seed layer disposed on the display element layer; and a second inorganic layer disposed on the second seed layer and having a density less than that of the second seed layer.

[0011] In an embodiment, the difference between the density of the second seed layer and the density of the second inorganic layer may be about 0.1 g / cm3 or greater up to about 1g / cm 3 or smaller.

[0012] In an embodiment, the first inorganic encapsulation layer may have a thickness of about 4000 angstroms. or less thickness.

[0013] In an embodiment, the thickness of the second seed layer may be about 10% or less of the thickness of the first inorganic encapsulation layer.

[0014] In an embodiment, the first inorganic encapsulation layer may include silicon oxide (SiN x ) or silicon oxynitride (SiO x N y ), and the second inorganic encapsulation layer includes silicon nitride.

[0015] According to an embodiment, a method for manufacturing a display device may include: forming a display element layer including a light-emitting element on a substrate; forming a first inorganic encapsulation layer on the display element layer, forming an organic encapsulation layer on the first inorganic encapsulation layer, forming a first seed crystal layer on the organic encapsulation layer by a first deposition process; and forming a second inorganic encapsulation layer by forming a first inorganic layer on the first seed crystal layer by a second deposition process different from the first deposition process.

[0016] In an embodiment, the second deposition process may be a plasma enhanced chemical vapor deposition (PECVD) process.

[0017] In an embodiment, the first deposition process may be one of a plasma enhanced atomic layer deposition (PEALD) process, a sputtering process, and an electron beam vacuum deposition process.

[0018] In an embodiment, the density of the first seed layer may be greater than the density of the first inorganic layer, and the difference between the density of the first seed layer and the density of the first inorganic layer may be about 0.1 g / cm 3 or greater up to about 1g / cm 3 or smaller.

[0019] In an embodiment, the second inorganic encapsulation layer may have a thickness of about 4000 angstroms. or less thickness.

[0020] In an embodiment, the thickness of the first seed layer may be about 10% or less of the thickness of the second inorganic encapsulation layer.

[0021] In an embodiment, forming the first inorganic encapsulation layer may include: forming a second seed layer by a first deposition process; and forming a second inorganic layer on the second seed layer by a second deposition process.

[0022] In an embodiment, the density of the second seed layer may be greater than the density of the second inorganic layer, and the difference between the density of the second seed layer and the density of the second inorganic layer may be about 0.1 g / cm 3 or greater up to about 1g / cm 3 or smaller.

[0023] In an embodiment, the first inorganic encapsulation layer may have a thickness of about 4000 angstroms. The thickness of the second seed layer may be approximately 10% or less of the thickness of the first inorganic encapsulation layer.

[0024] In an embodiment, the first inorganic encapsulating layer may be formed of silicon oxide or silicon oxynitride, and the second inorganic encapsulating layer may be formed of silicon nitride.

[0025] In an embodiment, the first seed layer may be formed of an aminosilane-based liquid precursor.

[0026] In a display device and a method for manufacturing a display device according to an embodiment, the display device may include an inorganic encapsulation layer, the inorganic encapsulation layer including a seed layer and an inorganic layer having a density less than that of the seed layer, and covering the display element layer. The seed layer and the inorganic layer may be formed by different deposition processes. Therefore, an inorganic encapsulation layer of relatively thin thickness may be formed. For example, the barrier properties of the inorganic encapsulation layer may be improved. In addition, the folding and bending characteristics of the display device may be prevented from deteriorating. In addition, in the case where the display device has an organic light emitting diode on silicon (OLEDos) structure, the occurrence of color mixing may be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Illustrative, non-limiting embodiments will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings.

[0028] Figure 1 is a schematic plan view showing a display device according to the embodiment.

[0029] Figure 2 It is schematically shown Figure 1 Schematic cross-sectional view of a display device.

[0030] Figure 3 yes Figure 2 An enlarged schematic cross-sectional view of region A of FIG.

[0031] Figure 4 It shows Figure 3 Schematic cross-sectional view of an example of a packaging component.

[0032] Figure 5 yes Figure 4 An enlarged schematic cross-sectional view of region B.

[0033] Figure 6 , Figure 7 and Figure 8 is a schematic cross-sectional view for explaining a method of manufacturing a display device according to an embodiment.

[0034] Fig. 9 2 is a schematic diagram for explaining the reliability evaluation results of the second inorganic encapsulating layer according to Comparative Examples 1 and 2 and Example 1.

[0035] Fig.10 : is a graph for explaining the intensity contrast according to the depth of the second inorganic encapsulating layer satisfying Comparative Example 2.

[0036] Fig.11 : is a graph for explaining the intensity contrast according to the depth of the second inorganic encapsulating layer satisfying Example 1.

[0037] Fig.12 It is shown Figure 3 Schematic cross-sectional view of another example of a packaging component. DETAILED DESCRIPTION

[0038] In the following description, for the purpose of explanation, many specific details are listed to provide a thorough understanding of various embodiments or implementations of the present invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of the devices or methods disclosed herein. However, it is obvious that various embodiments can be implemented without these specific details or with one or more equivalent arrangements. Here, various embodiments are not necessarily exclusive and do not necessarily limit the disclosed content. For example, the specific shapes, configurations and features of an embodiment can be used or implemented in another embodiment.

[0039] Unless otherwise specified, the illustrated embodiments should be understood to provide features of the present invention. Therefore, without departing from the scope of the present invention, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects of the various embodiments, etc. (hereinafter individually or collectively referred to as "elements") may be combined, separated, interchanged and / or rearranged in other ways.

[0040] The cross hatching and / or shading used in the drawings is generally to clarify the boundaries between adjacent elements. Therefore, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for a particular material, material properties, size, ratio, commonality between the illustrated elements and / or any other features, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the embodiments are implemented in different ways, the specific process sequence may be different from the described sequence. For example, two processes described in succession can be performed substantially simultaneously or in an order opposite to the described order. In addition, the same reference numerals represent the same elements.

[0041] When an element or layer is referred to as being "on", "connected to" or "coupled to" another element or layer, the element or layer may be directly on, connected to or coupled to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly located at", "directly connected to" or "directly coupled to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection and / or a fluid connection, regardless of the presence or absence of intervening elements. In addition, the axis of the first direction DR1, the axis of the second direction DR2 and the axis of the third direction DR3 are not limited to the three axes of a rectangular coordinate system, such as the X-axis, the Y-axis and the Z-axis, and may be interpreted in a broader sense. For example, the axis of the first direction DR1, the axis of the second direction DR2 and the axis of the third direction DR3 may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purposes of the present disclosure, "at least one of A and B" may be understood to refer to only A, only B or any combination of A and B. Furthermore, “at least one of X, Y and Z” and “at least one selected from the group consisting of X, Y and Z” may be understood as any combination of only X, only Y, only Z or two or more of X, Y and Z. The term “and / or” used herein includes any and all combinations of one or more of the associated listed items.

[0042] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element.

[0043] Spatially relative terms, such as "lower," "below," "beneath," "lower," "upper," "above," "above," "higher," and "side" (e.g., in "sidewall"), etc., may be used herein for descriptive purposes, and thereby to describe the relationship of one element to another element as shown in the accompanying drawings. The spatially relative terms are intended to include different orientations of the device in use, operation, and / or manufacture, in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, other elements or features described as "below" or "beneath" would be placed "above" the other elements or features. Thus, the term "below" can include both the "above" and "below" orientations. Furthermore, the device may adopt other orientations (e.g., rotated 90 degrees or other orientations), and therefore, the spatially relative descriptors used herein should be interpreted accordingly.

[0044] The terms used herein are for the purpose of describing specific embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" as used herein are also intended to include the plural forms. In addition, when the terms "comprises / comprising" and / or include / including" are used in this specification, it indicates the presence of the features, wholes, steps, operations, elements, components and / or combinations thereof, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or combinations thereof. It should also be noted that the terms "substantially", "approximately" and other similar terms used herein are used as approximate terms rather than terms of degree, and therefore, are used to explain the inherent deviations in the values ​​measured, calculated and / or provided that will be recognized by those of ordinary skill in the art.

[0045] Various embodiments are described herein with reference to cross-sectional views and / or exploded views of the embodiments and / or intermediate structure schematics. Therefore, the shapes shown may vary due to manufacturing techniques and / or tolerances. Therefore, the embodiments disclosed herein are not necessarily to be understood as being limited to the specific zone shapes shown, but should include shape deviations that occur, for example, in manufacturing. Therefore, the zones shown in the drawings may actually be schematic, and the shapes of these zones may not reflect the actual shapes of the device zones, and are therefore not intended to be limiting.

[0046] According to the practice in the art, some embodiments are described and shown in the accompanying drawings with functional blocks, units and / or modules. It will be understood by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, storage elements and wiring connections, and they can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where blocks, units and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can be driven by firmware and / or software. It is also considered that each block, unit and / or module can also be implemented by dedicated hardware, or by a combination of dedicated hardware and a processor (e.g., one or more programmed microprocessors and related circuits) to perform certain functions, or by a combination of a processor and related circuits to perform other functions. In addition, without departing from the scope of the present invention, each block, unit and / or module in some embodiments can be physically separated into two or more mutually influential and discrete blocks, units and / or modules. Furthermore, the blocks, units and / or modules in some embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the invention.

[0047] Hereinafter, a display device and a method of manufacturing the display device according to an embodiment will be described in detail with reference to the accompanying drawings. The same components in the drawings use the same reference numerals, and redundant descriptions of the same components will be omitted.

[0048] Figure 1 is a schematic plan view showing a display device according to the embodiment.

[0049] refer to Figure 1 , the display device DD according to the embodiment may include a display area DA and a non-display area NDA. The display area DA may be an area that displays an image by generating light or adjusting the transmittance of light provided from an external light source. The non-display area NDA may be an area where an image is not displayed. The non-display area NDA may be positioned around the display area DA. For example, the non-display area NDA may surround (e.g., completely surround) the display area DA.

[0050] The subpixels may be disposed in the display area DA. The subpixels may be arranged in a matrix along a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the subpixels may include a first subpixel PX1, a second subpixel PX2, and a third subpixel PX3.

[0051] Each of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may emit light to the outside of the display device DD through the light emitting element. For example, the first sub-pixel PX1 may emit a first light, the second sub-pixel PX2 may emit a second light, and the third sub-pixel PX3 may emit a third light. In an embodiment, the first light may be red light, the second light may be green light, and the third light may be blue light. However, the embodiment is not limited thereto. For example, the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may be combined to emit yellow light, cyan light, and magenta light.

[0052] The first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may emit four or more colors of light. For example, the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may be combined to emit at least one of yellow light, cyan light, and magenta light in addition to red light, green light, and blue light. For example, the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may be combined to emit more white light.

[0053] In another example, the light emitting elements of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may emit light of the same color. For example, the light emitting elements of the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may emit blue light. For example, a color conversion layer that converts the wavelength of light emitted from the light emitting element may be additionally provided on the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3. Therefore, the first light emitting region, the second light emitting region, and the third light emitting region that are respectively provided with the first sub-pixel PX1, the second sub-pixel PX2, and the third sub-pixel PX3 may emit red light, green light, and blue light, respectively.

[0054] In another example, the light emitting elements of the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may emit white light. For example, a color filter layer that selectively transmits light of a specific color may be additionally provided on the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3. Therefore, the first light emitting region, the second light emitting region, and the third light emitting region of the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3, respectively, may emit red light, green light, and blue light, respectively.

[0055] Each of the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may have a triangular plane shape, a quadrilateral plane shape, a hexagonal plane shape, a circular plane shape, or an elliptical plane shape, etc. In an embodiment, each of the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may have a rectangular plane shape. However, the embodiment is not limited thereto. For example, each of the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may have a different plane shape.

[0056] The non-display area NDA may include a pad area PDA. The pad area PDA may be located away from one side of the display area DA. For example, the pad area PDA may have a shape extending in the first direction DR1.

[0057] A plurality of lines may be provided in the non-display area NDA, and a pad electrode PDE may be provided in the pad area PDA. The plurality of lines may electrically connect the pad electrode PDE and the sub-pixel. For example, the line may include a data signal line, a scan signal line, a light emitting control signal line, a power supply voltage line, and the like.

[0058] The pad electrodes PDE may be arranged to be spaced apart from each other in the first direction DR1. For example, each of the plurality of pad electrodes PDE may include metal, alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0059] In the description, a plane may be defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. For example, the first direction DR1 may be perpendicular to the second direction DR2.

[0060] Figure 2 It is schematically shown Figure 1 Schematic cross-sectional view of a display device.

[0061] refer to Figure 2 , the display device DD may include a substrate SUB, a display element layer DL disposed on the substrate SUB, and an encapsulation member ENC covering the display element layer DL. For example, the display element layer DL may be disposed on the substrate SUB in a third direction DR3, and the encapsulation member ENC may be disposed on the display element layer DL in the third direction DR3. The third direction DR3 may be perpendicular to the direction of the substrate SUB. Figure 1 The first direction DR1 and the second direction DR2 define a plane.

[0062] The substrate SUB may include a transparent material or an opaque material. The substrate SUB may be made of a transparent resin substrate. Examples of transparent resin substrates may include polyimide substrates. For example, the polyimide substrate may include a first organic layer, a first barrier layer, a second organic layer, and the like. In another example, the substrate SUB may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a F-doped quartz substrate, a soda-lime glass substrate, and an alkali-free glass substrate, and the like. These materials may be used alone or in combination with each other. In another example, the substrate SUB may include a silicon wafer.

[0063] The display element layer DL may be disposed in the display area DA. The display element layer DL may include a circuit element layer and a light emitting element layer disposed on the circuit element layer. The circuit element layer may include at least one driving transistor. The light emitting element layer may be electrically connected to the driving transistor and may include a light emitting element that generates light based on a driving signal received by the driving transistor. A detailed description of the display element layer DL will be described later.

[0064] The encapsulation member ENC may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. The encapsulation member ENC may prevent moisture and oxygen from penetrating (or permeating) from the outside into the light emitting element (eg, Figure 3 A detailed description of the packaging component ENC will be provided later.

[0065] Figure 3 yes Figure 2 For example, Figure 3 yes Figure 2 FIG. 1 is an enlarged schematic cross-sectional view of a portion of the display element layer DL.

[0066] refer to Figure 3 The display element layer DL may include a buffer layer BFR, a transistor TR, a gate insulating layer GI, an interlayer insulating layer ILD, a through insulating layer VIA, a pixel defining layer PDL, and a light emitting element LED.

[0067] For example, the transistor TR may include an active pattern layer ACT, a gate electrode GAT, a source electrode SE, and a drain electrode DE, and the light emitting element LED may include an anode electrode ADE, a light emitting layer EL, and a cathode electrode CTE.

[0068] The buffer layer BFR may be disposed on the substrate SUB. The buffer layer BFR may prevent metal atoms or impurities from diffusing from the substrate SUB to the transistor TR. For example, in the case where the surface of the substrate SUB is uneven, the buffer layer BFR may improve the flatness of the surface of the substrate SUB. For example, the buffer layer BFR may include an inorganic material such as silicon oxide (SiO x ), silicon nitride (SiNx ) and silicon oxynitride (SiO x N y ) etc. These materials may be used alone or in combination with each other.

[0069] The active pattern layer ACT may be disposed on the buffer layer BFR. The active pattern layer ACT may include a metal oxide semiconductor, an inorganic semiconductor (e.g., amorphous silicon and polycrystalline silicon, etc.), or an organic semiconductor. The active pattern layer ACT may include a source region, a drain region, and a channel region between the source region and the drain region.

[0070] Metal oxide semiconductors may include binary compounds (AB) containing indium (In), zinc (Zn), gallium (Ga), tin (Sn), titanium (Ti), aluminum (Al), hafnium (Hf), zirconium (Zr), and magnesium (Mg). x ), ternary compounds (AB x C y ) and quaternary compounds (AB x C y D z ) etc. For example, the metal oxide semiconductor may include zinc oxide (ZnO x ), gallium oxide (GaO x ), tin oxide (SnO x ), indium oxide (InO x ), indium gallium oxide (IGO), indium zinc oxide (IZO), indium tin oxide (ITO), indium zinc tin oxide (IZTO), and indium gallium zinc oxide (IGZO), etc. These materials may be used alone or in combination with each other.

[0071] The gate insulating layer GI may be disposed on the buffer layer BFR. The gate insulating layer GI may cover (e.g., completely cover) the active pattern layer ACT and may have a substantially flat upper surface without causing a step difference around the active pattern layer ACT. In another example, the gate insulating layer GI may cover the active pattern layer ACT and may be disposed with a uniform thickness along the contour of the active pattern layer ACT. For example, the gate insulating layer GI may include an inorganic material such as silicon oxide (SiO x ), silicon nitride (SiN x ), Silicon Carbide (SiC x ), silicon oxynitride (SiO x N y ) and silicon oxycarbide (SiO x C y ) etc. These materials may be used alone or in combination with each other.

[0072] The gate electrode GAT may be disposed on the gate insulating layer GI. The gate electrode GAT may overlap with the channel region of the active pattern layer ACT. The gate electrode GAT may include a metal, an alloy, a metal nitride, a conductive metal oxide, and a transparent conductive material, etc. Examples of metals may include silver (Ag), molybdenum (Mo), aluminum (Al), tungsten (W), copper (Cu), nickel (Ni), chromium (Cr), titanium (Ti), tantalum (Ta), platinum (Pt), and scandium (Sc), etc. Examples of conductive metal oxides may include indium tin oxide and indium zinc oxide. For example, examples of metal nitrides include aluminum nitride (AlN x ), tungsten nitride (WN x ) and chromium nitride (CrN x ) etc. These materials may be used alone or in combination with each other.

[0073] The interlayer insulating layer ILD may be disposed on the gate insulating layer GI. The interlayer insulating layer ILD may cover (e.g., completely cover) the gate electrode GAT and may have a substantially flat upper surface without causing a step difference around the gate electrode GAT. In another example, the interlayer insulating layer ILD may cover the gate electrode GAT and may be arranged with a uniform thickness along the contour of the gate electrode GAT. For example, the interlayer insulating layer ILD may include an inorganic material such as silicon oxide, silicon nitride, silicon carbide, silicon oxynitride, and silicon oxycarbide. These materials may be used alone or in combination with each other.

[0074] The source electrode SE and the drain electrode DE may be disposed on the interlayer insulating layer ILD. The source electrode SE may be connected to the source region of the active pattern layer ACT through a contact hole passing through the gate insulating layer GI and the first portion of the interlayer insulating layer ILD, and the drain electrode DE may be connected to the drain region of the active pattern layer ACT through a contact hole passing through the gate insulating layer GI and the second portion of the interlayer insulating layer ILD. For example, the source electrode SE and the drain electrode DE may include metal, alloy, metal nitride, conductive metal oxide, and transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0075] Therefore, the transistor TR including the active pattern layer ACT, the gate electrode GAT, the source electrode SE, and the drain electrode DE may be disposed in the display area DA (see FIG. 1 ) on the substrate SUB. Figure 2 )middle.

[0076] The through insulating layer VIA may be disposed on the interlayer insulating layer ILD. The through insulating layer VIA may cover (e.g., completely cover) the source electrode SE and the drain electrode DE. The through insulating layer VIA may include an inorganic material or an organic material. In an embodiment, the through insulating layer VIA may include an organic material. For example, the through insulating layer VIA may include an organic material such as a phenolic resin, a polyacrylate resin, a polyimide resin, a polyamide resin, a siloxane resin, and an epoxy resin. These materials may be used alone or in combination with each other.

[0077] The anode electrode ADE may be disposed on the through insulating layer VIA. The anode electrode ADE may be connected to the drain electrode DE (or the source electrode SE) through a contact hole passing through the through insulating layer VIA. For example, the anode electrode ADE may include a metal, an alloy, a metal nitride, a conductive metal oxide, and a transparent conductive material, etc. These materials may be used alone or in combination with each other. In an embodiment, the anode electrode ADE may have a layered structure including ITO / Ag / ITO. However, the embodiment is not limited thereto.

[0078] The pixel defining layer PDL may be disposed on the through insulating layer VIA. The pixel defining layer PDL may cover an edge portion of the anode electrode ADE. For example, an opening exposing at least a portion of the upper surface of the anode electrode ADE may be defined in the pixel defining layer PDL. For example, the pixel defining layer PDL may include an inorganic material or an organic material. In an embodiment, the pixel defining layer PDL may include an organic material such as an epoxy resin and a silicone resin. These materials may be used alone or in combination with each other. In another embodiment, the pixel defining layer PDL may include an inorganic material and / or an organic material including a light blocking material such as a black pigment and a black dye.

[0079] The light emitting layer EL may be disposed on the anode electrode ADE. For example, the light emitting layer EL may be disposed in an opening of the pixel defining layer PDL. The light emitting layer EL may include an organic material capable of emitting light of a certain color. For example, the light emitting layer EL may include an organic material emitting red light, green light, or blue light.

[0080] The cathode electrode CTE may be disposed on the pixel defining layer PDL and the light emitting layer EL. For example, the cathode electrode CTE may include metal, alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. These materials may be used alone or in combination with each other.

[0081] In another example, a capping layer may be further disposed between the cathode electrode CTE and the encapsulation member ENC. For example, the capping layer may include silicon oxide and silicon nitride, etc. These materials may be used alone or in combination with each other.

[0082] Therefore, the light emitting element LED including the anode electrode ADE, the light emitting layer EL and the cathode electrode CTE may be disposed in the display area DA on the substrate SUB. The light emitting element LED may be electrically connected to the transistor TR. Therefore, the light emitting element LED may receive a driving signal from the transistor TR and generate light according to the driving signal.

[0083] Figure 4 It shows Figure 3 Schematic cross-sectional view of an example of a packaging component. Figure 5 yes Figure 4 For example, Figure 5 yes Figure 4 FIG. 1 is an enlarged schematic cross-sectional view of a portion of the first seed layer SL1 .

[0084] refer to Figure 4 The encapsulation member ENC may include a first inorganic encapsulation layer IEL1, an organic encapsulation layer OEL disposed on the first inorganic encapsulation layer IEL1, and a second inorganic encapsulation layer IEL2 disposed on the organic encapsulation layer OEL.

[0085] The first inorganic encapsulation layer IEL1 may include a silicon compound. For example, the first inorganic encapsulation layer IEL1 may include silicon oxide, silicon nitride, silicon oxynitride, etc. These materials may be used alone or in combination with each other. In an embodiment, the first inorganic encapsulation layer IEL1 may include silicon nitride. In another embodiment, the first inorganic encapsulation layer IEL1 may include silicon oxynitride. However, the embodiment is not limited thereto. For example, the thickness of the first inorganic encapsulation layer IEL1 in the third direction DR3 may be about 7000 angstroms. or larger.

[0086] The organic encapsulation layer OEL may have a substantially flat upper surface. For example, the organic encapsulation layer OEL may include a cured polymer such as polyacrylate. However, the embodiment is not limited thereto. For example, the thickness of the organic encapsulation layer OEL in the third direction DR3 may be about 30,000 angstroms. to about 50,000 angstroms within the range.

[0087] The second inorganic encapsulation layer IEL2 may include a silicon compound. For example, the second inorganic encapsulation layer IEL2 may include silicon oxide, silicon nitride, silicon oxynitride, etc. These materials may be used alone or in combination with each other. In an embodiment, the second inorganic encapsulation layer IEL2 may include silicon nitride.

[0088] The second inorganic encapsulation layer IEL2 may be divided into two layers. In an embodiment, the second inorganic encapsulation layer IEL2 may include a first seed layer SL1 disposed on the organic encapsulation layer OEL and a first inorganic layer IL1 disposed on the first seed layer SL1. For example, the first seed layer SL1 may contact (e.g., directly contact) the organic encapsulation layer OEL, and the first inorganic layer IL1 may contact (e.g., directly contact) the first seed layer SL1. The first seed layer SL1 may be formed before the first inorganic layer IL1 by a separate deposition process. This will be described in detail later.

[0089] The density of the first inorganic layer IL1 may be less than that of the first seed layer SL1. For example, the density of the first seed layer SL1 may be greater than that of the first inorganic layer IL1. For example, the density of the first seed layer SL1 may be about 1.9 g / cm 3 or greater to about 3.5 g / cm 3 For example, the density of the first seed layer SL1 may be about 2.14 g / cm 3 or greater to about 2.7 g / cm 3 For example, the density of the first inorganic layer IL1 may be about 1.8 g / cm 3 or greater to about 3.5 g / cm 3 For example, the density of the first inorganic layer IL1 may be about 1.9 g / cm 3 or greater to about 2.04 g / cm 3 or smaller.

[0090] For example, the density of each of the first seed layer SL1 and the first inorganic layer IL1 may be measured using an X-ray reflectometry (XRR) method.

[0091] In an embodiment, a difference between the density of the first seed layer SL1 and the density of the first inorganic layer IL1 may be about 0.1 g / cm 3 For example, the difference between the density of the first seed layer SL1 and the density of the first inorganic layer IL1 may be about 0.1 g / cm 3 or larger to about 1g / cm 3 or smaller.

[0092] Further references Figure 5As described above, in the case where the first seed layer SL1 is first formed by a deposition process separate from the first inorganic layer IL1, the first seed layer SL1 can be formed as a uniform and dense layer. For example, the silicon atoms 10 and the nitrogen atoms 20 of the first seed layer SL1 can be arranged uniformly and densely. For example, the silicon atoms 10 and the nitrogen atoms 20 of the first seed layer SL1 can be arranged alternately in a vertical direction (e.g., a third direction DR3). For example, the silicon atoms 10 of the first seed layer SL1 can be arranged adjacent to each other in a horizontal direction (e.g., a first direction DR1 or a second direction DR2). For example, the nitrogen atoms 20 of the first seed layer SL1 can be arranged adjacent to each other in a horizontal direction (e.g., a first direction DR1 or a second direction DR2). Therefore, the barrier properties of the second inorganic encapsulation layer IEL2 can be improved.

[0093] Reference again Figure 4 For example, the thickness T3 of the second inorganic encapsulation layer IEL2 may be about 4,000 angstroms. For example, the difference between the density of the first seed layer SL1 and the density of the first inorganic layer IL1 is about 0.1 g / cm 3 or greater up to about 1g / cm 3 In the case where the thickness T3 of the second inorganic encapsulation layer IEL2 is within the range of about 4000 angstroms or less, the thickness T3 of the second inorganic encapsulation layer IEL2 may be about 4000 angstroms. Therefore, the second inorganic encapsulating layer IEL2 may have a thickness smaller than that of the first inorganic encapsulating layer IEL1.

[0094] For example, the thickness T3 of the second inorganic encapsulation layer IEL2 may represent the sum of the thickness T1 of the first seed layer SL1 and the thickness T2 of the first inorganic layer IL1. For example, the thickness T1, T2 or T3 of each layer may represent the length in the third direction DR3.

[0095] In an embodiment, the thickness T1 of the first seed layer SL1 may be about 10% or less of the thickness T3 of the second inorganic encapsulation layer IEL2. For example, the thickness T1 of the first seed layer SL1 may be about 400 angstroms. or less. For example, the thickness T1 of the first seed layer SL1 may be about 0.01% or more to about 10% or less of the thickness T3 of the second inorganic encapsulation layer IEL2. In the case where the thickness T1 of the first seed layer SL1 exceeds about 10% of the thickness T3 of the second inorganic encapsulation layer IEL2, large-scale productivity may be reduced due to a reduction in tact time (or manufacturing time).

[0096] However, the embodiment is not limited thereto, and the second inorganic encapsulation layer IEL2 may be disposed under the organic encapsulation layer OEL, and the first inorganic encapsulation layer IEL1 may be disposed under the organic encapsulation layer OEL. For example, the order of the first inorganic encapsulation layer IEL1 and the second inorganic encapsulation layer IEL2 may be changed.

[0097] Figure 6 , Figure 7 and Figure 8 is a schematic cross-sectional view for explaining a method of manufacturing a display device according to an embodiment.

[0098] refer to Figure 6 , can be on a substrate (e.g., Figure 3 A display element layer DL is formed on a substrate SUB. The display element layer DL may include a circuit element layer including a driving transistor and a light emitting element layer including a light emitting element electrically connected to the driving transistor.

[0099] The first inorganic encapsulation layer IEL1 may be formed on the display element layer DL. For example, the first inorganic encapsulation layer IEL1 may be formed of silicon nitride, silicon oxynitride, etc. For example, the first inorganic encapsulation layer IEL1 may be formed by a plasma enhanced chemical vapor deposition (PECVD) process. However, the embodiment is not limited thereto.

[0100] The organic encapsulation layer OEL may be formed on the first inorganic encapsulation layer IEL1. For example, the organic encapsulation layer OEL may be formed by providing an organic material through an inkjet printing process. However, the embodiment is not limited thereto.

[0101] refer to Figure 7 , a first seed layer SL1 may be formed on the organic encapsulation layer OEL. The first seed layer SL1 may be formed of a silicon compound. For example, the first seed layer SL1 may be formed of silicon nitride.

[0102] In an embodiment, the first seed layer SL1 may be formed by a first deposition process. For example, the first deposition process may be one of a plasma enhanced atomic layer deposition (PEALD) process, a sputtering process, and an electron beam vacuum deposition process. However, the embodiment is not limited thereto.

[0103] In an embodiment, the first seed layer SL1 may be formed of an aminosilane liquid precursor. For example, the first deposition process may be a plasma enhanced atomic layer deposition process. For example, the liquid precursor may include cyclosilazane, trisilane, bis(diethylamino)silane, bis(tert-butylamino)silane, tri(dimethylamino)silane, tri(isopropylamino)silane, tetra(dimethylamino)silane, tri(isopropyl)cyclotrisilazane and tetramethyldisilazane, etc. These materials may be used alone or in combination with each other. However, the specific implementation is not limited thereto.

[0104] When the first seed layer SL1 is formed using an aminosilane-based liquid precursor, the density may be relatively higher than when the first seed layer SL1 is formed using a silane-based precursor. For example, the deposition rate of the first seed layer SL1 formed using an aminosilane-based liquid precursor may be higher than that of the first seed layer SL1 formed using a silane-based precursor.

[0105] For example, regarding the process of forming the first seed layer SL1, when the first deposition process is a plasma enhanced atomic layer deposition process, an aminosilane-based liquid precursor may be provided on the organic encapsulation layer OEL. For example, the aminosilane-based liquid precursor may be exhausted from the chamber. Then the reaction gas may be exhausted from the chamber. For example, the reaction gas may include oxygen (O 2 ), ozone (O 3 ), nitric oxide (NO) and nitrogen dioxide (NO 2 ) etc. These gases may be used alone or in combination with each other. By repeatedly performing the above process, the first seed layer SL1 of a desired thickness may be formed.

[0106] refer to Figure 8 , a first inorganic layer IL1 may be formed on the first seed layer SL1. The first inorganic layer IL1 may be formed of a silicon compound. For example, the first inorganic layer IL1 may be formed of silicon nitride.

[0107] In an embodiment, the first inorganic layer IL1 may be formed by a second deposition process different from the first deposition process. For example, the second deposition process may be a plasma enhanced chemical vapor deposition process. However, the embodiment is not limited thereto.

[0108] In an embodiment, the first inorganic layer IL1 may be formed of a silane-based precursor or an aminosilane-based liquid precursor. Examples of the liquid precursor used in the first inorganic layer IL1 may be the same as examples of the liquid precursor used in the first seed layer SL1.

[0109] The density of the first inorganic layer IL1 may be less than that of the first seed layer SL1. In an embodiment, the difference between the density of the first seed layer SL1 and the density of the first inorganic layer IL1 may be about 0.1 g / cm 3 For example, the difference between the density of the first seed layer SL1 and the density of the first inorganic layer IL1 may be about 0.1 g / cm 3 or larger to about 1g / cm 3 or smaller.

[0110] Thus, the second inorganic encapsulating layer IEL2 including the first seed layer SL1 and the first inorganic layer IL1 may be formed on the organic encapsulating layer OEL.

[0111] For example, refer again to Figure 4 The thickness T3 of the second inorganic encapsulation layer IEL2 may be about 4,000 angstroms. For example, the thickness T1 of the first seed layer SL1 may be about 10% or less of the thickness T3 of the second inorganic encapsulation layer IEL2. For example, the thickness T1 of the first seed layer SL1 may be about 0.01% or more to about 10% or less of the thickness T3 of the second inorganic encapsulation layer IEL2.

[0112] As the second inorganic encapsulation layer IEL2 is formed, an encapsulation member ENC including the first inorganic encapsulation layer IEL1, the organic encapsulation layer OEL, and the second inorganic encapsulation layer IEL2 may be formed. As the encapsulation member ENC is formed, Figure 1 and Figure 2 Display device DD.

[0113] Reference again Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5 , Figure 6 , Figure 7 and Figure 8 The display device DD according to the embodiment may include a second inorganic encapsulation layer IEL2 including a first seed layer SL1 and a first inorganic layer IL1 having a density less than that of the first seed layer SL1 and covering the display element layer DL. The first seed layer SL1 and the first inorganic layer IL1 may be formed by different deposition processes.

[0114] Therefore, the second inorganic encapsulation layer IEL2 having a relatively thin thickness can be formed. Therefore, the barrier performance of the second inorganic encapsulation layer IEL2 can be improved, thereby preventing the folding and bending characteristics of the display device DD from being deteriorated. For example, in the case where the display device DD has an organic light emitting diode on silicon (OLEDos) structure, the occurrence of color mixing can be reduced.

[0115] Fig. 9 2 is a schematic diagram for explaining the reliability evaluation results of the second inorganic encapsulating layer according to Comparative Examples 1 and 2 and Example 1. Fig.10 : is a graph for explaining the intensity contrast according to the depth of the second inorganic encapsulating layer satisfying Comparative Example 2. Fig.11 : is a graph for explaining the intensity contrast according to the depth of the second inorganic encapsulating layer satisfying Example 1.

[0116] In Comparative Example 1, a silicon nitride-containing film having a thickness of about 7000 angstroms may be formed on a silicon wafer. For example, the second inorganic encapsulation layer may be formed by a plasma chemical vapor deposition process. For example, the second inorganic encapsulation layer may include a second inorganic encapsulation layer positioned on the encapsulation member (eg Figure 4 The inorganic layer in the topmost layer of the encapsulation component ENC).

[0117] In Comparative Example 2, a silicon nitride-containing film having a thickness of about 2,000 angstroms may be formed on a silicon wafer. For example, the second inorganic encapsulation layer may be formed by a plasma chemical vapor deposition process. For example, the second inorganic encapsulation layer may include a second inorganic encapsulation layer positioned on the encapsulation member (eg Figure 4 The inorganic layer in the topmost layer of the encapsulation component ENC).

[0118] In Embodiment 1, a silicon nitride-containing film having a thickness of about 10 angstroms may be formed on a silicon wafer. The first seed layer SL1 of thickness (see Figure 4 ) and has approximately 2,000 angstroms The thickness of the first inorganic layer IL1 (see Figure 4 ) of the second inorganic encapsulation layer IEL2 (see Figure 4 ). For example, the first seed layer SL1 may be formed by a plasma enhanced atomic layer deposition process, and the first inorganic layer IL1 may be formed by a plasma enhanced chemical vapor deposition process. For example, the second inorganic encapsulation layer IEL2 may include a first encapsulation member ENC (see Figure 4 ) is an inorganic layer in the uppermost layer.

[0119] In Comparative Example 1, Comparative Example 2 and Example 1, the reliability of the second inorganic encapsulation layer can be evaluated using an unbiased highly accelerated stress test (UHAST). Fig. 9 The photograph shown in is a photograph taken after the second inorganic encapsulating layer was exposed to high temperature (eg, about 85° C.) and high humidity (eg, about 85%) conditions for about 504 hours.

[0120] Therefore, reference Fig. 9 , the second inorganic encapsulation layer IEL2 satisfying Example 1 may have a substantially similar level of reliability compared to the second inorganic encapsulation layer satisfying Comparative Example 1. For example, the second inorganic encapsulation layer IEL2 satisfying Example 1 may have improved reliability compared to the second inorganic encapsulation layer satisfying Comparative Example 2.

[0121] For example, refer to Fig.11 , the intensity contrast of the depth of the second inorganic encapsulation layer IEL2 according to Embodiment 1 may have a slope in region C of the graph. Fig.10, there may not be any slope in a region corresponding to region C (i.e., a region having the same depth range as region C) of a graph of intensity contrast according to depth of the second inorganic encapsulation layer satisfying Comparative Example 2. Therefore, the second inorganic encapsulation layer IEL2 satisfying Embodiment 1 may include a first seed layer SL1.

[0122] exist Fig.10 and Fig.11 In the embodiment of the present invention, the depth of the second inorganic encapsulating layer exceeding the thickness of the second inorganic encapsulating layer may correspond to the depth of the silicon wafer. For example, the intensity contrast refers to the relative value of the contrast observed by a transmission electron microscope (TEM).

[0123] Hereinafter, the barrier properties of the second inorganic encapsulation layer according to Comparative Example 3 and Example 2 will be described.

[0124] Referring to Table 1 below, in Comparative Example 3, a silicon nitride-containing film having a thickness of about 10,000 angstroms may be formed on a silicon wafer. The second inorganic encapsulation layer may be formed by a plasma chemical vapor deposition process. For example, the second inorganic encapsulation layer may include a second inorganic encapsulation layer positioned on the encapsulation member (eg, Figure 4 The inorganic layer in the topmost layer of the encapsulation component ENC).

[0125] In Example 2, a silicon nitride-containing film having a thickness of about 10,000 angstroms may be formed on a silicon wafer. The second inorganic encapsulation layer IEL2 (see Figure 4 For example, the second inorganic encapsulation layer IEL2 may include a first seed layer SL1 formed by a plasma enhanced atomic layer deposition process (see Figure 4 ) and a first inorganic layer IL1 formed on the first seed layer SL1 by a plasma enhanced chemical vapor deposition process (see Figure 4 ). For example, the second inorganic encapsulation layer IEL2 may include an inorganic layer positioned in the uppermost layer of the encapsulation member ENC.

[0126] According to Comparative Example 3 and Example 2, the water vapor transmission rate (WVTR) of the second inorganic encapsulating layer may be measured.

[0127]

[0128]

[0129] Therefore, referring to Table 1, the second inorganic encapsulation layer IEL2 satisfying Example 2 may have lower moisture permeability than the second inorganic encapsulation layer satisfying Comparative Example 3. Therefore, compared with the second inorganic encapsulation layer satisfying Comparative Example 3, the second inorganic encapsulation layer IEL2 satisfying Example 2 may have improved barrier properties.

[0130] Fig.12 It is shown Figure 3 Schematic cross-sectional view of another example of a packaging component.

[0131] refer to Fig.12 The encapsulation member ENC′ may include a first inorganic encapsulation layer IEL1, an organic encapsulation layer OEL disposed on the first inorganic encapsulation layer IEL1, and a second inorganic encapsulation layer IEL2 disposed on the organic encapsulation layer OEL. Fig.12 The encapsulation component ENC' described can be used with reference Figure 4 The described encapsulation members ENC are substantially the same or similar. In the following, repeated descriptions are omitted or simplified.

[0132] The first inorganic encapsulation layer IEL1 may include a silicon compound. In an embodiment, the first inorganic encapsulation layer IEL1 may include silicon nitride. In another embodiment, the first inorganic encapsulation layer IEL1 may include silicon oxynitride. However, embodiments are not limited thereto.

[0133] The first inorganic encapsulation layer IEL1 may be divided into two layers. In an embodiment, the first inorganic encapsulation layer IEL1 may include a second seed layer SL2 and a second inorganic layer IL2 disposed on the second seed layer SL2. For example, the second inorganic layer IL2 may contact (e.g., directly contact) the second seed layer SL2 and the organic encapsulation layer OEL. The second seed layer SL2 may be formed before the second inorganic layer IL2 by a separate deposition process.

[0134] The second seed layer SL2 may be substantially the same as the first seed layer SL1. For example, similar to the first seed layer SL1, the second seed layer SL2 may have uniformly and densely arranged silicon atoms 10 (see Figure 5 ) and nitrogen atom 20 (see Figure 5 ).

[0135] The density of the second inorganic layer IL2 may be less than the density of the second seed layer SL2. For example, the density of the second seed layer SL2 may be greater than the density of the second inorganic layer IL2. For example, the density of the second seed layer SL2 may be about 1.9 g / cm 3 or greater to about 3.5 g / cm 3 For example, the density of the second seed layer SL2 may be about 2.14 g / cm 3 or greater to about 2.7 g / cm 3 For example, the density of the second inorganic layer IL2 may be about 1.8 g / cm 3 or greater to about 3.5 g / cm 3For example, the density of the second inorganic layer IL2 may be about 1.9 g / cm 3 or greater to about 2.04 g / cm 3 or smaller.

[0136] In an embodiment, a difference between the density of the second seed layer SL2 and the density of the second inorganic layer IL2 may be about 0.1 g / cm 3 For example, the difference between the density of the second seed layer SL2 and the density of the second inorganic layer IL2 may be about 0.1 g / cm 3 or greater up to about 1g / cm 3 or smaller.

[0137] For example, the thickness T6 of the first inorganic encapsulation layer IEL1 may be about 4,000 angstroms. For example, the difference between the density of the second seed layer SL2 and the density of the second inorganic layer IL2 is about 0.1 g / cm 3 or greater up to about 1g / cm 3 In the case where the thickness T6 of the first inorganic encapsulation layer IEL1 is within the range of about 4,000 angstroms or less, the thickness T6 of the first inorganic encapsulation layer IEL1 may be about 4,000 angstroms or less. Therefore, the first inorganic encapsulation layer IEL1 (with Figure 4 The first inorganic encapsulation layer IEL1 may have a relatively thin thickness.

[0138] For example, the thickness T6 of the first inorganic encapsulation layer IEL1 may represent the sum of the thickness T4 of the second seed layer SL2 and the thickness T5 of the second inorganic layer IL2. For example, the thickness T4, T5 or T6 of each layer may represent the length in the third direction DR3.

[0139] In an embodiment, the thickness T4 of the second seed layer SL2 may be about 10% or less of the thickness T6 of the first inorganic encapsulation layer IEL1. For example, the thickness T4 of the second seed layer SL2 may be about 0.01% or more to about 10% or less of the thickness T6 of the first inorganic encapsulation layer IEL1. In the case where the thickness T4 of the second seed layer SL2 exceeds the thickness T6 of the first inorganic encapsulation layer IEL1 by about 10%, the mass productivity may be reduced due to the reduction of the tact time (or manufacturing time).

[0140] The second seed layer SL2 and the second inorganic layer IL2 may be formed by different deposition processes. For example, the second seed layer SL2 may be formed by a first deposition process, and the second inorganic layer IL2 may be formed by a second deposition process different from the first deposition process.

[0141] For example, the first deposition process may be one of a plasma enhanced atomic layer deposition process, a sputtering process, and an electron beam vacuum deposition process. The second deposition process may be a plasma enhanced chemical vapor deposition process. However, the embodiment is not limited thereto.

[0142] In the case where the first inorganic encapsulation layer IEL1 includes silicon nitride, the second seed layer SL2 may be formed of an aminosilane-based liquid precursor, and the second inorganic layer IL2 may be formed of a silane-based precursor or an aminosilane-based liquid precursor.

[0143] Fig.12 The second inorganic encapsulation layer IEL2 may be Figure 4 The second inorganic encapsulation layer IEL2 is substantially the same. Fig.12 The encapsulation member ENC′ may include a first inorganic encapsulation layer IEL1 and a second inorganic encapsulation layer IEL2 that are substantially identical to each other.

[0144] In another embodiment, the organic encapsulation layer OEL may be omitted from the encapsulation member ENC', and the first inorganic encapsulation layer IEL1 or the second inorganic encapsulation layer IEL2 may be omitted. In another embodiment, the organic encapsulation layer OEL may be omitted from the encapsulation member ENC', and an inorganic encapsulation layer having a lower density than the first inorganic encapsulation layer IEL1 and the second inorganic encapsulation layer IEL2 may be further provided between the first inorganic encapsulation layer IEL1 and the second inorganic encapsulation layer IEL2.

[0145] The embodiments can be applied to various display devices. For example, the embodiments can be applied to various display devices, such as display devices for vehicles, ships and aircraft, portable communication devices, display devices for exhibitions or information broadcasting, and medical display devices.

[0146] The foregoing is merely an illustrative embodiment of the present invention and should not be construed as limiting the present invention. Although several embodiments have been described, it will be readily appreciated by those skilled in the art that many modifications may be made to the embodiments without substantially departing from the novel teachings and advantages of the present invention. Therefore, all such modifications should be included within the scope of the present invention as defined in the claims. Therefore, it should be understood that the foregoing is an illustration of various illustrative embodiments and should not be construed as being limited to the specific embodiments disclosed, and modifications to the disclosed embodiments and other embodiments are intended to be included within the scope of the appended claims.

Claims

1. A display device, wherein: The display device comprises: A display element layer disposed on the substrate and including a light emitting element; and A packaging member, disposed on the display element layer and comprising: a first inorganic encapsulation layer; an organic encapsulation layer, disposed on the first inorganic encapsulation layer; and The second inorganic encapsulation layer comprises: a first seed layer disposed on the organic encapsulation layer, and A first inorganic layer is disposed on the first seed layer and has a density lower than that of the first seed layer.

2. The display device according to claim 1, wherein: The difference between the density of the first seed layer and the density of the first inorganic layer is within 0.1 g / cm 3 or greater up to 1g / cm 3 or smaller.

3. The display device according to claim 1, wherein: The second inorganic encapsulation layer has a thickness of 4000 angstroms or less.

4. The display device according to claim 1, wherein: The thickness of the first seed layer is 10% or less of the thickness of the second inorganic encapsulation layer.

5. The display device according to claim 1, wherein: The first inorganic encapsulation layer comprises: A second seed crystal layer is disposed on the display element layer; and A second inorganic layer is disposed on the second seed layer and has a density lower than that of the second seed layer.

6. The display device according to claim 5, wherein: The difference between the density of the second seed layer and the density of the second inorganic layer is within 0.1 g / cm 3 or greater up to 1g / cm 3 or smaller.

7. The display device according to claim 5, wherein: The first inorganic encapsulation layer has a thickness of 4000 angstroms or less.

8. The display device according to claim 5, wherein: The thickness of the second seed layer is 10% or less of the thickness of the first inorganic encapsulation layer.

9. The display device according to claim 1, wherein: The first inorganic encapsulation layer includes silicon oxide or silicon oxynitride, and The second inorganic encapsulation layer includes silicon nitride.

10. A method for manufacturing a display device, wherein: The method comprises: forming a display element layer including a light emitting element on a substrate; forming a first inorganic encapsulation layer on the display element layer, forming an organic encapsulation layer on the first inorganic encapsulation layer; forming a first seed layer on the organic encapsulation layer by a first deposition process; and A second inorganic encapsulation layer is formed by forming a first inorganic layer on the first seed layer through a second deposition process different from the first deposition process.

11. The method according to claim 10, wherein: The second deposition process is a plasma enhanced chemical vapor deposition process.

12. The method according to claim 10, wherein: The first deposition process is one of a plasma enhanced atomic layer deposition process, a sputtering process and an electron beam vacuum deposition process.

13. The method according to claim 10, wherein: The density of the first seed layer is greater than the density of the first inorganic layer, and The difference between the density of the first seed layer and the density of the first inorganic layer is within 0.1 g / cm 3 or greater up to 1g / cm 3 or smaller.

14. The method according to claim 10, wherein: The second inorganic encapsulation layer has a thickness of 4000 angstroms or less.

15. The method according to claim 10, wherein: The thickness of the first seed layer is 10% or less of the thickness of the second inorganic encapsulation layer.

16. The method according to claim 10, wherein: The forming of the first inorganic encapsulation layer comprises: forming a second seed layer by the first deposition process; and A second inorganic layer is formed on the second seed layer through the second deposition process.

17. The method according to claim 16, wherein: The density of the second seed layer is greater than the density of the second inorganic layer, and The difference between the density of the second seed layer and the density of the second inorganic layer is within 0.1 g / cm 3 or greater up to 1g / cm 3 or smaller.

18. The method according to claim 16, wherein: The first inorganic encapsulation layer has a thickness of 4000 angstroms or less, and The thickness of the second seed layer is 10% or less of the thickness of the first inorganic encapsulation layer.

19. The method according to claim 10, wherein: The first inorganic encapsulation layer is formed of silicon oxide or silicon oxynitride, and The second inorganic encapsulation layer is formed of silicon nitride.

20. The method according to claim 10, wherein: The first seed crystal layer is formed from an aminosilane-based liquid precursor.

Images