Method for manufacturing display device

Abstract

A method for manufacturing a display device is provided. The method includes: applying an organic encapsulation layer to a substrate of the display device, the substrate having a display area and a peripheral area extending at least partially around the display area; irradiating light to the organic encapsulation layer; and capturing an image of the peripheral area to which the organic encapsulation layer is applied.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0131933 filed on October 4, 2023, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Aspects of embodiments of the present disclosure relate to a method of manufacturing a display device. Background Art

[0004] The display device visually displays data. The display device may provide (eg, may display) an image by using a light emitting diode. The use of the display device has been diversified, and various designs have been tried to improve the quality of the display device. Summary of the invention

[0005] Embodiments of the present disclosure include methods of manufacturing a display device.

[0006] Additional aspects and features of the disclosure will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the embodiments of the disclosure described below.

[0007] According to an embodiment of the present disclosure, a method for manufacturing a display device includes: applying an organic encapsulation layer to a substrate of the display device, the substrate having a display area and a peripheral area extending at least partially around the display area; irradiating light to the organic encapsulation layer; and capturing an image of the peripheral area to which the organic encapsulation layer is applied.

[0008] The method may further include estimating an application amount of the organic encapsulation layer applied to the peripheral area after capturing the image of the peripheral area.

[0009] When light is irradiated to the organic encapsulation layer, the organic encapsulation layer irradiated with the light may become opaque.

[0010] The applied amount of the organic encapsulation layer may be estimated according to the opacity of the organic encapsulation layer to which light is irradiated.

[0011] The opacity of the organic encapsulating layer may vary depending on the thickness of the applied organic encapsulating layer.

[0012] As the thickness of the applied organic encapsulating layer increases, the opacity of the organic encapsulating layer may increase.

[0013] The light may have a wavelength range in the ultraviolet region.

[0014] The wavelength of light may range from 365 nm to 395 nm.

[0015] The display device may include a first dam in the peripheral area.

[0016] The display device may have a recessed portion in a peripheral region between the first dam and the display region.

[0017] The display device may further include a second dam in the peripheral region and farther away from the display region than the first dam.

[0018] When the organic encapsulation layer is applied to the substrate, the organic encapsulation layer may be filled in the recess.

[0019] An area of ​​a cross section of the recessed portion parallel to the substrate may decrease in a direction toward the substrate.

[0020] A cross-sectional length of the recessed portion in the first direction may uniformly decrease in a direction toward the substrate.

[0021] The recessed portion may have an island shape.

[0022] The recessed portion may have a linear shape and may extend parallel to an edge of the display area.

[0023] An area of ​​a cross section of the recessed portion parallel to the substrate may be constant in a direction perpendicular to the substrate.

[0024] A cross-sectional length of the recessed portion in the first direction may be constant.

[0025] The recessed portion may have an island shape.

[0026] The recessed portion may have a linear shape and may extend parallel to an edge of the display area. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The above and other aspects and features of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0028] Figure 1 is a schematic plan view of a display device according to an embodiment;

[0029] Figure 2 According to the implementation method Figure 1 Schematic equivalent circuit diagram of a sub-pixel circuit in a display device shown in FIG.

[0030] Figure 3 is along Figure 1 A schematic cross-sectional view of the display device taken along line II' in FIG.

[0031] Figure 4 and Figure 5 is an image with schematic overlays showing a peripheral area of ​​a display device according to various embodiments;

[0032] Figure 6 is along Figure 4 and Figure 5 A schematic cross-sectional view of a peripheral area of ​​a display device taken along line II-II';

[0033] Figure 7 and Figure 8 is an image with schematic overlays showing an organic encapsulation layer applied to a peripheral region of a display device according to various embodiments;

[0034] Fig. 9 and Fig.10 is an image with schematic overlays showing a peripheral area of ​​a display device according to various embodiments;

[0035] Fig.11 is along Fig. 9 and Fig.10 A schematic cross-sectional view of a peripheral area of ​​the display device taken along line III-III' in FIG.

[0036] Fig.12 and Fig.13 are images with schematic overlays showing an organic encapsulation layer applied to a peripheral region of a display device according to various embodiments. DETAILED DESCRIPTION

[0037] Reference will now be made in detail to the embodiments of which examples are illustrated in the accompanying drawings. In this regard, the embodiments described may have different forms and should not be construed as being limited to the descriptions set forth herein. Therefore, the embodiments are described below only by reference to the figures to illustrate the aspects and features of the present description. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items. Throughout the disclosure, the expression "at least one of a, b, and c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0038] Hereinafter, the embodiments will be described in detail with reference to the accompanying drawings, and in the description with reference to the accompanying drawings, the same or corresponding components are denoted by the same reference numerals and a redundant description thereof is omitted.

[0039] In the following embodiments, it will be understood that although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.

[0040] In the following embodiments, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0041] It will also be understood that the terms “includes,” “including,” “comprises,” and / or “comprising,” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0042] It will be understood that when an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, the element or layer may be directly on, directly connected to, or directly coupled to, another element or layer, or there may also be one or more intervening elements or layers. When an element or layer is referred to as being "directly on," "directly connected to," or "directly coupled to," another element or layer, there are no intervening elements or layers. For example, when a first element is described as being "coupled to" or "connected to" a second element, the first element may be directly coupled to or directly connected to the second element, or the first element may be indirectly coupled to or indirectly connected to the second element via one or more intervening elements. For example, in the specification, when a layer, region, or component is referred to as being electrically connected to another layer, region, or component, it may be directly electrically connected to, or indirectly electrically connected to, another layer, region, or component via an intervening layer, region, or component.

[0043] In the drawings, the sizes of various elements, layers, etc. may be exaggerated for clarity of illustration. Like reference numerals designate like elements.

[0044] When a certain embodiment can be implemented differently, the specific process order can be performed in a different order from the described order. For example, two processes described in succession can be performed substantially simultaneously or in an order opposite to the described order.

[0045] Expressions such as “at least one of” or “any of” when following a list element modify the entire list element and do not modify the individual elements of the list. For example, the expression “at least one of a, b, and c” means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0046] The x-axis, y-axis, and z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. For example, the x-axis, y-axis, and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other.

[0047] Figure 1 is a schematic plan view of a display device 1 according to an embodiment.

[0048] refer to Figure 1 , the display device 1 may have a display area DA and a peripheral area PA disposed outside the display area DA (e.g., surrounding the periphery of the display area DA). The display area DA may display an image by means of sub-pixels P disposed in the display area DA. The peripheral area PA is disposed outside the display area DA and, as a non-display area that does not display an image, may completely surround the display area DA (e.g., may completely extend around the periphery of the display area DA or may completely surround the display area DA in a plan view). A driver for providing an electrical signal or power to the display area DA or the like may be disposed in the peripheral area PA. A pad as an area to which an electronic component, a printed circuit board, or the like is electrically connected may be disposed in the peripheral area PA.

[0049] Figure 1 An embodiment in which the display area DA is a polygonal (e.g., quadrilateral) shape is illustrated, wherein the length of the display area DA in the x direction is relatively smaller than the length of the display area DA in the y direction, but the present disclosure is not limited thereto. In another embodiment, the display area may have a different polygonal (e.g., quadrilateral) shape, wherein the length of the display area DA in the y direction is relatively smaller than the length of the display area DA in the x direction. Although Figure 1 An embodiment in which the display area DA is approximately a quadrilateral is illustrated, but the present disclosure is not limited thereto. In other embodiments, the display area DA may have various shapes, such as an N-gon (N is a natural number of 3 or more), a circle, an ellipse, etc. Figure 1 An embodiment in which the display area DA has a corner portion including a vertex at which one straight line meets another straight line is illustrated, but in another embodiment, the display area DA may have a polygonal shape with a rounded corner portion.

[0050] In the following description, for the sake of convenience, an embodiment in which the display device 1 is an electronic device such as a smart phone is described, but the display device 1 is not limited thereto. The display device 1 can be applied to various products, including not only portable electronic devices such as mobile phones, smart phones, tablet personal computers, mobile communication terminals, electronic notepads, electronic books, portable multimedia players (PMPs), navigation devices, ultra-mobile personal computers (UMPCs), etc., but also televisions, notebook computers, monitors, billboards, Internet of Things (IOT) devices, etc. In addition, the display device 1 according to the embodiment can be applied to wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). In addition, the display device 1 according to the embodiment can be used as an instrument panel of a vehicle, a central information display (CID) arranged in a central dashboard or instrument panel of a vehicle, an indoor (or in-vehicle) mirror display instead of a side mirror of a vehicle, or a display screen arranged at the rear surface of a front seat as an entertainment device for a rear seat of a vehicle.

[0051] Figure 2 According to the implementation method Figure 1 Schematic equivalent circuit diagram of a sub-pixel circuit PC in the display device 1 is shown in FIG.

[0052] refer to Figure 2 , the sub-pixel circuit PC may include a plurality of thin film transistors and at least one capacitor. In an embodiment, the sub-pixel circuit PC may include a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, and a storage capacitor Cst.

[0053] Each of the first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 may be an oxide semiconductor thin film transistor including a semiconductor layer formed of an oxide semiconductor, or may be a silicon semiconductor thin film transistor including a semiconductor layer formed of polycrystalline silicon. Each thin film transistor may include a first electrode and a second electrode, and depending on the type of the thin film transistor, the first electrode may be one of a source electrode and a drain electrode, and the second electrode may be the other of the source electrode and the drain electrode. In addition, each thin film transistor may include a gate electrode.

[0054] The first thin film transistor T1 may be a driving thin film transistor. A first electrode of the first thin film transistor T1 may be connected to a driving voltage line VDL for providing a driving power voltage ELVDD, and a second electrode of the first thin film transistor T1 may be connected to a pixel electrode of the organic light emitting diode OLED. A gate electrode of the first thin film transistor T1 may be connected to a first node N1. The first thin film transistor T1 may control the amount of current flowing from the driving voltage line VDL to the organic light emitting diode OLED in response to a voltage of the first node N1.

[0055] The second thin film transistor T2 may be a switching thin film transistor. A first electrode of the second thin film transistor T2 may be connected to the data line DL, and a second electrode of the second thin film transistor T2 may be connected to the first node N1. A gate electrode of the second thin film transistor T2 may be connected to the scan line SL. The second thin film transistor T2 may be turned on when a scan signal is supplied to the scan line SL to electrically connect the data line DL to the first node N1.

[0056] The third thin film transistor T3 may be an initialization thin film transistor and / or a sensing thin film transistor. A first electrode of the third thin film transistor T3 may be connected to the second node N2, and a second electrode of the third thin film transistor T3 may be connected to the initialization voltage line INL. A gate electrode of the third thin film transistor T3 may be connected to the scan line SL.

[0057] The third thin film transistor T3 may be turned on when a scan signal is supplied to the scan line SL to electrically connect the initialization voltage line INL to the second node N2. In some embodiments, the third thin film transistor T3 may be turned on in response to a signal received through the scan line SL to initialize the pixel electrode of the organic light emitting diode OLED using an initialization voltage from the initialization voltage line INL.

[0058] In some embodiments, the third thin film transistor T3 may be turned on when a scan signal is supplied to the scan line SL to sense characteristic information of the organic light emitting diode OLED. The third thin film transistor T3 may be used as both an initialization thin film transistor and a sensing thin film transistor or as one of the initialization thin film transistor and the sensing thin film transistor. The initialization operation and the sensing operation of the third thin film transistor T3 may be performed separately or simultaneously (or simultaneously). When the third thin film transistor T3 is used as a sensing thin film transistor, the initialization voltage line INL may be referred to as a sensing line.

[0059] The storage capacitor Cst may be connected between the first node N1 and the second node N2. For example, the first capacitor plate CE1 (see Figure 3 ) may be connected to the gate electrode of the first thin film transistor T1, and the second capacitor plate CE2 (see Figure 3 ) can be connected to the pixel electrode of the organic light emitting diode OLED.

[0060] An opposing electrode of the organic light emitting diode OLED may be connected to a common voltage line VSL for supplying a common power voltage ELVSS.

[0061] although Figure 2An embodiment in which the sub-pixel circuit PC includes three thin film transistors and one storage capacitor is illustrated, but the present disclosure is not limited thereto. In other embodiments, the number of thin film transistors and / or the number of storage capacitors may be variously changed according to the design of the sub-pixel circuit PC.

[0062] Figure 3 is along Figure 1 Schematic cross-sectional view of the display device 1 taken along line II′ in FIG.

[0063] refer to Figure 3 , the display panel 10 may include a substrate 100, an inorganic insulating layer IIL, an organic insulating layer OIL, a sub-pixel circuit PC, a connection electrode CM, an organic light emitting diode OLED, a pixel defining layer 118, a spacer 119, and an encapsulation layer 300. The substrate 100, the inorganic insulating layer IIL, the organic insulating layer OIL, the sub-pixel circuit PC, the connection electrode CM, the organic light emitting diode OLED, the pixel defining layer 118, the spacer 119, and the encapsulation layer 300 may be arranged in a display area DA of the display panel 10.

[0064] The substrate 100 may include a first base layer 100a, a first barrier layer 100b, a second base layer 100c, and a second barrier layer 100d. In an implementation, the first base layer 100a, the first barrier layer 100b, the second base layer 100c, and the second barrier layer 100d may be sequentially stacked in a thickness direction of the substrate 100.

[0065] At least one of the first and second substrate layers 100a and 100c may include a polymer resin such as polyethersulfone, polyarylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyimide, polycarbonate, cellulose triacetate, cellulose acetate propionate, or the like.

[0066] The first barrier layer 100b and the second barrier layer 100d as barrier layers for preventing penetration of external foreign matter may be made of a material such as silicon nitride (SiN X ), silicon oxide (e.g., SiO 2 ) and / or a single layer or multilayer structure of an inorganic material of silicon oxynitride (SiON).

[0067] The buffer layer 111 may be disposed on the substrate 100. The buffer layer 111 may include a SiN X、 SiON and SiO 2 and a single-layer or multi-layer structure including the inorganic insulating material.

[0068] The inorganic insulating layer IIL may be disposed on the buffer layer 111. The inorganic insulating layer IIL may include a first gate insulating layer 112, a second gate insulating layer 113, and an interlayer insulating layer 114.

[0069] The sub-pixel circuit PC may be disposed in the display area DA. The sub-pixel circuit PC may include a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT may include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE.

[0070] The semiconductor layer Act may be disposed on the buffer layer 111. The semiconductor layer Act may include polycrystalline silicon. In other embodiments, the semiconductor layer Act may include amorphous silicon, an oxide semiconductor, an organic semiconductor, etc. The semiconductor layer Act may include a channel region and a drain region and a source region disposed at opposite sides of the channel region.

[0071] The gate electrode GE may be disposed on the semiconductor layer Act. The gate electrode GE may overlap the channel region. The gate electrode GE may include a low-resistance metal material. The gate electrode GE may include a conductive material such as molybdenum (Mo), aluminum (Al), copper (Cu), titanium (Ti), etc., and may be formed into a single layer or multilayer structure including the above-mentioned materials.

[0072] The first gate insulating layer 112 may be disposed between the semiconductor layer Act and the gate electrode GE. The first gate insulating layer 112 may include a layer such as SiO 2 、SiN X , SiON, aluminum oxide (e.g., Al 2 O 3 ), titanium oxide (e.g., TiO 2 ), tantalum oxide (e.g., Ta 2 O 5 ), hafnium oxide (e.g., HfO 2 ), inorganic insulating materials such as zinc oxide (e.g., ZnO), etc.

[0073] The second gate insulating layer 113 may be disposed on the gate electrode GE. The second gate insulating layer 113 may be provided to cover the gate electrode GE. The second gate insulating layer 113 may include a layer such as SiO 2 、SiN X 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 , ZnO and other inorganic insulating materials.

[0074] The second capacitor plate CE2 of the storage capacitor Cst may be arranged on the second gate insulating layer 113. The second capacitor plate CE2 may overlap the gate electrode GE arranged thereunder. In this arrangement, the gate electrode GE and the second capacitor plate CE2 overlap each other with the second gate insulating layer 113 therebetween to form the storage capacitor Cst. In other words, the gate electrode GE may serve as the first capacitor plate CE1 of the storage capacitor Cst.

[0075] Therefore, the storage capacitor Cst and the thin film transistor TFT may be formed to overlap each other (e.g., overlap each other in the thickness direction of the display device 1). However, the present disclosure is not limited thereto. For example, the storage capacitor Cst may be formed not to overlap with the thin film transistor TFT (e.g., offset from the thin film transistor TFT). In such an embodiment, the first capacitor plate CE1 of the storage capacitor Cst may be formed as a component separated from the gate electrode GE of the thin film transistor TFT, and may be provided to be spaced apart from the gate electrode GE of the thin film transistor TFT.

[0076] The second capacitor plate CE2 may include aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) and / or copper (Cu), and may have a single-layer or multi-layer structure including the above-mentioned materials.

[0077] The interlayer insulating layer 114 may be disposed on the second capacitor plate CE2. The interlayer insulating layer 114 may cover the second capacitor plate CE2. The interlayer insulating layer 114 may include SiO 2 、SiN X 、SiON、Al 2 O 3 、TiO 2 、 2 O 5 , HfO 2 or ZnO, etc. The interlayer insulating layer 114 may be a single layer or a multi-layer structure including the above-mentioned inorganic insulating material.

[0078] The drain electrode DE and the source electrode SE may be disposed on the interlayer insulating layer 114. The drain electrode DE and the source electrode SE may be connected to the semiconductor layer Act through the contact holes (e.g., contact openings) in the first gate insulating layer 112, the second gate insulating layer 113, and the interlayer insulating layer 114. The drain electrode DE and the source electrode SE may include a material having a relatively high conductivity. The drain electrode DE and the source electrode SE may include a conductive material such as Mo, Al, Cu, Ti, etc., and may be formed into a single layer or multilayer structure including the above-mentioned materials. For example, the drain electrode DE and the source electrode SE may have a multilayer structure of Ti / Al / Ti.

[0079] The organic insulating layer OIL may be disposed on the inorganic insulating layer IIL. The organic insulating layer OIL may include a first organic insulating layer 115 and a second organic insulating layer 116. Figure 3 An embodiment in which the organic insulating layer OIL includes two organic insulating layers is illustrated, but the present disclosure is not limited thereto. In other embodiments, the organic insulating layer OIL may include three or four organic insulating layers.

[0080] The first organic insulating layer 115 may cover the drain electrode DE and the source electrode SE. The first organic insulating layer 115 may include an organic insulating material such as a general polymer such as polymethyl methacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenol group, an acrylic polymer, an imide-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a paraxylene-based polymer, a vinyl alcohol-based polymer, and a mixture thereof.

[0081] The connection electrode CM may be arranged on the first organic insulating layer 115. The connection electrode CM may be connected to the drain electrode DE or the source electrode SE through a contact hole (e.g., a contact opening) in the first organic insulating layer 115. The connection electrode CM may include a material having a relatively high conductivity. The connection electrode CM may include a conductive material such as Mo, Al, Cu, Ti, etc., and may be formed into a single layer or multilayer structure including the above materials. For example, the connection electrode CM may have a multilayer structure of Ti / Al / Ti.

[0082] The second organic insulating layer 116 may be disposed on the connection electrode CM. The second organic insulating layer 116 may cover the connection electrode CM. The second organic insulating layer 116 may include the same material as that of the first organic insulating layer 115 or a different material.

[0083] The light emitting diode may be disposed on the second organic insulating layer 116. For example, an organic light emitting diode OLED may be disposed on the second organic insulating layer 116. In another embodiment, an inorganic light emitting diode or the like may be disposed on the second organic insulating layer 116.

[0084] The organic light emitting diode OLED may emit red light, green light, or blue light, or red light, green light, blue light, or white light. The organic light emitting diode OLED may include a first electrode 211, an emission layer 212b, a functional layer 212f, a second electrode 213, and a capping layer 215. The first electrode 211 may be a pixel electrode (e.g., an anode) of the organic light emitting diode OLED, and the second electrode 213 may be an opposing electrode (e.g., a cathode) of the organic light emitting diode OLED.

[0085] The first electrode 211 may be disposed on the second organic insulating layer 116. The first electrode 211 may be electrically connected to the connection electrode CM through a contact hole (e.g., a contact opening) defined in the second organic insulating layer 116. The first electrode 211 may include an indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In 2 O 3 ), indium gallium oxide (IGO) or aluminum zinc oxide (AZO). In an embodiment, the first electrode 211 may include a reflective film including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr or a compound thereof. In an embodiment, the first electrode 211 may further include a conductive oxide of ITO, IZO, ZnO or In above and / or below the reflective film. 2 O 3 For example, the first electrode 211 may have a multi-layer structure of ITO / Ag / ITO.

[0086] A pixel defining layer 118 in which an opening for exposing at least a portion of the first electrode 211 is defined may be disposed on the first electrode 211. An emission region of light emitted from the organic light emitting diode OLED may be defined by the opening defined in the pixel defining layer 118. For example, a width of the opening in the pixel defining layer 118 may correspond to a width of the emission region.

[0087] The pixel defining layer 118 may include an organic insulating material. In another embodiment, the pixel defining layer 118 may include an inorganic insulating material such as silicon nitride, silicon oxynitride, or silicon oxide. In another embodiment, the pixel defining layer 118 may include an organic insulating material and an inorganic insulating material. In an embodiment, the pixel defining layer 118 may include a light-blocking material. The light-blocking material may include carbon black, carbon nanotubes, a resin or paste containing a black dye, metal particles (such as nickel, aluminum, molybdenum, and alloys thereof), metal oxide particles (e.g., chromium oxide), metal nitride particles (e.g., chromium nitride), etc. When the pixel defining layer 118 includes a light-blocking material, external light reflection caused by a metal structure disposed below the pixel defining layer 118 may be reduced.

[0088] The spacer 119 may be disposed on the pixel defining layer 118. The spacer 119 may include an organic insulating material such as polyimide. In another embodiment, the spacer 119 may include an organic insulating material such as SiN X or SiO 2 of inorganic insulating materials, or including organic insulating materials and inorganic insulating materials.

[0089] In an embodiment, the spacer 119 may include the same material as that of the pixel defining layer 118. In such an embodiment, the pixel defining layer 118 and the spacer 119 may be formed together in a mask process by using a half-tone mask, etc. In another embodiment, the spacer 119 and the pixel defining layer 118 may include different materials from each other.

[0090] The emission layer 212b may be disposed in the opening in the pixel defining layer 118. The emission layer 212b may include a polymer or a low molecular weight organic material configured to emit light of a specific color.

[0091] The functional layer 212f may include a first functional layer 212a and a second functional layer 212c. The first functional layer 212a may be disposed between the first electrode 211 and the emission layer 212b, and the second functional layer 212c may be disposed between the emission layer 212b and the second electrode 213. However, in some embodiments, at least one of the first functional layer 212a and the second functional layer 212c may be omitted. In the following description, an embodiment including both the first functional layer 212a and the second functional layer 212c is mainly described.

[0092] The first functional layer 212a may include a hole transport layer (HTL) and / or a hole injection layer (HIL). The second functional layer 212c may include an electron transport layer (ETL) and / or an electron injection layer (EIL). Similar to the second electrode 213 to be described below, the first functional layer 212a and / or the second functional layer 212c may be a common layer formed to completely cover the substrate 100.

[0093] The second electrode 213 may be arranged on the functional layer 212f. The second electrode 213 may include a conductive material having a low work function. For example, the second electrode 213 may include a (semi) transparent layer including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, lithium (Li), Ca, or alloys thereof. In some embodiments, the second electrode 213 may also include a (semi) transparent layer including ITO, IZO, ZnO, or In on the (semi) transparent layer including the above materials. 2 O 3 layer.

[0094] In an implementation, the capping layer 215 may be disposed on the second electrode 213. The capping layer 215 may include an inorganic material such as lithium fluoride (LiF) or / and an organic material.

[0095] The encapsulation layer 300 may be disposed on the organic light emitting diode OLED. The encapsulation layer 300 may cover the organic light emitting diode OLED. The encapsulation layer 300 may be disposed on the second electrode 213 and / or the capping layer 215. In an embodiment, the encapsulation layer 300 may include at least one inorganic encapsulation layer and at least one organic encapsulation layer. Figure 3 An embodiment is illustrated in which the encapsulation layer 300 includes a first inorganic encapsulation layer 310 , an organic encapsulation layer 320 , and a second inorganic encapsulation layer 330 which are sequentially stacked on each other.

[0096] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each include one or more inorganic materials of aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride. The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each be a single layer or multilayer structure including the above-mentioned materials. The organic encapsulation layer 320 may include a polymer material. The polymer material may include a resin (such as an epoxy resin), polyimide, polyethylene, etc. In an embodiment, the organic encapsulation layer 320 may include an acrylate.

[0097] The input detection layer 40 may be disposed on the encapsulation layer 300. The input detection layer 40 may include a first touch insulation layer 410, a second touch insulation layer 420, a first conductive layer 430, a third touch insulation layer 440, a second conductive layer 450, and a planarization layer 460.

[0098] In an embodiment, the first touch insulating layer 410 may be disposed on the second inorganic encapsulation layer 330, and the second touch insulating layer 420 may be disposed on the first touch insulating layer 410. In an embodiment, the first touch insulating layer 410 and the second touch insulating layer 420 may each include an inorganic insulating material and / or an organic insulating material. For example, the first touch insulating layer 410 and the second touch insulating layer 420 may each include an inorganic insulating material such as silicon oxide, silicon nitride, and / or silicon oxynitride.

[0099] In an embodiment, at least one of the first touch insulating layer 410 and the second touch insulating layer 420 may be omitted. For example, the first touch insulating layer 410 may be omitted. In such an embodiment, the second touch insulating layer 420 may be disposed on the second inorganic encapsulation layer 330, and the first conductive layer 430 may be disposed on the second touch insulating layer 420.

[0100] The first conductive layer 430 may be disposed on the second touch insulating layer 420, and the third touch insulating layer 440 may be disposed on the first conductive layer 430. In an embodiment, the third touch insulating layer 440 may include an inorganic insulating material and / or an organic insulating material. For example, the third touch insulating layer 440 may include an inorganic insulating material such as silicon oxide, silicon nitride, and / or silicon oxynitride.

[0101] The second conductive layer 450 may be arranged on the third touch insulating layer 440. The touch electrode TE of the input detection layer 40 may have a structure in which the first conductive layer 430 is connected to the second conductive layer 450. In another embodiment, the touch electrode TE may be formed on any one of the first conductive layer 430 and the second conductive layer 450, and may include a metal wire provided on the corresponding conductive layer. The first conductive layer 430 and the second conductive layer 450 may each include at least one of Al, Cu, Ti, Mo and ITO, and may be in a single layer or may have a multilayer structure including the above-mentioned materials. For example, the first conductive layer 430 and the second conductive layer 450 may each have a three-layer structure of titanium layer / aluminum layer / titanium layer.

[0102] In an implementation, the planarization layer 460 may cover the second conductive layer 450. The planarization layer 460 may include an organic insulating material.

[0103] Figure 4 and Figure 5 is an image with schematic overlays showing a peripheral area PA of a display device 1 according to different embodiments. Specifically, Figure 4 and Figure 5 It is shown Figure 1 Schematic superimposed images of an area A of the peripheral area PA of the display device 1 are shown in FIG.

[0104] refer to Figure 4 and Figure 5 , the first dam D1 may be disposed in the peripheral area PA of the display device 1. The first dam D1 may be disposed along Figure 1 The edge of the display area DA shown in FIG. Figure 1 The edges of the display area DA shown in FIG. 8 are arranged in parallel.

[0105] The second dam D2 may be disposed in the peripheral area PA of the display device 1. The second dam D2 may be disposed farther from the display area DA than the first dam D1. In other words, the shortest distance between the second dam D2 and the display area DA may be longer than the shortest distance between the first dam D1 and the display area DA.

[0106] The recessed portion V may be formed in the peripheral area PA of the display device 1. For example, the recessed portion V may be disposed between the first dam D1 and the display area DA. Figure 4 As shown in FIG. 1 , the recessed portion V may have an island shape. In another embodiment, as Figure 5 As shown in FIG. 1 , the depression part V may have a linear shape to extend along and in parallel with the edge of the display area DA. However, the present disclosure is not limited thereto.

[0107] Figure 6 is along Figure 4 and Figure 5 Schematic cross-sectional view of the peripheral area PA of the display device 1 taken along line II-II′ in FIG.

[0108] Figure 7 and Figure 8 is an image with schematic overlays showing an organic encapsulation layer 320 applied to the peripheral area PA of the display device 1 according to various embodiments. More specifically, Figure 7 The view (a) and Figure 8 The view (a) in FIG. 1 shows an embodiment in which the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t1, Figure 7 The view in (b) and Figure 8 The view (b) in FIG. 1 shows an embodiment in which the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t2, and Figure 7 The view in (c) and Figure 8 View (c) in FIG. 4 shows an embodiment in which the thickness of the organic encapsulating layer 320 filled in the recess V is t3.

[0109] also, Figure 7 The views (a), (b) and (c) in FIG. 1 are applied to the case where the recessed portion V has an island shape (see, for example, Figure 4) of the organic encapsulation layer 320 of the embodiment, and Figure 8 The views (a), (b) and (c) in FIG. 1 are applied to a case where the recessed portion V has a linear shape (see, for example, Figure 5 ) is an image of an organic encapsulation layer 320 of an embodiment of the present invention.

[0110] refer to Figure 6 , the first dam D1 and the second dam D2 may be disposed in the peripheral area PA of the display device 1. The first dam D1 and the second dam D2 may each be provided as at least a portion of the inorganic insulating layer IIL and at least a portion of the organic insulating layer OIL. In addition, the first dam D1 and the second dam D2 may each include at least a portion of the pixel defining layer 118. However, the present disclosure is not limited thereto. At least a portion of the spacer 119 may be disposed on top of the first dam D1 or the second dam D2.

[0111] The recessed portion V may be disposed (or formed) between the first dam D1 and the display area DA (see, for example, Figure 1 ). The recessed portion V may be a portion where at least a portion of the inorganic insulating layer IIL disposed in the peripheral area PA or at least a portion of the organic insulating layer OIL disposed in the peripheral area PA is removed. For example, the recessed portion V may be a portion where at least a portion of the inorganic insulating layer IIL disposed between the first dam D1 and the display area DA or at least a portion of the organic insulating layer OIL disposed between the first dam D1 and the display area DA is removed.

[0112] In an embodiment, the area of ​​the cross section (e.g., xy cross section) of the recessed portion V parallel to the substrate 100 may gradually decrease in a direction (e.g., in the -z direction) toward the substrate 100. In other words, in the cross section (e.g., xz cross section), the length of the recessed portion V in a first direction (e.g., in the x direction or -x direction) may uniformly decrease in a direction (e.g., in the -z direction) toward the substrate 100. In other words, the recessed portion V may become narrower as it approaches the substrate 100.

[0113] In the peripheral area PA, the first inorganic encapsulating layer 310 may be continuously disposed on the substrate 100. The organic encapsulating layer 320 may be disposed on the first inorganic encapsulating layer 310. The organic encapsulating layer 320 may be filled in the recess V provided in the peripheral area PA.

[0114] refer to Figures 6 to 8, in order to estimate the application amount of the organic encapsulation layer 320 applied to the peripheral area PA, the light 13 may be irradiated to the organic encapsulation layer 320. In more detail, the light 13 may be irradiated to estimate the application amount of the organic encapsulation layer 320 filled in the recessed portion V in the peripheral area PA. The method of estimating the application amount of the organic encapsulation layer 320 applied to the peripheral area PA may include: applying the organic encapsulation layer 320 on the substrate 100 including the display area DA and the peripheral area PA surrounding at least a portion of the display area DA; irradiating the light 13 to the organic encapsulation layer 320; and capturing an image of the peripheral area PA to which the organic encapsulation layer 320 is applied.

[0115] When the light 13 is irradiated to the transparent organic encapsulation layer 320, the organic encapsulation layer 320 may become opaque. The light 13 may have a wavelength range in the ultraviolet region. In more detail, according to the Beer-Lambert law, the absorptivity of the organic encapsulation layer 320 to ultraviolet rays may increase in proportion to the increase in the thickness of the organic encapsulation layer 320 applied to the peripheral area PA, and therefore, the opacity of the organic encapsulation layer 320 may increase. The opacity of the organic encapsulation layer 320 may change according to the thickness of the organic encapsulation layer 320 applied to the peripheral area PA.

[0116] In an embodiment, according to the opacity of the organic encapsulation layer 320 irradiated by the light 13, the thickness or application amount of the organic encapsulation layer 320 applied to the peripheral area PA may be estimated. In more detail, according to the opacity of the organic encapsulation layer 320 irradiated by the light 13, the thickness or application amount of the organic encapsulation layer 320 filled in the recessed portion V of the peripheral area PA may be estimated. As the opacity of the organic encapsulation layer 320 irradiated by the light 13 increases, the thickness of the organic encapsulation layer 320 formed in the peripheral area PA may increase. In other words, as the opacity of the organic encapsulation layer 320 decreases, the thickness of the organic encapsulation layer 320 formed in the peripheral area PA may decrease.

[0117] When the light 13 is irradiated to the organic encapsulation layer 320, the light 13 may have a wavelength range in the ultraviolet region. For example, the wavelength range of the light 13 may be in the range of about 365nm to about 395nm. When ultraviolet rays in the wavelength range of about 365nm to about 395nm are irradiated to the transparent organic encapsulation layer 320, the organic encapsulation layer 320 may absorb the ultraviolet rays to become opaque. When the wavelength range of the light 13 is less than about 365nm, the absorptivity of the organic encapsulation layer 320 to light increases, which may cause defects in the display device 1. When the wavelength range of the light 13 exceeds about 395nm, the reflectivity of the lower wiring placed in the peripheral area PA to the light 13 increases, thereby interfering with the estimation of the application amount of the organic encapsulation layer 320 according to the opacity of the organic encapsulation layer 320 in the peripheral area PA by capturing an image of the peripheral area PA, and therefore, it may become difficult to estimate the application amount of the organic encapsulation layer 320.

[0118] In an embodiment, the thickness of the organic encapsulation layer 320 filled in the recess V in the peripheral area PA may be t1, t2, or t3. Among the plurality of thicknesses of the organic encapsulation layer 320, t3 may be the largest, t1 may be the smallest, and t2 may be an amount between t1 and t3.

[0119] When the thickness of the organic encapsulation layer 320 filled in the recessed portion V in the peripheral area PA is t3 (for example, when the recessed portion V is completely filled with the organic encapsulation layer 320), the absorptivity of the organic encapsulation layer 320 to ultraviolet rays may be greater than when the thickness of the organic encapsulation layer 320 is t1 or t2. In this case, when an image of the organic encapsulation layer 320 irradiated with ultraviolet rays is captured, the opacity may be greater than the opacity when the thickness of the organic encapsulation layer 320 is t1 or t2. Figure 7 The view in (c) and Figure 8 The view (c) in FIG. 1 is an image of the organic encapsulation layer 320 irradiated with ultraviolet light when the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t3. As can be seen, the opacity of the organic encapsulation layer 320 filled in the recessed portion V is greater than t3. Figure 7 View (a) and view (b) in Figure 8 The opacity of view (a) and view (b) in .

[0120] When the thickness of the organic encapsulation layer 320 filled in the recessed portion V in the peripheral area PA is t1, the absorptivity of the organic encapsulation layer 320 to ultraviolet rays may be lower than when the thickness of the organic encapsulation layer 320 is t2 or t3. In this case, when an image of the organic encapsulation layer 320 irradiated with ultraviolet rays is captured, the opacity may be lower than when the thickness of the organic encapsulation layer 320 is t2 or t3. Figure 7 The view (a) and Figure 8 The view (a) in FIG. 1 is an image of the organic encapsulation layer 320 irradiated with ultraviolet rays when the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t1. As can be seen, the opacity of the organic encapsulation layer 320 filled in the recessed portion V is less than t1. Figure 7 View (b) and view (c) in Figure 8 The opacity of view (b) and view (c) in .

[0121] In addition, when the thickness of the organic encapsulation layer 320 filled in the recessed portion V in the peripheral area PA is t2, the absorbance of the organic encapsulation layer 320 to ultraviolet rays may be within a range between the absorbance when the thickness of the organic encapsulation layer 320 is t1 and the absorbance when the thickness of the organic encapsulation layer 320 is t3. In this case, when an image of the organic encapsulation layer 320 irradiated with ultraviolet rays is captured, the opacity may be between the opacity when the thickness of the organic encapsulation layer 320 is t1 and the opacity when the thickness of the organic encapsulation layer 320 is t3. Figure 7 The view in (b) and Figure 8 The view (b) in FIG. 1 is an image of the organic encapsulation layer 320 irradiated with ultraviolet light when the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t2. As can be seen, the opacity of the organic encapsulation layer 320 filled in the recessed portion V is Figure 7 The view (a) and Figure 8 The opacity of the view (a) in Figure 7 The view in (c) and Figure 8 The opacity of the view (c) in between.

[0122] Fig. 9 and Fig.10 is an image with schematic overlays showing a peripheral area PA of a display device 1 according to different embodiments. Specifically, Fig. 9 and Fig.10 is an image with a schematic superposition of an area A showing a peripheral area PA of a display device 1 according to various embodiments.

[0123] refer to Fig. 9 and Fig.10 , the first dam D1 may be disposed in the peripheral area PA of the display device 1. The first dam D1 may be disposed along and in parallel with an edge of the display area DA.

[0124] The recessed portion V may be disposed in the peripheral area PA of the display device 1. In more detail, the recessed portion V may be disposed between the first dam D1 and the display area DA. Fig. 9 As shown in the figure, the recessed portion V may have an island shape. Fig.10As shown in FIG. 1 , the recessed portion V may have a linear shape to be along and parallel to the edge of the display area DA. However, the present disclosure is not limited to these embodiments.

[0125] Fig.11 is along Fig. 9 and Fig.10 Schematic cross-sectional view of the peripheral area PA of the display device 1 taken along line III-III′ in FIG.

[0126] Fig.12 and Fig.13 is an image with schematic overlays showing an organic encapsulation layer 320 applied to the peripheral area PA of the display device 1 according to various embodiments. Specifically, Fig.12 View (a), View (b) and View (c) in Fig.13 View (a), view (b) and view (c) in FIG. 1 are images with schematic overlays showing an organic encapsulation layer 320 applied to the peripheral area PA of the display device 1 according to different embodiments. In more detail, Fig.12 The view (a) and Fig.13 The view (a) in FIG. 1 shows a case where the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t1. Fig.12 The view in (b) and Fig.13 The view (b) in FIG. 1 shows a case where the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t2, and Fig.12 The view in (c) and Fig.13 View (c) in FIG. 1 shows a case where the thickness of the organic encapsulating layer 320 filled in the recess V is t3.

[0127] Fig.12 View (a), view (b), and view (c) in FIG. 1 are images of the organic encapsulation layer 320 applied to an embodiment in which the recessed portion V has an island shape, and Fig.13 View (a), view (b), and view (c) in FIG. 1 are images of the organic encapsulating layer 320 applied to an embodiment in which the recessed portion V has a linear shape.

[0128] refer to Fig.11 , the recessed portion V may be disposed (or formed) between the first dam D1 and the display area DA. The recessed portion V may be a portion in which at least a portion of the inorganic insulating layer IIL disposed in the peripheral area PA or at least a portion of the organic insulating layer OIL disposed in the peripheral area PA is removed. In more detail, the recessed portion V may be a portion in which at least a portion of the inorganic insulating layer IIL disposed between the first dam D1 and the display area DA or at least a portion of the organic insulating layer OIL disposed between the first dam D1 and the display area DA is removed.

[0129] In an embodiment, the area of ​​the recessed portion V in a cross section (e.g., an xy cross section) parallel to the substrate 100 may be constant in a direction (e.g., a z direction or a −z direction) perpendicular to the substrate 100. In other words, in the cross section (e.g., an xz cross section), the length of the recessed portion V in a first direction (e.g., an x ​​direction or a −x direction) may be constant. In other words, the recessed portion V may have parallel or substantially parallel sidewalls.

[0130] In the peripheral area PA, the first inorganic encapsulating layer 310 may be continuously disposed on the substrate 100. The organic encapsulating layer 320 may be disposed on the first inorganic encapsulating layer 310. The organic encapsulating layer 320 may be filled in the recess V provided in the peripheral area PA.

[0131] refer to Figures 11 to 13 , in order to estimate the application amount of the organic encapsulation layer 320 applied to the peripheral area PA, the light 13 may be irradiated to the organic encapsulation layer 320. In order to estimate the application amount of the organic encapsulation layer 320 applied to the peripheral area PA, the method of estimating the application amount of the organic encapsulation layer 320 applied to the peripheral area PA may include: applying the organic encapsulation layer 320 on the substrate 100 including the display area DA and the peripheral area PA surrounding at least a portion of the display area DA; irradiating the light 13 to the organic encapsulation layer 320; and capturing an image of the peripheral area PA to which the organic encapsulation layer 320 is applied.

[0132] In an embodiment, the thickness of the organic encapsulation layer 320 filled in the recess V in the peripheral area PA may be t1, t2, or t3. Among the thicknesses of the organic encapsulation layer 320, t3 may be the largest, t1 may be the smallest, and t2 may be between t1 and t3.

[0133] When the thickness of the organic encapsulation layer 320 filled in the recessed portion V in the peripheral area PA is t3, the absorptivity of the organic encapsulation layer 320 to ultraviolet rays may be greater than when the thickness of the organic encapsulation layer 320 is t1 or t2. In this case, when an image of the organic encapsulation layer 320 irradiated with ultraviolet rays is captured, the opacity may be greater than when the thickness of the organic encapsulation layer 320 is t1 or t2. Fig.12 The view in (c) and Fig.13 The view (c) in FIG. 1 is an image of the organic encapsulation layer 320 irradiated with ultraviolet light when the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t3. As can be seen, the opacity of the organic encapsulation layer 320 filled in the recessed portion V is greater than t3. Fig.12 View (a) and view (b) in Fig.13 The opacity is shown in view (a) and view (b).

[0134] When the thickness of the organic encapsulation layer 320 filled in the recessed portion V in the peripheral area PA is t1, the absorptivity of the organic encapsulation layer 320 to ultraviolet rays may be lower than when the thickness of the organic encapsulation layer 320 is t2 or t3. In this case, when an image of the organic encapsulation layer 320 irradiated with ultraviolet rays is captured, the opacity may be lower than when the thickness of the organic encapsulation layer 320 is t2 or t3. Fig.12 The view (a) and Fig.13 The view (a) in FIG. 1 is an image of the organic encapsulation layer 320 irradiated with ultraviolet rays when the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t1. As can be seen, the opacity of the organic encapsulation layer 320 filled in the recessed portion V is less than t1. Fig.12 View (b) and view (c) in Fig.13 The opacity is shown in view (b) and view (c).

[0135] In addition, when the thickness of the organic encapsulation layer 320 filled in the recessed portion V in the peripheral area PA is t2, the absorptivity of the organic encapsulation layer 320 to ultraviolet rays may be between the absorptivity when the thickness of the organic encapsulation layer 320 is t1 and the absorptivity when the thickness of the organic encapsulation layer 320 is t3. In this state, when an image of the organic encapsulation layer 320 irradiated with ultraviolet rays is captured, the opacity may be between the opacity when the thickness of the organic encapsulation layer 320 is t1 and the opacity when the thickness of the organic encapsulation layer 320 is t3. Fig.12 The view in (b) and Fig.13 The view (b) in FIG. 1 is an image of the organic encapsulation layer 320 irradiated with ultraviolet light when the thickness of the organic encapsulation layer 320 filled in the recessed portion V is t2. As can be seen, the opacity of the organic encapsulation layer 320 filled in the recessed portion V is Fig.12 The view (a) and Fig.13 The opacity shown in view (a) is Fig.12 The view in (c) and Fig.13 The opacity is shown in view (c).

[0136] When the organic encapsulation layer 320 is applied to (or extends to) the outer edge of the first dam D1 in the peripheral area PA of the display device 1, the organic encapsulation layer 320 may become a moisture permeation path of the display device 1, and thus, a defect may be generated in the display device 1. Therefore, it may be important to estimate the application amount of the organic encapsulation layer 320 applied to the peripheral area PA of the display device 1 in the manufacturing method.

[0137] When the organic encapsulation layer 320 is filled in the recess V between the first dam D1 and the display area DA, since the organic encapsulation layer 320 is a diffusive fluid, it is difficult to estimate a specific thickness and an applied amount of the organic encapsulation layer 320 filled in the recess V.

[0138] In an embodiment, the thickness and application amount of the organic encapsulation layer 320 applied to the peripheral area PA (e.g., filled in the recessed portion V) can be estimated according to the opacity of the organic encapsulation layer 320 irradiated with ultraviolet rays. In the image of the organic encapsulation layer 320, the thickness and application amount of the organic encapsulation layer 320 can be accurately estimated according to the opacity of the organic encapsulation layer 320, and the degree of ashing can be estimated in detail in the process of ashing at least a portion of the organic encapsulation layer 320 before forming the second inorganic encapsulation layer 330 on the organic encapsulation layer 320. Therefore, efficiency and reliability can be improved in the process of manufacturing the display device 1.

[0139] As described above, according to the embodiments, a method of manufacturing a display device with improved efficiency and reliability may be implemented. The scope of the present disclosure is not limited by the above aspects and features.

[0140] It should be understood that the embodiments described herein should be considered in a descriptive sense rather than for limiting purposes. The description of features or aspects in each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Although the embodiments of the present disclosure have been described with reference to the figures, it will be understood by those of ordinary skill in the art that various modifications in form and detail may be made therein without departing from the spirit and scope as defined by the appended claims and their equivalents.

Claims

1. A method for manufacturing a display device, the method comprising: applying an organic encapsulation layer to a substrate of the display device, the substrate having a display area and a peripheral area extending at least partially around the display area; irradiating light to the organic encapsulation layer; as well as An image of the peripheral area to which the organic encapsulation layer is applied is captured.

2. The method for manufacturing a display device according to claim 1, further comprising: After capturing the image of the peripheral area, an applied amount of the organic encapsulation layer applied to the peripheral area is estimated.

3. The method for manufacturing a display device according to claim 1, wherein: When the light is irradiated to the organic encapsulation layer, the organic encapsulation layer irradiated with the light becomes opaque.

4. The method for manufacturing a display device according to claim 3, wherein: An applied amount of the organic encapsulation layer is estimated according to the opacity of the organic encapsulation layer to which the light is irradiated.

5. The method for manufacturing a display device according to claim 3, wherein: As the thickness of the applied organic encapsulating layer increases, the opacity of the organic encapsulating layer increases.

6. The method for manufacturing a display device according to claim 1, wherein: The display device includes a first dam in the peripheral area.

7. The method for manufacturing a display device according to claim 6, wherein: The display device has a recessed portion in the peripheral region between the first dam and the display region.

8. The method for manufacturing a display device according to claim 7, wherein: An area of ​​a cross section of the recessed portion parallel to the substrate decreases in a direction toward the substrate.

9. The method for manufacturing a display device according to claim 8, wherein: The recessed portion has an island shape.

10. The method for manufacturing a display device according to claim 7, wherein: An area of ​​a cross section of the recessed portion parallel to the substrate is constant in a direction perpendicular to the substrate.

Images