System and method for open gate detector for inverter for electric vehicle

By designing a system to detect the gate opening condition of the phase switcher in the inverter, the efficiency and reliability problems caused by incorrect gate operation in the inverter are solved, and more efficient and reliable inverter operation is achieved.

CN119790595APending Publication Date: 2025-04-08BORGWARNER US TECHNOLOGIES LLC
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Patent Information

Application Number
CN202380061693.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-02-17
Filing Date
2023-09-25
Publication Date
2025-04-08

AI Technical Summary

Technical Problem

Incorrect gate operation of phase switches in the inverter may affect the operation of the inverter, resulting in reduced efficiency and reliability.

Method used

A system is designed that includes an inverter, a power module and a controller. The power module includes a first phase switch and a second phase switch, and the controller optimizes its operation by detecting the gate opening condition of these switches. Specifically, the controller uses a current source to turn on the switch, store the time before the gate voltage reaches the threshold, and turn off the switch to detect the gate opening condition.

Benefits of technology

By monitoring and detecting the gate opening status of the phase switch parts in real time, the system can optimize the operation of the inverter, extend the system service life, and improve the reliability and efficiency of the inverter.

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Abstract

A system includes an inverter configured to convert DC power from a battery to AC power to drive a motor, where the inverter includes: a power module including: a first phase switch including one or more first phase power switches; a second phase switching member, wherein the second phase switching member comprises one or more second phase power switching members; and one or more controllers configured to detect a gate open condition of the first phase switching member or the second phase switching member.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 377,486 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,501 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,512 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 378,601 filed on October 6, 2022, and U.S. Non-Provisional Patent Application No. 18 / 171,105 filed on February 17, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of the present disclosure generally relate to systems and methods for a gate open detector for an inverter for an electric vehicle, and more particularly to systems and methods for a gate open detector for a phase switching device of an inverter for an electric vehicle. Background Art

[0004] Inverters, such as those used to drive motors in electric vehicles, are responsible for converting high voltage direct current (HVDC) to alternating current (AC) to drive the motor, for example. In an inverter, incorrect gate operation of phase switching elements may affect the operation of the inverter.

[0005] The present disclosure is directed to overcoming one or more of these aforementioned challenges. Summary of the invention

[0006] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: a power module comprising: a first phase switching element, the first phase switching element comprising one or more first phase power switching elements; a second phase switching element, the second phase switching element comprising one or more second phase power switching elements; and one or more controllers, the one or more controllers being configured to detect a gate opening condition of the first phase switching element or the second phase switching element.

[0007] In some aspects, the technology described herein relates to a system wherein one or more of the first phase power switch or the second phase power switch includes one or more silicon carbide grains.

[0008] In some aspects, the technology described herein relates to a system wherein a first phase switch is configured to be connected between a positive terminal of a battery and a phase terminal of a motor, and wherein a second phase switch is configured to be connected between a positive terminal of a battery and a phase terminal of a motor.

[0009] In some aspects, the technology described herein relates to a system wherein the one or more controllers include one or more current sources.

[0010] In some aspects, the technology described herein relates to a system wherein the one or more controllers are configured to turn on a first phase switch element using the one or more current sources, store a first time before a gate voltage of the first phase switch element reaches a threshold, and turn off the first phase switch element.

[0011] In some aspects, the technology described herein relates to a system wherein the one or more controllers are configured to turn on a second phase switching element using the one or more current sources, store a second time before a gate voltage of the second phase switching element reaches a threshold, and turn off the second phase switching element.

[0012] In some aspects, the technology described herein relates to a system in which the one or more controllers are configured to detect a gate-open condition of a first phase switching element or a second phase switching element based on a difference between a first time and a second time.

[0013] In some aspects, the technology described herein relates to a system that further includes a battery configured to supply DC power to the inverter and a motor configured to receive AC power from the inverter to drive the motor.

[0014] In some aspects, the technology described herein relates to a system comprising: a power module, the power module being for an inverter, the power module comprising: a first phase switching element, the first phase switching element comprising one or more first phase power switching elements; a second phase switching element, the second phase switching element comprising one or more second phase power switching elements; and one or more controllers, the one or more controllers being configured to detect a gate opening condition of the first phase switching element or the second phase switching element.

[0015] In some aspects, the technology described herein relates to a system in which the one or more controllers are configured to detect a gate-open condition of a first phase switching element or a second phase switching element based on a temperature of the first phase switching element or the second phase switching element.

[0016] In some aspects, the technology described herein relates to a system in which the one or more controllers are configured to detect a gate-open condition of a first phase switching element or a second phase switching element based on a time difference between operation of the first phase switching element and operation of the second phase switching element.

[0017] In some aspects, the technology described herein relates to a system wherein the one or more controllers include one or more current sources configured to operate each of the first phase switch and the second phase switch.

[0018] In some aspects, the technology described herein relates to a system wherein the one or more controllers include one or more point-of-use controllers on a power module having a first phase switch and a second phase switch.

[0019] In some aspects, the technology described herein relates to a system wherein a first phase switch is configured to be connected between a negative terminal of a battery and a phase terminal of a motor, and wherein a second phase switch is configured to be connected between a negative terminal of a battery and a phase terminal of a motor.

[0020] In some aspects, the technology described herein relates to a system comprising: one or more point-of-use controllers, the one or more point-of-use controllers being directed to a power module, the one or more point-of-use controllers being configured to: operate a first phase switching element of the power module; operate a second phase switching element of the power module; and detect a gate opening condition of the first phase switching element or the second phase switching element based on a time difference between the operation of the first phase switching element and the operation of the second phase switching element.

[0021] In some aspects, the technology described herein relates to a system wherein, in order to operate a first phase switching element of a power module, the one or more point-of-use controllers are configured to: turn on the first phase switching element using one or more current sources of the one or more point-of-use controllers; store a first time before a gate voltage of the first phase switching element reaches a threshold; and turn off the first phase switching element.

[0022] In some aspects, the technology described herein relates to a system wherein, in order to operate a second phase switching element of a power module, the one or more point-of-use controllers are configured to: turn on the second phase switching element using the one or more current sources of the one or more point-of-use controllers; store a second time before a gate voltage of the second phase switching element reaches a threshold; and turn off the second phase switching element.

[0023] In some aspects, the technology described herein relates to a system in which the one or more point-of-use controllers are configured to detect a gate-open condition of a first phase switch or a second phase switch based on a difference between a first time and a second time.

[0024] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to: store a difference between a first time and a second time as a first difference time; repeat a gate opening detection operation and store the difference between the first time and the second time as a second difference time; and detect a gate opening condition of a first phase switching element or a second phase switching element based on the difference between the first difference time and the second difference time.

[0025] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to detect a gate-opening condition of a first phase switching element or a second phase switching element based on a difference between a first difference time and a second difference time, and to compensate for changes in temperature of the first phase switching element or the second phase switching element during a gate-opening detection operation up to the first difference time and a gate-opening detection operation up to the second difference time.

[0026] Other objects and advantages of the disclosed embodiments will be described in part in the following description, and in part will be obvious from the description, or can be understood by practicing the disclosed embodiments. The objects and advantages of the disclosed embodiments will be realized and achieved by means of the elements and combinations particularly pointed out in the appended claims.

[0027] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various exemplary embodiments and, together with the description, serve to explain the principles of the disclosed embodiments.

[0029] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter is depicted according to one or more embodiments.

[0030] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 An exemplary system infrastructure of a combined inverter and converter.

[0031] Figure 3 Describes a method for Figure 2 An exemplary system infrastructure for a controller of FIG.

[0032] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure for a point-of-use switching controller.

[0033] Figure 5 Describes a method for Figure 4 An exemplary system infrastructure of an upper power module.

[0034] Figure 6 Depicted are exemplary power modules including integrated gate drivers and gate-open detectors for power device switches according to one or more embodiments.

[0035] Figure 7 An exemplary graph depicting gate opening operation of an open gate detector according to one or more embodiments is depicted. DETAILED DESCRIPTION

[0036] Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not constrain the claimed features. As used herein, the terms "comprises," "comprising," "has," "having," "includes," "including," or other variations thereof are intended to encompass non-exclusive inclusions such that a process, method, article, or device that includes a series of elements includes not only those elements, but may also include other elements that are not explicitly listed or inherent to such process, method, article, or device. In the present disclosure, unless otherwise stated, relative terms (such as, for example, "about," "substantially," and "approximately") are used to indicate possible ±10% variations in the stated values. In the present disclosure, unless otherwise stated, any numerical value may include possible ±10% variations in the stated values.

[0037] The terms used below may be interpreted in their broadest reasonable manner, although they are being used in conjunction with a detailed description of certain specific examples of the present disclosure. Indeed, certain terms may even be emphasized below; however, any term intended to be interpreted in any constrained manner will be explicitly and specifically defined as such in this detailed description. For example, in the context of the present disclosure, a switching device may be described as a switching element or device, but may refer to any device for controlling power flow in a circuit. For example, a switching element may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT) or a relay, or any combination thereof, but is not limited thereto.

[0038] Various embodiments of the present disclosure generally relate to systems and methods for a gate open detector for an inverter for an electric vehicle, and more particularly to systems and methods for a gate open detector for a phase switching device of an inverter for an electric vehicle.

[0039] Inverters (such as those used to drive motors in electric vehicles) are responsible for converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. A three-phase inverter may include a bridge having six power device switches (e.g., power transistors such as IGBTs or MOSFETs) that are controlled by pulse width modulation (PWM) signals generated by a controller. The inverter may include three half-H-bridge switches to control phase voltages, upper and lower gate drivers to control the switches, a PWM controller, and glue logic between the PWM controller and the gate driver. The PWM controller may generate signals to define the expected state of the system. The gate driver may send signals from the PWM controller to the half-H-bridge switches. The half-H-bridge switches may drive the phase voltages. The inverter may include an isolation barrier between a low voltage plane and a high voltage plane. The signal may be passed from the PWM controller to the half-H-bridge switch by passing through the isolation barrier, which may employ optical, converter-based, or capacitor-based isolation. The PWM signal may be distorted when passing through the glue logic, which may include resistive, capacitive, or other types of filtering. Due to the electrical isolation barrier and other delays within the gate driver, the PWM signal may be distorted when passing through the gate driver. The PWM signal may be distorted when the signal is processed by the half-H switching element via the gate driver output.

[0040] Gate drivers withstand common-mode transients that occur during field effect transistor (FET) switching and when one side of a floating high voltage terminal is shorted to ground or subjected to electrostatic discharge. These voltage transients can cause fast edges that can form common-mode current bursts through electrical isolation. Gate drivers may need to demonstrate common-mode transient immunity (CMTI) in order to be effective and safe.

[0041] The gate driver may have a high voltage domain in common with the voltage plane of the associated FET. Further, the high voltage plane may be supplied by a flyback converter, which may be isolated from the low voltage plane by a transformer. The high voltage domain power supply may be used to provide power to such a circuit that sources and sinks gate current to drive the FET and can detect FET faults, thereby acting on the faults and / or transmitting the faults to the low voltage domain. The gate driver may include an electrical channel dedicated to FET commands, and one or more bidirectional or unidirectional electrical channels dedicated to FET communications.

[0042] High current switching transients can form strong electromagnetic (EM) fields that can couple into nearby metal traces. The magnitude and frequency of the coupled current can depend on the layout of the FET packaging solution and the direction and length of the metal traces between the FET and the control integrated circuit (IC). For example, a typical value for the coupled current can be up to 1A at an AC frequency of up to 100MHz. Typically, within the circuit, the gate driver IC can be placed far enough away from the FET so that the high EM field is not directly coupled into the internal metal traces within the gate driver IC. The gate driver is placed at a distance from the EM field so that the induced current within the circuit is below the level that will cause the gate driver to malfunction, or a metal shield is placed between the gate driver and the source of the EM field to protect the gate driver circuit. The output terminals of the gate driver connected to the FET are exposed to the EM field at a point where the output terminals are no longer covered by the shield. The gate driver switches large currents (e.g., such as 5A to 15A) through these exposed terminals. The large currents switched are usually larger in magnitude than the EM induced current. The gate driver can overdrive the induced current to maintain control of the FET. The gate driver and the high side of the FET may share a common ground and gate control signal trace, both of which may be susceptible to coupled currents.

[0043] The gate driver can turn on low resistance switches to source and sink gate current. Sometimes a series resistor can be added to limit the gate current. The switched gate current can be greater than the coupling current in order to maintain control of their respective FETs.

[0044] The gate driver may be able to sense the FET operating voltage or current in order to provide feedback and react to faults. An overcurrent fault may typically be detected by sensing the FET drain-to-source voltage and comparing the sensed voltage to a reference value. The sensed voltage may be heavily filtered to reject coupled currents. Filtering may slow the response to a fault condition, causing a delay in response. For example, the rate of current increase due to a low resistance short may reach damaging levels before being detected by a heavily filtered drain-to-source voltage detection strategy. The resulting short may damage the FET or the vehicle before being detected and turned off.

[0045] According to one or more embodiments, a FET driver circuit may provide fast overcurrent detection by shunt current sensing, or by diverting a portion of the load current through a parallel FET that may have a current sensing circuit. Utilizing either strategy may require a "point of use IC" in which the sensing circuit is very close to the FET. Even if the point of use IC and the remote controller are resistant to EM fields, the communication between the point of use IC and the remote controller is still susceptible to induced currents. Point of use ICs have been implemented in low EM field applications, such as smart FETs for automotive applications. However, point of use ICs have not yet been used in high EM field applications. High EM fields can be fields that (i) induce a current within the IC that exceeds the operating current of the IC and causes a malfunction, or (ii) induce a differential voltage within the IC that exceeds the operating differential voltage and causes a malfunction. High EM fields can be, for example, fields greater than about 10A or about 100V.

[0046] For example, compared to IGBT switches, silicon carbide (SiC) switches may have superior performance in fast switching and high power applications. However, when the device is exposed to high temperatures, SiC grains may be more susceptible to grain and package related defects. Such degradation may affect the robustness of the inverter and may ultimately cause system failure due to SiC device failure. One or more embodiments may provide a SiC MOSFET degradation monitoring system, which includes a gate opening detection system. The degradation monitoring system may be included in a power module to check the health of the device over the service life of the device. If a gate opening occurs in the power module, the gate may be turned on and floated and may cause system failure. Therefore, detecting a gate opening fault may be an important consideration for the power module, and the system should enter a safe state when a gate opening occurs. One or more embodiments may monitor and detect fault conditions of SiC power devices in real time to extend system service life and reliability. One or more embodiments may avoid costly and unexpected system shutdowns through preventive maintenance implemented by effective on-board diagnostics including gate opening detection.

[0047] One or more embodiments may provide a gate open diagnostic that is performed over the useful life of the component. One or more embodiments may provide gate open detection data stored in a memory when a gate open detection operation is performed during system power-on. Gate open conditions may be caused by harsh environmental conditions and adverse electrothermal operating conditions. Mechanical stresses may accumulate during wire bonding operations and die attachment at solder joints due to thermal coefficient mismatch, and these stresses may cause package-level open and short circuit phenomena. In SiC MOSFETs, tunneling of electrons near interfaces may be a prominent aging effect, and relatively thin gate oxides and large electric fields may cause oxide degradation. Improper soldering or die attachment of gate terminals may cause gate open conditions and device failure.

[0048] When SiC FETs are used for gate drivers, it may become difficult to track the correct gate connectivity for all parallel SiC FETs when the gates of the SiC FETs are not accessible from the outside. One or more embodiments may provide an integrated circuit that is enclosed in a power module with SiC FETs that is used to detect whether the gate is intact or in an open condition for one or more SiC FETs. One or more embodiments may provide a non-invasive method for gate open detection that can be used to determine the performance of SiC FETs throughout the useful life of the device and during end-of-line testing. One or more embodiments may provide a gate open detection measurement that is compensated for temperature and system-level offset errors. This compensation can improve the accuracy of the overall measurement system.

[0049] One or more embodiments may use a current source to turn on a first SiC device, store the time before the gate voltage of the first SiC device reaches a threshold, and turn off the first SiC device. One or more embodiments may use the same current source to turn on a second SiC device, store the time before the gate voltage of the second SiC device reaches the same threshold, and turn off the second SiC device. The difference between the time when the first SiC device reaches the threshold and the time when the second SiC device reaches the threshold may be used to determine whether a gate open condition has occurred.

[0050] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter according to one or more embodiments is depicted. In the context of the present disclosure, the combined inverter and converter may be referred to as an inverter. Figure 1 As shown, the electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include a component for receiving electric power from an external source and outputting electric power to charge the battery 195 of the electric vehicle 100. For example, the inverter 110 may convert DC power from the battery 195 in the electric vehicle 100 into AC power to drive the motor 190 of the electric vehicle 100, but the embodiment is not limited thereto. For example, the inverter 110 may be bidirectional and may convert DC power into AC power, or convert AC power into DC power, such as during regenerative braking. The inverter 110 may be a three-phase inverter, a single-phase inverter, or a multi-phase inverter.

[0051] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1The electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include an inverter controller 300 ( Figure 3 14). The inverter 110 may include a low voltage upper phase controller 120 separated from a high voltage upper phase controller 130 by an electrical isolator 150, and an upper phase power module 140. The upper phase power module 140 may include a point-of-use upper phase controller 142 and an upper phase switch 144. The inverter 110 may include a low voltage lower phase controller 125 separated from a high voltage lower phase controller 135 by an electrical isolator 150, and a lower phase power module 145. The lower phase power module 145 may include a point-of-use lower phase controller 146 and a lower phase switch 148. The upper phase switch 144 and the lower phase switch 148 may be connected to a motor 190 and a battery 195. The electrical isolator 150 may be one or more of optical, converter-based, or capacitor-based isolation. For example, the electrical isolator 150 may be one or more capacitors having a value from about 20 fF to about 100 fF, having a breakdown voltage from about 6 kV to about 12 kV. The electrical isolator 150 may include a pair of capacitors, wherein one capacitor in the pair carries an inverted data signal from the other capacitor in the pair to form a differential signal that is rejected for common mode noise. The electrical isolator 150 may include more than one capacitor in series. The electrical isolator 150 may include one capacitor located on a first IC, or may include a first capacitor located on a first IC and a second capacitor located on a second IC that communicates with the first IC.

[0052] The inverter 110 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 150. The inverter controller 300 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the low voltage upper phase controller 120. The low voltage upper phase controller 120 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the high voltage upper phase controller 130. The low voltage upper phase controller 120 may send a signal to and receive a signal from the low voltage lower phase controller 125. The high voltage upper phase controller 130 may be in the high voltage region of the inverter 110. Therefore, the signal between the low voltage upper phase controller 120 and the high voltage upper phase controller 130 passes through the electrical isolator 150. The high voltage upper phase controller 130 may send signals to and receive signals from a point-of-use upper phase controller 142 in the upper phase power module 140. The point-of-use upper phase controller 142 may send signals to and receive signals from an upper phase switch 144. The upper phase switch 144 may be connected to a motor 190 and a battery 195. For example, the upper phase switch 144 and the lower phase switch 148 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 110 may be similar to the upper phase system described above.

[0053] Figure 3 Describes a method for Figure 2 FIG. 3 is an exemplary system infrastructure of an inverter controller 300 . The inverter controller 300 may include one or more controllers.

[0054] The inverter controller 300 may include a set of instructions that can be executed to cause the inverter controller 300 to perform any one or more of the methods or computer-based functions disclosed herein. The inverter controller 300 may operate as a standalone device, or may be connected to other computer systems or peripheral devices, for example using a network.

[0055] In a networked deployment, the inverter controller 300 can operate in the capacity of a server, or as a client in a server-client user network environment, or as a peer computer system in a peer (or distributed) network environment. The inverter controller 300 can also be implemented as or incorporated into various devices, such as a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile device, a palmtop computer, a laptop computer, a desktop computer, a communication device, a wireless phone, a landline phone, a control system, a camera, a scanner, a fax machine, a printer, a pager, a personal trusted device, a network device, a network router, a switch or bridge, or any other machine capable of executing a set of instructions (sequentially or otherwise) (the set of instructions specifies the actions to be taken by the machine). In a specific implementation, the inverter controller 300 can be implemented using an electronic device that provides voice, video or data communication. Further, although the inverter controller 300 is illustrated as a single system, the term “system” should also be understood to include any collection of systems or subsystems that individually or jointly execute one or more sets of instructions to perform one or more computer functions.

[0056] like Figure 3 As shown, the inverter controller 300 may include a processor 302, such as a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor 302 may be a component in a variety of systems. For example, the processor 302 may be part of a standard inverter. The processor 302 may be one or more general-purpose processors, digital signal processors, application-specific integrated circuits, field programmable gate arrays, servers, networks, digital circuits, analog circuits, combinations thereof, or other devices now known or later developed for analyzing and processing data. The processor 302 may implement a software program, such as a manually generated (i.e., programmed) code.

[0057] The inverter controller 300 may include a memory 304 that can communicate via a bus 308. The memory 304 may be a main memory, a static memory, or a dynamic memory. The memory 304 may include, but is not limited to, computer-readable storage media, such as various types of volatile and non-volatile storage media, including but not limited to random access memory, read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable read-only memory, flash memory, tape or disk, optical media, etc. In one specific implementation, the memory 304 includes a cache or random access memory for the processor 302. In an alternative specific implementation, the memory 304 is separated from the processor 302, such as a cache memory, system memory, or other memory of the processor. The memory 304 may be an external storage device or database for storing data. Examples include a hard drive, a compact disk ("CD"), a digital video disk ("DVD"), a memory card, a memory stick, a floppy disk, a universal serial bus ("USB") storage device, or any other device operable to store data. The memory 304 is operable to store instructions that can be executed by the processor 302. The functions, actions, or tasks illustrated in the figures or described herein may be performed by the processor 302 executing instructions stored in the memory 304. The functions, actions, or tasks are not related to a particular type of instruction set, storage medium, processor, or processing strategy, and may be performed by software, hardware, integrated circuits, firmware, microcode, etc. operating alone or in combination. Likewise, processing strategies may include multi-processing, multi-tasking, parallel processing, etc.

[0058] As shown, the inverter controller 300 may further include a display 310, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a flat panel display, a solid state display, a cathode ray tube (CRT), a projector, a printer, or other display devices known now or later developed for outputting the determined information. The display 310 may serve as an interface for a user to view the operation of the processor 302, or specifically serve as an interface with the software stored in the memory 304 or in the drive unit 306.

[0059] Additionally or alternatively, the inverter controller 300 may include an input device 312 configured to allow a user to interact with any of the components of the inverter controller 300. The input device 312 may be a numeric keypad, a keyboard or a cursor control device (such as a mouse or a joystick), a touch screen display, a remote control, or any other device operable to interact with the inverter controller 300.

[0060] The inverter controller 300 may also or alternatively include a drive unit 306 implemented as a disk or optical drive. The drive unit 306 may include a computer-readable medium 322 in which one or more sets of instructions 324 (e.g., software) may be embedded. Further, the instructions 324 may embody one or more of the methods or logics described herein. The instructions 324 may reside completely or partially within the memory 304 and / or within the processor 302 during execution by the inverter controller 300. The memory 304 and the processor 302 may also include computer-readable media as described above.

[0061] In some systems, the computer-readable medium 322 includes instructions 324 or receives and executes instructions 324 in response to a propagated signal, so that a device connected to the network 370 can transmit voice, video, audio, images, or any other data through the network 370. Further, the instructions 324 can be transmitted or received through the network 370 and / or using the bus 308 via the communication port or interface 320. The communication port or interface 320 can be part of the processor 302 or can be an independent component. The communication port or interface 320 can be formed in software or can be a physical connector in hardware. The communication port or interface 320 can be configured to connect to the network 370, external media, display 310, or any other component in the inverter controller 300, or a combination thereof. The connection to the network 370 can be a physical connection (such as a wired Ethernet connection) or can be established wirelessly, as described below. Similarly, additional connections to other components of the inverter controller 300 can be physical connections or can be established wirelessly. The network 370 can alternatively be directly connected to the bus 308.

[0062] Although the computer-readable medium 322 is shown as a single medium, the term "computer-readable medium" may include a single medium or multiple media (such as a centralized or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" may also include any medium capable of storing, encoding, or carrying a set of instructions for execution by a processor or causing a computer system to perform any one or more of the methods or operations disclosed herein. The computer-readable medium 322 may be non-transitory and may be tangible.

[0063] Computer readable medium 322 may include solid-state memory, such as a memory card or other package that accommodates one or more non-volatile read-only memories. Computer readable medium 322 may be random access memory or other volatile rewritable memory. Additionally or alternatively, computer readable medium 322 may include magneto-optical or optical media, such as a disk or tape or other storage device for capturing carrier signals (such as signals transmitted through a transmission medium). Digital file attachments to emails or other self-contained information archives or archive sets may be considered distribution media as tangible storage media. Therefore, the present disclosure is considered to include any one or more of computer-readable media or distribution media and other equivalents and successor media in which data or instructions may be stored.

[0064] In alternative implementations, dedicated hardware implementations (such as application specific integrated circuits, programmable logic arrays, and other hardware devices) may be constructed to implement one or more of the methods described herein. Applications that may include the apparatus and systems of various implementations may broadly include a variety of electronic and computer systems. One or more implementations described herein may use two or more specific interconnected hardware modules or devices with associated control and data signals that may be transmitted between modules or through modules or as part of an application specific integrated circuit to implement functionality. Thus, the present system encompasses software, firmware, and hardware implementations.

[0065] The inverter controller 300 may be connected to a network 370. The network 370 may define one or more networks, including wired or wireless networks. The wireless network may be a cellular telephone network, an 802.11, 802.16, 802.20, or WiMAX network. Further, such networks may include public networks (such as the Internet), private networks (such as intranets), or combinations thereof and may utilize a variety of networking protocols that are now available or later developed, including but not limited to TCP / IP-based networking protocols. The network 370 may include a wide area network (WAN) (such as the Internet), a local area network (LAN), a campus area network, a metropolitan area network, a direct connection (such as through a universal serial bus (USB) port), or any other network that allows data communication. The network 370 may be configured to couple one computing device to another computing device to enable data communication between devices. The network 370 may generally be enabled to use any form of machine-readable media to transmit information from one device to another. The network 370 may include a communication method by which information can travel between computing devices. The network 370 may be divided into subnetworks. A subnetwork may allow access to all other components connected to it, or a subnetwork may restrict access between components. Network 370 may be considered a public or private network connection and may include, for example, a virtual private network or encryption or other security mechanisms employed over the public Internet.

[0066] According to various implementations of the present disclosure, the methods described herein may be implemented by a software program that can be executed by a computer system. Further, in an exemplary non-limiting implementation, the implementation may include distributed processing, component or object distributed processing, and parallel processing. Alternatively, a virtual computer system process may be constructed to implement one or more of the methods or functionalities described herein.

[0067] Although this specification describes components and functions that can be implemented in a specific implementation with reference to specific standards and protocols, the present disclosure is not limited to such standards and protocols. For example, standards for Internet and other packet-switched network transmissions (e.g., TCP / IP, UDP / IP, HTML, HTTP) represent examples of the prior art. Such standards are periodically replaced by faster or more efficient equivalents having substantially the same functionality. Therefore, alternative standards and protocols having the same or similar functionality as those disclosed herein are considered equivalents thereof.

[0068] It will be appreciated that, in one embodiment, the operations of the methods discussed are performed by an appropriate processor (or processors) of a processing (i.e., computer) system executing instructions (computer readable code) stored in a storage device. It will also be appreciated that the present disclosure is not limited to any particular implementation or programming technique, and that the present disclosure may be implemented using any suitable technique for implementing the functionality described herein. The present disclosure is not limited to any particular programming language or operating system.

[0069] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure of a point-of-use switching controller. For a three-phase inverter, each of the upper phase and the lower phase may include three phases related to phases A, B, and C. For example, the upper phase power module 140 may include an upper phase power module 140A for upper phase A, an upper phase power module 140B for upper phase B, and an upper phase power module 140C for upper phase C. The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switching element 144A. The upper phase power module 140B may include a point-of-use upper phase B controller 142B and an upper phase B switching element 144B. The upper phase power module 140C may include a point-of-use upper phase C controller 142C and an upper phase C switching element 144C. Each of the upper phase A switching member 144A, the upper phase B switching member 144B, and the upper phase C switching member 144C may be connected to the motor 190 and the battery 195 . Figure 4 Details of the upper phase power module 140 are depicted. Although not shown, the lower phase power module 145 may include a similar structure as the upper phase power module 140 for the lower phases A, B, and C.

[0070] Figure 5 Describes a method for Figure 4 Example system infrastructure for the upper power module. For example, Figure 5 Additional details of upper phase power module 140A are provided. Although not shown, upper phase power module 140B, upper phase power module 140C, and corresponding lower phase power modules of lower phase power module 145 may include components similar to Figure 5 The upper phase power module 140A shown in FIG. 1 is similar in structure to the upper phase power module 140A shown in FIG. 1. In addition, the terms "upper", "lower", "northern", and "southern" as used in this disclosure are used for reference only, do not limit the elements to a particular orientation, and are generally interchangeable throughout the text. For example, the upper phase power module 140 may be referred to as a lower phase power module, a northern phase power module, a southern phase power module, a first phase power module, or a second phase power module.

[0071] The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switch 144A. The upper phase A switch 144A may include one or more sets of switches. Figure 5 As shown, the upper phase A switch 144A may include an upper phase A north switch 144A-N and an upper phase A south switch 144A-S. The point-of-use upper phase A controller 142A may include one or more memories, controllers, or sensors. For example, the point-of-use upper phase A controller 142A may include a communication manager 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. The point-of-use upper phase A controller 142A may include a controller 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. Figure 5 More or fewer components than those shown. For example, the point-of-use upper phase A controller 142A may include more or less than two switch controls and diagnostic controllers, and may include more than two thermal sensors.

[0072] The communication manager 405 may control inter-controller communications to and from the point-of-use upper phase A controller 142A and / or may control intra-controller communications between components of the point-of-use upper phase A controller 142A. The functional safety controller 410 may control safety functions of the point-of-use upper phase A controller 142A. For example, the test interface and controller 415 may control test functions of the point-of-use upper phase A controller 142A, such as end-of-line testing in manufacturing. The north thermal sensor 420A may sense the temperature at a first location in the point-of-use upper phase A controller 142A, and the south thermal sensor 420B may sense the temperature at a second location in the point-of-use upper phase A controller 142A. For example, the self-test controller 425 may control self-test functions of the point-of-use upper phase A controller 142A, such as during initialization of the point-of-use upper phase A controller 142A after an inverter 110 power-on event. The command manager 430 may control commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The waveform adjuster 435 may control the waveform timing and shape of the commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The memory 440 may include one or more volatile and non-volatile storage media for the operation of the point-of-use upper phase A controller 142A. The north switch control and diagnostic controller 450N may send one or more signals to the north switch 144A-N to control the operation of the north switch 144A-N, and may receive one or more signals from the north switch 144A-N that provide information about the north switch 144A-N. The south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-S to control the operation of the south switches 144A-S, and may receive one or more signals from the south switches 144A-S providing information about the south switches 144A-S. As described above, the terms "north" and "south" are used for reference only, and the north switch control and diagnostic controller 450N may send one or more signals to the south switches 144A-S, and the south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-N.

[0073] Figure 6 An exemplary power module including an integrated gate driver and gate-opening detector for a power device switch according to one or more embodiments is depicted. Figure 6As shown, the power module may include a point-of-use phase controller 642, a northern phase switch 644A-N, and a southern phase switch 644A-S. For example, the power module may be a specific implementation of the upper phase power module 140. For example, the point-of-use phase controller 642 may be a specific implementation of the point-of-use upper phase A controller 142A. For example, the northern phase switch 644A-N may be a specific implementation of the northern phase switch 144A-N. For example, the southern phase switch 644A-S may be a specific implementation of the southern phase switch 144A-S. For example, each of the northern phase switch 644A-N and the southern phase switch 644A-S may include one or more power switches, such as one or more silicon carbide (SiC) switches.

[0074] The point-of-use phase controller 642 may be configured to control the operation of the north phase switching elements 644A-N and the south phase switching elements 644A-S. Figure 5 Similar to the upper phase A controller 142A shown at the point of use, the point of use phase controller 642 may include, for example, a north switching element control and diagnostic controller 650N and a south switching element control and diagnostic controller 650S. The north switching element control and diagnostic controller 650N can control the north phase switching element 644A-N, and the south switching element control and diagnostic controller 650S can control the south phase switching element 644A-S. The point of use phase controller 642 may include one or more controllers. The point of use phase controller 642 may include one or more current sources for connecting the north phase switching element 644A-N and the south phase switching element 644A-S. The point of use phase controller 642 may be configured to detect the gate opening condition of the north phase switching element 644A-N or the south phase switching element 644A-S.

[0075] like Figure 6 As shown, the point-of-use phase controller 642 may include connection points for the positive voltage pin 601, the common voltage pin 602, the message pin 604, and the command pin 605. The point-of-use phase controller 642 may include connection points for the north gate trace 621, the south gate trace 622, the north sense trace 623, and the south sense trace 624. The north gate trace 621 and the north sense trace 623 may be connected to the north phase switches 644A-N. The south gate trace 622 and the south sense trace 624 may be connected to the south phase switches 644A-S.

[0076] The point-of-use phase controller 642 may include a north gate driver 610N, a south gate driver 610S, a current sensor 620, and an open gate detector 630. The open gate detector 630 may include a high voltage switch 632, a digital to analog converter 634, a timer 636, and a comparator 638. The high voltage switch 632 may allow selection of either the north phase switch 644A-N or the south phase switch 644A-S for testing, where selection is made between the north gate trace 621 and the south gate trace 622 and between the north sense trace 623 and the south sense trace 624. For example, if Figure 6 As shown, the high voltage switch 632 may include four switches.

[0077] During the open gate detection test, open gate_test_N can be asserted to a high state, which connects the north gate trace 621 and the north sense trace 623 to the open gate detector 630. The stored VT_level can be commanded to the digital to analog converter 634. Open gate_run can be asserted to a high state, which can start the timer 636 and the current I1, and it will charge the gate of the SiC FET of the north phase switch 644A-N. The comparator 638 can detect when the gate to source voltage crosses the stored threshold and stop the timer. The detected time can be stored by the use point phase controller 642 as the north open gate detection time. The open gate detection test can be repeated for the south phase switch 644A-S, where the detected time is stored as the south open gate detection time.

[0078] The use point phase controller 642 can compare the north gate open detection time with the south gate open detection time. The use point phase controller 642 can compare one or more of the north gate open detection time or the south gate open detection time with the stored end of line gate open detection time. Based on the comparison, the use point phase controller 642 can determine whether one of the FETs of the north phase switch 644A-N or the south phase switch 644A-S is turned on. Here, the same test current and test voltage can be used for all tests to provide accurate results.

[0079] The use point phase controller 642 can sense the gate to source voltage of the north phase switches 644A-N relative to the north sense trace 623, and sense the gate to source voltage of the south phase switches 644A-S relative to the south sense trace 624. In addition to being used for current sensing, this gate to source voltage sensing can also be used for the north sense trace 623 and the south sense trace 624. For example, the north gate driver 610N may include a north switch control and diagnostic controller 650N, which may be a specific implementation of the north switch control and diagnostic controller 450N. For example, the south gate driver 610S may include a south switch control and diagnostic controller 650S, which may be a specific implementation of the south switch control and diagnostic controller 450S.

[0080] The north gate driver 610N and the south gate driver 610S may include circuits for monitoring and controlling the north phase switches 644A-N and the south phase switches 644A-S as needed. For example, the north gate trace 621 may be driven with a varying pull gate current driver and a varying sink gate current driver based on the command pin 605. Respectively, the pull gate current driver may have an amplitude time-varying value for the on cycle of the north phase switch 644A-N, and the sink gate current driver may have an amplitude time-varying value for the off cycle of the north phase switch. The pull gate current driver and the sink gate current driver may be dynamically selected by operation of the corresponding switch based on the corresponding on and off control signals from the north switch control and diagnostic controller 650N.

[0081] Sensing and control methods may be used to select the pull gate current driver and the sink gate current driver to drive the gate terminals of the north phase switches 644A-N to minimize switching losses based on one or more of the inherent parameters of the north phase switches 644A-N, parameter drift over the service life of the north phase switches 644A-N, or changes in the operating temperature of the north phase switches 644A-N. Figure 6 As shown, both the north phase switches 644A-N and the south phase switches 644A-S may have independent gate driver systems. The south gate driver 610S may operate in a similar manner to the north gate driver 610N.

[0082] The point-of-use phase controller 642 may be configured to turn on the northern phase switching element 644A-N with the one or more current sources, store the first time before the gate voltage of the northern phase switching element 644A-N reaches the threshold, and turn off the northern phase switching element 644A-N. The point-of-use phase controller 642 may be configured to turn on the southern phase switching element 644A-S with the one or more current sources, store the second time before the gate voltage of the southern phase switching element 644A-S reaches the threshold, and turn off the southern phase switching element 644A-S. The point-of-use phase controller 642 may be configured to detect the gate opening condition of the northern phase switching element 644A-N or the southern phase switching element 644A-S based on the difference between the first time and the second time. The time before the gate voltage reaches the threshold may depend on the number of connected FETs. Therefore, when the FET has an open gate, the switching element has a smaller capacitance, and the time can be reduced compared to when the FET has an operating gate.

[0083] Figure 7 An exemplary graph 700 depicts gate opening operation of an open gate detector according to one or more embodiments. Figure 7 As shown, the use point phase controller 642 can be configured to turn on the north phase switch 644A-N with the one or more current sources at time 0. The use point phase controller 642 can be configured to store a first time 730 (T1) when the gate voltage 720 of the north phase switch 644A-N reaches the threshold 740 and / or a first time 730 (T1) when the drain current 710 of the north phase switch 644A-N increases from approximately 0A. When the first time 730 (T1) is reached, the use point phase controller 642 can be configured to turn off the north phase switch 644A-N. Figure 7 As shown, the threshold 740 may be less than the fully turned-on value of the north phase switching elements 644A-N (eg, 50% of the fully turned-on value) such that the north phase switching elements 644A-N are not fully turned on during the gate detection operation.

[0084] The use point phase controller 642 may repeat the above operation for the southern phase switching element 644A-S. Specifically, the use point phase controller 642 may be configured to turn on the southern phase switching element 644A-S with the one or more current sources at time 0. The use point phase controller 642 may be configured to store a second time when the gate voltage 720 of the southern phase switching element 644A-S reaches the threshold 740 and / or a second time when the drain current 710 of the southern phase switching element 644A-S increases from approximately 0A. When the second time is reached, the use point phase controller 642 may be configured to turn off the southern phase switching element 644A-S. Figure 7As shown, the threshold 740 may be less than the fully turned-on value of the south phase switching elements 644A-S, such that the south phase switching elements 644A-S are not fully turned on during the gate detection operation.

[0085] The use point phase controller 642 may be configured to determine a difference between a first time and a second time. The use point phase controller 642 may compare the difference to a previously determined difference and detect a gate open condition of the north phase switch 644A-N or the south phase switch 644A-S when the difference has changed from the previously determined difference. The use point phase controller 642 may be configured to additionally compensate for changes in temperature of the north phase switch 644A-N or the south phase switch 644A-S during a gate open detection operation for the difference and a gate open detection operation for a previously determined difference.

[0086] One or more embodiments may monitor and detect fault conditions of SiC power devices in real time to extend system life and reliability. One or more embodiments may avoid costly and unexpected system shutdowns through preventive maintenance enabled by effective onboard diagnostics including gate open detection. One or more embodiments may provide gate open diagnostics performed over the life of the component. One or more embodiments may provide gate open detection data stored in a memory when a gate open detection operation is performed during system power-up. One or more embodiments may provide an integrated circuit enclosed in a power module with SiC FETs, the power module being used to detect whether the gate is intact or in an open condition for one or more SiC FETs. One or more embodiments may provide a non-invasive method for gate open detection that can be used to determine the performance of SiC FETs throughout the life of the device and during end-of-line testing. One or more embodiments may provide a gate open detection measurement that is compensated for temperature and system-level offset errors. The compensation may improve the accuracy of the overall measurement system. One or more embodiments may use a current source to turn on a first SiC device, store the time before the gate voltage of the first SiC device reaches a threshold, and turn off the first SiC device. One or more embodiments may use the same current source to turn on a second SiC device, store the time before the gate voltage of the second SiC device reaches the same threshold, and turn off the second SiC device. The difference between the time when the first SiC device reaches the threshold and the time when the second SiC device reaches the threshold may be used to determine whether a gate open condition has occurred.

[0087] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein.It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

Claims

1. A system comprising: An inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: A power module, the power module comprising: A first phase switching element, the first phase switching element comprising one or more first phase power switching elements; A second phase switching element, the second phase switching element comprising one or more second phase power switching elements; and One or more controllers configured to detect a gate-open condition of the first phase switching element or the second phase switching element. 2 . The system of claim 1 , wherein one or more of the first phase power switch or the second phase power switch comprises one or more silicon carbide grains.

3. The system according to claim 1, wherein the first phase switching element is configured to be connected between the positive terminal of the battery and the phase terminal of the motor, and The second phase switching element is configured to be connected between the positive terminal of the battery and the phase terminal of the motor.

4. The system of claim 1, wherein the one or more controllers include one or more current sources.

5. The system of claim 4, wherein the one or more controllers are configured to turn on the first phase switching element using the one or more current sources, store a first time before a gate voltage of the first phase switching element reaches a threshold, and turn off the first phase switching element.

6. The system of claim 5, wherein the one or more controllers are configured to turn on the second phase switching element using the one or more current sources, store a second time before the gate voltage of the second phase switching element reaches the threshold, and turn off the second phase switching element. 7 . The system of claim 6 , wherein the one or more controllers are configured to detect the gate-open condition of the first phase switching element or the second phase switching element based on a difference between the first time and the second time.

8. The system of claim 1, further comprising: the battery, the battery being configured to supply the DC power to the inverter; as well as The motor is configured to receive the AC power from the inverter to drive the motor.

9. A system comprising: A power module, wherein the power module is for an inverter and comprises: A first phase switching element, the first phase switching element comprising one or more first phase power switching elements; A second phase switching element, the second phase switching element comprising one or more second phase power switching elements; and One or more controllers configured to detect a gate-open condition of the first phase switching element or the second phase switching element. 10 . The system of claim 9 , wherein the one or more controllers are configured to detect a gate-open condition of the first phase switching element or the second phase switching element based on a temperature of the first phase switching element or the second phase switching element.

11. The system of claim 9, wherein the one or more controllers are configured to detect the gate-open condition of the first phase switching element or the second phase switching element based on a time difference between an operation of the first phase switching element and an operation of the second phase switching element.

12. The system of claim 9, wherein the one or more controllers include one or more current sources configured to operate each of the first phase switch and the second phase switch.

13. The system of claim 9, wherein the one or more controllers include one or more point-of-use controllers on the power module having the first phase switch and the second phase switch.

14. The system of claim 9, wherein the first phase switch is configured to be connected between a negative terminal of the battery and a phase terminal of the motor, and The second phase switching element is configured to be connected between the negative terminal of the battery and the phase terminal of the motor.

15. A system comprising: One or more point-of-use controllers, the one or more point-of-use controllers being for the power module, the one or more point-of-use controllers being configured to: operating a first phase switching element of the power module; operating a second phase switching element of the power module; and A gate-on condition of the first phase switching element or the second phase switching element is detected based on a time difference between the operation of the first phase switching element and the operation of the second phase switching element.

16. The system of claim 15, wherein to operate the first phase switching element of the power module, the one or more point-of-use controllers are configured to: switching on the first phase switching element using one or more current sources of the one or more point-of-use controllers; storing a first time before the gate voltage of the first phase switching element reaches a threshold; as well as The first phase switching element is turned off.

17. The system of claim 16, wherein to operate the second phase switching element of the power module, the one or more point-of-use controllers are configured to: switching on the second phase switching element with the one or more current sources of the one or more point-of-use controllers; a second time stored before the gate voltage of the second phase switching element reaches the threshold; as well as The second phase switching element is turned off.

18. The system of claim 17, wherein the one or more point-of-use controllers are configured to detect the gate-open condition of the first phase switch or the second phase switch based on a difference between the first time and the second time.

19. The system of claim 18, wherein the one or more point-of-use controllers are further configured to: storing the difference between the first time and the second time as a first difference time; repeating the gate opening detection operation and storing the difference between the first time and the second time as a second difference time, and The gate-open condition of the first phase switching element or the second phase switching element is detected based on a difference between the first difference time and the second difference time.

20. The system of claim 19, wherein the one or more point-of-use controllers are further configured to: The gate opening condition of the first phase switching element or the second phase switching element is detected based on the difference between the first difference time and the second difference time, and the change in temperature of the first phase switching element or the second phase switching element during the gate opening detection operation up to the first difference time and the gate opening detection operation up to the second difference time is compensated.