System and method for multiple output integrated gate driver for inverter for electric vehicle

Abstract

A system includes an inverter configured to convert DC power from a battery to AC power to drive a motor, where the inverter includes: a power module including: a drain tab; a source plate; a first power switching member, the first power switching member including a first gate terminal, the first gate terminal configured to control a flow of a first current between the drain sheet and the source sheet; a second power switching member, the second power switching member including a second gate terminal, the second gate terminal configured to control a flow of a second current between the drain sheet and the source sheet; and one or more controllers configured to provide a first signal to the first gate terminal and a second signal to the second gate terminal.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of priority to U.S. Provisional Patent Application No. 63 / 377,486 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,501 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 377,512 filed on September 28, 2022, U.S. Provisional Patent Application No. 63 / 378,601 filed on October 6, 2022, and U.S. Non-Provisional Patent Application No. 18 / 168,106 filed on February 13, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Various embodiments of the present disclosure generally relate to systems and methods for a multi-output integrated gate driver for an inverter for an electric vehicle, and more particularly to systems and methods for a multi-output integrated gate driver for a power device switch of an inverter for an electric vehicle. Background Art

[0004] Inverters, such as those used to drive motors in electric vehicles, are responsible for converting high voltage direct current (HVDC) to alternating current (AC) to drive the motor. In an inverter, multiple power device switches in a power module can share different currents during switching of the power device switches.

[0005] The present disclosure is directed to overcoming one or more of these aforementioned challenges. Summary of the invention

[0006] In some aspects, the technology described herein relates to a system comprising: an inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: a power module comprising: a drain plate; a source plate; a first power switching element comprising a first gate terminal configured to control the flow of a first current between the drain plate and the source plate; a second power switching element comprising a second gate terminal configured to control the flow of a second current between the drain plate and the source plate; and one or more controllers configured to provide a first signal to the first gate terminal and a second signal to the second gate terminal.

[0007] In some aspects, the technology described herein relates to a system wherein the one or more controllers include one or more point-of-use controllers on a power module having a first power switch and a second power switch.

[0008] In some aspects, the technology described herein relates to a system in which the drain sheet is configured to connect to a positive terminal of a battery and the source sheet is configured to connect to a phase terminal of a motor.

[0009] In some aspects, the technology described herein relates to a system in which a source sheet is configured to connect to a negative terminal of a battery and a drain sheet is configured to connect to a phase terminal of a motor.

[0010] In some aspects, the technology described herein relates to a system wherein the power module further comprises: a command pin, wherein the one or more controllers are further configured to receive a gate command via the command pin and provide a first signal to a first gate terminal and a second signal to a second gate terminal based on the received gate command.

[0011] In some aspects, the technology described herein relates to a system wherein the one or more controllers are further configured to delay providing a first signal to a first gate terminal relative to providing a second signal to a second gate terminal.

[0012] In some aspects, the technology described herein relates to a system in which a first power switch includes a first silicon carbide die and a second power switch includes a second silicon carbide die.

[0013] In some aspects, the technology described herein relates to a system that further includes a battery configured to supply DC power to the inverter and a motor configured to receive AC power from the inverter to drive the motor.

[0014] In some aspects, the technology described herein relates to a system comprising: a power module, the power module being for an inverter for an electric vehicle, the power module comprising: a drain plate; a source plate; a first power switching element, the first power switching element comprising a first gate terminal, the first gate terminal being configured to control the flow of current between the drain plate and the source plate; a second power switching element, the second power switching element comprising a second gate terminal, the second gate terminal being configured to control the flow of current between the drain plate and the source plate; and one or more controllers, the one or more controllers being configured to provide a first signal to the first gate terminal and a second signal to the second gate terminal.

[0015] In some aspects, the technology described herein relates to a system in which a first power switch includes a first set of silicon carbide grains and a second power switch includes a second set of silicon carbide grains.

[0016] In some aspects, the technology described herein relates to a system in which a first power switch has a first gate threshold voltage and a second power switch has a second gate threshold voltage different from the first gate threshold voltage.

[0017] In some aspects, the technology described herein relates to a system in which a first power switch has a first source inductance and a second power switch has a second source inductance different from the first source inductance.

[0018] In some aspects, the technology described herein relates to a system in which the one or more controllers are configured to provide a first signal to a first gate terminal independently of providing a second signal to a second gate terminal.

[0019] In some aspects, the technology described herein relates to a system, the power module further comprising: a command pin, wherein the one or more controllers are further configured to receive a gate command via the command pin and provide a first signal to a first gate terminal and a second signal to a second gate terminal based on the received gate command.

[0020] In some aspects, the technology described herein relates to a system comprising: one or more point-of-use controllers, the one or more point-of-use controllers being directed to a power module for an inverter, the one or more point-of-use controllers being configured to: receive a gate command; generate a first signal for a first gate terminal of a first power switching element based on the received gate command; and generate a second signal for a second gate terminal of a second power switching element based on the received gate command.

[0021] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to generate a first signal based on a first source inductance of a first power switch and a second signal based on a second source inductance of a second power switch.

[0022] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to: receive a first sensing signal from a first power switching element; generate a first signal based on the first sensing signal; receive a second sensing signal from a second power switching element; and generate a second signal based on the second sensing signal.

[0023] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to: control a first current through a first power switch using a first signal; and control a second current through a second power switch using a second signal.

[0024] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to: during one or more of a turn-on or turn-off event of the first power switch and the second power switch, control a first current through the first power switch to be approximately equal to a second current through the second power switch.

[0025] In some aspects, the technology described herein relates to a system wherein the one or more point-of-use controllers are further configured to generate a first signal based on one or more of an intrinsic parameter of a first power switching component, a parameter drift over a useful life of the first power switching component, or a change in an operating temperature of the first power switching component.

[0026] Other objects and advantages of the disclosed embodiments will be described in part in the following description, and in part will be obvious from the description, or can be understood by practicing the disclosed embodiments. The objects and advantages of the disclosed embodiments will be realized and achieved by means of the elements and combinations particularly pointed out in the appended claims.

[0027] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments, as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate various exemplary embodiments and, together with the description, serve to explain the principles of the disclosed embodiments.

[0029] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter is depicted according to one or more embodiments.

[0030] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 An exemplary system infrastructure of a combined inverter and converter.

[0031] Figure 3 Describes a method for Figure 2 An exemplary system infrastructure for a controller of FIG.

[0032] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure for a point-of-use switching controller.

[0033] Figure 5 Describes a method for Figure 4 An exemplary system infrastructure of an upper power module.

[0034] Figure 6 An exemplary system for a power module including a multi-output integrated gate driver according to one or more embodiments is depicted.

[0035] Figure 7 Depicted is an exemplary connection layout for a power module including a multi-output integrated gate driver according to one or more embodiments.

[0036] Figure 8 Depicted is an exemplary block diagram for a multi-output integrated gate driver in accordance with one or more embodiments.

[0037] Fig. 9 Depicted are exemplary turn-on graphs for a system with a single output gate driver and exemplary turn-on graphs for a system with a multi-output integrated gate driver according to one or more embodiments.

[0038] Fig.10 Depicted are exemplary turn-off curve graphs for a system with a single output gate driver and exemplary turn-off curve graphs for a system with a multi-output integrated gate driver according to one or more embodiments. DETAILED DESCRIPTION

[0039] Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not constrain the claimed features. As used herein, the terms "comprises," "comprising," "has," "having," "includes," "including," or other variations thereof are intended to encompass non-exclusive inclusions such that a process, method, article, or device that includes a series of elements includes not only those elements, but may also include other elements that are not explicitly listed or inherent to such process, method, article, or device. In the present disclosure, unless otherwise stated, relative terms (such as, for example, "about," "substantially," and "approximately") are used to indicate possible ±10% variations in the stated values. In the present disclosure, unless otherwise stated, any numerical value may include possible ±10% variations in the stated values.

[0040] The terms used below may be interpreted in their broadest reasonable manner, although they are being used in conjunction with a detailed description of certain specific examples of the present disclosure. Indeed, certain terms may even be emphasized below; however, any term intended to be interpreted in any constrained manner will be explicitly and specifically defined as such in this detailed description. For example, in the context of the present disclosure, a switching device may be described as a switching element or device, but may refer to any device for controlling power flow in a circuit. For example, a switching element may be, for example, a metal oxide semiconductor field effect transistor (MOSFET), a bipolar junction transistor (BJT), an insulated gate bipolar transistor (IGBT) or a relay, or any combination thereof, but is not limited thereto.

[0041] Various embodiments of the present disclosure generally relate to systems and methods for a multi-output integrated gate driver for an inverter for an electric vehicle, and more particularly to systems and methods for a multi-output integrated gate driver for a power device switch of an inverter for an electric vehicle.

[0042] Inverters (such as those used to drive motors in electric vehicles) are responsible for converting high voltage direct current (HVDC) into alternating current (AC) to drive the motor. A three-phase inverter may include a bridge having six power device switches (e.g., power transistors such as IGBTs or MOSFETs) that are controlled by pulse width modulation (PWM) signals generated by a controller. The inverter may include three phase switches to control phase voltages, upper and lower gate drivers to control the switches, a PWM controller, and glue logic between the PWM controller and the gate driver. The PWM controller may generate signals to define the expected state of the system. The gate driver may send signals from the PWM controller to the phase switches. The phase switches may drive the phase voltages. The inverter may include an isolation barrier between a low voltage plane and a high voltage plane. The signal may be passed from the PWM controller to the phase switch by passing through an isolation barrier, which may employ optical, converter-based, or capacitor-based isolation. The PWM signal may be distorted when passing through the glue logic, which may include resistive, capacitive, or other types of filtering. Due to the electrical isolation barrier and other delays within the gate driver, the PWM signal may be distorted when passing through the gate driver. The PWM signal may be distorted when the signal is processed by the phase switching device via the gate driver output.

[0043] Gate drivers withstand common-mode transients that occur during field effect transistor (FET) switching and when one side of a floating high voltage terminal is shorted to ground or subjected to electrostatic discharge. These voltage transients can cause fast edges that can form common-mode current bursts through electrical isolation. Gate drivers may need to demonstrate common-mode transient immunity (CMTI) in order to be effective and safe.

[0044] The gate driver may have a high voltage domain in common with the voltage plane of the associated FET. Further, the high voltage plane may be supplied by a flyback converter, which may be isolated from the low voltage plane by a transformer. The high voltage domain power supply may be used to provide power to such a circuit that sources and sinks gate current to drive the FET and can detect FET faults, thereby acting on the faults and / or transmitting the faults to the low voltage domain. The gate driver may include an electrical channel dedicated to FET commands, and one or more bidirectional or unidirectional electrical channels dedicated to FET communications.

[0045] High current switching transients can form strong electromagnetic (EM) fields that can couple into nearby metal traces. The magnitude and frequency of the coupled current can depend on the layout of the FET packaging solution and the direction and length of the metal traces between the FET and the control integrated circuit (IC). For example, a typical value for the coupled current can be up to 1A at an AC frequency of up to 100MHz. Typically, within the circuit, the gate driver IC can be placed far enough away from the FET so that the high EM field is not directly coupled into the internal metal traces within the gate driver IC. The gate driver is placed at a distance from the EM field so that the induced current within the circuit is below the level that will cause the gate driver to malfunction, or a metal shield is placed between the gate driver and the source of the EM field to protect the gate driver circuit. The output terminals of the gate driver connected to the FET are exposed to the EM field at a point where the output terminals are no longer covered by the shield. The gate driver switches large currents (e.g., such as 5A to 15A) through these exposed terminals. The large currents switched are usually larger in magnitude than the EM induced current. The gate driver can overdrive the induced current to maintain control of the FET. The gate driver and the high side of the FET may share a common ground and gate control signal trace, both of which may be susceptible to coupled currents.

[0046] The gate driver can turn on low resistance switches to source and sink gate current. Sometimes a series resistor can be added to limit the gate current. The switched gate current can be greater than the coupling current in order to maintain control of their respective FETs.

[0047] The gate driver may be able to sense the FET operating voltage or current in order to provide feedback and react to faults. An overcurrent fault may typically be detected by sensing the FET drain-to-source voltage and comparing the sensed voltage to a reference value. The sensed voltage may be heavily filtered to reject coupled currents. Filtering may slow the response to a fault condition, causing a delay in response. For example, the rate of current increase due to a low resistance short may reach damaging levels before being detected by a heavily filtered drain-to-source voltage detection strategy. The resulting short may damage the FET or the vehicle before being detected and turned off.

[0048] According to one or more embodiments, a FET driver circuit may provide fast overcurrent detection by shunt current sensing, or by diverting a portion of the load current through a parallel FET that may have a current sensing circuit. Utilizing either strategy may require a "point of use IC" in which the sensing circuit is very close to the FET. Even if the point of use IC and the remote controller are resistant to EM fields, the communication between the point of use IC and the remote controller is still susceptible to induced currents. Point of use ICs have been implemented in low EM field applications, such as smart FETs for automotive applications. However, point of use ICs have not yet been used in high EM field applications. High EM fields can be fields that (i) induce a current within the IC that exceeds the operating current of the IC and causes a malfunction, or (ii) induce a differential voltage within the IC that exceeds the operating differential voltage and causes a malfunction. High EM fields can be, for example, fields greater than about 10A or about 100V.

[0049] Some power modules may have one gate drive pin per switch, so a single output gate driver remote from the power module may have a single gate drive output to drive the power module with a single gate drive pin. High current and / or high power silicon carbide (SiC) power modules have multiple SiC die in parallel to share high current throughput. However, due to layout constraints, for example, SiC die may be presented with different source inductances, which may cause unequal current sharing between the die during turn-on and turn-off switching events. A single gate connection may maintain the voltage potential at a constant value while the source voltage of the SiC die with higher source inductance rises, which may pinch off the gate-to-source voltage of the SiC die. Different transient current sharing may impose different stresses on the SiC die, which may cause failure of the SiC device.

[0050] One or more embodiments may provide an integrated gate driver having multiple gate drive outputs. The integrated gate driver may provide multiple gate drive outputs without adding additional pins to the power module. The integrated gate driver may eliminate external pins for the gate of the power FET. Eliminating the gate pin may reduce the cost for the component, may provide significantly lower gate stray inductance, and may reduce electromagnetic radiation and provide lower sensitivity to external electromagnetic interference. These factors may allow the integrated gate driver to drive the gate terminal in a manner that reduces turn-on / off energy loss. The integrated gate driver may be co-located with a power module having a SiC die and disposed on the power module. The integrated gate driver may be an application specific integrated circuit (ASIC). The integrated gate driver may provide faster and more reliable sensing, control, and protection for SiC power FETs. One or more embodiments may provide a multi-output integrated gate driver having a first gate drive output targeted at a first group of one or more SiC die and a second gate drive output targeted at a second group of one or more SiC die. The first group of one or more SiC dies may have a first source inductance, and the second group of one or more SiC dies may have a second source inductance that is higher than the first source inductance. For example, the one or more SiC dies may be grouped according to a voltage threshold, transconductance, or Rdson. The value of the grouping parameter may be determined during end-of-line testing. The integrated gate driver may include a gate drive output that is a current digital to analog converter so that the current flowing into each SiC gate of the first group and the second group provides comparable on and off switching performance to allow for reduced switching energy losses of the power FET.

[0051] One or more embodiments may allow the two groups of SiC die to turn on more equally because the gate-to-source voltage varies according to the charge added to the gate. The gates of the two groups of SiC die may be allowed to move independently, such as + / - 30 nanoseconds, with the sources of the respective groups, for example, which may prevent the gate-to-source voltage of the higher inductance group from being pinched off. One or more embodiments may provide much better turn-on and turn-off current distribution between the SiC device groups relative to a single output gate driver with only one gate drive output. Better turn-on and turn-off current distribution may allow transient current stress to be distributed much more evenly between the SiC die, which may improve the long-term reliability of the SiC devices.

[0052] Figure 1 An exemplary system infrastructure for a vehicle including a combined inverter and converter according to one or more embodiments is depicted. In the context of the present disclosure, the combined inverter and converter may be referred to as an inverter. Figure 1As shown, the electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include a component for receiving electric power from an external source and outputting electric power to charge the battery 195 of the electric vehicle 100. For example, the inverter 110 may convert DC power from the battery 195 in the electric vehicle 100 into AC power to drive the motor 190 of the electric vehicle 100, but the embodiment is not limited thereto. For example, the inverter 110 may be bidirectional and may convert DC power into AC power, or convert AC power into DC power, such as during regenerative braking. The inverter 110 may be a three-phase inverter, a single-phase inverter, or a multi-phase inverter.

[0053] Figure 2 Depicted is a method for providing a point-of-use switching controller according to one or more embodiments. Figure 1 The electric vehicle 100 may include an inverter 110, a motor 190, and a battery 195. The inverter 110 may include an inverter controller 300 ( Figure 3 14). The inverter 110 may include a low voltage upper phase controller 120 separated from a high voltage upper phase controller 130 by an electrical isolator 150, and an upper phase power module 140. The upper phase power module 140 may include a point-of-use upper phase controller 142 and an upper phase switch 144. The inverter 110 may include a low voltage lower phase controller 125 separated from a high voltage lower phase controller 135 by an electrical isolator 150, and a lower phase power module 145. The lower phase power module 145 may include a point-of-use lower phase controller 146 and a lower phase switch 148. The upper phase switch 144 and the lower phase switch 148 may be connected to a motor 190 and a battery 195. The electrical isolator 150 may be one or more of optical, converter-based, or capacitor-based isolation. For example, the electrical isolator 150 may be one or more capacitors having a value from about 20 fF to about 100 fF, having a breakdown voltage from about 6 kV to about 12 kV. The electrical isolator 150 may include a pair of capacitors, wherein one capacitor in the pair carries an inverted data signal from the other capacitor in the pair to form a differential signal that is rejected for common mode noise. The electrical isolator 150 may include more than one capacitor in series. The electrical isolator 150 may include one capacitor located on a first IC, or may include a first capacitor located on a first IC and a second capacitor located on a second IC that communicates with the first IC.

[0054] The inverter 110 may include a low voltage region (e.g., where the voltage is typically less than 5V) and a high voltage region (e.g., where the voltage may exceed 500V). The low voltage region may be separated from the high voltage region by an electrical isolator 150. The inverter controller 300 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the low voltage upper phase controller 120. The low voltage upper phase controller 120 may be in the low voltage region of the inverter 110, and may send a signal to and receive a signal from the high voltage upper phase controller 130. The low voltage upper phase controller 120 may send a signal to and receive a signal from the low voltage lower phase controller 125. The high voltage upper phase controller 130 may be in the high voltage region of the inverter 110. Therefore, the signal between the low voltage upper phase controller 120 and the high voltage upper phase controller 130 passes through the electrical isolator 150. The high voltage upper phase controller 130 may send signals to and receive signals from a point-of-use upper phase controller 142 in the upper phase power module 140. The point-of-use upper phase controller 142 may send signals to and receive signals from an upper phase switch 144. The upper phase switch 144 may be connected to a motor 190 and a battery 195. For example, the upper phase switch 144 and the lower phase switch 148 may be used to transfer energy from the motor 190 to the battery 195, from the battery 195 to the motor 190, from an external source to the battery 195, or from the battery 195 to an external source. The lower phase system of the inverter 110 may be similar to the upper phase system described above.

[0055] Figure 3 Describes a method for Figure 2 FIG. 3 is an exemplary system infrastructure of an inverter controller 300 . The inverter controller 300 may include one or more controllers.

[0056] The inverter controller 300 may include a set of instructions that can be executed to cause the inverter controller 300 to perform any one or more of the methods or computer-based functions disclosed herein. The inverter controller 300 may operate as a standalone device, or may be connected to other computer systems or peripheral devices, for example using a network.

[0057] In a networked deployment, the inverter controller 300 can operate in the capacity of a server, or as a client in a server-client user network environment, or as a peer computer system in a peer (or distributed) network environment. The inverter controller 300 can also be implemented as or incorporated into various devices, such as a personal computer (PC), a tablet PC, a set-top box (STB), a personal digital assistant (PDA), a mobile device, a palmtop computer, a laptop computer, a desktop computer, a communication device, a wireless phone, a landline phone, a control system, a camera, a scanner, a fax machine, a printer, a pager, a personal trusted device, a network device, a network router, a switch or bridge, or any other machine capable of executing a set of instructions (sequentially or otherwise) (the set of instructions specifies the actions to be taken by the machine). In a specific implementation, the inverter controller 300 can be implemented using an electronic device that provides voice, video or data communication. Further, although the inverter controller 300 is illustrated as a single system, the term “system” should also be understood to include any collection of systems or subsystems that individually or jointly execute one or more sets of instructions to perform one or more computer functions.

[0058] like Figure 3 As shown, the inverter controller 300 may include a processor 302, such as a central processing unit (CPU), a graphics processing unit (GPU), or both. The processor 302 may be a component in a variety of systems. For example, the processor 302 may be part of a standard inverter. The processor 302 may be one or more general-purpose processors, digital signal processors, application-specific integrated circuits, field programmable gate arrays, servers, networks, digital circuits, analog circuits, combinations thereof, or other devices now known or later developed for analyzing and processing data. The processor 302 may implement a software program, such as a manually generated (i.e., programmed) code.

[0059] The inverter controller 300 may include a memory 304 that can communicate via a bus 308. The memory 304 may be a main memory, a static memory, or a dynamic memory. The memory 304 may include, but is not limited to, computer-readable storage media, such as various types of volatile and non-volatile storage media, including but not limited to random access memory, read-only memory, programmable read-only memory, electrically programmable read-only memory, electrically erasable read-only memory, flash memory, tape or disk, optical media, etc. In one specific implementation, the memory 304 includes a cache or random access memory for the processor 302. In an alternative specific implementation, the memory 304 is separated from the processor 302, such as a cache memory, system memory, or other memory of the processor. The memory 304 may be an external storage device or database for storing data. Examples include a hard drive, a compact disk ("CD"), a digital video disk ("DVD"), a memory card, a memory stick, a floppy disk, a universal serial bus ("USB") storage device, or any other device operable to store data. The memory 304 is operable to store instructions that can be executed by the processor 302. The functions, actions, or tasks illustrated in the figures or described herein may be performed by the processor 302 executing instructions stored in the memory 304. The functions, actions, or tasks are not related to a particular type of instruction set, storage medium, processor, or processing strategy, and may be performed by software, hardware, integrated circuits, firmware, microcode, etc. operating alone or in combination. Likewise, processing strategies may include multi-processing, multi-tasking, parallel processing, etc.

[0060] As shown, the inverter controller 300 may further include a display 310, such as a liquid crystal display (LCD), an organic light emitting diode (OLED), a flat panel display, a solid state display, a cathode ray tube (CRT), a projector, a printer, or other display devices known now or later developed for outputting the determined information. The display 310 may serve as an interface for a user to view the operation of the processor 302, or specifically serve as an interface with the software stored in the memory 304 or in the drive unit 306.

[0061] Additionally or alternatively, the inverter controller 300 may include an input device 312 configured to allow a user to interact with any of the components of the inverter controller 300. The input device 312 may be a numeric keypad, a keyboard or a cursor control device (such as a mouse or a joystick), a touch screen display, a remote control, or any other device operable to interact with the inverter controller 300.

[0062] The inverter controller 300 may also or alternatively include a drive unit 306 implemented as a disk or optical drive. The drive unit 306 may include a computer-readable medium 322 in which one or more sets of instructions 324 (e.g., software) may be embedded. Further, the instructions 324 may embody one or more of the methods or logics described herein. The instructions 324 may reside completely or partially within the memory 304 and / or within the processor 302 during execution by the inverter controller 300. The memory 304 and the processor 302 may also include computer-readable media as described above.

[0063] In some systems, the computer-readable medium 322 includes instructions 324 or receives and executes instructions 324 in response to a propagated signal, so that a device connected to the network 370 can transmit voice, video, audio, images, or any other data through the network 370. Further, the instructions 324 can be transmitted or received through the network 370 and / or using the bus 308 via the communication port or interface 320. The communication port or interface 320 can be part of the processor 302 or can be an independent component. The communication port or interface 320 can be formed in software or can be a physical connector in hardware. The communication port or interface 320 can be configured to connect to the network 370, external media, display 310, or any other component in the inverter controller 300, or a combination thereof. The connection to the network 370 can be a physical connection (such as a wired Ethernet connection) or can be established wirelessly, as described below. Similarly, additional connections to other components of the inverter controller 300 can be physical connections or can be established wirelessly. The network 370 can alternatively be directly connected to the bus 308.

[0064] Although the computer-readable medium 322 is shown as a single medium, the term "computer-readable medium" may include a single medium or multiple media (such as a centralized or distributed database and / or associated caches and servers) that store one or more sets of instructions. The term "computer-readable medium" may also include any medium capable of storing, encoding, or carrying a set of instructions for execution by a processor or causing a computer system to perform any one or more of the methods or operations disclosed herein. The computer-readable medium 322 may be non-transitory and may be tangible.

[0065] Computer readable medium 322 may include solid-state memory, such as a memory card or other package that accommodates one or more non-volatile read-only memories. Computer readable medium 322 may be random access memory or other volatile rewritable memory. Additionally or alternatively, computer readable medium 322 may include magneto-optical or optical media, such as a disk or tape or other storage device for capturing carrier signals (such as signals transmitted through a transmission medium). Digital file attachments to emails or other self-contained information archives or archive sets may be considered distribution media as tangible storage media. Therefore, the present disclosure is considered to include any one or more of computer-readable media or distribution media and other equivalents and successor media in which data or instructions may be stored.

[0066] In alternative implementations, dedicated hardware implementations (such as application specific integrated circuits, programmable logic arrays, and other hardware devices) may be constructed to implement one or more of the methods described herein. Applications that may include the apparatus and systems of various implementations may broadly include a variety of electronic and computer systems. One or more implementations described herein may use two or more specific interconnected hardware modules or devices with associated control and data signals that may be transmitted between modules or through modules or as part of an application specific integrated circuit to implement functionality. Thus, the present system encompasses software, firmware, and hardware implementations.

[0067] The inverter controller 300 may be connected to a network 370. The network 370 may define one or more networks, including wired or wireless networks. The wireless network may be a cellular telephone network, an 802.11, 802.16, 802.20, or WiMAX network. Further, such networks may include public networks (such as the Internet), private networks (such as intranets), or combinations thereof and may utilize a variety of networking protocols that are now available or later developed, including but not limited to TCP / IP-based networking protocols. The network 370 may include a wide area network (WAN) (such as the Internet), a local area network (LAN), a campus area network, a metropolitan area network, a direct connection (such as through a universal serial bus (USB) port), or any other network that allows data communication. The network 370 may be configured to couple one computing device to another computing device to enable data communication between devices. The network 370 may generally be enabled to use any form of machine-readable media to transmit information from one device to another. The network 370 may include a communication method by which information can travel between computing devices. The network 370 may be divided into subnetworks. A subnetwork may allow access to all other components connected to it, or a subnetwork may restrict access between components. Network 370 may be considered a public or private network connection and may include, for example, a virtual private network or encryption or other security mechanisms employed over the public Internet.

[0068] According to various implementations of the present disclosure, the methods described herein may be implemented by a software program that can be executed by a computer system. Further, in an exemplary non-limiting implementation, the implementation may include distributed processing, component or object distributed processing, and parallel processing. Alternatively, a virtual computer system process may be constructed to implement one or more of the methods or functionalities described herein.

[0069] Although this specification describes components and functions that can be implemented in a specific implementation with reference to specific standards and protocols, the present disclosure is not limited to such standards and protocols. For example, standards for Internet and other packet-switched network transmissions (e.g., TCP / IP, UDP / IP, HTML, HTTP) represent examples of the prior art. Such standards are periodically replaced by faster or more efficient equivalents having substantially the same functionality. Therefore, alternative standards and protocols having the same or similar functionality as those disclosed herein are considered equivalents thereof.

[0070] It will be appreciated that, in one embodiment, the operations of the methods discussed are performed by an appropriate processor (or processors) of a processing (i.e., computer) system executing instructions (computer readable code) stored in a storage device. It will also be appreciated that the present disclosure is not limited to any particular implementation or programming technique, and that the present disclosure may be implemented using any suitable technique for implementing the functionality described herein. The present disclosure is not limited to any particular programming language or operating system.

[0071] Figure 4 Describes a method for Figure 2 An exemplary system infrastructure of a point-of-use switching controller. For a three-phase inverter, each of the upper phase and the lower phase may include three phases related to phases A, B, and C. For example, the upper phase power module 140 may include an upper phase power module 140A for upper phase A, an upper phase power module 140B for upper phase B, and an upper phase power module 140C for upper phase C. The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switching element 144A. The upper phase power module 140B may include a point-of-use upper phase B controller 142B and an upper phase B switching element 144B. The upper phase power module 140C may include a point-of-use upper phase C controller 142C and an upper phase C switching element 144C. Each of the upper phase A switching member 144A, the upper phase B switching member 144B, and the upper phase C switching member 144C may be connected to the motor 190 and the battery 195 . Figure 4 Details of the upper phase power module 140 are depicted. Although not shown, the lower phase power module 145 may include a similar structure as the upper phase power module 140 for the lower phases A, B, and C.

[0072] Figure 5 Describes a method for Figure 4 Example system infrastructure for the upper power module. For example, Figure 5 Additional details of upper phase power module 140A are provided. Although not shown, upper phase power module 140B, upper phase power module 140C, and corresponding lower phase power modules of lower phase power module 145 may include components similar to Figure 5 The upper phase power module 140A shown in FIG. 1 is similar in structure to the upper phase power module 140A shown in FIG. 1. In addition, the terms "upper", "lower", "northern", and "southern" as used in this disclosure are used for reference only, do not limit the elements to a particular orientation, and are generally interchangeable throughout the text. For example, the upper phase power module 140 may be referred to as a lower phase power module, a northern phase power module, a southern phase power module, a first phase power module, or a second phase power module.

[0073] The upper phase power module 140A may include a point-of-use upper phase A controller 142A and an upper phase A switch 144A. The upper phase A switch 144A may include one or more sets of switches. Figure 5 As shown, the upper phase A switch 144A may include an upper phase A north switch 144A-N and an upper phase A south switch 144A-S. The point-of-use upper phase A controller 142A may include one or more memories, controllers, or sensors. For example, the point-of-use upper phase A controller 142A may include a communication manager 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. The point-of-use upper phase A controller 142A may include a controller 405, a functional safety controller 410, a test interface and controller 415, a north thermal sensor 420A, a south thermal sensor 420B, a self-test controller 425, a command manager 430, a waveform adjuster 435, a memory 440, a north switch control and diagnostic controller 450N, and a south switch control and diagnostic controller 450S. Figure 5 More or fewer components than those shown. For example, the point-of-use upper phase A controller 142A may include more or less than two switch controls and diagnostic controllers, and may include more than two thermal sensors.

[0074] The communication manager 405 may control inter-controller communications to and from the point-of-use upper phase A controller 142A and / or may control intra-controller communications between components of the point-of-use upper phase A controller 142A. The functional safety controller 410 may control safety functions of the point-of-use upper phase A controller 142A. For example, the test interface and controller 415 may control test functions of the point-of-use upper phase A controller 142A, such as end-of-line testing in manufacturing. The north thermal sensor 420A may sense the temperature at a first location in the point-of-use upper phase A controller 142A, and the south thermal sensor 420B may sense the temperature at a second location in the point-of-use upper phase A controller 142A. For example, the self-test controller 425 may control self-test functions of the point-of-use upper phase A controller 142A, such as during initialization of the point-of-use upper phase A controller 142A after an inverter 110 power-on event. The command manager 430 may control commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The waveform adjuster 435 may control the waveform timing and shape of the commands received from the communication manager 405 and issued to the north switch control and diagnostic controller 450N and the south switch control and diagnostic controller 450S. The memory 440 may include one or more volatile and non-volatile storage media for the operation of the point-of-use upper phase A controller 142A. The north switch control and diagnostic controller 450N may send one or more signals to the north switch 144A-N to control the operation of the north switch 144A-N, and may receive one or more signals from the north switch 144A-N that provide information about the north switch 144A-N. The south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-S to control the operation of the south switches 144A-S, and may receive one or more signals from the south switches 144A-S providing information about the south switches 144A-S. As described above, the terms "north" and "south" are used for reference only, and the north switch control and diagnostic controller 450N may send one or more signals to the south switches 144A-S, and the south switch control and diagnostic controller 450S may send one or more signals to the south switches 144A-N.

[0075] Figure 6 An exemplary system for a power module including a multi-output integrated gate driver according to one or more embodiments is depicted. Figure 6As shown, the power module 640 may include a point-of-use phase controller 642, a north phase switch 644-N, and a south phase switch 644-S. For example, the power module 640 may be a specific implementation of the upper phase power module 140A. The point-of-use phase controller 642 may be a specific implementation of the point-of-use upper phase A controller 142A, the north phase switch 644-N may be a specific implementation of the north switch 144A-N, and the south phase switch 644-S may be a specific implementation of the south switch 144A-S.

[0076] like Figure 6 As shown, the northern phase switch 644-N may include SiC grains 1 to 4, and the southern phase switch 644-S may include SiC grains 5 to 7. However, the present disclosure is not limited thereto, and SiC grains 1 to 7 may be grouped into any suitable configuration. The power module 640 may include more or less than 7 SiC grains. Figure 6 As shown, the use point phase controller 642 can control two groups of SiC grains, namely the northern phase switching member 644-N and the southern phase switching member 644-S. However, SiC grains 1 to 7 can be grouped into more than two groups, and the use point phase controller 642 can control more than two groups. For example, SiC grains 1 to 7 can be grouped into three groups (e.g., 1 to 2, 3 to 5, and 6 to 7), and the use point phase controller 642 can independently control the three groups.

[0077] The power module 640 may include a source sheet 610, a drain sheet 615, a positive voltage pin 601, a common voltage pin 602, a source pin 603, a message pin 604, and a command pin 605. For example, a point-of-use phase controller 642 may communicate with the high voltage upper phase controller 130. The point-of-use phase controller 642 may receive operating power from the positive voltage pin 601 and the common voltage pin 602. The source pin 603 may be connected to the source sheet 610 and may be a Kelvin sense (source) terminal for reducing the gate drive sensitivity of the di / dt to the source terminal. The point-of-use phase controller 642 may receive commands from the command pin 605 and may send and receive messages on the message pin 604. However, the present disclosure is not limited thereto, and pins 601 to 605 may be used in any configuration suitable for the application.

[0078] For example, the use point phase controller 642 may receive a gate turn-on command via the command pin 605. Based on the gate turn-on command, the use point phase controller 642 may use the north gate trace 621 to turn on the gate of the north phase switch 644-N and may use the south gate trace 622 to turn on the gate of the south phase switch 644-S. This in turn may turn on the north phase switch 644-N and the south phase switch 644-S so that current flows between the source plate 610 and the drain plate 615. The use point phase controller 642 may use the north sense trace 623 to the south sense trace 624 to monitor the north phase switch 644-N and the south phase switch 644-S.

[0079] The use point phase controller 642 can be a multi-output integrated gate driver that is integrated into a power module 640 having a northern phase switch 644-N and a southern phase switch 644-S, with multiple gate drive outputs to independently drive the northern phase switch 644-N and the southern phase switch 644-S. The use point phase controller 642 can provide multiple gate drive outputs without adding additional pins to the power module 640. The use point phase controller 642 can be set on a power module 640 (including SiC grains 1 to 7) having a northern phase switch 644-N and a southern phase switch 644-S. The use point phase controller 642 can be an application specific integrated circuit (ASIC). The use point phase controller 642 may include a first gate drive output northern gate trace 621 targeted at the northern phase switch 644-N (e.g., SiC grains 1 to 4), and a second gate drive output southern gate trace 622 targeted at the southern phase switch 644-S (e.g., SiC grains 5 to 7). The north phase switch 644-N may have a first source inductance and the south phase switch 644-S may have a second source inductance that is lower than or different from the first source inductance. The point-of-use phase controller 642 may include a gate drive output that is a current output digital to analog converter so that the current flowing into each SiC gate of the north phase switch 644-N and the south phase switch 644-S is approximately equal.

[0080] The use of the point phase controller 642 can allow the north phase switch 644-N and the south phase switch 644-S to be turned on much more equally because the gate-to-source voltage varies according to the charge delivered to the gate. The gates of the north phase switch 644-N and the south phase switch 644-S can be allowed to move independently with the source of the corresponding group, which can prevent the gate-to-source voltage of the higher inductance group from being pinched off. The use of the point phase controller 642 can provide a much better turn-on and turn-off current distribution between the north phase switch 644-N and the south phase switch 644-S relative to a single output gate driver or a driver with only one gate drive output. Better turn-on and turn-off current distribution can allow transient current stress to be distributed much more evenly between SiC grains 1 to 7, which can improve the long-term reliability of the north phase switch 644-N and the south phase switch 644-S, the power module 640, the inverter 110 and the electric vehicle 100.

[0081] Figure 7 Depicted is an exemplary connection layout for a power module including a multi-output integrated gate driver according to one or more embodiments. Figure 7 For example, for Figure 6 The connections of the power module 640 are shown. Figure 7 As shown, the point-of-use phase controller 642 may have eight connection points.

[0082] The command pin 605 may be one of the four pins (positive voltage pin 601, common voltage pin 602, message pin 604, and command pin 605) connected to the point-of-use phase controller 642. Figure 6 and Figure 7 As shown, source pin 603 may be connected to source tab 610 . Figure 7 The north sense trace 623 and the south sense trace 624 are depicted as two connections to the use point phase controller 642. The north gate trace 621 and the south gate trace 622 can be two connections to the use point phase controller 642 and can connect the use point phase controller 642 to the north phase switch 644-N and the south phase switch 644-S, respectively.

[0083] Figure 7Further depicted are, for example, gate connector 631 and die connector 632 for the southern phase switch 644-S. Gate connector 631 may provide a path from the southern gate trace 622 to the gate of the southern phase switch 644-S, and die connector 632 may provide a path through the die of the southern phase switch 644-S for current flow between the source and drain tabs 610 and 615. Other SiC die for the southern phase switch 644-S and the northern phase switch 644-N may have similar structures, and therefore, gate connector 631 and die connector 632 are not labeled for each SiC die in the power module 640.

[0084] Figure 8 An exemplary block diagram for a multi-output integrated gate driver according to one or more embodiments is depicted. Figure 8 As shown, the use point phase controller 642 may include connection points for the positive voltage pin 601, the common voltage pin 602, the message pin 604, and the command pin 605. The use point phase controller 642 may include connection points for the north gate trace 621, the south gate trace 622, the north sense trace 623, and the south sense trace 624.

[0085] The use point phase controller 642 may include a north gate driver 810N, a south gate driver 810S, and a current sensor 820. The use point phase controller 642 may sense the gate to source voltage of the north phase switch 644-N relative to the north sense trace 623, and sense the gate to source voltage of the south phase switch 644-S relative to the south sense trace 624. In addition to being used for current sensing, this gate to source voltage sensing may also be used for the north sense trace 623 and the south sense trace 624. For example, the north gate driver 810N may include a north switch control and diagnostic controller 850N, which may be a specific implementation of the north switch control and diagnostic controller 450N. For example, the south gate driver 810S may include a south switch control and diagnostic controller 850S, which may be a specific implementation of the south switch control and diagnostic controller 450S.

[0086] The north gate driver 810N and the south gate driver 810S may include circuits for monitoring and controlling the north phase switch 644-N and the south phase switch 644-S as needed. For example, the north gate trace 621 may be driven with a varying pull gate current driver and a varying sink gate current driver based on the command pin 605. Respectively, the pull gate current driver may have an amplitude time-varying value for the on cycle of the north phase switch 644-N, and the sink gate current driver may have an amplitude time-varying value for the off cycle of the north phase switch. The pull gate current driver and the sink gate current driver may be dynamically selected by operation of the corresponding switch based on the corresponding on and off control signals from the north switch control and diagnostic controller 850N. Sensing and control methods can be used to select a pull gate current driver and a sink gate current driver to drive the gate terminal of the north phase switch element 644-N to minimize switching losses based on one or more of inherent parameters of the north phase switch element 644-N, parameter drift over the service life of the north phase switch element 644-N, or changes in the operating temperature of the north phase switch element 644-N.

[0087] like Figure 8 As shown, both the north phase switch 644-N and the south phase switch 644-S may have independent gate driver systems. The south gate driver 810S may operate in a similar manner to the north gate driver 810N.

[0088] For example, the northern phase switching element 644-N and the southern phase switching element 644-S may include multiple devices (i.e., multiple SiC grains) in parallel to deliver the maximum requested power to the load. Due to the device parameter mismatch caused by the non-ideal manufacturing process of the SiC device, the load current may not be shared equally between the parallel devices during both switching and conduction operations. However, the use point phase controller 642 can independently drive the gate terminal of each device or device group. The independent drive can provide an opportunity to arrange the turn-on and turn-off timing and the calculated gate current curve to minimize the current imbalance in the parallel devices. For example, in the case when two devices are connected in parallel, if one device (or a group of devices connected in parallel) has a higher threshold voltage than the second device, the turn-on of the device with the lower threshold voltage may be delayed relative to the turn-on time of the device with the higher threshold voltage, thereby causing a relatively equal current size flowing in the two devices. During the off period, the device with the higher threshold voltage can be a device with a delayed turn-off timing, which is opposite to the delay of the turn-on event. The independent drive provides uniform and relatively equal temperatures between paralleled devices and relatively matched long term life.

[0089] In addition to introducing turn-on / off delays between unmatched groups of devices, unique gate drive curves can be calculated to further balance and improve current sharing between groups of devices. The use point phase controller 642 can minimize current imbalance between parallel connected devices by prioritizing turn-on and turn-off delay timing and calculating appropriate gate drive curves between devices.

[0090] Fig. 9 Depicted are exemplary turn-on graphs for a system with a single output gate driver and exemplary turn-on graphs for a system with a multi-output integrated gate driver according to one or more embodiments. Fig. 9 Depicted is a situation where, for a single gate connection, even if the devices are matched with respect to threshold, the devices closest to the source pad have smaller inductance than those located further away from the source pad, and therefore reach higher peak currents. This can cause a mismatch in peak current.

[0091] Single output gate driver turn-on graph 910 depicts the initial turn-on current for eight SiC die. Fig. 9 As shown, for a single output gate driver, some SiC dies with lower threshold voltages may share unequal current loads, as shown by the four SiC dies having initial peak currents from about 160 A to about 240 A relative to the four SiC dies with higher threshold voltages and initial peak currents from about 40 A to about 70 A when the device reaches a steady-state on-current of about 95 A. The four SiC dies with higher peak currents may experience higher transient current stress, which may cause failure of the SiC device.

[0092] The multi-output gate driver turn-on graph 920 depicts the initial turn-on current for seven SiC die. Fig. 9 As shown, for a multi-output gate driver and relative to a single output gate driver, all SiC dies can share a much equal current load, as shown by the SiC dies having an initial peak current from about 90A to about 160A when the device reaches a steady-state on-current of about 105A.

[0093] Here, the use point phase controller 642 can, for example, independently drive the gate terminal of each device or group of devices. The independent drive can provide an opportunity to arrange the turn-on timing and the calculated gate current curve to minimize the current imbalance in the parallel devices. For example, in the case when two devices are connected in parallel, if one device (or a group of devices connected in parallel) has a higher threshold voltage than the second device, the turn-on of the device with the lower threshold voltage may be delayed relative to the turn-on time of the device with the higher threshold voltage, thereby causing relatively equal current magnitudes to flow in the two devices. The independent drive can provide uniform and relatively equal temperatures and relatively matched long-term lifespans between parallel devices.

[0094] Fig.10 Depicted are exemplary turn-off graphs for a system with a single output gate driver and exemplary turn-off graphs for a system with a multi-output integrated gate driver according to one or more embodiments. Fig.10 Devices with matched thresholds are depicted, with the difference being that devices close to the source have lower parasitic source inductance than those further away from the source. However, because all gates are connected, the devices closest to the source turn off faster than those further away from the source.

[0095] Single output gate driver turn-off graph 1010 depicts the turn-off current for eight SiC dies. Fig.10 As shown, for a single output gate driver, some SiC dies with lower threshold voltages may share unequal current loads, as shown by three SiC dies having a peak current of approximately 100 A near a steady-state on-current of approximately 95 A relative to five SiC dies with higher threshold voltages and peak currents. The three SiC dies with higher peak currents may experience higher transient current stress, which may cause failure of the SiC device.

[0096] The multi-output gate driver turn-off graph 1020 depicts the turn-off current for seven SiC dies. Fig.10 As shown, for a multi-output gate driver and relative to a single output gate driver, all SiC dies can share a much equal current load, as shown by the SiC dies having approximately equal currents from a steady-state on-current of approximately 105A to a steady-state off-current of approximately 0A.

[0097] Here, the use point phase controller 642 can, for example, independently drive the gate terminal of each device or group of devices. The independent drive can provide an opportunity to arrange the turn-off timing and the calculated gate current curve to minimize the current imbalance in the parallel devices. For example, in the case when two devices are connected in parallel, if one device (or a group of devices connected in parallel) has a higher threshold voltage than the second device, the turn-off of the device with the higher threshold voltage may be delayed relative to the turn-off time of the device with the lower threshold voltage, thereby causing relatively equal current magnitudes flowing in the devices. The independent drive can provide uniform and relatively equal temperatures and relatively matched long-term lifespans between parallel devices.

[0098] One or more embodiments may provide an integrated gate driver having multiple gate drive outputs. The integrated gate driver may provide multiple gate drive outputs without adding additional pins to the power module. The integrated gate driver may be provided on a power module having a SiC die. The integrated gate driver may be an application specific integrated circuit (ASIC). One or more embodiments may provide a multi-output integrated gate driver having a first gate drive output targeting a first group of one or more SiC die and a second gate drive output targeting a second group of one or more SiC die. The first group of one or more SiC die may have a first source inductance, and the second group of one or more SiC die may have a second source inductance that is higher than the first source inductance. The integrated gate driver may include a gate drive output as a current output digital to analog converter so that the current flowing into each SiC gate of the first group and the second group is approximately equal.

[0099] One or more embodiments may allow the two groups of SiC die to turn on more equally because the gate-to-source voltage varies according to the charge added to the gate. The gates of the two groups of SiC die may be allowed to move independently with the sources of the respective groups, which may prevent the gate-to-source voltage of the higher inductance group from being pinched off. One or more embodiments may provide much better turn-on and turn-off current distribution between the SiC device groups relative to a single output gate driver with only one gate drive output. Better turn-on and turn-off current distribution may allow transient current stress to be distributed much more evenly between the SiC die, which may improve the long-term reliability of the SiC devices.

[0100] Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein.It is intended that the specification and examples be considered exemplary only, with the true scope and spirit of the invention being indicated by the following claims.

Claims

1. A system comprising: An inverter configured to convert DC power from a battery into AC power to drive a motor, wherein the inverter comprises: A power module, the power module comprising: Drain plate; Source plate; a first power switch including a first gate terminal configured to control a flow of a first current between the drain plate and the source plate; a second power switch including a second gate terminal configured to control a flow of a second current between the drain pad and the source pad; and One or more controllers configured to provide a first signal to the first gate terminal and a second signal to the second gate terminal. 2 . The system of claim 1 , wherein the one or more controllers include one or more point-of-use controllers on the power module having the first power switch and the second power switch. 3 . The system of claim 1 , wherein the drain sheet is configured to connect to a positive terminal of the battery and the source sheet is configured to connect to a phase terminal of the motor. 4 . The system of claim 1 , wherein the source sheet is configured to connect to a negative terminal of the battery and the drain sheet is configured to connect to a phase terminal of the motor.

5. The system of claim 1, wherein the power module further comprises: Command pin, The one or more controllers are further configured to receive a gate command via the command pin, and provide the first signal to the first gate terminal and the second signal to the second gate terminal based on the received gate command. 6 . The system of claim 1 , wherein the one or more controllers are further configured to delay providing the first signal to the first gate terminal relative to providing the second signal to the second gate terminal. 7 . The system of claim 1 , wherein the first power switch comprises a first silicon carbide die and the second power switch comprises a second silicon carbide die.

8. The system of claim 1, further comprising: the battery, the battery being configured to supply the DC power to the inverter; as well as The motor is configured to receive the AC power from the inverter to drive the motor.

9. A system comprising: A power module, the power module is for an inverter for an electric vehicle, the power module comprising: Drain plate; Source plate; a first power switch, the first power switch comprising a first gate terminal, the first gate terminal being configured to control the flow of current between the drain plate and the source plate; a second power switch including a second gate terminal configured to control a flow of current between the drain pad and the source pad; and One or more controllers configured to provide a first signal to the first gate terminal and a second signal to the second gate terminal.

10. The system of claim 9, wherein the first power switch comprises a first set of silicon carbide grains and the second power switch comprises a second set of silicon carbide grains. 11 . The system of claim 9 , wherein the first power switch has a first gate threshold voltage and the second power switch has a second gate threshold voltage different from the first gate threshold voltage. 12 . The system of claim 9 , wherein the first power switch has a first source inductance, and the second power switch has a second source inductance different from the first source inductance. 13 . The system of claim 9 , wherein the one or more controllers are configured to provide the first signal to the first gate terminal independently of providing the second signal to the second gate terminal.

14. The system according to claim 9, the power module further comprising: Command pin, The one or more controllers are further configured to receive a gate command via the command pin, and provide the first signal to the first gate terminal and the second signal to the second gate terminal based on the received gate command.

15. A system comprising: One or more point-of-use controllers, the one or more point-of-use controllers being for a power module for an inverter, the one or more point-of-use controllers being configured to: Receive gate commands; generating a first signal to a first gate terminal of a first power switch based on the received gate command; and A second signal to a second gate terminal of a second power switch is generated based on the received gate command.

16. The system of claim 15, wherein the one or more point-of-use controllers are further configured to generate the first signal based on a first source inductance of the first power switch and to generate the second signal based on a second source inductance of the second power switch.

17. The system of claim 15, wherein the one or more point-of-use controllers are further configured to: receiving a first sensing signal from the first power switching component; generating the first signal based on the first sensing signal; receiving a second sensing signal from the second power switching component; as well as The second signal is generated based on the second sensing signal.

18. The system of claim 15, wherein the one or more point-of-use controllers are further configured to: controlling a first current through the first power switch using the first signal; and The second signal is used to control a second current through the second power switch.

19. The system of claim 18, wherein the one or more point-of-use controllers are further configured to: During one or more of a turn-on or turn-off event of the first power switch and the second power switch, the first current through the first power switch is controlled to be approximately equal to the second current through the second power switch.

20. The system of claim 18, wherein the one or more point-of-use controllers are further configured to generate the first signal based on one or more of an intrinsic parameter of the first power switch, a parameter drift over the useful life of the first power switch, or a change in an operating temperature of the first power switch.

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