Schematic circuit diagram surveying and mapping device and method

Abstract

The invention relates to a schematic circuit diagram surveying and mapping device and method, and belongs to the technical field of surveying and mapping. The device comprises an industrial personal computer, a VI curve tester and a flying probe tester; the flying probe tester is used for measuring nodes on the circuit board; each node corresponds to one pin or welding spot; the VI curve tester is used for measuring the VI curve of the node; and the industrial control computer is used for generating netlist information based on the VI curve and drawing a schematic circuit diagram based on the netlist information. According to the schematic circuit diagram surveying and mapping device, the nodes on the circuit board are measured through the flying probe testing machine, the voltage-current data of the nodes are obtained through the VI curve tester, the data are processed through the industrial personal computer to generate netlist information and the schematic circuit diagram, lossless surveying and mapping can be achieved, the workload of manual surveying and mapping is greatly reduced, and the surveying and mapping efficiency is improved. The method has the characteristics of high precision and high efficiency, and can greatly improve the accuracy and efficiency of surveying and mapping the schematic circuit diagram.

Description

Technical Field

[0001] The present invention relates to the field of surveying and mapping technology, and in particular to a circuit schematic surveying and mapping device and method. Background Art

[0002] When inspecting and repairing circuit boards, circuit schematics are a very important piece of information. The efficiency of inspection and repair with drawings is much higher than that without drawings, and the means are also much richer. However, in many cases, circuit boards in the maintenance and support stage lack drawings, especially complex and high value-added circuit boards.

[0003] There are several methods for measuring and mapping the circuit schematic of a circuit board: Method 1: Visual observation, supplemented by a multimeter to confirm the relationship between component pins (nodes), obtain the node connection relationship (netlist information), and then draw and organize the circuit schematic. This method is low-cost, but the entire process is manual, and the workload increases exponentially with the complexity of the circuit board. It is only suitable for very simple circuit boards.

[0004] Method 2: Grind and copy the board to get an accurate PCB diagram, based on which the node connection relationship (netlist information) is obtained, and then the circuit schematic is drawn and sorted. Manual operation increases the workload linearly with the complexity of the circuit board. Software such as NAPCB, CBR, and P2S can slightly improve efficiency, but grinding the board will damage the circuit board, and it is mostly used in R&D and imitation scenarios.

[0005] Method 3: Use X-ray / CT to non-destructively map the circuit board, and use a multimeter to confirm the relationship between the pins (nodes) of the components, obtain the node connection relationship (netlist information), and then draw and organize the circuit schematic. Rough tracing, schematic drawing, and organization processes are manual operations, and the workload increases linearly with the complexity of the circuit board. Since precise tracing is not required, it is only necessary to ensure that the node topology relationship is correct, so the workload is smaller than that of method 2. Industrial X-ray is suitable for circuit boards with 4 layers or less, and industrial CT is suitable for complex multi-layer boards, but the cost is higher. Summary of the invention

[0006] In view of this, it is necessary to provide a circuit schematic diagram surveying and mapping device and method to solve the problem of how to reduce the circuit schematic diagram surveying and mapping cost and improve the surveying and mapping efficiency.

[0007] In order to solve the above problems, the present invention provides a circuit schematic diagram surveying and mapping device, comprising: Industrial control computers, VI curve testers and flying probe testers; The flying probe tester is used to measure nodes on a circuit board; each node corresponds to a pin or a solder point; The VI curve tester is used to measure the VI curve of the node; The industrial control computer is used to generate netlist information based on the VI curve and draw a circuit schematic based on the netlist information.

[0008] In a possible implementation, the industrial control computer is specifically used for: Based on the netlist information, generating a circuit schematic sketch in a circuit drawing software; Based on the schematic sketch of the circuit, group the components by function; The node connections are optimized based on the grouped components, and the circuit schematic is drawn.

[0009] In a possible implementation, the flying probe tester includes: Camera, L-shaped extension arm and L-shaped probe; The flying probe tester also includes a three-axis or mechanical arm; The L-shaped probe is connected to the L-shaped extension arm; The L-shaped extension arm is connected to the three axes or the mechanical arm.

[0010] In a possible implementation, the number of the cameras is 2, and the cameras are respectively arranged above and below the circuit board.

[0011] In a possible implementation, the number of the L-shaped extension arms and the number of the L-shaped probes are both 4, wherein 2 L-shaped probes and 2 L-shaped extension arms are arranged above the circuit board, and 2 L-shaped probes and 2 L-shaped extension arms are arranged below the circuit board.

[0012] In a possible implementation, the number of the three axes or the robotic arms is 4, and the three axes or the robotic arms are arranged on the outside of the circuit board.

[0013] In a possible implementation, the method further includes: A multimeter is used to perform auxiliary measurement and verification on the node.

[0014] In a possible implementation, the VI curve tester has a netlist mapping function.

[0015] The present invention also provides a circuit schematic diagram surveying and mapping method, which is applied to the circuit schematic diagram surveying and mapping device described in any of the above implementations, comprising: Based on the pins or solder joints on the image of the circuit board, the nodes on the circuit board are measured by a flying probe tester; the image is a front image and a back image captured by a camera; Measuring the VI curve of the node by a VI curve tester; Netlist information is generated based on the VI curve by an industrial control computer, and a circuit schematic is drawn based on the netlist information.

[0016] In a possible implementation, before measuring the nodes on the circuit board by a flying probe tester based on the pins or solder joints on the image of the circuit board, the method further includes: The three-conformal coating on the circuit board is removed.

[0017] The beneficial effects of the present invention are as follows: the circuit schematic diagram surveying and mapping device and method provided by the present invention include an industrial control computer, a VI curve tester and a flying probe tester. The nodes on the circuit board are measured by the flying probe tester, the voltage-current data of the nodes are obtained by the VI curve tester, and the industrial control computer processes these data to generate netlist information and circuit schematic diagrams. The circuit board will not be damaged during surveying and mapping, and non-destructive surveying and mapping is realized, which greatly reduces the workload of manual surveying and mapping, has low cost, has the characteristics of high precision and high efficiency, and can greatly improve the accuracy and efficiency of circuit schematic diagram surveying and mapping. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 A structural flow chart of an embodiment of the circuit principle diagram surveying and mapping device provided by the present invention; Figure 2 A schematic structural diagram of an embodiment of a flying probe tester provided by the present invention; Figure 3 One of the method flow charts of an embodiment of the circuit schematic diagram surveying and mapping method provided by the present invention; Figure 4 This is a second method flow chart of an embodiment of the circuit schematic diagram mapping method provided by the present invention. DETAILED DESCRIPTION

[0020] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0021] In the description of the embodiments of the present invention, unless otherwise specified, "multiple" means two or more than two. "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, "A and / or B" may mean: A exists alone, A and B exist at the same time, and B exists alone.

[0022] The descriptions of "first", "second", etc. involved in the embodiments of the present invention are only for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the technical features defined as "first" or "second" may explicitly or implicitly include at least one of the features.

[0023] Figure 1 A structural flow chart of an embodiment of the circuit schematic diagram surveying and mapping device provided by the present invention is as follows: Figure 1 As shown, the circuit schematic diagram surveying and mapping device comprises: Industrial control computer 110, VI curve tester 120 and flying probe tester 130; The flying probe tester 130 is used to measure nodes on a circuit board; each node corresponds to a pin or a solder joint; The VI curve tester 120 is used to measure the VI curve of the node; The industrial control computer 110 is used to generate netlist information based on the VI curve, and draw a circuit schematic based on the netlist information.

[0024] It should be noted that the circuit schematic is essentially the connection relationship between electronic components and connector pins (nodes) on the circuit board.

[0025] The flying probe tester is used to measure each node on the circuit board. The node refers to the pin or solder joint on the circuit board, which is the key point of circuit connection. The flying probe tester can accurately contact each pin or solder joint on the circuit board through a precise mechanical structure and high-precision probes to perform electrical testing.

[0026] The VI curve tester is used to measure the voltage-current (VI) curve of each node contacted by the flying probe tester. The VI curve tester applies a certain voltage to the nodes on the circuit board and measures the generated current to obtain a series of voltage-current data points. These data points are used to draw the VI curve, which can reflect the electrical characteristics of the node.

[0027] The industrial computer is the carrier of the software and the core of control. As the control and data processing center of the entire surveying and mapping device, the industrial computer is responsible for receiving the data provided by the VI curve tester, generating netlist information based on these data, and finally drawing the circuit schematic.

[0028] The industrial computer first receives the voltage-current data transmitted by the VI curve tester, and uses this data to analyze the electrical characteristics of each node on the circuit board. Then, based on the analysis results, the industrial computer automatically generates netlist information, which is a table that describes the connection relationship between each component in the circuit. Finally, the industrial computer will use the netlist information and related circuit drawing software (such as EDA, Protel, Altium Designer, etc.) to automatically draw the circuit schematic.

[0029] Compared with the prior art, the circuit schematic surveying and mapping device provided in the embodiment of the present invention includes an industrial control computer, a VI curve tester and a flying probe tester. The nodes on the circuit board are measured by the flying probe tester, and the voltage-current data of the nodes are obtained by the VI curve tester. The industrial control computer processes these data to generate netlist information and circuit schematics. The circuit board will not be damaged during surveying and mapping, and non-destructive surveying and mapping is realized, which greatly reduces the workload of manual surveying and mapping, has low cost, has the characteristics of high precision and high efficiency, and can greatly improve the accuracy and efficiency of circuit schematic surveying and mapping.

[0030] In some embodiments of the present invention, the industrial control computer is specifically used for: Based on the netlist information, generating a circuit schematic sketch in a circuit drawing software; Based on the schematic sketch of the circuit, group the components by function; The node connections are optimized based on the grouped components, and the circuit schematic is drawn.

[0031] Netlist information is the bridge between circuit schematic design (Sch) and printed circuit board design (PCB), and contains the connection information of all components in the circuit. Circuit drawing software can include EDA, Protel, Altium Designer, etc. In the selected circuit drawing software, import the netlist information, use the software's drawing tools, and gradually draw the circuit schematic sketch according to the component connection relationship in the netlist information.

[0032] In the schematic sketch, identify all components and group them according to their functions. For example, power supply, signal conditioning, processor, AD, DA, etc. can be classified separately. Grouping can take into account the functional relevance and signal flow between components to ensure that components in the same group are functionally related to each other, which is convenient for subsequent analysis and optimization.

[0033] Based on the grouped components, analyze the node connections between the components, identify possible redundant connections, cross connections or unnecessary connection points, and optimize them.

[0034] For example, the connection paths can be simplified by re-layouting components or adjusting the direction of connection lines to simplify the connection paths between nodes. The number of connection points can be reduced, and unnecessary connection points can be merged or eliminated to reduce circuit complexity and failure rate. The signal flow direction can be optimized. According to the signal flow direction and component functions, the layout and connection order of components can be adjusted to ensure that the signal can be transmitted and processed smoothly.

[0035] In the circuit drawing software, the circuit schematic is redrawn according to the optimized node connection.

[0036] In some embodiments of the present invention, the flying probe tester comprises: Camera, L-shaped extension arm and L-shaped probe; The flying probe tester also includes a three-axis or mechanical arm; The L-shaped probe is connected to the L-shaped extension arm; The L-shaped extension arm is connected to the three axes or the mechanical arm.

[0037] In some embodiments of the present invention, the number of the cameras is 2, and the cameras are respectively arranged above and below the circuit board.

[0038] In some embodiments of the present invention, the number of the L-shaped extension arms and the L-shaped probes is 4, wherein 2 L-shaped probes and 2 L-shaped extension arms are arranged above the circuit board, and 2 L-shaped probes and 2 L-shaped extension arms are arranged below the circuit board.

[0039] In some embodiments of the present invention, the number of the three axes or the robotic arms is 4, and the three axes or the robotic arms are arranged on the outside of the circuit board.

[0040] Figure 2 A schematic diagram of the structure of an embodiment of a flying probe tester provided by the present invention is shown in FIG. Figure 2 As shown, the flying probe tester is a simple 4-flying probe tester. The simple 4-flying probe tester uses 4 three-axis systems, 2 flying probes above the circuit board and 2 flying probes below the circuit board.

[0041] If a robotic arm is used, mature shelf products with high cost performance can be selected. If a three-axis is used, shelf products can be modified or customized.

[0042] The flying probe tester includes: a camera, an L-shaped extension arm and an L-shaped probe. The flying probe tester also includes a three-axis or robotic arm.

[0043] The number of cameras is 2, and the cameras are respectively arranged above and below the circuit board, and are used to collect images of the front side and the back side of the circuit board respectively.

[0044] The L-shaped extension arm is used to connect and support the L-shaped probe, which is used to contact nodes on the circuit board for testing. The three-axis or robotic arm is used to provide precise movement capabilities to position the L-shaped extension arm and the L-shaped probe.

[0045] The L-shaped probes are connected to L-shaped extension arms, and the number is 4, wherein 2 L-shaped probes and 2 L-shaped extension arms are arranged above the circuit board, and 2 L-shaped probes and 2 L-shaped extension arms are arranged below the circuit board.

[0046] Through the customized L-shaped extension arm and L-shaped probe structure, the three-axis / robotic arm main structure is located on the outside of the circuit board, which makes it convenient for the probe to measure the information between any two nodes of the circuit board, and also facilitates the software to control the probes on both sides to intersect without interference. Compared with the traditional flying probe system, this system is simple to operate, cost-effective and easy to promote.

[0047] By placing the circuit board on a simple 4-probe flying probe tester and installing laser pointers on the three-axis / robotic arm 1 and 3, the computer software moves the three-axis / robotic arm to the corresponding node based on the image information in the previous step, and manually fine-tunes the three-axis / robotic arm through the image magnified by the camera to accurately locate each node.

[0048] Replace the laser pointer with an elastic probe, select the characteristic nodes of the circuit board, such as the nodes at the four corners, fine-tune and record the calibration values ​​in the software so that the probe can touch the corresponding nodes as accurately as possible when it falls.

[0049] In some embodiments of the present invention, it further includes: The multimeter 140 is used to perform auxiliary measurement and verification on the node.

[0050] In some embodiments of the present invention, the VI curve tester has a netlist mapping function.

[0051] The VI curve tester should be equipped with the function of measuring and mapping the netlist, such as the ProbeASA-5 VI curve tester produced by Beijing Huineng Weicai. The VI curve tester has the function of measuring and mapping the netlist, which can automatically generate the tabular information of the circuit network and improve the efficiency and accuracy of the measurement and mapping.

[0052] A general programmable multimeter can be used as the multimeter, which is used to assist in measuring and verifying the nodes to ensure the accuracy of the surveying and mapping results.

[0053] Figure 3 One of the method flow charts of an embodiment of the circuit schematic diagram mapping method provided by the present invention is as follows Figure 3 As shown, the circuit schematic diagram mapping method includes: S301, measuring nodes on the circuit board by a flying probe tester based on pins or solder joints on the image of the circuit board; the image is a front image and a back image captured by a camera; S302, measuring the VI curve of the node by a VI curve tester; S303 , generating netlist information based on the VI curve by an industrial control computer, and drawing a circuit schematic diagram based on the netlist information.

[0054] The circuit schematic diagram surveying and mapping method provided by the present invention may be executed by the circuit schematic diagram surveying and mapping device described in any of the above implementations.

[0055] In S301, the circuit board needs to be cleaned first, making sure to remove the conformal coating as much as possible (if any) so that the probe can accurately contact the nodes on the circuit board. Then use a camera to take images of the front and back of the circuit board, analyze these photos to identify all pins or solder joints, and assign a unique identifier to each node. Place the circuit board in the appropriate position of the simple flying probe tester, and use a laser pen mounted on the robotic arm to assist in locating the nodes. Through software control, adjust the position of the robotic arm according to the information of the previously taken photos so that it is accurately aligned with each node. Finally, replace the laser pen with an elastic probe to complete the calibration and correction of the position of each node.

[0056] In S302, a VI curve tester is used to obtain the electrical characteristic data of each node under different conditions (such as different power supply states). Specifically, a grounding point on the back of the circuit board is selected as the reference ground, and the node to be tested is selected from the front for testing. For each pair of selected node combinations, the on-resistance value between them and the corresponding VI curve are recorded. In addition, for those cases where the value cannot be read normally due to poor contact or other reasons, manual intervention and adjustment are required until a valid result is obtained.

[0057] In S303, all the data collected previously are processed using a specially designed software tool. First, a preliminary network topology is established based on the actual connection relationship between each node; then, based on the known component types and their typical parameter settings, the main components such as resistor R, capacitor C, diode D, etc. are automatically identified and represented in symbolic form. Subsequently, the relevant components are classified and sorted according to functional requirements, such as listing the power management part separately and displaying the signal processing unit as an independent module. The final circuit schematic diagram is generated, which contains all the key components and their interconnections.

[0058] Compared with the prior art, the circuit schematic mapping method provided in the embodiment of the present invention uses a flying probe tester to measure the nodes on the circuit board, uses a VI curve tester to obtain the voltage-current data of the nodes, and uses an industrial control computer to process these data to generate netlist information and circuit schematics. The circuit board will not be damaged during mapping, and non-destructive mapping is achieved, which greatly reduces the workload of manual mapping. It has the characteristics of high precision and high efficiency, and can greatly improve the accuracy and efficiency of circuit schematic mapping.

[0059] In some embodiments of the present invention, before measuring the nodes on the circuit board by a flying probe tester based on the pins or solder joints on the image of the circuit board, the method further includes: The three-conformal coating on the circuit board is removed.

[0060] By cleaning the circuit board, the components and solder joints of the circuit board are cleaned. For circuit boards with triple-conformal coatings, the triple-conformal coatings need to be removed, which can facilitate reliable electrical contact between the probe and the solder joints, thereby improving the accuracy of measurement.

[0061] Optionally, Figure 4 The second method flow chart of an embodiment of the circuit schematic diagram surveying and mapping method provided by the present invention is as follows: Figure 4 As shown, the surveying and mapping process is as follows: S401. Clean the circuit board.

[0062] Clean the circuit board components and solder joints as much as possible. For circuit boards with conformal coating, the conformal coating needs to be removed to ensure reliable electrical contact between the probe and the solder joints.

[0063] S402: Analyze circuit board node information.

[0064] Take photos of the front and back of the circuit board. Regardless of the components, choose pins or solder points that are easy to measure. Each pin or solder point corresponds to a node. For plug-in components, you only need to select one node on the front or back. Mark the nodes without omission or duplication on the photos of the front and back of the circuit board, and number them.

[0065] If the silk-screen printing of components on the circuit board can be identified, the logo on the silk-screen printing is preferred. If it is difficult to identify, a custom logo is required. Components are generally represented by corresponding letters, such as resistor R, capacitor C, inductor L, diode D, chip U. They can be numbered according to the serial number, for example, the resistor is marked as R1, and the two nodes are marked as R1_1 and R1_2.

[0066] S403: Accurately locate the node position.

[0067] Place the circuit board on a simple 4-probe flying probe tester and install laser pointers on the three-axis / robotic arm 1 and 3. The computer software moves the three-axis / robotic arm to the corresponding node based on the image information in the previous step. Through the image magnified by the camera, manually fine-tune the three-axis / robotic arm to accurately locate each node.

[0068] S404, calibrate the flying probe tester with replacement probes.

[0069] Replace the laser pointer with an elastic probe, select the characteristic nodes of the circuit board, such as the nodes at the four corners, fine-tune and record the calibration values ​​in the software so that the probe can touch the corresponding nodes as accurately as possible when it falls.

[0070] S405. Automatically measure VI curves of all nodes.

[0071] For example, when collecting the VI curve of the node on the front of the circuit board, select a ground point on the back of the circuit board as the input ground of the VI curve tester, and vice versa. A few nodes with poor contact or position deviation that lead to incorrect measurement require manual intervention.

[0072] S406: Generate netlist information.

[0073] The nodes are divided into multiple groups according to the VI curve, and the connection relationship between the nodes is confirmed by measuring the on-resistance between the nodes in each group. A few nodes with poor contact or position deviation that lead to incorrect measurement are manually intervened to generate netlist information based on the node conduction relationship.

[0074] S407. Generate a circuit schematic sketch.

[0075] According to the netlist information, resistors R, capacitors C, inductors L, diodes D, etc. generally use characteristic symbols, and chips U, modules, etc. can be represented by rectangles, so as to generate circuit schematic sketches with network labels and schematic symbols in circuit EDA software (such as Protel / Altium Designer). To improve efficiency, the script function of circuit EDA software can be used to automatically generate according to the netlist information.

[0076] S408, components (with network labels) are grouped by function.

[0077] Group circuit components according to their expected functions, such as power supply, signal conditioning, processor, AD, DA, etc. S409. Optimize circuit schematic symbols.

[0078] The first is to rename special network labels, such as power and ground directly named according to their meanings, such as +3.3V and GND, and use corresponding circuit diagram symbols; the second is to split special chips, such as quad op amps, into four separate modules for easy understanding as a principle.

[0079] S410, optimizing circuit node connections.

[0080] If a network label only corresponds to two component pins, the network label is usually replaced by a wire. If a group of connections is relatively regular, such as a data bus, it can be represented by bus + network label to facilitate understanding as a principle.

[0081] S411. Optimize circuit diagram layout.

[0082] Organized according to classic circuits (chip manuals, classic analog circuits), circuit diagrams used for design should be divided according to function as much as possible, and it is advisable to use multiple diagrams. Circuit diagrams used for fault inspection during maintenance should be used to facilitate viewing of signal flow, and it is more appropriate to use a single large diagram.

[0083] The circuit schematic diagram surveying and mapping device and method provided by the present invention have the following advantages: 1. Non-destructive mapping, no need to destroy the circuit board.

[0084] Second, it is fast. The nodes are initially grouped using VI curves, and then accurately grouped using a multimeter, reducing the complexity from exponential level to linear function level. The flying probe tester is then used for rapid execution, with only a few abnormal nodes requiring manual intervention.

[0085] 3. High accuracy. In this process, the subsequent steps automatically check the previous steps, and each step can be reviewed, so the accuracy is high.

[0086] 4. Low cost. The entire system uses mature industrial modules, which makes the cost controllable and easy to promote.

[0087] Those skilled in the art will appreciate that all or part of the processes of the above-mentioned embodiments can be implemented by instructing related hardware (such as a processor, a controller, etc.) through a computer program, and the computer program can be stored in a computer-readable storage medium, wherein the computer-readable storage medium is a disk, an optical disk, a read-only storage memory, or a random access memory, etc.

[0088] The circuit schematic diagram mapping device and method provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A circuit schematic diagram surveying and mapping device, characterized in that: include: Industrial control computers, VI curve testers and flying probe testers; The flying probe tester is used to measure nodes on a circuit board; each node corresponds to a pin or a solder point; The VI curve tester is used to measure the VI curve of the node; The industrial control computer is used to generate netlist information based on the VI curve and draw a circuit schematic based on the netlist information.

2. The circuit schematic diagram surveying and mapping device according to claim 1, characterized in that: The industrial control computer is specifically used for: Based on the netlist information, generating a circuit schematic sketch in a circuit drawing software; Based on the schematic sketch of the circuit, group the components by function; The node connections are optimized based on the grouped components, and the circuit schematic is drawn.

3. The circuit schematic diagram surveying and mapping device according to claim 1, characterized in that: The flying probe tester comprises: Camera, L-shaped extension arm and L-shaped probe; The flying probe tester also includes a three-axis or mechanical arm; The L-shaped probe is connected to the L-shaped extension arm; The L-shaped extension arm is connected to the three axes or the mechanical arm.

4. The circuit schematic diagram surveying and mapping device according to claim 3, characterized in that: The number of the cameras is 2, and the cameras are respectively arranged above and below the circuit board.

5. The circuit schematic diagram surveying and mapping device according to claim 3, characterized in that: The number of the L-shaped extension arms and the number of the L-shaped probes are both 4, wherein 2 L-shaped probes and 2 L-shaped extension arms are arranged above the circuit board, and 2 L-shaped probes and 2 L-shaped extension arms are arranged below the circuit board.

6. The circuit schematic diagram surveying and mapping device according to claim 3, characterized in that: The number of the three axes or the mechanical arms is 4, and the three axes or the mechanical arms are arranged on the outside of the circuit board.

7. The circuit schematic diagram surveying and mapping device according to claim 1, characterized in that: Also includes: A multimeter is used to perform auxiliary measurement and verification on the node.

8. The circuit schematic diagram surveying and mapping device according to claim 1, characterized in that: The VI curve tester has the function of measuring and mapping the netlist.

9. A circuit schematic mapping method, characterized in that: The circuit schematic diagram surveying and mapping device used in any one of claims 1 to 9 comprises: Based on the pins or solder joints on the image of the circuit board, the nodes on the circuit board are measured by a flying probe tester; the image is a front image and a back image captured by a camera; Measuring the VI curve of the node by a VI curve tester; Netlist information is generated based on the VI curve by an industrial control computer, and a circuit schematic is drawn based on the netlist information.

10. The circuit schematic diagram surveying and mapping method according to claim 9, characterized in that: Before measuring the nodes on the circuit board by a flying probe tester based on the pins or solder joints on the image of the circuit board, the method further includes: The three-conformal coating on the circuit board is removed.

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