Driving module, driving method and display device

Abstract

The invention provides a driving module, a driving method and a display device. The driving module comprises N stages of driving circuits; n is an integer greater than 1; m and n are positive integers; m is greater than 1 and n is greater than m; the driving module further comprises a local display control circuit, a first scanning control switch circuit and a second scanning control switch circuit; the local display control circuit is used for controlling the starting voltage end to be communicated with the local input end under the control of a display mode control signal in a local display mode; the first scanning control switch circuit is used for controlling the local input end to be communicated with the mth input end under the control of a scanning control signal during forward scanning in a local display mode; and the second scanning control switch circuit controls the local input end to be communicated with the nth input end during reverse scanning in the local display mode. According to the invention, local display can be realized on the premise of reducing power consumption.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a driving module, a driving method and a display device. Background Art

[0002] The related local display scheme is to display the non-local display area in black and the local display area as the target image. When the related local display scheme is adopted, the power consumption of the driving module is high. Summary of the invention

[0003] The main purpose of the present invention is to provide a driving module, a driving method and a display device to solve the problem of high power consumption when realizing local display in the related art.

[0004] In one aspect, an embodiment of the present invention provides a driving module, comprising an N-level driving circuit; N is an integer greater than 1; the m-th level driving circuit in the N-level driving circuit is a starting level driving circuit, the n-th level driving circuit in the N-level driving circuit is a cut-off level driving circuit, m and n are positive integers; m is greater than 1, and n is greater than m; the driving module further comprises a local display control circuit, a first scanning control switch circuit, and a second scanning control switch circuit;

[0005] The local display control circuit is electrically connected to the display mode control terminal, the starting voltage terminal and the local input terminal, and is used to control the connection between the starting voltage terminal and the local input terminal under the control of the display mode control signal provided by the display mode control terminal in the local display mode;

[0006] The first scanning control switch circuit is electrically connected to the scanning control terminal, the local input terminal and the m-th input terminal respectively, and is used to control the connection between the local input terminal and the m-th input terminal under the control of the scanning control signal provided by the scanning control terminal during forward scanning in the local display mode, wherein the m-th input terminal is the input terminal of the initial stage driving circuit;

[0007] The second scan control switch circuit is electrically connected to the scan control terminal, the local input terminal and the nth input terminal respectively, and is used to control the connection between the local input terminal and the nth input terminal under the control of the scan control signal during reverse scanning in the local display mode; the nth input terminal is the input terminal of the cut-off stage driving circuit.

[0008] Optionally, the local display control circuit includes a local display control transmission gate; the display mode control terminal includes a first display mode control terminal and a second display mode control terminal;

[0009] The positive phase control terminal of the local display control transmission gate is electrically connected to the first display mode control terminal, the negative phase control terminal of the local display control transmission gate is electrically connected to the second display mode control terminal, the first terminal of the local display control transmission gate is electrically connected to the starting voltage terminal, and the second terminal of the local display control transmission gate is electrically connected to the local input terminal;

[0010] The first scan control switch circuit includes a first scan control transmission gate, and the second scan control switch circuit includes a second scan control transmission gate; the scan control terminal includes a forward scan control terminal and a reverse scan control terminal;

[0011] The positive phase control terminal of the first scan control transmission gate is electrically connected to the positive scan control terminal, the negative phase control terminal of the first scan control transmission gate is electrically connected to the reverse scan control terminal, the first terminal of the first scan control transmission gate is electrically connected to the local input terminal, and the second terminal of the first scan control transmission gate is electrically connected to the mth input terminal;

[0012] The positive phase control end of the second scan control transmission gate is electrically connected to the reverse scan control end, the reverse phase control end of the second scan control transmission gate is electrically connected to the positive scan control end, the first end of the second scan control transmission gate is electrically connected to the local input end, and the second end of the second scan control transmission gate is electrically connected to the nth input end.

[0013] Optionally, the initial stage driving circuit includes an m-th stage driving signal generating circuit, a first initial switching circuit and a second initial switching circuit;

[0014] The m-th stage driving signal generating circuit is electrically connected to the m-th input terminal and the m-th cascade output terminal respectively, and is used for generating an m-th cascade signal through the m-th cascade output terminal according to the m-th input signal connected to the m-th input terminal;

[0015] The first starting switch circuit is electrically connected to the display mode control terminal, the mth input terminal and the first starting node respectively, and is used to control the connection or disconnection between the mth input terminal and the first starting node under the control of the display mode control signal provided by the display mode control terminal;

[0016] The second starting switch circuit is electrically connected to the display mode control terminal, the mth cascade output terminal and the second starting node respectively, and is used to control the connection or disconnection between the mth cascade output terminal and the second starting node under the control of the display mode control signal.

[0017] Optionally, the first start switch circuit includes a first start switch transmission gate, the second start switch circuit includes a second start switch transmission gate, and the display mode control terminal includes a first display mode control terminal and a second display mode control terminal;

[0018] The positive phase control terminal of the first start switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the first start switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the first start switch transmission gate is electrically connected to the mth input terminal, and the second terminal of the first start switch transmission gate is electrically connected to the first start node;

[0019] The positive phase control terminal of the second start switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the second start switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the second start switch transmission gate is electrically connected to the mth cascade output terminal, and the second terminal of the second start switch transmission gate is electrically connected to the second start node.

[0020] Optionally, the initial stage driving circuit further includes an mth forward scanning control circuit and an mth reverse scanning control circuit;

[0021] The mth forward scanning control circuit is electrically connected to the scanning control terminal, the mth cascade output terminal and the mth forward scanning output node respectively, and is used to control the connection between the mth cascade output terminal and the mth forward scanning output node under the control of the scanning control signal when performing forward scanning;

[0022] The mth reverse scan control circuit is electrically connected to the scan control terminal, the mth input terminal and the mth reverse scan input node respectively, and is used to control the connection between the mth input terminal and the mth reverse scan input node under the control of the scan control signal when performing reverse scan;

[0023] The m-th stage driving signal generating circuit is also electrically connected to the m-th driving signal output terminal, and is used to generate and provide the m-th driving signal through the m-th driving signal output terminal according to the m-th input signal.

[0024] Optionally, the mth forward scan control circuit includes an mth forward scan control transmission gate, and the mth reverse scan control circuit includes an mth reverse scan control transmission gate; the scan control terminal includes a forward scan control terminal and a reverse scan control terminal;

[0025] The positive phase control end of the mth positive scan control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the mth positive scan control transmission gate is electrically connected to the reverse scan control end, the first end of the mth positive scan control transmission gate is electrically connected to the mth cascade output end, and the second end of the mth positive scan control transmission gate is electrically connected to the mth positive scan output node;

[0026] The positive phase control end of the mth reverse scan control transmission gate is electrically connected to the reverse scan control end, the negative phase control end of the mth reverse scan control transmission gate is electrically connected to the positive scan control end, the first end of the mth reverse scan control transmission gate is electrically connected to the mth input end, and the second end of the mth reverse scan control transmission gate is electrically connected to the mth reverse scan input node.

[0027] Optionally, the m-th level driving signal generating circuit includes an m-th level D flip-flop and an m-th AND gate;

[0028] The input terminal of the m-th stage D flip-flop is electrically connected to the m-th input terminal, the control terminal of the m-th stage D flip-flop is electrically connected to the first control clock signal terminal, the first output terminal of the m-th stage D flip-flop is electrically connected to the m-th cascade output terminal, and the second output terminal of the m-th stage D flip-flop is electrically connected to the m-th output terminal;

[0029] The first input terminal of the mth AND gate is electrically connected to the mth output terminal, the second input terminal of the mth AND gate is electrically connected to the mth cascade output terminal, and the output terminal of the mth AND gate is electrically connected to the mth driving signal output terminal.

[0030] Optionally, the cut-off stage driving circuit includes an n-th stage driving signal generating circuit, an n-th forward scanning control circuit, an n-th reverse scanning control circuit, a first cut-off switch circuit and a second cut-off switch circuit;

[0031] The n-stage driving signal generating circuit is electrically connected to the n-th input terminal and the n-th cascade output terminal respectively, and is used to generate and provide an n-th cascade signal through the n-th cascade output terminal according to the n-th input signal connected to the n-th input terminal;

[0032] The nth forward scanning control circuit is electrically connected to the scanning control terminal, the nth cascade output terminal and the nth forward scanning output node respectively, and is used to control the connection between the nth cascade output terminal and the nth forward scanning output node under the control of the scanning control signal when performing forward scanning;

[0033] The nth reverse scan control circuit is electrically connected to the scan control terminal, the nth input terminal and the nth reverse scan input node respectively, and is used to control the connection between the nth input terminal and the nth reverse scan input node under the control of the scan control signal when performing reverse scan;

[0034] The first cut-off switch circuit is electrically connected to the display mode control terminal, the nth positive scan output node and the first cut-off node respectively, and is used to control the connection or disconnection between the nth positive scan output node and the first cut-off node under the control of the display mode control signal provided by the display mode control terminal;

[0035] The second cutoff switch circuit is electrically connected to the display mode control terminal, the nth reverse scan input node and the second cutoff node respectively, and is used to control the connection or disconnection between the nth reverse scan input node and the second cutoff node under the control of the display mode control signal.

[0036] Optionally, the nth forward scan control circuit comprises an nth forward scan control transmission gate; the scan control terminal comprises a forward scan control terminal and a reverse scan control terminal;

[0037] The positive phase control end of the nth positive scan control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the nth positive scan control transmission gate is electrically connected to the negative scan control end, the first end of the nth positive scan control transmission gate is electrically connected to the nth cascade output end, and the second end of the nth positive scan control transmission gate is electrically connected to the nth positive scan output node;

[0038] The nth reverse scan control circuit comprises an nth reverse scan control transmission gate;

[0039] The positive phase control terminal of the nth reverse scan control transmission gate is electrically connected to the reverse scan control terminal, the negative phase control terminal of the nth reverse scan control transmission gate is electrically connected to the positive scan control terminal, the first terminal of the nth reverse scan control transmission gate is electrically connected to the nth input terminal, and the second terminal of the nth reverse scan control transmission gate is electrically connected to the nth reverse scan input node;

[0040] The first cutoff switch circuit includes a first cutoff switch transmission gate; the display mode control terminal includes a first display mode control terminal and a second display mode control terminal;

[0041] The positive phase control terminal of the first cut-off switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the first cut-off switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the first cut-off switch transmission gate is electrically connected to the nth positive scan output node, and the second terminal of the first cut-off switch transmission gate is electrically connected to the first cut-off node;

[0042] The second cutoff switch circuit includes a second cutoff switch transmission gate;

[0043] The positive phase control terminal of the second cut-off switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the second cut-off switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the second cut-off switch transmission gate is electrically connected to the nth reverse scan input node, and the second terminal of the second cut-off switch transmission gate is electrically connected to the second cut-off node.

[0044] Optionally, the nth stage driving signal generating circuit is also electrically connected to the nth driving signal output terminal, and is used to generate and provide the nth driving signal through the nth driving signal output terminal according to the nth input signal.

[0045] Optionally, the nth stage driving signal generating circuit includes an nth stage D flip-flop and an nth AND gate;

[0046] The input terminal of the n-th stage D flip-flop is electrically connected to the n-th input terminal, the control terminal of the n-th stage D flip-flop is electrically connected to the second control clock signal terminal, the first output terminal of the n-th stage D flip-flop is electrically connected to the n-th cascade output terminal, and the second output terminal of the n-th stage D flip-flop is electrically connected to the n-th output terminal;

[0047] The first input terminal of the nth AND gate is electrically connected to the mth output terminal, the second input terminal of the nth AND gate is electrically connected to the nth cascade output terminal, and the output terminal of the nth AND gate is electrically connected to the nth drive signal output terminal.

[0048] The driving module described in at least one embodiment of the present invention further includes a global display control circuit;

[0049] The global display control circuit is electrically connected to the display mode control terminal, the starting voltage terminal and the global input terminal respectively, and is used to control the connection between the starting voltage terminal and the global input terminal under the control of the display mode control signal in the global display mode.

[0050] Optionally, the global display control circuit includes a global display control transmission gate; the display mode control terminal includes a first display mode control terminal and a second display mode control terminal;

[0051] The positive phase control terminal of the global display control transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the global display control transmission gate is electrically connected to the first display mode control terminal, the first terminal of the global display control transmission gate is electrically connected to the starting voltage terminal, and the second terminal of the global display control transmission gate is electrically connected to the global input terminal.

[0052] The driving module described in at least one embodiment of the present invention further includes A positive scan input control circuits; A is a positive integer;

[0053] The ath positive scan input control circuit is electrically connected to the global input terminal, the ath positive scan start control terminal, the scan control terminal and the ath input terminal respectively, and is used for performing forward scanning in the global display mode, and when scanning starts from the ath level driving circuit among the N-level driving circuits, under the control of the ath positive scan start control signal provided by the ath positive scan start control terminal and the scan control signal provided by the scan control terminal, controlling the connection between the global input terminal and the ath input terminal; the ath input terminal is the input terminal of the ath level driving circuit;

[0054] a is a positive integer less than or equal to A.

[0055] Optionally, the ath forward scan input control circuit includes an ath first forward scan input control transmission gate and an ath second forward scan input control transmission gate; the scan control terminal includes a forward scan control terminal and a reverse scan control terminal;

[0056] The positive phase control terminal of the a-th first positive scan input control transmission gate is electrically connected to the a-th positive scan start control terminal, the negative phase control terminal of the a-th first positive scan input control transmission gate is electrically connected to the a-th negative phase positive scan start control terminal, the first terminal of the a-th first positive scan input control transmission gate is electrically connected to the global input terminal, and the second terminal of the a-th first positive scan input control transmission gate is electrically connected to the first terminal of the a-th second positive scan input control transmission gate;

[0057] The positive phase control end of the ath second positive scan input control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the ath second positive scan input control transmission gate is electrically connected to the negative scan control end, and the second end of the ath second positive scan input control transmission gate is electrically connected to the ath input end.

[0058] Optional, A is greater than 1;

[0059] The b-th level driving circuit includes the b-1-th control cutoff circuit; b is an integer less than or equal to A and greater than 1;

[0060] The b-1th control cut-off circuit is electrically connected to the b-th positive scan start control terminal, the b-th input terminal and the b-1th positive scan output node respectively, and is used for controlling the connection or disconnection between the b-th input terminal and the b-1th positive scan output node under the control of the b-th positive scan start control signal provided by the b-th positive scan start control terminal;

[0061] The b-th input terminal is the input terminal of the b-th stage driving circuit in the N-stage driving circuits.

[0062] Optionally, the b-1th control cutoff circuit includes a b-1th control cutoff transmission gate; the scanning control terminal includes a forward scanning control terminal and a reverse scanning control terminal;

[0063] The positive phase control end of the b-1th control cutoff transmission gate is electrically connected to the b-th negative phase positive scan start control end, the negative phase control end of the b-1th control cutoff transmission gate is electrically connected to the b-th positive scan start control end, the first end of the b-1th control cutoff transmission gate is electrically connected to the b-th input end, and the second end of the b-1th control cutoff transmission gate is electrically connected to the b-1th positive scan output node.

[0064] Optionally, the b-1th stage driving circuit in the N-stage driving circuit includes a b-1th positive scan control transmission gate;

[0065] The positive phase control end of the b-1th positive scan control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the b-1th positive scan control transmission gate is electrically connected to the negative scan control end, the first end of the b-1th positive scan control transmission gate is electrically connected to the b-1th cascade output end, and the second end of the b-1th positive scan control transmission gate is electrically connected to the b-1th positive scan output node; the b-1th cascade output end is the cascade output end of the b-1th level driving circuit.

[0066] The driving module described in at least one embodiment of the present invention further includes a first reverse scan input control circuit;

[0067] The first reverse scan input control circuit is electrically connected to the global input terminal, the first reverse scan start control terminal, the scan control terminal and the Nth input terminal respectively, and is used for performing reverse scanning in the global display mode, and when scanning starts from the Nth level driving circuit in the Nth level driving circuit, under the control of the first reverse scan start control signal provided by the first reverse scan start control terminal, controlling the connection between the global input terminal and the Nth input terminal; the Nth input terminal is the input terminal of the Nth level driving circuit in the Nth level driving circuit.

[0068] Optionally, the first anti-scan input control circuit includes a first first anti-scan input control transmission gate and a second first anti-scan input control transmission gate;

[0069] The positive phase control terminal of the first first reverse scan input control transmission gate is electrically connected to the first reverse scan start control terminal, the negative phase control terminal of the first first reverse scan input control transmission gate is electrically connected to the first reverse reverse scan start control terminal, the first end of the first first reverse scan input control transmission gate is electrically connected to the global input terminal, and the second end of the first first reverse scan input control transmission gate is electrically connected to the first end of the second first reverse scan input control transmission gate;

[0070] The positive phase control end of the second first reverse scan input control transmission gate is electrically connected to the reverse scan control end, the negative phase control end of the second first reverse scan input control transmission gate is electrically connected to the positive scan control end, and the second end of the second first reverse scan input control transmission gate is electrically connected to the Nth input end.

[0071] The driving module described in at least one embodiment of the present invention further includes C reverse scan input control circuits; C is a positive integer;

[0072] The c+1th reverse scan input control circuit is electrically connected to the global input terminal, the c+1th reverse scan start control terminal and the Ncth reverse scan input node respectively, and is used to perform reverse scanning in the global display mode, and when scanning starts from the Ncth level driving circuit in the N-level driving circuit, control the connection between the global input terminal and the Ncth reverse scan input node; c is a positive integer less than or equal to C.

[0073] Optionally, the c+1th reverse scan input control circuit includes a c+1th reverse scan input control transmission gate;

[0074] The positive phase control terminal of the c+1th reverse scan input control transmission gate is electrically connected to the c+1th reverse scan start control terminal, the negative phase control terminal of the c+1th reverse scan input control transmission gate is electrically connected to the c+1th reverse scan start control terminal, the first terminal of the c+1th reverse scan input control transmission gate is electrically connected to the global input terminal, and the second terminal of the c+1th reverse scan input control transmission gate is electrically connected to the Ncth reverse scan input node.

[0075] The driving module described in at least one embodiment of the present invention further includes C cut-off circuits;

[0076] The cth cut-off circuit is electrically connected to the c+1th reverse scan start control terminal, the N-c+1th cascade output terminal and the Ncth reverse scan input node, respectively, and is used to control the connection or disconnection between the Ncth reverse scan input node and the N-c+1th cascade output terminal under the control of the c+1th reverse scan start control signal provided by the c+1th reverse scan start control terminal.

[0077] Optionally, the c-th cut-off circuit includes a c-th cut-off transmission gate;

[0078] The positive phase control terminal of the cth cut-off transmission gate is electrically connected to the c+1th negative reverse scan start control terminal, the negative phase control terminal of the cth cut-off transmission gate is electrically connected to the c+1th reverse scan start control terminal, the first end of the cth cut-off transmission gate is electrically connected to the Ncth reverse scan input node, and the second end of the cth cut-off transmission gate is electrically connected to the N-c+1th cascade output terminal.

[0079] In a second aspect, an embodiment of the present invention provides a driving method, which is applied to the above-mentioned driving module. The driving method comprises: in a partial display mode,

[0080] The local display control circuit controls the connection between the starting voltage terminal and the local input terminal under the control of the display mode control signal;

[0081] During forward scanning, the first scanning control switch circuit controls the local input terminal to be connected to the mth input terminal under the control of the scanning control signal, and the mth input terminal is the input terminal of the initial stage driving circuit;

[0082] During reverse scanning, the second scanning control switch circuit controls the connection between the local input terminal and the nth input terminal under the control of the scanning control signal; the nth input terminal is the input terminal of the cutoff stage driving circuit.

[0083] In a third aspect, an embodiment of the present invention provides a display device, comprising the above-mentioned driving module.

[0084] When the driving module, driving method and display device described in the embodiments of the present invention are working, in the local display mode, only the local display area of ​​the entire screen displays the target image, and the non-local display area does not work. Compared with the related driving modules, the driving module described in the embodiments of the present invention has reduced power consumption and can be applied to small silicon-based OLED (organic light-emitting diode) display products with limited resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0085] Figure 1 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0086] Figure 2 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0087] Figure 3 is a structural diagram of at least one embodiment of the initial stage driving circuit in the driving module;

[0088] Figure 4 is a structural diagram of at least one embodiment of the initial stage driving circuit;

[0089] Figure 5 is a structural diagram of at least one embodiment of the initial stage driving circuit;

[0090] Figure 6 is a structural diagram of at least one embodiment of the initial stage driving circuit;

[0091] Fig. 7A is a structural diagram of at least one embodiment of the initial stage driving circuit;

[0092] Figure 7B is Fig. 7A The circuit diagrams of TGP and TG1 are added on the basis of the previous one;

[0093] Figure 7C is a schematic diagram of the working state of at least one embodiment of the initial stage driving circuit;

[0094] Figure 8 is a structural diagram of at least one embodiment of a cutoff stage driving circuit in the driving module;

[0095] Fig. 9 is a structural diagram of at least one embodiment of the cut-off stage driving circuit;

[0096] Fig.10 is a circuit diagram of at least one embodiment of the cut-off stage driving circuit;

[0097] Fig.11A is a circuit diagram of at least one embodiment of the cut-off stage driving circuit;

[0098] Fig. 11B is Fig.11A The circuit diagram of adding TGP and TG2 on the basis of

[0099] Fig. 11C is a schematic diagram of the working state of at least one embodiment of the cut-off stage driving circuit;

[0100] Fig.12 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0101] Fig.13 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0102] Fig.14 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0103] Fig.15 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0104] Fig.16 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0105] Fig.17 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0106] Fig.18 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0107] Fig.19 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0108] Fig. 20 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0109] Fig.21 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0110] Fig. 22 is a structural diagram of a driving module according to at least one embodiment of the present invention;

[0111] Fig.23A is a circuit diagram of a first-stage driving circuit, a second-stage driving circuit and a third-stage driving circuit in a driving module according to at least one embodiment of the present invention;

[0112] Fig. 23B is a circuit diagram of a first-stage driving circuit, a second-stage driving circuit, a third-stage driving circuit and a fourth-stage driving circuit in a driving module according to at least one embodiment of the present invention;

[0113] Fig.23C is a circuit diagram of an m-th stage driving circuit to an n-th stage driving circuit in a driving module according to at least one embodiment of the present invention;

[0114] Fig.23D is a circuit diagram of the N-3-th stage driving circuit to the N-th stage driving circuit in the driving module according to at least one embodiment of the present invention;

[0115] Fig.24A yes Fig. 23B The circuit diagram of the first part B1 in FIG.

[0116] Fig. 24B yes Fig. 23B A circuit diagram of the second part B2 in FIG.

[0117] Fig.24C yes Fig.23C The circuit diagram of the third part B3 in FIG.

[0118] Fig.24D yes Fig.23C The circuit diagram of the fourth part B4 in FIG.

[0119] Fig.24E yes Fig.23D The circuit diagram of the fifth part B5 in FIG.

[0120] Fig.24F yes Fig.23D Circuit diagram of the sixth part B6 in FIG. DETAILED DESCRIPTION

[0121] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0122] The transistors used in all embodiments of the present invention may be thin film transistors or field effect transistors or other devices with the same characteristics. In the embodiments of the present invention, to distinguish the two electrodes of the transistor except the gate, one electrode is called the first electrode and the other electrode is called the second electrode.

[0123] In actual operation, when the transistor is a thin film transistor or a field effect transistor, the first electrode may be a drain electrode, and the second electrode may be a source electrode; or, the first electrode may be a source electrode, and the second electrode may be a drain electrode.

[0124] The driving module described in the embodiment of the present invention includes N-level driving circuits; N is an integer greater than 1; the m-th level driving circuit in the N-level driving circuits is a starting level driving circuit, the n-th level driving circuit in the N-level driving circuits is a cut-off level driving circuit, m and n are positive integers; m is greater than 1, and n is greater than m; Figure 1 As shown, the driving module further includes a local display control circuit 11, a first scanning control switch circuit 12 and a second scanning control switch circuit 13;

[0125] The local display control circuit 11 is electrically connected to the display mode control terminal ENP, the starting voltage terminal STV and the local input terminal PI, and is used to control the connection between the starting voltage terminal STV and the local input terminal PI under the control of the display mode control signal provided by the display mode control terminal ENP in the local display mode;

[0126] The first scanning control switch circuit 12 is electrically connected to the scanning control terminal GSD, the local input terminal PI and the m-th input terminal Sm respectively, and is used to control the connection between the local input terminal PI and the m-th input terminal Sm under the control of the scanning control signal provided by the scanning control terminal GSD during forward scanning in the local display mode, wherein the m-th input terminal Sm is the input terminal of the initial stage driving circuit;

[0127] The second scan control switch circuit 13 is electrically connected to the scan control terminal GSD, the local input terminal PI and the nth input terminal Sn respectively, and is used to control the connection between the local input terminal PI and the nth input terminal Sn under the control of the scan control signal during reverse scanning in the local display mode; the nth input terminal Sn is the input terminal of the cut-off stage driving circuit.

[0128] exist Figure 1 Among them, the one labeled GAm is the m-th level driving circuit, and the one labeled GAn is the n-th level driving circuit.

[0129] When the driving module described in the embodiment of the present invention is working, in the local display mode, the local display control circuit 11 controls the connection between the starting voltage terminal STV and the local input terminal PI under the control of the display mode control signal provided by the display mode control terminal ENP, so as to write the starting voltage provided by the starting voltage terminal STV into the local input terminal PI; in the local display mode, during forward scanning, the first scanning control switch circuit 12 controls the connection between the local input terminal PI and the mth input terminal Sm under the control of the scanning control signal provided by the scanning control terminal GSD, so as to write the starting voltage into the input terminal of the starting stage driving circuit; in the local display mode, during reverse scanning, the second scanning control switch circuit 13 controls the connection between the local input terminal PI and the nth input terminal Sn under the control of the scanning control signal, so as to write the starting voltage into the input terminal of the cut-off stage driving circuit.

[0130] When the driving module described in the embodiment of the present invention is working, in the local display mode, in the entire screen, only the local display area displays the target image, and the non-local display area does not work. Compared with the related driving modules, the driving module described in the embodiment of the present invention has reduced power consumption and can be applied to small silicon-based OLED (organic light-emitting diode) display products with limited resources.

[0131] When the relevant driving module is working, it controls the non-local display area to display a black picture and the local display area to display a target image, and the power consumption of the relevant driving module is relatively high.

[0132] When the driving module described in the embodiment of the present invention is working, in the global display mode, the local display control circuit 11 controls the disconnection between the starting voltage terminal STV and the local input terminal PI under the control of the display mode control signal provided by the display mode control terminal ENP, so as to stop writing the starting voltage provided by the starting voltage terminal STV into the local input terminal PI.

[0133] In at least one embodiment of the present invention, the driving module may be applied to a silicon-based OLED (organic light emitting diode) micro display, but is not limited thereto.

[0134] The embodiment of the present invention provides a driving module capable of realizing partial display of a screen, the driving module comprising a starting stage driving circuit, a cut-off stage driving circuit, a partial display control circuit, a first scanning control switch circuit and a second scanning switch circuit; the partial display control circuit writes a starting voltage to a partial input terminal under the control of a display mode control signal in a partial display mode;

[0135] In the local display mode, during forward scanning, the first scanning control switch circuit controls the local input terminal to be connected to the input terminal of the initial stage driving circuit under the control of the scanning control signal, and writes the initial voltage into the input terminal of the initial stage driving circuit;

[0136] In the local display mode, during reverse scanning, the second scanning control switch circuit controls the local input terminal PI to be connected to the input terminal of the cut-off stage driving circuit under the control of the scanning control signal, and writes the starting voltage into the input terminal of the cut-off stage driving circuit;

[0137] Through the above settings, the local display function can be performed.

[0138] In at least one embodiment of the present invention, Figure 2 As shown, in Figure 1 Based on at least one embodiment of the driving module shown, the local display control circuit may include a local display control transmission gate TGP; the display mode control terminal includes a first display mode control terminal EN_PART and a second display mode control terminal EN_PART';

[0139] The positive phase control terminal of the local display control transmission gate TGP is electrically connected to the first display mode control terminal EN_PART, the negative phase control terminal of the local display control transmission gate TGP is electrically connected to the second display mode control terminal EN_PART', the first terminal of the local display control transmission gate TGP is electrically connected to the starting voltage terminal STV, and the second terminal of the local display control transmission gate TGP is electrically connected to the local input terminal PI;

[0140] The first scan control switch circuit includes a first scan control transmission gate TG1, and the second scan control switch circuit includes a second scan control transmission gate TG2; the scan control terminal includes a forward scan control terminal GSD_FW and a reverse scan control terminal GSD_BW;

[0141] The positive phase control terminal of the first scanning control transmission gate TG1 is electrically connected to the positive scanning control terminal GSD_FW, the negative phase control terminal of the first scanning control transmission gate TG1 is electrically connected to the reverse scanning control terminal GSD_BW, the first end of the first scanning control transmission gate TG1 is electrically connected to the local input terminal PI, and the second end of the first scanning control transmission gate TG1 is electrically connected to the mth input terminal Sm;

[0142] The positive phase control end of the second scanning control transmission gate TG2 is electrically connected to the reverse scanning control end GSD_BW, the negative phase control end of the second scanning control transmission gate TG2 is electrically connected to the positive scanning control end GSD_FW, the first end of the second scanning control transmission gate TG2 is electrically connected to the local input end PI, and the second end of the second scanning control transmission gate TG2 is electrically connected to the nth input end Sn.

[0143] The present invention Figure 2 At least one embodiment shown in FIG. 1 is in operation, in a partial display mode,

[0144] EN_PART provides a high voltage signal, EN_PART' provides a low voltage signal, TGP is turned on, STV is connected to PI, and STV provides a starting voltage to PI;

[0145] When performing forward scanning, GSD_FW provides a high voltage signal, GSD_BW provides a low voltage signal, TG1 is turned on, and PI is connected to Sm to write the starting voltage into Sm;

[0146] When performing reverse scanning, GSD_FW provides a low voltage signal, GSD_BW provides a high voltage signal, TG2 is turned on, and PI is connected to Sn to write the starting voltage into Sn.

[0147] The present invention Figure 2 When at least one embodiment shown is in operation, in the global display mode, EN_PART provides a low voltage signal, EN_PART' provides a high voltage signal, TGP is turned off, and STV is disconnected from PI.

[0148] In at least one embodiment of the present invention, Figure 3 As shown, at least one embodiment of the initial stage driving circuit includes an m-th stage driving signal generating circuit 30, a first initial switch circuit 31 and a second initial switch circuit 32;

[0149] The m-th stage driving signal generating circuit 30 is electrically connected to the m-th input terminal Sm and the m-th cascade output terminal CTm respectively, and is used to generate an m-th cascade signal through the m-th cascade output terminal CTm according to the m-th input signal connected to the m-th input terminal Sm;

[0150] The first start switch circuit 31 is electrically connected to the display mode control terminal ENP, the mth input terminal Sm and the first start node NS1 respectively, and is used to control the connection or disconnection between the mth input terminal Sm and the first start node NS1 under the control of the display mode control signal provided by the display mode control terminal ENP;

[0151] The second start switch circuit 32 is electrically connected to the display mode control terminal ENP, the mth cascade output terminal CTm and the second start node NS2 respectively, and is used for controlling the connection or disconnection between the mth cascade output terminal CTm and the second start node NS2 under the control of the display mode control signal.

[0152] The present invention Figure 3 At least one embodiment shown in FIG. 1 is in operation, in a partial display mode,

[0153] Under the control of the display mode control signal, the first starting switch circuit 31 controls the disconnection between the mth input terminal Sm and the first starting node NS1, and the second starting switch circuit 32 controls the disconnection between the mth cascade output terminal CTm and the second starting node NS2 under the control of the display mode control signal, so as to block the signal transmission path between the starting stage driving circuit and the m-1th stage driving circuit, thereby ensuring local display.

[0154] The present invention Figure 3 At least one embodiment shown in FIG. 1 is in operation, in the global display mode,

[0155] Under the control of the display mode control signal, the first starting switch circuit 31 controls the connection between the mth input terminal Sm and the first starting node NS1, and the second starting switch circuit 32 controls the connection between the mth cascade output terminal CTm and the second starting node NS2 under the control of the display mode control signal, so as to turn on the signal transmission path between the starting stage driving circuit and the m-1th stage driving circuit, thereby enabling global display.

[0156] In at least one embodiment of the present invention, Figure 4 As shown, in Figure 3 Based on at least one embodiment shown, the first start switch circuit includes a first start switch transmission gate TGS1, the second start switch circuit includes a second start switch transmission gate TGS2, and the display mode control terminal includes a first display mode control terminal EN_PART and a second display mode control terminal EN_PART';

[0157] The positive phase control terminal of the first start switch transmission gate TGS1 is electrically connected to the second display mode control terminal EN_PART', the negative phase control terminal of the first start switch transmission gate TGS1 is electrically connected to the first display mode control terminal EN_PART, the first terminal of the first start switch transmission gate TGS1 is electrically connected to the mth input terminal Sm, and the second terminal of the first start switch transmission gate TGS1 is electrically connected to the first start node NS1;

[0158] The positive phase control terminal of the second start switch transmission gate TGS2 is electrically connected to the second display mode control terminal EN_PART', the negative phase control terminal of the second start switch transmission gate TGS2 is electrically connected to the first display mode control terminal EN_PART, the first end of the second start switch transmission gate TGS2 is electrically connected to the mth cascade output terminal CTm, and the second end of the second start switch transmission gate TGS2 is electrically connected to the second start node NS2.

[0159] The present invention Figure 4 At least one embodiment shown is in operation, in the partial display mode, EN_PART' provides a low voltage signal, EN_PART provides a high voltage signal, TGS1 and TGS2 are turned off, Sm is disconnected from NS1, and CTm is disconnected from NS2;

[0160] In the global display mode, EN_PART' provides a high voltage signal, EN_PART provides a low voltage signal, TGS1 and TGS2 are turned on, Sm is connected to NS1, and CTm is connected to NS2.

[0161] In at least one embodiment of the present invention, Figure 5 As shown, in Figure 4 Based on at least one embodiment shown, the initial stage driving circuit further includes an mth forward scanning control circuit 51 and an mth reverse scanning control circuit 52;

[0162] The mth forward scanning control circuit 51 is electrically connected to the scanning control terminal GSD, the mth cascade output terminal CTm and the mth forward scanning output node NTm, respectively, and is used to control the connection between the mth cascade output terminal CTm and the mth forward scanning output node NTm under the control of the scanning control signal when performing forward scanning;

[0163] The mth reverse scan control circuit 52 is electrically connected to the scan control terminal GSD, the mth input terminal Sm and the mth reverse scan input node NIm, respectively, and is used to control the connection between the mth input terminal Sm and the mth reverse scan input node NIm under the control of the scan control signal when performing reverse scanning;

[0164] The m-th stage driving signal generating circuit 30 is also electrically connected to the m-th driving signal output terminal Gm, and is used to generate and provide the m-th driving signal through the m-th driving signal output terminal Gm according to the m-th input signal.

[0165] The present invention Figure 5 At least one embodiment shown in FIG. 1 is in operation.

[0166] When performing forward scanning, the mth forward scanning control circuit 51 controls the connection between the mth cascade output terminal CTm and the mth forward scanning output node NTm under the control of the scanning control signal; the mth reverse scanning control circuit 52 controls the disconnection between the mth input terminal Sm and the mth reverse scanning input node NIm under the control of the scanning control signal;

[0167] When performing reverse scanning, the mth reverse scanning control circuit 52, under the control of the scanning control signal, controls the connection between the mth input terminal Sm and the mth reverse scanning input node NIm; the mth forward scanning control circuit 51, under the control of the scanning control signal, controls the disconnection between the mth cascade output terminal CTm and the mth forward scanning output node NTm.

[0168] In at least one embodiment of the present invention, Figure 6 As shown, in Figure 5 Based on at least one embodiment shown in the figure, the mth forward scan control circuit includes the mth forward scan control transmission gate TGFm, the mth reverse scan control circuit includes the mth reverse scan control transmission gate TGBm; the scan control terminal includes the forward scan control terminal GSD_FW and the reverse scan control terminal GSD_BW;

[0169] The positive phase control terminal of the mth positive scan control transmission gate TGFm is electrically connected to the positive scan control terminal GSD_FW, the negative phase control terminal of the mth positive scan control transmission gate TGFm is electrically connected to the reverse scan control terminal GSD_BW, the first terminal of the mth positive scan control transmission gate TGFm is electrically connected to the mth cascade output terminal CTm, and the second terminal of the mth positive scan control transmission gate TGFm is electrically connected to the mth positive scan output node NTm;

[0170] The positive phase control end of the mth reverse scan control transmission gate TGBm is electrically connected to the reverse scan control end GSD_BW, the negative phase control end of the mth reverse scan control transmission gate TGBm is electrically connected to the positive scan control end GSD_FW, the first end of the mth reverse scan control transmission gate TGBm is electrically connected to the mth input end Sm, and the second end of the mth reverse scan control transmission gate TGBm is electrically connected to the mth reverse scan input node NIm.

[0171] The present invention Figure 6 At least one embodiment shown in FIG. 1 is in operation.

[0172] During forward scanning, GSD_FW provides a high voltage signal, GSD_BW provides a low voltage signal, TGFm is turned on, CTm and NTm are connected; TGBm is turned off, Sm and NIm are disconnected;

[0173] During reverse scanning, GSD_FW provides a low voltage signal, GSW_BW provides a high voltage signal, TGBm is turned on, Sm and NIm are connected; TGFm is turned off, CTm and NTm are disconnected.

[0174] In at least one embodiment of the present invention, Fig. 7A As shown, in Figure 6 Based on at least one embodiment shown, the m-th stage driving signal generating circuit includes an m-th stage D flip-flop DFFm and an m-th AND gate ADm;

[0175] The input terminal of the m-th D flip-flop DFFm is electrically connected to the m-th input terminal Sm, the control terminal of the m-th D flip-flop DFFm is electrically connected to the first control clock signal terminal CK1, the first output terminal of the m-th D flip-flop DFFm is electrically connected to the m-th cascade output terminal CTm, and the second output terminal of the m-th D flip-flop DFFm is electrically connected to the m-th output terminal OTm;

[0176] The first input terminal of the mth AND gate ADm is electrically connected to the mth output terminal OTm, the second input terminal of the mth AND gate ADm is electrically connected to the mth cascade output terminal CTm, and the output terminal of the mth AND gate ADm is electrically connected to the mth driving signal output terminal Gm.

[0177] exist Fig. 7A In the figure, D is the input terminal of the D flip-flop, Q_INTER is the first output terminal of the D flip-flop, Q is the second output terminal of the D flip-flop, CK is the control terminal of the flip-flop, R is the reset terminal of the D flip-flop, GND is the ground terminal, Q' is the inverting output terminal of the D flip-flop, and Vdd is the power supply terminal.

[0178] exist Fig. 7A Among them, the one labeled Fm is the m-th output inverter, and the one labeled GFm is the m-th inverting driving signal output terminal.

[0179] Figure 7B is Fig. 7A The circuit diagrams of TGP and TG1 are added on this basis.

[0180] Figure 7B When at least one embodiment shown is working, in a local display mode, the starting voltage can be written into the starting-level driving circuit, and the control signal transmission direction is forward scanning, thereby achieving the display area above the starting level not working, so as to achieve the effect of the pixel circuit behavior corresponding to the m-th level driving circuit as the starting row of the local display area.

[0181] like Figure 7B As shown, in the local display mode, when scanning forward,

[0182] EN_PART provides a high voltage signal, EN_PART' provides a low voltage signal, TGP is turned on, STV is connected to PI, GSD_FW provides a high voltage signal, GSD_BW provides a low voltage signal, TG1 is turned on, and STV writes the starting voltage to the mth input terminal Sm;

[0183] exist Figure 7B In the figure, the node between TG1 and TGS1 is the signal level transmission end point between the m-1th level driving circuit and the mth level driving circuit, the node between TGS2 and TGFm is the signal level transmission starting point between the mth level driving circuit and the m+1th level driving circuit, and NTm is the signal level transmission end point between the mth level driving circuit and the m+1th level driving circuit.

[0184] Figure 7B At least one embodiment shown in FIG. 1 is in operation.

[0185] When the starting voltage is input to Sm from TGP and TG1, it will pass through the signal level transmission end point, that is, the starting voltage may be transmitted upward or downward; if the starting voltage is transmitted upward, the logic of the starting row module is contrary to the local display requirements, so in order to ensure that the starting voltage is stably transmitted to the downward level, TGS1 is added to the path of the upward transmission to perform switch control; similarly, when the signal passes through DFFm, there is also a signal level transmission starting point between the m-th level driving circuit and the m+1-th level driving circuit, so TGS2 is also needed to be added to the path of the upward transmission to perform switch control;

[0186] like Figure 7C As shown, when EN_PART provides a high voltage signal and EN_PART' provides a low voltage signal, the partial display mode is entered, TGS1 and TGS2 are both disconnected, and the signal transmission direction is controlled to be downward transmission;

[0187] When EN_PART provides a low voltage signal and EN_PART' provides a high voltage signal, the global display mode is entered, TGS1 and TGS2 are both turned on (can be regarded as two wires), and the transmission direction can be selected according to the forward and reverse scan settings.

[0188] In at least one embodiment of the present invention, Figure 8 As shown, at least one embodiment of the cut-off stage driving circuit may include an n-th stage driving signal generating circuit 80, an n-th forward scanning control circuit 81, an n-th reverse scanning control circuit 82, a first cut-off switch circuit 83 and a second cut-off switch circuit 84;

[0189] The n-th stage driving signal generating circuit 80 is electrically connected to the n-th input terminal Sn and the n-th cascade output terminal CTn, respectively, and is used to generate and provide the n-th cascade signal through the n-th cascade output terminal CTn according to the n-th input signal connected to the n-th input terminal Sn;

[0190] The nth forward scanning control circuit 81 is electrically connected to the scanning control terminal GSD, the nth cascade output terminal CTn and the nth forward scanning output node NTn, respectively, and is used to control the connection between the nth cascade output terminal CTm and the nth forward scanning output node NTn under the control of the scanning control signal when performing forward scanning;

[0191] The nth reverse scan control circuit 82 is electrically connected to the scan control terminal GSD, the nth input terminal Sn and the nth reverse scan input node NIn respectively, and is used to control the connection between the nth input terminal Sn and the nth reverse scan input node NIn under the control of the scan control signal when performing reverse scanning;

[0192] The first cut-off switch circuit 83 is electrically connected to the display mode control terminal ENP, the nth positive scan output node NTn and the first cut-off node NJ1 respectively, and is used to control the connection or disconnection between the nth positive scan output node NTn and the first cut-off node NJ1 under the control of the display mode control signal provided by the display mode control terminal ENP;

[0193] The second cut-off switch circuit 84 is electrically connected to the display mode control terminal ENP, the nth reverse scan input node NIn and the second cut-off node NJ2 respectively, and is used to control the connection or disconnection between the nth reverse scan input node NIn and the second cut-off node NJ2 under the control of the display mode control signal.

[0194] The present invention Figure 8 At least one embodiment shown in FIG. 1 is in operation, in a partial display mode,

[0195] The first cut-off switch circuit 83 controls the nth forward scan output node NTn to be disconnected from the first cut-off node NJ1 under the control of the display mode control signal, and the second cut-off switch circuit 84 controls the nth reverse scan input node NIn to be disconnected from the second cut-off node NJ2 under the control of the display mode control signal, so as to disconnect the signal transmission path between the nth stage driving circuit and the n+1th stage driving circuit;

[0196] During forward scanning, the nth forward scanning control circuit 81 controls the connection between the nth cascade output terminal CTm and the nth forward scanning output node NTn under the control of the scanning control signal; the nth reverse scanning control circuit 82 controls the disconnection between the nth input terminal Sn and the nth reverse scanning input node NIn under the control of the scanning control signal;

[0197] During reverse scanning, the nth reverse scanning control circuit 82 controls the connection between the nth input terminal Sn and the nth reverse scanning input node NIn under the control of the scanning control signal; the nth forward scanning control circuit 81 controls the disconnection between the nth cascade output terminal CTm and the nth forward scanning output node NTn under the control of the scanning control signal.

[0198] In at least one embodiment of the present invention, Fig. 9 As shown, in Figure 8 Based on at least one embodiment shown, the nth forward scan control circuit includes an nth forward scan control transmission gate TGFn; the scan control terminal includes a forward scan control terminal GSD_FW and a reverse scan control terminal GSD_BW;

[0199] The positive phase control terminal of the nth positive scan control transmission gate TGFn is electrically connected to the positive scan control terminal GSD_FW, the negative phase control terminal of the nth positive scan control transmission gate TGFn is electrically connected to the reverse scan control terminal GSD_BW, the first terminal of the nth positive scan control transmission gate TGn is electrically connected to the nth cascade output terminal CTn, and the second terminal of the nth positive scan control transmission gate TGn is electrically connected to the nth positive scan output node NTn;

[0200] The nth reverse scan control circuit comprises an nth reverse scan control transmission gate TGBn;

[0201] The positive phase control terminal of the nth reverse scan control transmission gate TGBn is electrically connected to the reverse scan control terminal GSD_BW, the negative phase control terminal of the nth reverse scan control transmission gate TGBn is electrically connected to the positive scan control terminal GSD_FW, the first terminal of the nth reverse scan control transmission gate TGBn is electrically connected to the nth input terminal Sn, and the second terminal of the nth reverse scan control transmission gate TGBn is electrically connected to the nth reverse scan input node NIn;

[0202] The first cut-off switch circuit includes a first cut-off switch transmission gate TGJ1; the display mode control terminal includes a first display mode control terminal EN_PART and a second display mode control terminal EN_PART′;

[0203] The positive phase control terminal of the first cut-off switch transmission gate TGJ1 is electrically connected to the second display mode control terminal EN_PART', the negative phase control terminal of the first cut-off switch transmission gate TGJ1 is electrically connected to the first display mode control terminal EN_PART, the first end of the first cut-off switch transmission gate TGJ1 is electrically connected to the nth positive scan output node NTn, and the second end of the first cut-off switch transmission gate TGJ1 is electrically connected to the first cut-off node NJ1;

[0204] The second cut-off switch circuit includes a second cut-off switch transmission gate TGJ2;

[0205] The positive phase control terminal of the second cut-off switch transmission gate TGJ2 is electrically connected to the second display mode control terminal EN_PART', the negative phase control terminal of the second cut-off switch transmission gate TGJ2 is electrically connected to the first display mode control terminal EN_PART, the first end of the second cut-off switch transmission gate TGJ2 is electrically connected to the nth reverse scan input node NIn, and the second end of the second cut-off switch transmission gate TGJ2 is electrically connected to the second cut-off node NJ2.

[0206] The present invention Fig. 9 At least one embodiment shown is in operation, in a partial display mode, EN_PART provides a high voltage signal, EN_PART' provides a low voltage signal, TGJ1 and TGJ2 are turned off, NTn is disconnected from NJ1, NIn is disconnected from NJ2, and the signal transmission path between the n-th level driving circuit and the n+1-th level driving circuit is disconnected, so that partial display can be performed;

[0207] In the global display mode, EN_PART provides a low voltage signal, EN_PART' provides a high voltage signal, TGJ1 and TGJ2 are turned on, NTn is connected to NJ1, NIn is connected to NJ2, and the signal transmission path between the nth level driving circuit and the n+1th level driving circuit is turned on to enable global display.

[0208] The present invention Fig. 9 At least one embodiment shown in FIG. 1 is in operation.

[0209] In the forward scan, GSD_FW provides a high voltage signal, GSD_BW provides a low voltage signal, TGFn is turned on, TGBn is turned off, CTn is connected to NTn, and Sn is disconnected from Nin;

[0210] During reverse scanning, GSD_FW provides a low voltage signal, GSD_BW provides a high voltage signal, TGBn is turned on, TGFn is turned off, Sn is connected to Nin, and CTn is disconnected from NTn.

[0211] like Fig.10 As shown, in Fig. 9 Based on at least one embodiment shown, the nth stage driving signal generating circuit is also electrically connected to the nth driving signal output terminal Gn, and is used to generate and provide the nth driving signal through the nth driving signal output terminal Gn according to the nth input signal.

[0212] In at least one embodiment of the present invention, Fig.11A As shown, in Fig.10 Based on at least one embodiment shown, the nth stage driving signal generating circuit includes an nth stage D flip-flop DFFn and an nth AND gate ADn;

[0213] The input terminal of the n-th stage D flip-flop DFFn is electrically connected to the n-th input terminal Sn, the control terminal of the n-th stage D flip-flop DFFn is electrically connected to the second control clock signal terminal CK2, the first output terminal of the n-th stage D flip-flop DFFn is electrically connected to the n-th cascade output terminal CTn, and the second output terminal of the n-th stage D flip-flop DFFn is electrically connected to the n-th output terminal OTn;

[0214] The first input terminal of the nth AND gate ADn is electrically connected to the mth output terminal OTn, the second input terminal of the nth AND gate ADn is electrically connected to the nth cascade output terminal CTn, and the output terminal of the nth AND gate ADn is electrically connected to the nth drive signal output terminal Gn.

[0215] In at least one embodiment of the present invention, when the D flip-flop is operating, at the rising edge of the clock signal connected to the control end of the D flip-flop, the signal connected to the input end of the D flip-flop is written to the first output end of the D flip-flop, and at the falling edge of the control signal connected to the control end of the D flip-flop, the signal connected to the first output end of the D flip-flop is written to the second output end of the D flip-flop.

[0216] exist Fig.11A Among them, the one labeled Fn is the n-th output inverter, and the one labeled GFn is the n-th inverting driving signal output terminal.

[0217] Fig.11A A circuit diagram of at least one embodiment of a cut-off stage driving circuit.

[0218] exist Fig.11A In at least one embodiment shown, TGJ1 and TGJ2 are circuit modules for controlling the direction of signal transmission.

[0219] The present invention Fig.11AAt least one embodiment shown is in operation, in the partial display mode, EN_PART provides a high voltage signal, EN_PART' provides a low voltage signal, TGJ1 and TGJ2 are turned off, NIn is disconnected from NJ2, and NTn is disconnected from NJ1, so as to disconnect the signal transmission path between the n-th level driving circuit and the n+1-th level driving circuit;

[0220] In the global display mode, EN_PART provides a low voltage signal, EN_PART' provides a high voltage signal, TGJ1 and TGJ2 are turned on, NIn is connected to NJ2, and NTn is connected to NJ1 to conduct the signal transmission path between the nth level driving circuit and the n+1th level driving circuit.

[0221] Fig. 11B is Fig.11A The circuit diagram of TGP and TG2 is added on the basis of .

[0222] exist Fig. 11B In the figure, the connection node between TG2 and TGBn is the signal transmission end point between the n-th level driving circuit and the n+1-th level driving circuit;

[0223] The connection node between DFFn and TGFn is the signal level transmission starting point between the n-th level driving circuit and the n-1-th level driving circuit.

[0224] The present invention Fig. 11B In at least one embodiment shown, when the starting voltage is written into Sn, the signal faces three shunt paths, namely: transmission to the upper stage, entering DFFn in the nth stage driving circuit, and transmission to the lower stage;

[0225] When the signal is transmitted to the upper-level driving circuit, from a logical analysis, the end point of the path is connected to the Q_INTER of the n-1th driving circuit, that is, the signal is directly output without passing through the D flip-flop in the n-1th driving circuit, which means that there is no interval of one line period between the nth driving signal output by the nth driving circuit and the n-1th driving signal output by the n-1th driving circuit, and the timing is wrong. From a physical structure analysis, the path is a positive scan transmission path, that is, when the scanning mode is the reverse scanning mode, the positive scan control transmission gate in the n-1th driving circuit is turned off, and the path of the signal transmitted from Sn to the upper-level driving circuit is disconnected;

[0226] When the signal enters DFFn in the nth stage driving circuit, this path is the expected input path because as a cutoff stage, it needs to output the current stage driving signal and also needs to transmit the signal level to the input terminal of the D flip-flop in the n-1th stage driving circuit in the reverse scanning mode;

[0227] When the signal is transmitted to the next level of driving circuit, from a logical analysis, the end point of the path is connected to Q_INTER in the n+1th level driving circuit, that is, the signal does not pass through the D flip-flop output in the n+1th level driving circuit, and the timing is wrong; from a physical structure analysis, the path is a reverse scan transmission path. In the reverse scan mode, the reverse scan control transmission gate in the n+1th level driving circuit is turned on, so it is necessary to set TGJ2 controlled by EN_PART and EN_PART' separately to cut off the signal transmission path; in addition, the cut-off level driving circuit is the last level driving circuit of the local display. In the local display mode, the driving circuits below the cut-off level driving circuit should not work, so the path should be disconnected;

[0228] When the signal enters DFFn in the nth level driving circuit, it faces two shunt paths: one is transmitted to the upper level driving circuit, and the other is transmitted to the lower level driving circuit.

[0229] Since the cut-off stage driving circuit needs to realize the reverse scanning mode, the signal needs to be transmitted to the upper stage driving circuit. At the same time, a TGJ1 controlled by EN_PART and EN_PART' needs to be added to the transmission path to the lower stage driving circuit to control the cut-off of the downward transmission path. In summary, when EN_PART provides a high voltage signal and EN_PART' provides a low voltage signal, the partial display mode is entered, and the signal goes along Fig. 11C The solid line in the figure indicates the transmission path; when EN_PART provides a low voltage signal and EN_PART' provides a high voltage signal, the global display mode is entered and the transmission direction is selected according to the forward and reverse scan settings.

[0230] The driving module described in at least one embodiment of the present invention further includes a global display control circuit;

[0231] The global display control circuit is electrically connected to the display mode control terminal, the starting voltage terminal and the global input terminal respectively, and is used to control the connection between the starting voltage terminal and the global input terminal under the control of the display mode control signal in the global display mode.

[0232] In a specific implementation, the driving module may further include a global display control circuit; in a global display mode, the global display control circuit controls the connection between the starting voltage terminal and the global input terminal under the control of the display mode control signal to control the writing of the starting voltage into the global input terminal.

[0233] like Fig.12 As shown, in Figure 1 Based on at least one embodiment shown, the driving module described in at least one embodiment of the present invention further includes a global display control circuit 111;

[0234] The global display control circuit 111 is electrically connected to the display mode control terminal ENP, the start voltage terminal STV and the global input terminal GI respectively, and is used to control the connection between the start voltage terminal STV and the global input terminal GI under the control of the display mode control signal in the global display mode.

[0235] like Fig.13 As shown, in Fig.12 Based on at least one embodiment shown, the global display control circuit may include a global display control transmission gate TGQ; the display mode control terminal includes a first display mode control terminal EN_PART and a second display mode control terminal EN_PART';

[0236] The positive phase control terminal of the global display control transmission gate TGQ is electrically connected to the second display mode control terminal EN_PART', the negative phase control terminal of the global display control transmission gate TGQ is electrically connected to the first display mode control terminal EN_PART, the first end of the global display control transmission gate TGQ is electrically connected to the start voltage terminal STV, and the second end of the global display control transmission gate TGQ is electrically connected to the global input terminal GI.

[0237] The driving module described in at least one embodiment of the present invention further includes A positive scan input control circuits; A is a positive integer;

[0238] The ath positive scan input control circuit is electrically connected to the global input terminal, the ath positive scan start control terminal, the scan control terminal and the ath input terminal respectively, and is used for performing forward scanning in the global display mode, and when scanning starts from the ath level driving circuit among the N-level driving circuits, under the control of the ath positive scan start control signal provided by the ath positive scan start control terminal and the scan control signal provided by the scan control terminal, controlling the connection between the global input terminal and the ath input terminal; the ath input terminal is the input terminal of the ath level driving circuit;

[0239] a is a positive integer less than or equal to A.

[0240] In at least one embodiment of the present invention, A equals 3 as an example for description.

[0241] like Fig.14 As shown, in Fig.13 On the basis of at least one embodiment shown, the driving module described in at least one embodiment of the present invention may further include a first positive scan input control circuit 131, a second positive scan input control circuit 132 and a third positive scan input control circuit 133;

[0242] The first forward scan input control circuit 131 is electrically connected to the global input terminal GI, the first forward scan start control terminal FS1, the scan control terminal GSD and the first input terminal S1 respectively, and is used for performing forward scan in the global display mode, and when scanning starts from the first-stage drive circuit GA1 in the N-stage drive circuit, under the control of the first forward scan start control signal provided by the first forward scan start control terminal SF1 and the scan control signal provided by the scan control terminal GSD, controlling the connection between the global input terminal GI and the first input terminal S1; the first input terminal S1 is the input terminal of the first-stage drive circuit GA1;

[0243] The second forward scan input control circuit 132 is electrically connected to the global input terminal GI, the second forward scan start control terminal FS2, the scan control terminal GSD and the second input terminal S2 respectively, and is used for performing forward scan in the global display mode, and when scanning starts from the second-stage drive circuit GA2 in the N-stage drive circuit, under the control of the second forward scan start control signal provided by the second forward scan start control terminal SF2 and the scan control signal provided by the scan control terminal GSD, controlling the connection between the global input terminal GI and the second input terminal S2; the second input terminal S2 is the input terminal of the second-stage drive circuit GA2;

[0244] The third positive scan input control circuit 133 is electrically connected to the global input terminal GI, the third positive scan start control terminal FS3, the scan control terminal GSD and the third input terminal S3, respectively, and is used for performing forward scanning in the global display mode, and when scanning starts from the third-level driving circuit GA3 in the N-level driving circuit, under the control of the third positive scan start control signal provided by the third positive scan start control terminal SF3 and the scan control signal provided by the scan control terminal GSD, controlling the connection between the global input terminal GI and the third input terminal S3; the third input terminal S3 is the input terminal of the third-level driving circuit GA3.

[0245] Optionally, the ath forward scan input control circuit includes an ath first forward scan input control transmission gate and an ath second forward scan input control transmission gate; the scan control terminal includes a forward scan control terminal and a reverse scan control terminal;

[0246] The positive phase control terminal of the a-th first positive scan input control transmission gate is electrically connected to the a-th positive scan start control terminal, the negative phase control terminal of the a-th first positive scan input control transmission gate is electrically connected to the a-th negative phase positive scan start control terminal, the first terminal of the a-th first positive scan input control transmission gate is electrically connected to the global input terminal, and the second terminal of the a-th first positive scan input control transmission gate is electrically connected to the first terminal of the a-th second positive scan input control transmission gate;

[0247] The positive phase control end of the ath second positive scan input control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the ath second positive scan input control transmission gate is electrically connected to the negative scan control end, and the second end of the ath second positive scan input control transmission gate is electrically connected to the ath input end.

[0248] In a specific implementation, the ath positive scan input control circuit may include an ath first positive scan input control transmission gate and an ath second positive scan input control transmission gate; the scan control end includes a forward scan control end and a reverse scan control end; the ath first positive scan input control transmission gate controls the connection or disconnection between the global input end and the first end of the ath second positive scan input control transmission gate; the ath second positive scan input control transmission gate controls the connection or disconnection between the reverse scan control end and the ath input end.

[0249] like Fig.15 As shown, in Fig.14 Based on at least one embodiment shown, the first forward scan input control circuit includes a first first forward scan input control transmission gate TGZ11 and a first second forward scan input control transmission gate TGZ12; the scan control terminal includes a forward scan control terminal GSD_FW and a reverse scan control terminal GSD_BW;

[0250] The positive phase control terminal of the first first positive scan input control transmission gate TGZ11 is electrically connected to the first positive scan start control terminal FS1, the negative phase control terminal of the first first positive scan input control transmission gate TGZ11 is electrically connected to the first negative phase positive scan start control terminal NFS1, the first end of the first first positive scan input control transmission gate TGZ11 is electrically connected to the global input terminal GI, and the second end of the first first positive scan input control transmission gate TGZ11 is electrically connected to the first end of the first second positive scan input control transmission gate TGZ12;

[0251] The positive phase control terminal of the first second positive scan input control transmission gate TGZ12 is electrically connected to the positive scan control terminal GSD_FW, the negative phase control terminal of the first second positive scan input control transmission gate TGZ12 is electrically connected to the reverse scan control terminal GSD_BW, and the second terminal of the first second positive scan input control transmission gate TGZ12 is electrically connected to the first input terminal S1;

[0252] The second forward scan input control circuit includes a second first forward scan input control transmission gate TGZ21 and a second second forward scan input control transmission gate TGZ22; the scan control terminal includes a forward scan control terminal GSD_FW and a reverse scan control terminal GSD_BW;

[0253] The positive phase control terminal of the second first positive scan input control transmission gate TGZ21 is electrically connected to the second positive scan start control terminal FS2, the negative phase control terminal of the second first positive scan input control transmission gate TGZ21 is electrically connected to the second negative phase positive scan start control terminal NFS2, the first end of the second first positive scan input control transmission gate TGZ21 is electrically connected to the global input terminal GI, and the second end of the second first positive scan input control transmission gate TGZ21 is electrically connected to the first end of the second second positive scan input control transmission gate TGZ22;

[0254] The positive phase control terminal of the second second positive scan input control transmission gate TGZ22 is electrically connected to the positive scan control terminal GSD_FW, the negative phase control terminal of the second second positive scan input control transmission gate TGZ22 is electrically connected to the reverse scan control terminal GSD_BW, and the second terminal of the second second positive scan input control transmission gate TGZ22 is electrically connected to the second input terminal S2;

[0255] The second forward scan input control circuit includes a second first forward scan input control transmission gate TGZ21 and a second second forward scan input control transmission gate TGZ22; the scan control terminal includes a forward scan control terminal GSD_FW and a reverse scan control terminal GSD_BW;

[0256] The positive phase control terminal of the third first positive scan input control transmission gate TGZ31 is electrically connected to the third positive scan start control terminal FS3, the negative phase control terminal of the third first positive scan input control transmission gate TGZ31 is electrically connected to the third negative phase positive scan start control terminal NFS3, the first end of the third first positive scan input control transmission gate TGZ31 is electrically connected to the global input terminal GI, and the second end of the third first positive scan input control transmission gate TGZ31 is electrically connected to the first end of the third second positive scan input control transmission gate TGZ32;

[0257] The positive phase control end of the third second positive scan input control transmission gate TGZ32 is electrically connected to the positive scan control end GSD_FW, the negative phase control end of the third second positive scan input control transmission gate TGZ32 is electrically connected to the negative scan control end GSD_BW, and the second end of the third second positive scan input control transmission gate TGZ32 is electrically connected to the third input end S3.

[0258] In at least one embodiment of the present invention, A is greater than 1;

[0259] The b-th level driving circuit includes the b-1-th control cutoff circuit; b is an integer less than or equal to A and greater than 1;

[0260] The b-1th control cut-off circuit is electrically connected to the b-th positive scan start control terminal, the b-th input terminal and the b-1th positive scan output node respectively, and is used for controlling the connection or disconnection between the b-th input terminal and the b-1th positive scan output node under the control of the b-th positive scan start control signal provided by the b-th positive scan start control terminal;

[0261] The b-th input terminal is the input terminal of the b-th stage driving circuit in the N-stage driving circuits.

[0262] When the driving module of at least one embodiment of the present invention is working, in the global display mode, during forward scanning,

[0263] When scanning starts from the b-th level driving circuit, the b-1th control cutoff circuit, under the control of the b-th positive scan start control signal provided by the b-th positive scan start control terminal, controls the disconnection between the b-th input terminal and the b-1th positive scan output node to disconnect the signal transmission path between the b-th level driving circuit and the b-1-th level driving circuit.

[0264] like Fig.16 As shown, in Fig.15 Based on at least one embodiment shown, the second-stage driving circuit GA2 includes a first control cutoff circuit 151;

[0265] The first control cutoff circuit 151 is electrically connected to the second positive scan start control terminal FS2, the second input terminal S2 and the first positive scan output node NT1 respectively, and is used to control the connection or disconnection between the second input terminal S2 and the first positive scan output node NT1 under the control of the second positive scan start control signal provided by the second positive scan start control terminal FS2;

[0266] The second input terminal S2 is an input terminal of the second-stage driving circuit GA2 in the N-stage driving circuit;

[0267] The third-stage driving circuit GA3 includes a second control cutoff circuit 152;

[0268] The second control cut-off circuit 152 is electrically connected to the third positive scan start control terminal FS3, the third input terminal S3 and the second positive scan output node NT2 respectively, and is used to control the connection or disconnection between the third input terminal S3 and the second positive scan output node NT2 under the control of the third positive scan start control signal provided by the third positive scan start control terminal FS3;

[0269] The third input terminal S3 is an input terminal of the third-stage driving circuit GA3 in the N-stage driving circuit.

[0270] The present invention Fig.16 At least one embodiment of the driving module shown in the figure is in operation, in the global display mode, during forward scanning,

[0271] When scanning starts from the second-stage driving circuit, TGZ21 and TGZ22 are turned on, controlling the connection between GI and S2, and the first control cut-off circuit 151 controls the disconnection between S2 and NT1 to disconnect the signal transmission path between the second-stage driving circuit and the first-stage driving circuit;

[0272] When scanning starts from the third-level driving circuit, TGZ31 and TGZ32 are turned on to control the connection between GI and S3, and the second control cutoff circuit 152 controls the disconnection between S3 and NT2 to disconnect the signal transmission path between the third-level driving circuit and the second-level driving circuit.

[0273] Optionally, the b-1th control cutoff circuit includes a b-1th control cutoff transmission gate; the scanning control terminal includes a forward scanning control terminal and a reverse scanning control terminal;

[0274] The positive phase control end of the b-1th control cutoff transmission gate is electrically connected to the b-th negative phase positive scan start control end, the negative phase control end of the b-1th control cutoff transmission gate is electrically connected to the b-th positive scan start control end, the first end of the b-1th control cutoff transmission gate is electrically connected to the b-th input end, and the second end of the b-1th control cutoff transmission gate is electrically connected to the b-1th positive scan output node.

[0275] like Fig.17 As shown, in Fig.16 Based on at least one embodiment shown, the first control cutoff circuit includes a first control cutoff transmission gate TGA1; the scanning control terminal includes a forward scanning control terminal GSD_FW and a reverse scanning control terminal GSD_BW;

[0276] The positive phase control terminal of the first control cut-off transmission gate TGA1 is electrically connected to the second negative phase positive scan start control terminal NFS2, the negative phase control terminal of the first control cut-off transmission gate TGA1 is electrically connected to the second positive scan start control terminal FS2, the first terminal of the first control cut-off transmission gate TGA1 is electrically connected to the second input terminal S2, and the second terminal of the first control cut-off transmission gate TGA1 is electrically connected to the first positive scan output node NT1;

[0277] The second control cutoff circuit includes a second control cutoff transmission gate TGA2;

[0278] The positive phase control end of the second control cut-off transmission gate TGA2 is electrically connected to the third negative phase positive scan start control end NFS3, the negative phase control end of the second control cut-off transmission gate TGA2 is electrically connected to the third positive scan start control end FS3, the first end of the second control cut-off transmission gate TGA2 is electrically connected to the third input end S3, and the second end of the second control cut-off transmission gate TGA2 is electrically connected to the second positive scan output node NT2.

[0279] Optionally, the b-1th stage driving circuit in the N-stage driving circuit may include a b-1th positive scan control transmission gate;

[0280] The positive phase control end of the b-1th positive scan control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the b-1th positive scan control transmission gate is electrically connected to the negative scan control end, the first end of the b-1th positive scan control transmission gate is electrically connected to the b-1th cascade output end, and the second end of the b-1th positive scan control transmission gate is electrically connected to the b-1th positive scan output node;

[0281] The b-1th cascade output end is the cascade output end of the b-1th stage driving circuit.

[0282] The driving module described in at least one embodiment of the present invention may further include a first reverse scan input control circuit;

[0283] The first reverse scan input control circuit is electrically connected to the global input terminal, the first reverse scan start control terminal, the scan control terminal and the Nth input terminal respectively, and is used for performing reverse scanning in the global display mode, and when scanning starts from the Nth level driving circuit in the Nth level driving circuit, under the control of the first reverse scan start control signal provided by the first reverse scan start control terminal, controlling the connection between the global input terminal and the Nth input terminal; the Nth input terminal is the input terminal of the Nth level driving circuit in the Nth level driving circuit.

[0284] In a specific implementation, the driving module may also include a first reverse scan input control circuit. In a global display mode, reverse scanning is performed, and when scanning starts from the Nth level driving circuit in the N-level driving circuit, the first reverse scan input control circuit controls the connection between the global input terminal and the Nth input terminal under the control of a first reverse scan start control signal.

[0285] like Fig.18 As shown, in Fig.17 Based on at least one embodiment shown, the driving module described in at least one embodiment of the present invention further includes a first reverse scan input control circuit 171;

[0286] The first reverse scan input control circuit 171 is electrically connected to the global input terminal GI, the first reverse scan start control terminal BS1, the scan control terminal GSD and the Nth input terminal SN, respectively, and is used to perform reverse scanning in the global display mode, and when scanning starts from the Nth level driving circuit GAN in the N-level driving circuit, under the control of the first reverse scan start control signal provided by the first reverse scan start control terminal BS1, control the connection between the global input terminal GI and the Nth input terminal SN; the Nth input terminal SN is the input terminal of the Nth level driving circuit GAN in the N-level driving circuit.

[0287] Optionally, the first anti-scan input control circuit includes a first first anti-scan input control transmission gate and a second first anti-scan input control transmission gate;

[0288] The positive phase control terminal of the first first reverse scan input control transmission gate is electrically connected to the first reverse scan start control terminal, the negative phase control terminal of the first first reverse scan input control transmission gate is electrically connected to the first reverse reverse scan start control terminal, the first end of the first first reverse scan input control transmission gate is electrically connected to the global input terminal, and the second end of the first first reverse scan input control transmission gate is electrically connected to the first end of the second first reverse scan input control transmission gate;

[0289] The positive phase control end of the second first reverse scan input control transmission gate is electrically connected to the reverse scan control end, the negative phase control end of the second first reverse scan input control transmission gate is electrically connected to the positive scan control end, and the second end of the second first reverse scan input control transmission gate is electrically connected to the Nth input end.

[0290] like Fig.19 As shown, in Fig.18 Based on at least one embodiment shown,

[0291] The first anti-scan input control circuit includes a first first anti-scan input control transmission gate TGI11 and a second first anti-scan input control transmission gate TGI21;

[0292] The positive phase control terminal of the first first reverse scan input control transmission gate TGI11 is electrically connected to the first reverse scan start control terminal BS1, the negative phase control terminal of the first first reverse scan input control transmission gate TGI11 is electrically connected to the first reverse reverse scan start control terminal NBS1, the first end of the first first reverse scan input control transmission gate TGI11 is electrically connected to the global input terminal GI, and the second end of the first first reverse scan input control transmission gate TGI11 is electrically connected to the first end of the second first reverse scan input control transmission gate TGI21;

[0293] The positive phase control terminal of the second first reverse scan input control transmission gate TGI21 is electrically connected to the reverse scan control terminal GSD_BW, the negative phase control terminal of the second first reverse scan input control transmission gate TGI21 is electrically connected to the positive scan control terminal GSD_FW, and the second terminal of the second first reverse scan input control transmission gate TGI21 is electrically connected to the Nth input terminal SN.

[0294] The driving module described in at least one embodiment of the present invention further includes C reverse scan input control circuits; C is a positive integer;

[0295] The c+1th reverse scan input control circuit is electrically connected to the global input terminal, the c+1th reverse scan start control terminal and the Ncth reverse scan input node respectively, and is used to perform reverse scanning in the global display mode, and when scanning starts from the Ncth level driving circuit in the N-level driving circuit, control the connection between the global input terminal and the Ncth reverse scan input node; c is a positive integer less than or equal to C.

[0296] In at least one embodiment of the present invention, C equals 2 as an example for description.

[0297] like Fig. 20 As shown, in Fig.19 Based on at least one embodiment shown, the driving module described in at least one embodiment of the present invention further includes a second backsweep input control circuit 172 and a third backsweep input control circuit 173;

[0298] The second reverse scan input control circuit 172 is electrically connected to the global input terminal GI, the second reverse scan start control terminal BS2 and the N-1th reverse scan input node NIN-1 respectively, and is used to perform reverse scanning in the global display mode, and control the connection between the global input terminal GI and the N-1th reverse scan input node NIN-1 when scanning starts from the N-1th level driving circuit GAN-1 in the N-level driving circuit;

[0299] The third reverse scan input control circuit 173 is electrically connected to the global input terminal GI, the third reverse scan start control terminal BS3 and the N-2th reverse scan input node NIN-2, respectively, and is used to perform reverse scanning in the global display mode, and when scanning starts from the N-2th level driving circuit GAN-2 in the N-level driving circuit, control the connection between the global input terminal GI and the N-2th reverse scan input node NIN-2.

[0300] Optionally, the c+1th reverse scan input control circuit includes a c+1th reverse scan input control transmission gate;

[0301] The positive phase control terminal of the c+1th reverse scan input control transmission gate is electrically connected to the c+1th reverse scan start control terminal, the negative phase control terminal of the c+1th reverse scan input control transmission gate is electrically connected to the c+1th reverse scan start control terminal, the first terminal of the c+1th reverse scan input control transmission gate is electrically connected to the global input terminal, and the second terminal of the c+1th reverse scan input control transmission gate is electrically connected to the Ncth reverse scan input node.

[0302] The driving module described in at least one embodiment of the present invention further includes C cut-off circuits;

[0303] The cth cut-off circuit is electrically connected to the c+1th reverse scan start control terminal, the N-c+1th cascade output terminal and the Ncth reverse scan input node, respectively, and is used to control the connection or disconnection between the Ncth reverse scan input node and the N-c+1th cascade output terminal under the control of the c+1th reverse scan start control signal provided by the c+1th reverse scan start control terminal.

[0304] In a specific implementation, the driving module may include C cutoff circuits, and the cth cutoff circuit controls the connection or disconnection between the Ncth reverse scan input node and the N-c+1th cascade output terminal under the control of the c+1th reverse scan start control signal.

[0305] When the driving module of at least one embodiment of the present invention is working, in the global mode, when performing reverse scanning,

[0306] When scanning starts from the Ncth level driving circuit, the cth cut-off circuit, under the control of the c+1th reverse scan start control signal, controls the disconnection between the Ncth reverse scan input node and the N-c+1th cascade output terminal to disconnect the signal transmission path between the N-c+1th level driving circuit and the Ncth level driving circuit.

[0307] like Fig.21 As shown, in Fig. 20 Based on at least one embodiment shown, the driving module described in at least one embodiment of the present invention may further include a first cutoff circuit 201 and a second cutoff circuit 202;

[0308] The first cut-off circuit 201 is electrically connected to the second reverse scan start control terminal BS2, the Nth cascade output terminal CTN and the N-1th reverse scan input node NIN-1 respectively, and is used to control the connection or disconnection between the N-1th reverse scan input node NIN-1 and the Nth cascade output terminal CTN under the control of the second reverse scan start control signal provided by the second reverse scan start control terminal BS2;

[0309] The second cut-off circuit 202 is electrically connected to the third anti-scan start control terminal BS3, the N-1th cascade output terminal CTN-1 and the N-2th anti-scan input node NIN-2, respectively, and is used to control the connection or disconnection between the N-2th anti-scan input node NIN-2 and the N-1th cascade output terminal CTN-1 under the control of the third anti-scan start control signal provided by the third anti-scan start control terminal BS3.

[0310] The present invention Fig.21 At least one embodiment of the driving module shown in the figure is in operation, in the global display mode, during reverse scanning,

[0311] When scanning starts from the N-1th stage driving circuit, the first cut-off circuit 201 controls the connection between the N-1th reverse scan input node NIN-1 and the Nth cascade output terminal CTN under the control of the second reverse scan start control signal, so as to disconnect the signal transmission path between the N-1th stage driving circuit and the Nth stage driving circuit;

[0312] When scanning starts from the N-2th level driving circuit, the second cut-off circuit 202, under the control of the third reverse scan start control signal, controls the connection and disconnection between the N-2th reverse scan input node NIN-2 and the N-1th cascade output terminal CTN-1 to disconnect the signal transmission path between the N-2th level driving circuit and the N-1th level driving circuit.

[0313] Optionally, the c-th cut-off circuit includes a c-th cut-off transmission gate;

[0314] The positive phase control terminal of the cth cut-off transmission gate is electrically connected to the c+1th negative reverse scan start control terminal, the negative phase control terminal of the cth cut-off transmission gate is electrically connected to the c+1th reverse scan start control terminal, the first end of the cth cut-off transmission gate is electrically connected to the Ncth reverse scan input node, and the second end of the cth cut-off transmission gate is electrically connected to the N-c+1th cascade output terminal.

[0315] like Fig. 22 As shown, in Fig.21 Based on at least one embodiment shown, the first cutoff circuit includes a first cutoff transmission gate TGC1;

[0316] The positive phase control terminal of the first cut-off transmission gate TGC1 is electrically connected to the second reverse scan start control terminal NBS2, the reverse phase control terminal of the first cut-off transmission gate TGC1 is electrically connected to the second reverse scan start control terminal BS2, the first terminal of the first cut-off transmission gate TGC1 is electrically connected to the N-1th reverse scan input node NIN-1, and the second terminal of the first cut-off transmission gate TGC1 is electrically connected to the Nth cascade output terminal CTN;

[0317] The positive phase control terminal of the second cut-off transmission gate TGC2 is electrically connected to the third reverse scan start control terminal NBS3, the reverse phase control terminal of the second cut-off transmission gate TGC2 is electrically connected to the third reverse scan start control terminal BS3, the first end of the second cut-off transmission gate TGC2 is electrically connected to the N-2th reverse scan input node NIN-2, and the second end of the second cut-off transmission gate TGC2 is electrically connected to the N-1th cascade output terminal CTN-1.

[0318] Fig.23A It is a circuit diagram of the first three stages of driving circuits included in the driving module described in at least one embodiment of the present invention.

[0319] exist Fig.23A In the embodiment, the first stage driving circuit includes a first stage D flip-flop DFF1, a first AND gate AD1, a first inverter F1, a first forward scan control transmission gate TGF1 and a first reverse scan control transmission gate TGB1;

[0320] The input end of DFF1 is electrically connected to the first input end S1, the first output end of DFF1 is electrically connected to the first cascade output end CT1, and the second output end of DFF1 is electrically connected to the first output end OT1;

[0321] The control end of DFF1 is electrically connected to the first clock signal end CLK1;

[0322] A first input terminal of AD1 is electrically connected to OT1, a second input terminal of AD1 is electrically connected to CT1, and an output terminal of AD1 is electrically connected to a first drive signal output terminal G1;

[0323] The input end of F1 is electrically connected to G1, and the output end of F1 is electrically connected to the first inverse driving signal output end GF1;

[0324] The positive phase control terminal of TGB1 is electrically connected to GSD_BW, the negative phase control terminal of TGB1 is electrically connected to GSD_FW, the first terminal of TGB1 is electrically connected to S1, and the second terminal of TGB1 is electrically connected to the second cascade output terminal CT2;

[0325] The positive phase control terminal of TGF1 is electrically connected to GSD_FW, the negative phase control terminal of TGF1 is electrically connected to GSD_BW, the first terminal of TGF1 is electrically connected to CT1, and the second terminal of TGF1 is electrically connected to the first positive scan output node NT1;

[0326] The positive phase control terminal of TGA1 is electrically connected to NFS2, the negative phase control terminal of TGA1 is electrically connected to FS2, the first terminal of TGA1 is electrically connected to the second input terminal S2, and the second terminal of TGA1 is electrically connected to the first positive scan output node NT1;

[0327] The second stage driving circuit includes a second stage D flip-flop DFF2, a second AND gate AD2, a second inverter F2, a second forward scan control transmission gate TGF2 and a second reverse scan control transmission gate TGB2;

[0328] The input end of DFF2 is electrically connected to the second input end S2, the first output end of DFF2 is electrically connected to the second cascade output end CT2, and the second output end of DFF2 is electrically connected to the second output end OT2;

[0329] The control end of DFF2 is electrically connected to the second clock signal end CLK2;

[0330] A first input terminal of AD2 is electrically connected to OT2, a second input terminal of AD2 is electrically connected to CT2, and an output terminal of AD2 is electrically connected to a second drive signal output terminal G2;

[0331] The input end of F2 is electrically connected to G2, and the output end of F2 is electrically connected to the second inverse driving signal output end GF2;

[0332] The positive phase control terminal of TGB2 is electrically connected to GSD_BW, the negative phase control terminal of TGB2 is electrically connected to GSD_FW, the first terminal of TGB2 is electrically connected to S2, and the second terminal of TGB2 is electrically connected to the third cascade output terminal CT3;

[0333] The positive phase control terminal of TGF2 is electrically connected to GSD_FW, the negative phase control terminal of TGF2 is electrically connected to GSD_BW, the first terminal of TGF2 is electrically connected to CT2, and the second terminal of TGF2 is electrically connected to the second positive scan output node NT2;

[0334] The positive phase control terminal of TGA2 is electrically connected to NFS3, the negative phase control terminal of TGA2 is electrically connected to FS3, the first terminal of TGA2 is electrically connected to the third input terminal S3, and the second terminal of TGA2 is electrically connected to the second positive scan output node NT2;

[0335] The third stage driving circuit includes a third stage D flip-flop DFF3, a third AND gate AD3, a third inverter F3, a third forward scan control transmission gate TGF3 and a third reverse scan control transmission gate TGB3;

[0336] The input end of DFF3 is electrically connected to the third input end S3, the first output end of DFF3 is electrically connected to the third cascade output end CT3, and the second output end of DFF3 is electrically connected to the third output end OT3;

[0337] The control end of DFF3 is electrically connected to the third clock signal end CLK3;

[0338] A first input terminal of AD3 is electrically connected to OT3, a second input terminal of AD3 is electrically connected to CT3, and an output terminal of AD3 is electrically connected to a third drive signal output terminal G3;

[0339] The input end of F3 is electrically connected to G3, and the output end of F3 is electrically connected to the third inverse driving signal output end GF3;

[0340] The positive phase control terminal of TGB3 is electrically connected to GSD_BW, the negative phase control terminal of TGB3 is electrically connected to GSD_FW, the first terminal of TGB3 is electrically connected to S3, and the second terminal of TGB3 is electrically connected to the fourth cascade output terminal CT4;

[0341] The positive phase control terminal of TGF3 is electrically connected to GSD_FW, the negative phase control terminal of TGF3 is electrically connected to GSD_BW, the first terminal of TGF3 is electrically connected to CT3, and the second terminal of TGF3 is electrically connected to the fourth input terminal S4.

[0342] like Fig. 23B As shown, in Fig.23A Based on at least one embodiment shown, the driving module described in at least one embodiment of the present invention further includes a fourth-level driving circuit;

[0343] The fourth stage driving circuit includes a fourth stage D flip-flop DFF4, a fourth AND gate AD4, a fourth inverter F4, a fourth forward scan control transmission gate TGF4 and a fourth reverse scan control transmission gate TGB4;

[0344] The input terminal of DFF4 is electrically connected to the fourth input terminal S4, the first output terminal of DFF4 is electrically connected to the fourth cascade output terminal CT4, and the second output terminal of DFF4 is electrically connected to the fourth output terminal OT4;

[0345] The control terminal of DFF4 is electrically connected to the fourth clock signal terminal CLK4;

[0346] A first input terminal of AD4 is electrically connected to OT4, a second input terminal of AD4 is electrically connected to CT4, and an output terminal of AD4 is electrically connected to a fourth drive signal output terminal G4;

[0347] The input end of F4 is electrically connected to G4, and the output end of F4 is electrically connected to the fourth inverted drive signal output end GF4;

[0348] The positive phase control terminal of TGB4 is electrically connected to GSD_BW, the negative phase control terminal of TGB4 is electrically connected to GSD_FW, the first terminal of TGB4 is electrically connected to S4, and the second terminal of TGB4 is electrically connected to the second starting node NS2;

[0349] The positive phase control terminal of TGF4 is electrically connected to GSD_FW, the negative phase control terminal of TGF4 is electrically connected to GSD_BW, the first terminal of TGF4 is electrically connected to CT4, and the second terminal of TGF4 is electrically connected to the first starting node NS1.

[0350] like Fig.23CAs shown, m can be equal to 5, and n can be equal to 8, that is, the fifth-stage driving circuit is the starting-stage driving circuit, the eighth-stage driving circuit is the ending-stage driving circuit, and the local display area corresponds to the fifth-stage driving circuit to the eighth-stage driving circuit.

[0351] like Fig.23C As shown, the m-th stage driving circuit may include TGS1, TGS2, DFFm, TGBm and TGFm;

[0352] NTm is electrically connected to the m+1th input terminal Sm+1, and NIm is electrically connected to the m+1th cascade output terminal CTm+1;

[0353] The m+1th stage driving circuit may include an m+1th stage D flip-flop DFFm+1, an m+1th AND gate ADm+1, an m+1th inverter Fm+1, an m+1th forward scan control transmission gate TGFm+1, and an m+1th reverse scan control transmission gate TGBm+1;

[0354] The input terminal of DFFm+1 is electrically connected to the m+1th input terminal Sm+1, the control terminal of DFFm+1 is electrically connected to the m+1th clock signal terminal CLKm+1, the first output terminal of DFFm+1 is electrically connected to the m+1th cascade output terminal CTm+1, and the second output terminal of DFFm+1 is electrically connected to the m+1th output terminal OTm+1;

[0355] The first input terminal of ADm+1 is electrically connected to OTm+1, the second input terminal of ADm+1 is electrically connected to CTm+1, and the output terminal of ADm+1 is electrically connected to the m+1th drive signal output terminal Gm+1;

[0356] The input terminal of Fm+1 is electrically connected to Gm+1, and the output terminal of Fm+1 is electrically connected to the m+1th inverted drive signal output terminal GFm+1;

[0357] The positive phase control terminal of TGFm+1 is electrically connected to GSD_FW, the negative phase control terminal of TGFm+1 is electrically connected to GSD_BW, the first terminal of TGFm+1 is electrically connected to CTm+1, and the second terminal of TGFm+1 is electrically connected to the m+2th input terminal Sm+2;

[0358] The positive phase control terminal of TGBm+1 is electrically connected to GSD_BW, the negative phase control terminal of TGBm+1 is electrically connected to GSD_FW, the first terminal of TGBm+1 is electrically connected to Sm+1, and the second terminal of TGBm+1 is electrically connected to the m+2 cascade output terminal CTm+2;

[0359] The m+2-th stage driving circuit may include an m+2-th stage D flip-flop DFFm+2, an m+2-th AND gate ADm+2, an m+2-th inverter Fm+2, an m+2-th forward scan control transmission gate TGFm+2, and an m+2-th reverse scan control transmission gate TGBm+2;

[0360] The input terminal of DFFm+2 is electrically connected to the m+2th input terminal Sm+2, the control terminal of DFFm+2 is electrically connected to the m+2th clock signal terminal CLKm+2, the first output terminal of DFFm+2 is electrically connected to the m+2th cascade output terminal CTm+2, and the second output terminal of DFFm+2 is electrically connected to the m+2th output terminal OTm+2;

[0361] The first input terminal of ADm+2 is electrically connected to OTm+2, the second input terminal of ADm+2 is electrically connected to CTm+2, and the output terminal of ADm+2 is electrically connected to the m+2 th drive signal output terminal Gm+2;

[0362] The input terminal of Fm+2 is electrically connected to Gm+2, and the output terminal of Fm+2 is electrically connected to the m+2th inverted driving signal output terminal GFm+2;

[0363] The positive phase control terminal of TGFm+2 is electrically connected to GSD_FW, the negative phase control terminal of TGFm+2 is electrically connected to GSD_BW, the first terminal of TGFm+2 is electrically connected to CTm+2, and the second terminal of TGFm+2 is electrically connected to the nth input terminal Sn;

[0364] The positive phase control terminal of TGBm+2 is electrically connected to GSD_BW, the negative phase control terminal of TGBm+2 is electrically connected to GSD_FW, the first terminal of TGBm+2 is electrically connected to Sm+2, and the second terminal of TGBm+2 is electrically connected to the nth cascade output terminal CTn;

[0365] The n-th stage driving circuit includes DFFn, And, Fn, TGBn, TGFn, TGJ1 and TGJ2.

[0366] exist Fig.23C , Fig.23D In at least one embodiment shown, NJ1 is electrically connected to the N-3 th cascade output terminal CTN-3, and NJ2 is electrically connected to the N-3 th input terminal SN-3;

[0367] N-3 equals n+1, that is, N can be equal to 12.

[0368] like Fig.23D As shown, the driving module described in at least one embodiment of the present invention may include a second backsweep input control circuit and a third backsweep input control circuit;

[0369] The second backscan input control circuit includes a second backscan input control transmission gate TGI2, and the third backscan input control circuit includes a third backscan input control transmission gate TGI3;

[0370] The positive phase control terminal of TGI2 is electrically connected to the second reverse scan start control terminal BS2, the reverse phase control terminal of TGI2 is electrically connected to the second reverse reverse scan start control terminal NBS2, the first terminal of TGI2 is electrically connected to the global input terminal GI, and the second terminal of TGI2 is electrically connected to the N-1th reverse scan input node NIN-1;

[0371] The positive phase control terminal of TGI3 is electrically connected to the third reverse scan start control terminal BS3, the reverse phase control terminal of TGI3 is electrically connected to the third reverse reverse scan start control terminal NBS3, the first terminal of TGI3 is electrically connected to the global input terminal GI, and the second terminal of TGI3 is electrically connected to the N-2 th reverse scan input node NIN-2;

[0372] The N-3rd stage driving circuit may include an N-3rd stage D flip-flop DFFN-3, an N-3rd AND gate ADN-3, an N-3rd inverter FN-3, an N-3rd forward scan control transmission gate TGFN-3, and an N-3rd reverse scan control transmission gate TGBN-3;

[0373] The input end of DFFN-3 is electrically connected to the N-3th input end SN-3, the first output end of DFFN-3 is electrically connected to the N-3th cascade output end CTN-3, and the second output end of DFFN-3 is electrically connected to the N-3th output end OTN-3;

[0374] The control terminal of DFFN-3 is electrically connected to the N-3 th clock signal terminal CLKN-3;

[0375] A first input terminal of ADN-3 is electrically connected to OTN-3, a second input terminal of ADN-3 is electrically connected to CTN-3, and an output terminal of ADN-3 is electrically connected to the N-3 th drive signal output terminal GN-3;

[0376] The input end of FN-3 is electrically connected to GN-3, and the output end of FN-3 is electrically connected to the N-3th inverted drive signal output end GFN-3;

[0377] The positive phase control terminal of TGBN-3 is electrically connected to GSD_BW, the negative phase control terminal of TGBN-3 is electrically connected to GSD_FW, the first terminal of TGBN-3 is electrically connected to SN-3, and the second terminal of TGBN-3 is electrically connected to the N-2 cascade output terminal CTN-2;

[0378] The positive phase control terminal of TGFN-3 is electrically connected to GSD_FW, the negative phase control terminal of TGFN-3 is electrically connected to GSD_BW, the first terminal of TGFN-3 is electrically connected to CTN-3, and the second terminal of TGFN-3 is electrically connected to the N-2 input terminal SN-2;

[0379] The N-2-th stage driving circuit may include an N-2-th stage D flip-flop DFFN-2, an N-2-th AND gate ADN-2, an N-2-th inverter FN-2, an N-2-th forward scan control transmission gate TGFN-2, and an N-2-th reverse scan control transmission gate TGBN-2;

[0380] The input end of DFFN-2 is electrically connected to the N-2th input end SN-2, the first output end of DFFN-2 is electrically connected to the N-2th cascade output end CTN-2, and the second output end of DFFN-2 is electrically connected to the N-2th output end OTN-2;

[0381] The control terminal of DFFN-2 is electrically connected to the N-2 th clock signal terminal CLKN-2;

[0382] A first input terminal of ADN-2 is electrically connected to OTN-2, a second input terminal of ADN-2 is electrically connected to CTN-2, and an output terminal of ADN-2 is electrically connected to the N-2 th drive signal output terminal GN-2;

[0383] The input end of FN-2 is electrically connected to GN-2, and the output end of FN-2 is electrically connected to the N-2th inverted drive signal output end GFN-2;

[0384] The positive phase control terminal of TGBN-2 is electrically connected to GSD_BW, the negative phase control terminal of TGBN-2 is electrically connected to GSD_FW, the first terminal of TGBN-2 is electrically connected to SN-2, and the second terminal of TGBN-2 is electrically connected to NIN-2;

[0385] The positive phase control terminal of TGFN-2 is electrically connected to GSD_FW, the negative phase control terminal of TGFN-2 is electrically connected to GSD_BW, the first terminal of TGFN-2 is electrically connected to CTN-2, and the second terminal of TGFN-2 is electrically connected to the N-1th input terminal SN-1;

[0386] The driving module according to at least one embodiment of the present invention may include a first cut-off transmission gate TGC1 and a second cut-off transmission gate TGC2;

[0387] The positive phase control terminal of TGC2 is electrically connected to GSD_BW, the negative phase control terminal of TGC2 is electrically connected to GSD_FW, the first terminal of TGC2 is electrically connected to the N-2th reverse scan input node NIN-2, and the second terminal of TGC2 is electrically connected to the N-1th cascade output terminal CTN-1;

[0388] The N-1th stage driving circuit may include an N-1th stage D flip-flop DFFN-1, an N-1th AND gate ADN-1, an N-1th inverter FN-1, an N-1th forward scan control transmission gate TGFN-1, and an N-1th reverse scan control transmission gate TGBN-1;

[0389] The input end of DFFN-1 is electrically connected to the N-1th input end SN-1, the first output end of DFFN-1 is electrically connected to the N-1th cascade output end CTN-1, and the second output end of DFFN-1 is electrically connected to the N-1th output end OTN-1;

[0390] The control terminal of DFFN-1 is electrically connected to the N-1th clock signal terminal CLKN-1;

[0391] A first input terminal of ADN-1 is electrically connected to OTN-1, a second input terminal of ADN-1 is electrically connected to CTN-1, and an output terminal of ADN-1 is electrically connected to the N-1th drive signal output terminal GN-1;

[0392] The input end of FN-1 is electrically connected to GN-1, and the output end of FN-1 is electrically connected to the N-1th inverted drive signal output end GFN-1;

[0393] The positive phase control terminal of TGBN-1 is electrically connected to GSD_BW, the negative phase control terminal of TGBN-1 is electrically connected to GSD_FW, the first terminal of TGBN-1 is electrically connected to SN-1, and the second terminal of TGBN-1 is electrically connected to NIN-1;

[0394] The positive phase control terminal of TGFN-1 is electrically connected to GSD_FW, the negative phase control terminal of TGFN-1 is electrically connected to GSD_BW, the first terminal of TGFN-1 is electrically connected to CTN-1, and the second terminal of TGFN-1 is electrically connected to the Nth input terminal SN;

[0395] The positive phase control terminal of TGC1 is electrically connected to GSD_BW, the negative phase control terminal of TGC1 is electrically connected to GSD_FW, the first terminal of TGC1 is electrically connected to the N-1th reverse scan input node NIN-1, and the second terminal of TGC1 is electrically connected to the Nth cascade output terminal CTN;

[0396] The driving module according to at least one embodiment of the present invention further includes a first first anti-scan input control transmission gate TGI11 and a second first anti-scan input control transmission gate TGI21;

[0397] The Nth stage driving circuit includes an Nth stage D flip-flop DFFN, an Nth AND gate ADN, and an Nth inverter FN;

[0398] The input end of DFFN is electrically connected to the Nth input end SN, the first output end of DFFN is electrically connected to the Nth cascade output end CTN, and the second output end of DFFN is electrically connected to the Nth output end OTN;

[0399] The control terminal of DFFN is electrically connected to the Nth clock signal terminal CLKN;

[0400] A first input terminal of ADN is electrically connected to OTN, a second input terminal of ADN is electrically connected to CTN, and an output terminal of ADN is electrically connected to an Nth driving signal output terminal GN;

[0401] An input terminal of FN is electrically connected to GN, and an output terminal of FN is electrically connected to an Nth inverted driving signal output terminal GFN.

[0402] Fig.24A yes Fig. 23B In the circuit diagram of the first part B1, Fig. 24B yes Fig. 23B A circuit diagram of the second part B2 in FIG.

[0403] Fig.24C yes Fig.23C The circuit diagram of the third part B3, Fig.24D yes Fig.23C The circuit diagram of the fourth part B4 in FIG.

[0404] Fig.24E yes Fig.23D The circuit diagram of the fifth part B5, Fig.24F yes Fig.23D Circuit diagram of the sixth part B6 in FIG.

[0405] In at least one embodiment of the present invention, the driving module is also compatible with the forward scanning and reverse scanning functions, and the realization of the forward and reverse scanning functions requires the use of GSD_FW and GSD_BW;

[0406] When GSD_FW provides a high voltage signal and GSD_BW provides a low voltage signal, forward scanning is performed;

[0407] When GSD_BW provides a high voltage signal and GSD_FW provides a low voltage signal, reverse scanning is performed.

[0408] The present invention Figure 23A-23D At least one embodiment of the driving module shown in the figure is in operation, in the partial display mode,

[0409] EN_PART provides a high voltage signal, EN_PART' provides a low voltage signal, TGP is turned on, STV is connected to PI, STV provides a starting voltage to PI, TCQ is turned off, and STV is disconnected from GI;

[0410] During forward scanning, GSD_FW provides a high voltage signal, GSD_BW provides a low voltage signal, TG1 is turned on, PI is connected to Sm, and the starting voltage is written to Sm; TG2 is turned off, PI is disconnected from Sn; TGS1 and TGS2 are turned off, Sm is disconnected from NS1, and CTm is disconnected from NS2; the signal transmission path between the n-th level driving circuit and the n-1-th level driving circuit is disconnected; TGFm is turned on, controlling the connection between CTm and Sm+1; TGBm is turned off, S m is disconnected from NIm; TGBm+1 is turned off, Sm+1 is disconnected from CTm+2; TGFm+1 is turned on, CTm+1 is connected to Sm+2; TGBm+2 is turned off, Sm+2 is disconnected from CTn; TGFm+2 is turned on, CTm+2 is connected to Sn; TGJ1 and TGJ2 are turned off, CTn is controlled to be disconnected from NJ1, and Sn is controlled to be disconnected from TGJ2, so as to disconnect the signal transmission path between the n-th level driving circuit and the n+1-th level driving circuit;

[0411] During reverse scanning, GSD_BW provides a high voltage signal, GSD_FW provides a low voltage signal, TG2 is turned on, PI is connected to Sn; TGJ1 is turned off, CTn is controlled to be disconnected from NJ1, TGJ2 is turned off, Sn is controlled to be disconnected from NJ2, and the signal transmission path between the n-th level driving circuit and the n+1-th level driving circuit is disconnected; TGBm+2 is turned on, TGFm+2 is turned off, CTn is connected to Sm+2, and Sn is disconnected from CTm+2; TGBm+1 is turned on, TGFm+1 is turned off, CTm+2 is connected to Sm+1, and Sm+2 is disconnected from CTm+1; TGBm is turned on, TGFm is turned off, CTm+1 is connected to Sm, and Sm+1 is disconnected from CTm; TGS1 and TGS2 are turned off, Sm is disconnected from NS1, and CTm is disconnected from NS2; so as to disconnect the signal transmission path between the n-th level driving circuit and the n-1-th level driving circuit.

[0412] The present invention Figure 23A-23D At least one embodiment of the driving module shown in the figure is in operation, in the global display mode,

[0413] EN_PART provides a low voltage signal, EN_PART' provides a high voltage signal, TGQ is turned on, STV is connected to GI, and the starting voltage provided by STV is written into GI;

[0414] During forward scanning, the scanning can be started by the first-stage driving circuit, the second-stage driving circuit or the third-stage driving circuit through FS1, NFS1, FS2, NFS2, FS3 and NFS3 control;

[0415] When FS1 provides a high voltage signal, NFS1 provides a low voltage signal, FS2 and FS3 provide low voltage signals, and NFS2 and NFS3 provide a high voltage signal, TGZ11 is turned on, TGZ21 is turned off, TGZ31 is turned off, and GI is connected to TGZ12; GSD_FW provides a high voltage signal, GSW_BW provides a low voltage signal, TGZ12 is turned on, GI is connected to S1, and the starting voltage is written to S1; TGB1 is turned off, TGB1 is turned off, S1 is disconnected from CT2; TGF1 is turned on, CT1 is turned on from NT1; TGA1 is turned on, and the control NT1 is connected to S2 On, to control the connection between CT1 and S2; TGZ21 and TGZ22 are both off, GI and S2 are disconnected, TGB2 is off, S2 and CT3 are disconnected, TGF2 is on, CT2 and NT2 are connected, TGA2 is on, and the connection between NT2 and S3 is controlled to control the connection between CT2 and S3; TGZ31 and TGZ32 are off, GI and S3 are disconnected, TGB3 is off, S3 and CT4 are disconnected, TGF3 is on, CT3 and S4 are connected, TGB4 is off, TGF4 is connected, CT4 is controlled to be connected to NS1, and S4 and NS2 are controlled to be disconnected;

[0416] When FS2 provides a high voltage signal, NFS2 provides a low voltage signal, FS1 and FS3 provide low voltage signals, and NFS1 and NFS3 provide a high voltage signal, TGZ21 is turned on, TGZ11 is turned off, TGZ31 is turned off, and GI is connected to TGZ22; GSD_FW provides a high voltage signal, GSW_BW provides a low voltage signal, TGZ22 is turned on, GI is connected to S2, and the starting voltage is written to S2; TGA2 is turned off, and S2 is controlled to be disconnected from CT1; TGB2 is turned off, and S2 is disconnected from CT3; TGF2 is turned on, and CT2 is connected to NT2; TGA2 is turned on, and NT2 is connected to S3, so as to control the connection between CT2 and S3; TGB3 is turned off, and S3 is disconnected from CT4; TGF3 is turned on, and CT3 is connected to S4; TGB4 is turned off, and S4 is disconnected from NS2, and TGF4 is turned on, and CT4 is connected to NS1;

[0417] When FS3 provides a high voltage signal, NFS3 provides a low voltage signal, FS1 and FS2 provide low voltage signals, and NFS1 and NFS2 provide a high voltage signal, TGZ31 is turned on, TGZ11 is turned off, TGZ21 is turned off, and GI is connected to TGZ32; GSD_FW provides a high voltage signal, GSW_BW provides a low voltage signal, TGZ32 is turned on, GI is connected to S3, and the starting voltage is written to S3; TGA2 is turned off, controlling the disconnection between S3 and CT2; TGB3 is turned off, controlling the disconnection between S3 and CT4; TGF3 is turned on, CT3 is turned on to S4; TGB4 is turned off, S4 is disconnected from NS2, TGF4 is turned on, and CT4 is connected to NS1.

[0418] The present invention Figure 23A-23D At least one embodiment of the driving module shown in the figure is in operation, in the global display mode,

[0419] EN_PART provides a low voltage signal, EN_PART' provides a high voltage signal, TGQ is turned on, STV is connected to GI, and the starting voltage provided by STV is written into GI;

[0420] During reverse scanning, the Nth level driving circuit, the N-1th level driving circuit or the Nth level driving circuit may be controlled by BS1, NBS1, BS2, NBS2, BS3 and NB3 to start scanning;

[0421] When BS1 provides a high voltage signal, NBS1 provides a low voltage signal, BS2 and BS3 provide low voltage signals, and NBS2 and NBS3 provide a high voltage signal, TGI11 is turned on, controlling GI to be connected to TGI21, TGI2 and TGI3 are turned off, controlling GI to be disconnected from NIN-1, controlling GI to be disconnected from NIN-2, TGI21 is turned on, controlling GI to be connected to SN, so as to write the starting voltage into SN; TGFN-1 is turned off, TGC1 is turned on, TGBN-1 is turned on, CTN to be connected to SN-1, and SN to be disconnected from CTN-1; TGC2 is turned on, TGBN-2 is turned on, TGFN-2 is turned off, CTN-1 to be connected to SN-2, and SN-1 to be disconnected from CTN-2; TGBN-3 is turned on, TGFN-3 is turned off, CTN-2 to be connected to SN-3, and SN-2 to CTN-3 is disconnected;

[0422] When BS2 provides a high voltage signal, NBS2 provides a low voltage signal, BS1 and BS3 provide low voltage signals, and NBS1 and NBS3 provide a high voltage signal, TGI11 and TGI21 are turned off, TGI3 is turned off, GI is controlled to be disconnected from SN, GI is controlled to be disconnected from NIN-2, TGI2 is turned on, GI is controlled to be connected to NIN-1, so as to write the starting voltage to NIN-1; TGC1 is turned off, NIN-1 is controlled to be disconnected from CTN, and the signal transmission path between the N-1th level driving circuit and the Nth level driving circuit is disconnected; TGFN- 1 is disconnected, controlling the disconnection between SN and CTN-1, TGBN-1 is turned on, NIN-1 is connected to SN-1, so as to control the connection between CTN and SN-1; TGC2 is turned on, controlling the connection between CTN-1 and NIN-2, TGBN-2 is turned on, NIN-2 is connected to SN-2, so as to control the connection between CTN-1 and SN-2, TGFN-2 is turned off, SN-1 and CTN-2 are disconnected; TGBN-3 is turned on, TGFN-3 is turned off, CTN-2 and SN-3 are connected, and SN-2 and CTN-3 are disconnected;

[0423] When BS3 provides a high voltage signal, NBS3 provides a low voltage signal, BS1 and BS2 provide low voltage signals, and NBS1 and NBS2 provide a high voltage signal, TGI11 and TGI12 are turned off, controlling the disconnection between GI and SN, and controlling the disconnection between GI and NIN-1. TGI3 is turned on, and GI is connected to NIN-2 to write the starting voltage into NIN-2; TGC2 is turned off, controlling the disconnection between NIN-2 and CTN-1 to control the disconnection of the signal transmission path between the N-2 level driving circuit and the N-1 level driving circuit, TGBN-2 is turned on, and NIN-2 is connected to SN-2 to control the connection between CTN-1 and SN-2, TGFN-2 is turned off, and SN-1 is disconnected from CTN-2; TGBN-3 is turned on, and TGFN-3 is turned off, and CTN-2 is connected to SN-3, and SN-2 is disconnected from CTN-3.

[0424] The driving method described in at least one embodiment of the present invention is applied to the above-mentioned driving module, and the driving method includes: in a partial display mode,

[0425] The local display control circuit controls the connection between the starting voltage terminal and the local input terminal under the control of the display mode control signal;

[0426] During forward scanning, the first scanning control switch circuit controls the local input terminal to be connected to the mth input terminal under the control of the scanning control signal, and the mth input terminal is the input terminal of the initial stage driving circuit;

[0427] During reverse scanning, the second scanning control switch circuit controls the connection between the local input terminal and the nth input terminal under the control of the scanning control signal; the nth input terminal is the input terminal of the cutoff stage driving circuit.

[0428] The display device described in the embodiment of the present invention includes the above-mentioned driving module.

[0429] In at least one embodiment of the present invention, the display device may be a One Chip mode silicon-based micro display, but is not limited thereto.

[0430] The display device described in at least one embodiment of the present invention can adopt the One Chip mode, and the DDIC (display driver integrated circuit) and BP are both on the same IC (integrated circuit). Among them, the Si-BP (driver backplane) part is mainly composed of a pixel circuit array, a driver module and a Source Driver. At least one embodiment of the present invention provides a new driver module, which is mainly implemented by a digital circuit and provides a control signal for the row drive of the pixel circuit array. The driver module described in at least one embodiment of the present invention realizes the function of local display of the screen, that is, the light-emitting row drive signal output by the driver module can be directly transmitted to the local display area of ​​the specified resolution.

[0431] From the perspective of product performance, high-resolution devices need to be compatible with low-resolution images, and support users to freely adjust resolution requirements to adapt to different application scenarios, etc. For high-resolution devices compatible with low-resolution images, directly displaying the actual size of low-resolution images is a better option to maintain clarity, that is, directly using a corresponding number of pixels to restore the original resolution of the image (displaying the image in a point-to-point manner), and the display effect is that the image is only in the center of the screen. Part. For users to freely adjust the resolution, different users have different preferences for the display of the same picture / video. If a more flexible degree of freedom of use is provided, the competitiveness of the product can be enhanced. For example, the video playback screen supports both global display and intermediate screen display (cinema mode). Therefore, from the perspective of product performance, the local display technology provided by at least one embodiment of the present invention can not only improve the compatibility and versatility of the display product itself, but also enhance the user experience.

[0432] In terms of power consumption advantage, the local display solution provided by at least one embodiment of the present invention is different from the related local display solution in that: the traditional local display solution displays the non-local display area in black and the local display area as the target image; while in at least one embodiment of the present invention, only the local display area displays the target image, and the non-local display area does not work. Therefore, compared with the related local display solution, the power consumption of the driving module described in at least one embodiment of the present invention is reduced, and it can be applied to small silicon-based OLED products with limited resources.

[0433] Silicon-based OLED (Organic Light Emitting Diode) microdisplay is an active organic light emitting diode display device that combines CMOS (Complementary Metal Oxide Semiconductor) technology and OLED technology, using single-crystal silicon as the active driving backplane. Silicon-based OLED microdisplay has the advantages of ultra-high resolution, high PPI (Pixels Per Inch), high contrast, high brightness, low power consumption, small size, and light weight. Therefore, it is widely used in AR (Augmented Reality), VR (Virtual Reality), MR (Mixed Reality), EVF (Electronic Viewfinder), FPV (First Person View, a wireless camera return device installed on a remote-controlled aircraft model or vehicle model), drones, thermal imagers, night vision devices, infrared cameras, medical equipment, etc.

[0434] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A driving module, characterized in that: The invention comprises N-level driving circuits; N is an integer greater than 1; the m-th level driving circuit in the N-level driving circuits is a starting level driving circuit, the n-th level driving circuit in the N-level driving circuits is a cut-off level driving circuit, m and n are positive integers; m is greater than 1, and n is greater than m; the driving module further comprises a local display control circuit, a first scanning control switch circuit, and a second scanning control switch circuit; The local display control circuit is electrically connected to the display mode control terminal, the starting voltage terminal and the local input terminal, and is used to control the connection between the starting voltage terminal and the local input terminal under the control of the display mode control signal provided by the display mode control terminal in the local display mode; The first scanning control switch circuit is electrically connected to the scanning control terminal, the local input terminal and the m-th input terminal respectively, and is used to control the connection between the local input terminal and the m-th input terminal under the control of the scanning control signal provided by the scanning control terminal during forward scanning in the local display mode, wherein the m-th input terminal is the input terminal of the initial stage driving circuit; The second scan control switch circuit is electrically connected to the scan control terminal, the local input terminal and the nth input terminal respectively, and is used to control the connection between the local input terminal and the nth input terminal under the control of the scan control signal during reverse scanning in the local display mode; the nth input terminal is the input terminal of the cut-off stage driving circuit.

2. The driving module according to claim 1, characterized in that: The local display control circuit includes a local display control transmission gate; the display mode control terminal includes a first display mode control terminal and a second display mode control terminal; The positive phase control terminal of the local display control transmission gate is electrically connected to the first display mode control terminal, the negative phase control terminal of the local display control transmission gate is electrically connected to the second display mode control terminal, the first terminal of the local display control transmission gate is electrically connected to the starting voltage terminal, and the second terminal of the local display control transmission gate is electrically connected to the local input terminal; The first scan control switch circuit includes a first scan control transmission gate, and the second scan control switch circuit includes a second scan control transmission gate; the scan control terminal includes a forward scan control terminal and a reverse scan control terminal; The positive phase control terminal of the first scan control transmission gate is electrically connected to the positive scan control terminal, the negative phase control terminal of the first scan control transmission gate is electrically connected to the reverse scan control terminal, the first terminal of the first scan control transmission gate is electrically connected to the local input terminal, and the second terminal of the first scan control transmission gate is electrically connected to the mth input terminal; The positive phase control end of the second scan control transmission gate is electrically connected to the reverse scan control end, the reverse phase control end of the second scan control transmission gate is electrically connected to the positive scan control end, the first end of the second scan control transmission gate is electrically connected to the local input end, and the second end of the second scan control transmission gate is electrically connected to the nth input end.

3. The driving module according to claim 1, characterized in that: The starting stage driving circuit comprises an m-th stage driving signal generating circuit, a first starting switch circuit and a second starting switch circuit; The m-th stage driving signal generating circuit is electrically connected to the m-th input terminal and the m-th cascade output terminal respectively, and is used for generating an m-th cascade signal through the m-th cascade output terminal according to the m-th input signal connected to the m-th input terminal; The first starting switch circuit is electrically connected to the display mode control terminal, the mth input terminal and the first starting node respectively, and is used to control the connection or disconnection between the mth input terminal and the first starting node under the control of the display mode control signal provided by the display mode control terminal; The second starting switch circuit is electrically connected to the display mode control terminal, the mth cascade output terminal and the second starting node respectively, and is used to control the connection or disconnection between the mth cascade output terminal and the second starting node under the control of the display mode control signal.

4. The driving module according to claim 3, characterized in that: The first start switch circuit includes a first start switch transmission gate, the second start switch circuit includes a second start switch transmission gate, and the display mode control terminal includes a first display mode control terminal and a second display mode control terminal; The positive phase control terminal of the first start switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the first start switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the first start switch transmission gate is electrically connected to the mth input terminal, and the second terminal of the first start switch transmission gate is electrically connected to the first start node; The positive phase control terminal of the second start switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the second start switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the second start switch transmission gate is electrically connected to the mth cascade output terminal, and the second terminal of the second start switch transmission gate is electrically connected to the second start node.

5. The driving module according to claim 3, characterized in that: The initial stage driving circuit also includes an mth forward scanning control circuit and an mth reverse scanning control circuit; The mth forward scanning control circuit is electrically connected to the scanning control terminal, the mth cascade output terminal and the mth forward scanning output node respectively, and is used to control the connection between the mth cascade output terminal and the mth forward scanning output node under the control of the scanning control signal when performing forward scanning; The mth reverse scan control circuit is electrically connected to the scan control terminal, the mth input terminal and the mth reverse scan input node respectively, and is used to control the connection between the mth input terminal and the mth reverse scan input node under the control of the scan control signal when performing reverse scan; The m-th stage driving signal generating circuit is also electrically connected to the m-th driving signal output terminal, and is used to generate and provide the m-th driving signal through the m-th driving signal output terminal according to the m-th input signal.

6. The driving module according to claim 5, characterized in that: The mth forward scanning control circuit comprises an mth forward scanning control transmission gate, and the mth reverse scanning control circuit comprises an mth reverse scanning control transmission gate; the scanning control terminal comprises a forward scanning control terminal and a reverse scanning control terminal; The positive phase control end of the mth positive scan control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the mth positive scan control transmission gate is electrically connected to the reverse scan control end, the first end of the mth positive scan control transmission gate is electrically connected to the mth cascade output end, and the second end of the mth positive scan control transmission gate is electrically connected to the mth positive scan output node; The positive phase control end of the mth reverse scan control transmission gate is electrically connected to the reverse scan control end, the negative phase control end of the mth reverse scan control transmission gate is electrically connected to the positive scan control end, the first end of the mth reverse scan control transmission gate is electrically connected to the mth input end, and the second end of the mth reverse scan control transmission gate is electrically connected to the mth reverse scan input node.

7. The driving module according to claim 5, characterized in that: The m-th level driving signal generating circuit comprises an m-th level D flip-flop and an m-th AND gate; The input terminal of the m-th stage D flip-flop is electrically connected to the m-th input terminal, the control terminal of the m-th stage D flip-flop is electrically connected to the first control clock signal terminal, the first output terminal of the m-th stage D flip-flop is electrically connected to the m-th cascade output terminal, and the second output terminal of the m-th stage D flip-flop is electrically connected to the m-th output terminal; The first input terminal of the mth AND gate is electrically connected to the mth output terminal, the second input terminal of the mth AND gate is electrically connected to the mth cascade output terminal, and the output terminal of the mth AND gate is electrically connected to the mth driving signal output terminal.

8. The driving module according to claim 1, characterized in that: The cut-off stage driving circuit comprises an n-th stage driving signal generating circuit, an n-th forward scanning control circuit, an n-th reverse scanning control circuit, a first cut-off switch circuit and a second cut-off switch circuit; The n-stage driving signal generating circuit is electrically connected to the n-th input terminal and the n-th cascade output terminal respectively, and is used to generate and provide an n-th cascade signal through the n-th cascade output terminal according to the n-th input signal connected to the n-th input terminal; The nth forward scanning control circuit is electrically connected to the scanning control terminal, the nth cascade output terminal and the nth forward scanning output node respectively, and is used to control the connection between the nth cascade output terminal and the nth forward scanning output node under the control of the scanning control signal when performing forward scanning; The nth reverse scan control circuit is electrically connected to the scan control terminal, the nth input terminal and the nth reverse scan input node respectively, and is used to control the connection between the nth input terminal and the nth reverse scan input node under the control of the scan control signal when performing reverse scan; The first cut-off switch circuit is electrically connected to the display mode control terminal, the nth positive scan output node and the first cut-off node respectively, and is used to control the connection or disconnection between the nth positive scan output node and the first cut-off node under the control of the display mode control signal provided by the display mode control terminal; The second cutoff switch circuit is electrically connected to the display mode control terminal, the nth reverse scan input node and the second cutoff node respectively, and is used to control the connection or disconnection between the nth reverse scan input node and the second cutoff node under the control of the display mode control signal.

9. The driving module according to claim 8, characterized in that: The nth forward scanning control circuit comprises an nth forward scanning control transmission gate; the scanning control terminal comprises a forward scanning control terminal and a reverse scanning control terminal; The positive phase control end of the nth positive scan control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the nth positive scan control transmission gate is electrically connected to the negative scan control end, the first end of the nth positive scan control transmission gate is electrically connected to the nth cascade output end, and the second end of the nth positive scan control transmission gate is electrically connected to the nth positive scan output node; The nth reverse scan control circuit comprises an nth reverse scan control transmission gate; The positive phase control terminal of the nth reverse scan control transmission gate is electrically connected to the reverse scan control terminal, the negative phase control terminal of the nth reverse scan control transmission gate is electrically connected to the positive scan control terminal, the first terminal of the nth reverse scan control transmission gate is electrically connected to the nth input terminal, and the second terminal of the nth reverse scan control transmission gate is electrically connected to the nth reverse scan input node; The first cutoff switch circuit includes a first cutoff switch transmission gate; the display mode control terminal includes a first display mode control terminal and a second display mode control terminal; The positive phase control terminal of the first cut-off switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the first cut-off switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the first cut-off switch transmission gate is electrically connected to the nth positive scan output node, and the second terminal of the first cut-off switch transmission gate is electrically connected to the first cut-off node; The second cutoff switch circuit includes a second cutoff switch transmission gate; The positive phase control terminal of the second cut-off switch transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the second cut-off switch transmission gate is electrically connected to the first display mode control terminal, the first terminal of the second cut-off switch transmission gate is electrically connected to the nth reverse scan input node, and the second terminal of the second cut-off switch transmission gate is electrically connected to the second cut-off node.

10. The driving module according to claim 8, characterized in that: The n-th stage driving signal generating circuit is also electrically connected to the n-th driving signal output terminal, and is used to generate and provide the n-th driving signal through the n-th driving signal output terminal according to the n-th input signal.

11. The driving module according to claim 10, characterized in that: The nth stage driving signal generating circuit comprises an nth stage D flip-flop and an nth AND gate; The input terminal of the n-th stage D flip-flop is electrically connected to the n-th input terminal, the control terminal of the n-th stage D flip-flop is electrically connected to the second control clock signal terminal, the first output terminal of the n-th stage D flip-flop is electrically connected to the n-th cascade output terminal, and the second output terminal of the n-th stage D flip-flop is electrically connected to the n-th output terminal; The first input terminal of the nth AND gate is electrically connected to the mth output terminal, the second input terminal of the nth AND gate is electrically connected to the nth cascade output terminal, and the output terminal of the nth AND gate is electrically connected to the nth drive signal output terminal.

12. The driving module according to claim 1, characterized in that: Also included is a global display control circuit; The global display control circuit is electrically connected to the display mode control terminal, the starting voltage terminal and the global input terminal respectively, and is used to control the connection between the starting voltage terminal and the global input terminal under the control of the display mode control signal in the global display mode.

13. The driving module according to claim 12, characterized in that: The global display control circuit includes a global display control transmission gate; the display mode control terminal includes a first display mode control terminal and a second display mode control terminal; The positive phase control terminal of the global display control transmission gate is electrically connected to the second display mode control terminal, the negative phase control terminal of the global display control transmission gate is electrically connected to the first display mode control terminal, the first terminal of the global display control transmission gate is electrically connected to the starting voltage terminal, and the second terminal of the global display control transmission gate is electrically connected to the global input terminal.

14. The driving module according to claim 13, characterized in that: It also includes A positive scan input control circuits; A is a positive integer; The ath positive scan input control circuit is electrically connected to the global input terminal, the ath positive scan start control terminal, the scan control terminal and the ath input terminal respectively, and is used for performing forward scanning in the global display mode, and when scanning starts from the ath level driving circuit among the N-level driving circuits, under the control of the ath positive scan start control signal provided by the ath positive scan start control terminal and the scan control signal provided by the scan control terminal, controlling the connection between the global input terminal and the ath input terminal; the ath input terminal is the input terminal of the ath level driving circuit; a is a positive integer less than or equal to A.

15. The driving module according to claim 14, characterized in that: The ath forward scan input control circuit comprises an ath first forward scan input control transmission gate and an ath second forward scan input control transmission gate; the scan control terminal comprises a forward scan control terminal and a reverse scan control terminal; The positive phase control terminal of the a-th first positive scan input control transmission gate is electrically connected to the a-th positive scan start control terminal, the negative phase control terminal of the a-th first positive scan input control transmission gate is electrically connected to the a-th negative phase positive scan start control terminal, the first terminal of the a-th first positive scan input control transmission gate is electrically connected to the global input terminal, and the second terminal of the a-th first positive scan input control transmission gate is electrically connected to the first terminal of the a-th second positive scan input control transmission gate; The positive phase control end of the ath second positive scan input control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the ath second positive scan input control transmission gate is electrically connected to the negative scan control end, and the second end of the ath second positive scan input control transmission gate is electrically connected to the ath input end.

16. The driving module according to claim 15, characterized in that: A is greater than 1; The b-th level driving circuit includes the b-1-th control cutoff circuit; b is an integer less than or equal to A and greater than 1; The b-1th control cut-off circuit is electrically connected to the b-th positive scan start control terminal, the b-th input terminal and the b-1th positive scan output node respectively, and is used for controlling the connection or disconnection between the b-th input terminal and the b-1th positive scan output node under the control of the b-th positive scan start control signal provided by the b-th positive scan start control terminal; The b-th input terminal is the input terminal of the b-th stage driving circuit in the N-stage driving circuits.

17. The driving module according to claim 16, characterized in that: The b-1th control cutoff circuit includes a b-1th control cutoff transmission gate; the scanning control terminal includes a forward scanning control terminal and a reverse scanning control terminal; The positive phase control end of the b-1th control cutoff transmission gate is electrically connected to the b-th negative phase positive scan start control end, the negative phase control end of the b-1th control cutoff transmission gate is electrically connected to the b-th positive scan start control end, the first end of the b-1th control cutoff transmission gate is electrically connected to the b-th input end, and the second end of the b-1th control cutoff transmission gate is electrically connected to the b-1th positive scan output node.

18. The driving module according to claim 16 or 17, characterized in that: The b-1th level driving circuit in the N-level driving circuit comprises a b-1th positive scan control transmission gate; The positive phase control end of the b-1th positive scan control transmission gate is electrically connected to the positive scan control end, the negative phase control end of the b-1th positive scan control transmission gate is electrically connected to the negative scan control end, the first end of the b-1th positive scan control transmission gate is electrically connected to the b-1th cascade output end, and the second end of the b-1th positive scan control transmission gate is electrically connected to the b-1th positive scan output node; the b-1th cascade output end is the cascade output end of the b-1th level driving circuit.

19. The driving module according to claim 13, characterized in that: Also included is a first backsweep input control circuit; The first reverse scan input control circuit is electrically connected to the global input terminal, the first reverse scan start control terminal, the scan control terminal and the Nth input terminal respectively, and is used for performing reverse scanning in the global display mode, and when scanning starts from the Nth level driving circuit in the Nth level driving circuit, under the control of the first reverse scan start control signal provided by the first reverse scan start control terminal, controlling the connection between the global input terminal and the Nth input terminal; the Nth input terminal is the input terminal of the Nth level driving circuit in the Nth level driving circuit.

20. The driving module according to claim 19, characterized in that: The first anti-scan input control circuit includes a first first anti-scan input control transmission gate and a second first anti-scan input control transmission gate; The positive phase control terminal of the first first reverse scan input control transmission gate is electrically connected to the first reverse scan start control terminal, the negative phase control terminal of the first first reverse scan input control transmission gate is electrically connected to the first reverse reverse scan start control terminal, the first end of the first first reverse scan input control transmission gate is electrically connected to the global input terminal, and the second end of the first first reverse scan input control transmission gate is electrically connected to the first end of the second first reverse scan input control transmission gate; The positive phase control end of the second first reverse scan input control transmission gate is electrically connected to the reverse scan control end, the negative phase control end of the second first reverse scan input control transmission gate is electrically connected to the positive scan control end, and the second end of the second first reverse scan input control transmission gate is electrically connected to the Nth input end.

21. The driving module according to claim 19, characterized in that: It also includes C reverse sweep input control circuits; C is a positive integer; The c+1th reverse scan input control circuit is electrically connected to the global input terminal, the c+1th reverse scan start control terminal and the Ncth reverse scan input node respectively, and is used to perform reverse scanning in the global display mode, and when scanning starts from the Ncth level driving circuit in the N-level driving circuit, control the connection between the global input terminal and the Ncth reverse scan input node; c is a positive integer less than or equal to C.

22. The driving module according to claim 21, characterized in that: The c+1th reverse scan input control circuit comprises a c+1th reverse scan input control transmission gate; The positive phase control terminal of the c+1th reverse scan input control transmission gate is electrically connected to the c+1th reverse scan start control terminal, the negative phase control terminal of the c+1th reverse scan input control transmission gate is electrically connected to the c+1th reverse scan start control terminal, the first terminal of the c+1th reverse scan input control transmission gate is electrically connected to the global input terminal, and the second terminal of the c+1th reverse scan input control transmission gate is electrically connected to the Ncth reverse scan input node.

23. The driving module according to claim 21, characterized in that: Also includes C cutoff circuits; The cth cut-off circuit is electrically connected to the c+1th reverse scan start control terminal, the N-c+1th cascade output terminal and the Ncth reverse scan input node, respectively, and is used to control the connection or disconnection between the Ncth reverse scan input node and the N-c+1th cascade output terminal under the control of the c+1th reverse scan start control signal provided by the c+1th reverse scan start control terminal.

24. The driving module according to claim 22, characterized in that: The c-th cut-off circuit comprises a c-th cut-off transmission gate; The positive phase control terminal of the cth cut-off transmission gate is electrically connected to the c+1th negative reverse scan start control terminal, the negative phase control terminal of the cth cut-off transmission gate is electrically connected to the c+1th reverse scan start control terminal, the first end of the cth cut-off transmission gate is electrically connected to the Ncth reverse scan input node, and the second end of the cth cut-off transmission gate is electrically connected to the N-c+1th cascade output terminal.

25. A driving method, applied to the driving module according to any one of claims 1 to 24, characterized in that: The driving method comprises: in a partial display mode, The local display control circuit controls the connection between the starting voltage terminal and the local input terminal under the control of the display mode control signal; During forward scanning, the first scanning control switch circuit controls the local input terminal to be connected to the mth input terminal under the control of the scanning control signal, and the mth input terminal is the input terminal of the initial stage driving circuit; During reverse scanning, the second scanning control switch circuit controls the connection between the local input terminal and the nth input terminal under the control of the scanning control signal; the nth input terminal is the input terminal of the cutoff stage driving circuit.

26. A display device, characterized in that: Comprising a drive module as claimed in any one of claims 1 to 24.

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